Hi Richard, Would you like to attend one of the community meetings coming up and talk about this patch. -miki (Community manager Intel)

<martin.fernandez@...> wrote: If it helps drive progress, both AMI and Insyde have been testing building images based on this patch. I'd really like something like this to be included in

This patch modifies the build system in order to generate and use metadata to add it to the efi binaries. It uses python-uswid [1], given a set of config files (.ini) with the metadata it

Yes, I've been occasionally running builds on XCODE5. OvmfPkg currently fails with an unresolved symbol. -- Rebecca Cran

Hi, It's basically gcc 5 & newer. I think all the GCC4x variants can be dropped by now. take care, Gerd

I can sign up to maintain XCODE. I think Rebecca has been running test builds with XCODE. The XCODE5 names comes from the compiler flags needing to change for Xcode 5. Yes 2013 called and wants it

Sean: After remove, the supported tool chain will have its maintainer. This is a good idea. For CLANG tool chain, CLANGPDB and CLANGDWARF supports IA32 and X64 arch only, they can run

As discussed at the weekly tools meeting, I am proposing that all unsupported tool chains get removed from tools_def.template in the Basetools/Conf folder (edk2/tools_def.template at master ·

I know it has been a while but we have finally managed to POC a solution so I have filed a bugzilla here: https://bugzilla.tianocore.org/show_bug.cgi?id=3907 which contains the link to the EDK2 fork

Just to clarify I wasn't proposing to do MODE3 on all client systems, I was just commenting how MODE2 is simply a restricted version of MODE3 so it shouldn't be too much of a problem to support it

Actually I just remembered the reason for MODE2, 32bit PEI doesn't have enough MMIO space for a full enumeration even on client systems. A lot of discrete GPUs use >8GB of MMIO space these

Hi Mateusz, I agree that deciding how many PCI segments worth of MMIO to allocate for PCI configuration space and what the BAR(s) are for those PCI segments is a platform decision. Where the PCI root

Hi Brian, For server systems MODE3 would be useful in Post-Memory PEI. Assuming MODE3 is executed in Post-Memory PEI it would be possible to replace the DXE PCI enumeration with a simple driver that

Have you tried the lastest master? Thanks Guomin

I am getting this failure during build: ``` In file included from /home/edk2/edk2/MdePkg/Library/BasePrintLib/PrintLibInternal.h:22, from

Hi Nate, I see in your mail that you are referring to segment assignment and that is something that is firmly in the scope of the platform/silicon code. In general my assumption was that when the PEI

Nate, I agree that MODE 3 mainly makes sense for systems with 64-bit PEI, since only a limited number of PCI segments and MMIO space can fit below the 4GB boundary. On most of our large systems,

Hi All, I would like to add a few points here. First of all, allocating fixed BAR resources from a special address pool is not really scalable for any devices outside of Bus 0. Any device that is

Hello all, We have updated the Overview section of the Inclusive Language Guidelines to clarify two things. 1. Which version (via date) of the [[UEFI Inclusive Language Implementation

Mateusz, Your changes provide a nice cleanup to the driver mess in PEI. My main concern is that someone will later add a dependency which *requires* PCIe enumeration in PEI, without realizing that