OK. Let's go with 128KB for now. Shrinking the area is always easier than growing it. I prefer the black-hole approach, introduced in your current patch series, if it can work. Way less opportunity

"Laszlo Ersek" <lersek@...> wrote: [...] If I recall correctly, CPU consumes 64K of save/restore area. The rest 64K are temporary RAM for using in SMI relocation handler, if it's possible to

Hi Sean, Which OS/Compiler configurations are currently enabled for the Code Compilation Test? I have been working on enabling multiple OS/Compiler configurations in Azure Pipelines. There are some

Hi Sean, This looks really good and I agree we can combine the RFCs and enable more pre-commits tests. Additional responses below. Mike

Sean, There may be many ways to improve the process and reduce the work maintainers perform. So these are ideas we can explore further going forward. I will add the concept of a non-maintainer

Responses below. Mike

Somewhat related, in April there was a thread on virtio-dev that suggests there is interest in a virtio-audio device model: https://lists.oasis-open.org/archives/virtio-dev/201904/msg00049.html It

Hi Igor, (+Brijesh) long-ish pondering ahead, with a question at the end. I haven't written any OVMF code for this yet, but I've spent a few hours thinking about it. Progress! :) So, this looks

Rafael, Please let us know what you find out. I probably don''t have the time to help implement this feature, but I happy to help work on the architecture and design for UEFI accessibility on the

Thanks, that does help. -- Rebecca Cran

Rebecca, That process is to run the CI process locally. If you want to run on the Azure servers the idea is you push to a branch that has a CI policy or create a PR to a branch that has this build

"Laszlo Ersek" <lersek@...> wrote: If we don't have to 'park' hotplugged CPUs, then I don't see a need for an extra controller. Thanks for the tip! ... patches with a stolen register are on

test lockable SMRAM at default SMBASE feature introduced by commit "q35: implement 128K SMRAM at default SMBASE address" Signed-off-by: Igor Mammedov <imammedo@...> --- tests/q35-test.c | 105

Use commit (2f295167e0 q35/mch: implement extended TSEG sizes) for inspiration and (ab)use reserved register in config space at 0x9c offset [*] to extend q35 pci-host with ability to use 128K

Try #2 using PCI config space of MCH to negotiate/lock SMRAM at 0x30000. CC: devel@edk2.groups.io CC: alex.williamson@... CC: jun.nakajima@... CC: pbonzini@... CC:

In that wiki page, it says: "To work with this branch and run tests immediately, all you need to do is: |pip install --upgrade -r requirements.txt stuart_setup -c .\CISettings.py stuart_update -c

You need to post about yourself in this topic to actually get unrestricted (its a way of stopping bots): https://forum.audiogames.net/post/461466/#p461466 Sorry I didn't mention that, I forgot about

Hi Ethin I just get registered at the forum, but have no permission to post there. The message "Sorry! no permission to post a reply" is presented to my user. Thanks Rafael Em sex, 13 de set de

Hi Ethin I will contact the community you mentioned to get feedback and align expectations. Hope to hear comments and feedback of other member of discussion (here at EDK2, that is where the work will

[...] I thought it could be a register on the new CPU hotplug controller that we're going to need anyway (if I understand correctly, at least). But: Yes, that should work. In fact, I had