Date   

[edk2][PATCH V1 1/1] MdePkg: Add CEDT structure

Sayanta Pattanayak
 

CXL Early Discovery Table (CEDT) enables OSes to locate CXL Host Bridges
and location of Host Bridge Registers early during boot and configure
Host Bridge Decoders according to ACPI information.

This patch adds CEDT structures of type CXL Host Bridge Structure (CHBS)
and CXL Fixed Memory Window Structure (CFMWS) according to CXL
specification, Revision 3.0, Version 0.7.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@...>
---
MdePkg/Include/IndustryStandard/Acpi64.h | 46 +++++++++++++++++++-
1 file changed, 45 insertions(+), 1 deletion(-)

Link to github branch for this patch -
https://github.com/SayantaP-arm/edk2/tree/cxl

diff --git a/MdePkg/Include/IndustryStandard/Acpi64.h b/MdePkg/Include/In=
dustryStandard/Acpi64.h
index fe5ebfac2b37..ea799bb617af 100644
--- a/MdePkg/Include/IndustryStandard/Acpi64.h
+++ b/MdePkg/Include/IndustryStandard/Acpi64.h
@@ -2,7 +2,7 @@
ACPI 6.4 definitions from the ACPI Specification Revision 6.4 Jan, 202=
1.
=20
Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2019 - 2022, Arm Limited All rights reserved.<BR>
=20
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -2833,6 +2833,49 @@ typedef struct {
#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0=
x02
#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0=
x03
=20
+/**
+ * CEDT structure members, which are common across all types of CEDT
+ * structures.
+**/
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+} EFI_ACPI_CEDT_HEADER;
+
+/**
+ * CXL Host Bridge Structure (CHBS), which describes a CXL Host Bridge.
+ * It identifies which version of CXL Host Bridge is supported and point=
s
+ * to the register block, needed for programming HDM decoder.
+**/
+typedef struct {
+ EFI_ACPI_CEDT_HEADER CedtHeader;
+ UINT32 UID;
+ UINT32 CXLVersion;
+ UINT32 Reserved;
+ UINT64 Base;
+ UINT64 Length;
+} EFI_ACPI_CEDT_CHBS_STRUCTURE;
+
+/**
+ * CXL Fixed Memory Window Structure (CFMWS), describes zero or more
+ * Host Physical Address (HPA) windows, which are associated with each
+ * CXL Host Bridge. Each window represents a contiguous HPA range that
+ * may be interleaved across one or more targets.
+**/
+typedef struct {
+ EFI_ACPI_CEDT_HEADER CedtHeader;
+ UINT32 Reserved1;
+ UINT64 BaseHPA;
+ UINT64 WindowSize;
+ UINT8 ENIW;
+ UINT8 InterleaveArithmetic;
+ UINT16 Reserved2;
+ UINT32 HBIG;
+ UINT16 WindowRestrictions;
+ UINT16 QTGId;
+} EFI_ACPI_CEDT_CFMWS_STRUCTURE;
+
//
// Known table signatures
//
@@ -3152,6 +3195,7 @@ typedef struct {
///
#define EFI_ACPI_6_4_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E',=
'N', 'V')
=20
+#define EFI_ACPI_6_4_CEDT_SIGNATURE SIGNATURE_32('C', 'E', 'D', 'T')
#pragma pack()
=20
#endif
--=20
2.17.1


[edk2-platforms][PATCH V1 3/3] Platform/Sgi: Add CXL Early Discovery Table(CEDT) for Rd-N2-Cfg1 Platform

Sayanta Pattanayak
 

CEDT structure type, CXL Host Bridge(CHBS) describes the location of CXL
Host Bridge, allowing OS to configure CXL Host Bridge.

CEDT structure type, CXL Fixed Memory Window(CFMWS) describes Host
Physical Address(HPA) window that is associated with a CXL Host bridge.

ACPI0017 is a SW entity under System Bus of ACPI tree, that indicates
the presence of CEDT table.

ACPI0016 is a SW entity under System Bus of ACPI tree, that represents
a CXL Host Bridge.

This patch demonstrates, the addition of CEDT structures, that allows
OS drivers to detect the presence of CXL Host bridge and CEDT structures
and then perform necessary configuration of CXL Host bridge registers
according to ACPI information.

In this patch, Interleave target number is considered 1 for demonstrating
a reference solution with CEDT structures. There is no real interleaving
address windows across multiple ports with this configuraiton. It is
same as single port CXL Host bridge.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@...>
---
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 7 +-
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc | 86 ++++++++++++=
++
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl | 119 ++++++++++++=
++++++++
3 files changed, 210 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Plat=
form/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
index 4b36c3e5ce..72d8b58c31 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2021, Arm Ltd. All rights reserved.
+# Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -23,8 +23,10 @@
RdN2Cfg1/Dsdt.asl
RdN2Cfg1/Madt.aslc
RdN2Cfg1/Pptt.aslc
+ RdN2Cfg1/Cedt.aslc
+ RdN2Cfg1/Ssdt.asl
Spcr.aslc
- Ssdt.asl
+ Mcfg.aslc
SsdtRos.asl
SsdtEvents.asl
=20
@@ -73,3 +75,4 @@
gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv
=20
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc b/Platform=
/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc
new file mode 100644
index 0000000000..9ff59c68e5
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc
@@ -0,0 +1,86 @@
+/** @file
+ CXL Early Discovery Table (CEDT) for RD-N2-Cfg1 platform
+
+ This file describes CXL Host Bridge Structure(CHBS) and
+ CXL Fixed Memory Window Structure(CFMWS), which are used by Operating
+ System during boot for locating CXL host bridge and performing necessa=
ry
+ decoder configuration according to ACPI information.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - CXL Specificiation Revision 3.0, Version 0.7, Chapter 9.16.1,
+ CXL Early Discovery Table (CEDT)
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+
+#define INTERLEAVE_TARGETS 1
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_CEDT_CFMWS_STRUCTURE Cfmws;
+ UINT32 InterleaveTarget[INTERLEAVE_TARGETS];
+} EFI_ACPI_CEDT_CFMWS_AND_INTERLEAVE_TARGET_STRUCTURE;
+
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_CEDT_CFMWS_AND_INTERLEAVE_TARGET_STRUCTURE CfmwsTarget;
+ EFI_ACPI_CEDT_CHBS_STRUCTURE Chbs;
+} EFI_ACPI_CEDT_STRUCTURE_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_CEDT_STRUCTURE_TABLE Cedt =3D {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_4_CEDT_SIGNATURE,
+ EFI_ACPI_CEDT_STRUCTURE_TABLE,
+ 1
+ ),
+ {
+ {
+ // CFMWS
+ {
+ 1,
+ EFI_ACPI_RESERVED_BYTE,
+ sizeof (EFI_ACPI_CEDT_CFMWS_AND_INTERLEAVE_TARGET_STRUCTURE)
+ },
+ EFI_ACPI_RESERVED_DWORD,
+ 0x3fe00000000,
+ 0x200000000,
+ 0,
+ 0,
+ EFI_ACPI_RESERVED_WORD,
+ 4,
+ 2,
+ 0
+ },
+ {
+ //Interleave target list
+ 1
+ }
+ },
+ {
+ // CHBS
+ {
+ 0,
+ EFI_ACPI_RESERVED_BYTE,
+ sizeof (EFI_ACPI_CEDT_CHBS_STRUCTURE)
+ },
+ 1,
+ 1,
+ EFI_ACPI_RESERVED_DWORD,
+ 0x10D0000000,
+ 0x1000
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from rem=
oving
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable =3D &Cedt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl b/Platform/=
ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl
new file mode 100644
index 0000000000..119f35b59d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl
@@ -0,0 +1,119 @@
+/** @file
+ Secondary System Description Table (SSDT)
+
+ Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock("SsdtPci.aml", "SSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_A=
RM_OEM_REVISION) {
+ Scope (_SB) {
+ // PCI Root Complex
+ Device (PCI0) {
+ Name (_HID, "ACPI0016") // CXL Host Bridge
+ Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
+ Name (_SEG, Zero) // PCI Segment Group number
+ Name (_BBN, Zero) // PCI Base Bus Number
+ Name (_UID, 1) // Unique ID
+ Name (_CCA, 1) // Cache Coherency Attribute
+
+ // Root complex resources
+ Method (_CRS, 0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ WordBusNumber ( // Bus numbers assigned to this root
+ ResourceProducer,
+ MinFixed,
+ MaxFixed,
+ PosDecode,
+ 0, // AddressGranularity
+ 0, // AddressMinimum - Minimum Bus Number
+ 255, // AddressMaximum - Maximum Bus Number
+ 0, // AddressTranslation - Set to 0
+ 256 // RangeLength - Number of Busses
+ )
+
+ DWordMemory ( // 32-bit BAR Windows
+ ResourceProducer,
+ PosDecode,
+ MinFixed,
+ MaxFixed,
+ Cacheable,
+ ReadWrite,
+ 0x00000000, // Granularity
+ 0x60000000, // Min Base Address
+ 0x6FFFFFFF, // Max Base Address
+ 0x00000000, // Translate
+ 0x10000000 // Length
+ )
+
+ QWordMemory ( // 64-bit BAR Windows
+ ResourceProducer,
+ PosDecode,
+ MinFixed,
+ MaxFixed,
+ Cacheable,
+ ReadWrite,
+ 0x00000000, // Granularity
+ 0x4000000000, // Min Base Address
+ 0x5FFFFFFFFF, // Max Base Address
+ 0x00000000, // Translate
+ 0x2000000000 // Length
+ )
+
+ DWordIo ( // IO window
+ ResourceProducer,
+ MinFixed,
+ MaxFixed,
+ PosDecode,
+ EntireRange,
+ 0x00000000, // Granularity
+ 0x00000000, // Min Base Address
+ 0x007FFFFF, // Max Base Address
+ 0x77800000, // Translate
+ 0x00800000, // Length
+ ,
+ ,
+ ,
+ TypeTranslation
+ )
+ }) // Name (RBUF)
+
+ Return (RBUF)
+ } // Method (_CRS)
+
+ Device (RES0)
+ {
+ Name (_HID, "PNP0C02") // PNP Motherboard Resources
+ Name (_CRS, ResourceTemplate ()
+ {
+ QWordMemory (
+ ResourceProducer,
+ PosDecode,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x00000000,
+ 0x1010000000, // ECAM Start
+ 0x101FFFFFFF, // ECAM End
+ 0x00000000,
+ FixedPcdGet64 (PcdPciExpressBaseSize), // ECAM Size
+ ,
+ ,
+ ,
+ AddressRangeMemory,
+ TypeStatic
+ )
+ })
+ }
+ }
+
+ Device (CXL1) { // Host bridge CEDT
+ Name (_HID, "ACPI0017")
+ Name (_UID, 1)
+ }
+ }
+}
--=20
2.17.1


[edk2-platforms][PATCH V1 2/3] Platform/Sgi: prepare SRAT, HMAT table

Sayanta Pattanayak
 

Get remote memory node details(number of memory nodes, remote memory
range address) by using CxlProtocol interfaces.
Prepare SRAT table with both Local memory, remote memory blocks,
along with other necessary details.

Prepare HMAT table with required proximity, latency info.

In Single-Chip scenario, one of the primary use case, of having
extended remote memory area and SRAT,HMAT table, is to avail the
extended remote memory region as CXL.Memory.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@...>
---
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc =
| 7 +
Platform/ARM/SgiPkg/SgiPlatform.fdf =
| 9 +-
Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerator.inf=
| 73 +++++
Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerator.h =
| 36 +++
Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerator.c =
| 72 +++++
Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/HmatTableGenerator.c =
| 120 ++++++++
Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/SratTableGenerator.c =
| 290 ++++++++++++++++++++
7 files changed, 606 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPk=
g/SgiPlatform.dsc.inc
index 2f5dadfaef..4113d8ad90 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -308,6 +308,13 @@
#
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
=20
+ #
+ # SRAT/HMAT Table generator
+ #
+!if $(EDK2_ENABLE_REMOTE_CXL_MEM) =3D=3D TRUE
+ Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerator.i=
nf
+!endif
+
#
# FAT filesystem + GPT/MBR partitioning
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/Sg=
iPlatform.fdf
index 4018480b42..9c5bfd30ef 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -194,6 +194,13 @@ READ_LOCK_STATUS =3D TRUE
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
=20
+ #
+ # SRAT/HMAT Table generator
+ #
+!if $(EDK2_ENABLE_REMOTE_CXL_MEM) =3D=3D TRUE
+ INF Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerat=
or.inf
+!endif
+
#
# Networking stack
#
diff --git a/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableG=
enerator.inf b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTabl=
eGenerator.inf
new file mode 100644
index 0000000000..2be6d5a2aa
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerato=
r.inf
@@ -0,0 +1,73 @@
+## @file
+# ACPI table generator sources.
+#
+# SRAT, HMAT table generator sources prepare respective ACPI tables, th=
at
+# help OSPM to identify device domains, memory attributes etc.
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ INF_VERSION =3D 0x0001001A
+ BASE_NAME =3D AcpiTableGeneratorLib
+ FILE_GUID =3D fd0e015b-bbbf-474c-8b68-9ea1b555f91=
3
+ MODULE_TYPE =3D DXE_DRIVER
+ VERSION_STRING =3D 1.0
+ ENTRY_POINT =3D AcpiTableGeneratorEntryPoint
+
+[Sources.common]
+ AcpiTableGenerator.c
+ HmatTableGenerator.c
+ SratTableGenerator.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ DynamicTablesPkg/DynamicTablesPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+ Platform/ARM/Drivers/CxlDxe/CxlDxe.dec
+
+
+[LibraryClasses]
+ ArmPlatformLib
+ BaseLib
+ DebugLib
+ HobLib
+ IoLib
+ MemoryAllocationLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiAcpiTableProtocolGuid ## CONSUMES
+ gCxlPlatformProtocolGuid ## CONSUMES
+
+[Guids]
+
+[Depex]
+ gEfiAcpiTableProtocolGuid
+ AND gCxlPlatformProtocolGuid
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Base
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+ gArmSgiTokenSpaceGuid.PcdGicSize
+
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+
+ gArmTokenSpaceGuid.PcdMmBufferBase
+ gArmTokenSpaceGuid.PcdMmBufferSize
+
+ gArmSgiTokenSpaceGuid.PcdChipCount
+
+ gArmSgiTokenSpaceGuid.PcdNumLocalMemBlock
+
+ gArmSgiTokenSpaceGuid.PcdRemoteMemoryBase
diff --git a/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableG=
enerator.h b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableG=
enerator.h
new file mode 100644
index 0000000000..597c0f7a1e
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerato=
r.h
@@ -0,0 +1,36 @@
+/** @file
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef __ACPI_TABLE_GENERATOR_H__
+#define __ACPI_TABLE_GENERATOR_H__
+
+#include <Library/AcpiLib.h>
+#include <Library/AmlLib/AmlLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/AcpiTable.h>
+#include <Protocol/Cxl.h>
+#include <SgiAcpiHeader.h>
+#include <SgiPlatform.h>
+
+#define LOWER_BYTES_MASK 0xFFFFF000
+#define LOWER_BYTES_SHIFT 32
+
+EFI_STATUS EFIAPI SratTableGenerator (
+ EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol
+ );
+
+EFI_STATUS EFIAPI HmatTableGenerator (
+ EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol
+ );
+
+#endif // __ACPI_TABLE_GENERATOR_H__
diff --git a/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableG=
enerator.c b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableG=
enerator.c
new file mode 100644
index 0000000000..c0958c8a5a
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/AcpiTableGenerato=
r.c
@@ -0,0 +1,72 @@
+/** @file
+ ACPI Table Generator Entrypoint. It invokes functions to
+ generate SRAT, HMAT tables.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "AcpiTableGenerator.h"
+
+STATIC EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol =3D NULL;
+
+/**
+ Initialize function for the driver.
+
+ Locate ACPI Table protocol and installs SRAT, HMAT tables.
+
+ @param[in] ImageHandle Handle to image.
+ @param[in] SystemTable Pointer to System table.
+
+ @retval EFI_SUCCESS On successful installation of SRAT, HMAT ACPI ta=
bles.
+ @retval Other Failure in installing ACPI tables.
+
+**/
+EFI_STATUS
+EFIAPI
+AcpiTableGeneratorEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status =3D gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&mAcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to locate ACPI table protocol, status: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ return Status;
+ }
+
+ Status =3D SratTableGenerator (mAcpiTableProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to create SRAT table: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ return Status;
+ }
+
+ Status =3D HmatTableGenerator (mAcpiTableProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to create HMAT table: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ return Status;
+ }
+
+ return Status;
+}
diff --git a/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/HmatTableG=
enerator.c b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/HmatTableG=
enerator.c
new file mode 100644
index 0000000000..91c8a18d13
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/HmatTableGenerato=
r.c
@@ -0,0 +1,120 @@
+/** @file
+ Heterogeneous Memory Attribute Table (HMAT) Table Generator.
+
+ The (HMAT) describes the memory attributes, such as bandwidth and late=
ncy
+ details, related to Memory Proximity Domains. The software is expected
+ to use this information as a hint for optimization, or when the system=
has
+ heterogeneous memory.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - ACPI 6.4, Chapter 5.2.27 Heterogeneous Memory Attribute Table (H=
MAT)
+**/
+
+#include "AcpiTableGenerator.h"
+
+#define CHIP_CNT 2
+#define INITATOR_PROXIMITY_DOMAIN_CNT 2
+#define TARGET_PROXIMITY_DOMAIN_CNT 2
+
+/* HMAT Table */
+typedef struct InitiatorTargetProximityMatrix {
+ UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
+ UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
+ UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_D=
OMAIN_CNT];
+} INITIATOR_TARGET_PROXIMITY_MATRIX;
+
+typedef struct {
+ EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
+ EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES
+ Proximity[CHIP_CNT];
+ EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO
+ LatencyInfo;
+ INITIATOR_TARGET_PROXIMITY_MATRIX Matrix;
+} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
+
+EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat =3D {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
+ EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
+ EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
+ ),
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ },
+
+ // Memory Proximity Domain
+ {
+ EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT =
(
+ 1, 0x0, 0x0),
+ EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT =
(
+ 1, 0x0, 0x1),
+ },
+
+ // Latency Info
+ EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO=
_INIT (
+ 0, 0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT,=
100),
+ {
+ {0, 1},
+ {0, 1},
+ {
+ //
+ // The latencies mentioned in this table are hypothetical values a=
nd
+ // represents typical latency between two chips. These values are
+ // applicable only for RD-N1-Edge dual-chip fixed virtual platform=
and
+ // should not be reused for other platforms.
+ //
+ 10, 20,
+ 20, 10,
+ }
+ }
+};
+
+/**
+ Installs the HMAT table.
+
+ @param[in] mAcpiTableProtocol Handle to AcpiTableProtocol.
+
+ @retval EFI_SUCCESS On successful installation of HMAT table.
+ @retval Other Failure in installing HMAT table.
+**/
+EFI_STATUS
+EFIAPI
+HmatTableGenerator (
+ IN EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol
+ )
+{
+ EFI_STATUS Status;
+ UINTN AcpiTableHandle;
+
+ Status =3D mAcpiTableProtocol->InstallAcpiTable (
+ mAcpiTableProtocol,
+ &Hmat,
+ sizeof (Hmat),
+ &AcpiTableHandle
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: HMAT table installation failed, status: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ } else {
+ DEBUG ((
+ DEBUG_INFO,
+ "Installed HMAT table \n"
+ ));
+ }
+
+ return Status;
+}
+
diff --git a/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/SratTableG=
enerator.c b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/SratTableG=
enerator.c
new file mode 100644
index 0000000000..84d191252d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/SratTableGenerato=
r.c
@@ -0,0 +1,290 @@
+/** @file
+ SRAT Table Generator.
+
+ SRAT table provides information that allows OSPM to associate devices =
such as
+ processors with system locality / proximity domains and clock domains.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - ACPI 6.4, Chapter 5.2.16 System Resource Affinity Table (SRAT)
+ **/
+
+#include <Library/HobLib.h>
+#include "AcpiTableGenerator.h"
+
+STATIC EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE *RemoteMemory;
+
+EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER SratHeader =3D {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER,
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION
+ ),
+ 0x00000001,
+ EFI_ACPI_RESERVED_QWORD
+};
+
+EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE Gicc[8] =3D {
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000000, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000001, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000002, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000003, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000004, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000005, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000006, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000007, 0x00000001, 0x00000000),
+#if ((CORE_COUNT * CLUSTER_COUNT) > 8)
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000008, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000009, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000A, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000B, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000C, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000D, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000E, 0x00000001, 0x00000000),
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x0000000F, 0x00000001, 0x00000000),
+#endif
+};
+
+EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE LocalMemory[3] =3D {
+ // Memory at 32-bit address space
+ EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdSystemMemoryBase),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ // Memory at 64-bit address space
+ EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdDramBlock2Base),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+ // MmBuffer region
+ EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdMmBufferBase),
+ FixedPcdGet64 (PcdMmBufferSize), 0x00000001),
+};
+
+/**
+ Fetch the details of Remote Memory Node, using CXL protocol interfaces=
.
+
+ By using CXL platform protocol interfaces, fetch number CXL remote mem=
ory
+ nodes and their corresponding configurations(Base address, length).
+
+ @param[out] RemoteMemCount Number of Remote CXL memory nodes.
+
+ @retval RemoteMem Remote memory configuraiton on successful fet=
ching
+ of remote memory configuration.
+ @retval Zero Returns Zero on failure.
+**/
+STATIC
+REMOTE_MEMORY_CONFIG *
+FetchRemoteCxlMem (OUT UINT32 *RemoteMemCount)
+{
+ EFI_STATUS Status;
+ CXL_PLATFORM_PROTOCOL *CxlProtocol;
+ REMOTE_MEMORY_CONFIG *RemoteMem;
+ UINT32 RemoteMemNumber;
+
+ Status =3D gBS->LocateProtocol (
+ &gCxlPlatformProtocolGuid,
+ NULL,
+ (VOID **)&CxlProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to locate CXL Protocol, status: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ return 0;
+ }
+
+ RemoteMemNumber =3D CxlProtocol->CxlGetRemoteMemCount();
+ if (RemoteMemNumber) {
+ RemoteMem =3D (REMOTE_MEMORY_CONFIG *) AllocateZeroPool (
+ sizeof (REMOTE_MEMORY_CONFIG)=
*
+ RemoteMemNumber
+ );
+ if (RemoteMem =3D=3D NULL) {
+ DEBUG ((DEBUG_WARN, "No memory for Remote Memory affinity structur=
e:\n"));
+ return 0;
+ }
+ }
+
+ Status =3D CxlProtocol->CxlGetRemoteMem(RemoteMem, &RemoteMemNumber);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to get CXL Remote memory details: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ FreePool(RemoteMem);
+ return 0;
+ }
+
+ *RemoteMemCount =3D RemoteMemNumber;
+
+ return RemoteMem;
+}
+
+/**
+ Fetch the details of all Remote Memory Node, using CXL protocol interf=
aces.
+ Prepare SRAT table structure by combining LocalMemoryNode and
+ RemoteMemoryNode information. Thereafter installs the SRAT table.
+
+ @param[in] mAcpiTableProtocol Handle to AcpiTableProtocol.
+
+ @retval EFI_SUCCESS On successful installation of SRAT table.
+ @retval Other Failure in installing SRAT table.
+**/
+EFI_STATUS
+EFIAPI
+SratTableGenerator (
+ IN EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol
+ )
+{
+ EFI_STATUS Status;
+ UINTN AcpiTableHandle;
+ UINTN MemoryNodeCount;
+ UINTN TableSize;
+ UINT8 Idx;
+ VOID *Srat, *SratDataNext;
+ REMOTE_MEMORY_CONFIG *RemoteMem;
+ UINT32 RemoteMemCount;
+ UINT64 HostPhysicalBase;
+ UINT64 MemDevicePhysicalBase;
+
+
+ RemoteMem =3D FetchRemoteCxlMem(&RemoteMemCount);
+
+ if (RemoteMemCount) {
+ RemoteMemory =3D
+ AllocateZeroPool (sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE) =
*
+ RemoteMemCount
+ );
+ if (RemoteMemory =3D=3D NULL) {
+ DEBUG ((DEBUG_WARN, "No memory for Remote Memory affinity structur=
e:\n"));
+ RemoteMemCount =3D 0;
+ } else {
+ HostPhysicalBase =3D FixedPcdGet64 (PcdRemoteMemoryBase);
+
+ for (Idx =3D 0; Idx < RemoteMemCount; Idx++) {
+ RemoteMemory[Idx].Type =3D 1;
+ RemoteMemory[Idx].Length =3D
+ sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE);
+ RemoteMemory[Idx].ProximityDomain =3D 1;
+ RemoteMemory[Idx].Reserved1 =3D EFI_ACPI_RESERVED_WORD;
+
+ MemDevicePhysicalBase =3D HostPhysicalBase + RemoteMem[Idx].DpaA=
ddress;
+ RemoteMemory[Idx].AddressBaseLow =3D
+ MemDevicePhysicalBase & LOWER_BYTES_MASK;
+ RemoteMemory[Idx].AddressBaseHigh =3D
+ MemDevicePhysicalBase >> LOWER_BYTES_SHIFT;
+
+ RemoteMemory[Idx].LengthLow =3D
+ RemoteMem[Idx].DpaLength & LOWER_BYTES_MASK;
+ RemoteMemory[Idx].LengthHigh =3D
+ RemoteMem[Idx].DpaLength >> LOWER_BYTES_SHIFT;
+
+ RemoteMemory[Idx].Reserved2 =3D EFI_ACPI_RESERVED_WORD;
+ RemoteMemory[Idx].Flags =3D 0x1;
+ RemoteMemory[Idx].Reserved3 =3D EFI_ACPI_RESERVED_WORD;
+
+ HostPhysicalBase +=3D
+ RemoteMemory[Idx].LengthLow +
+ RemoteMemory[Idx].LengthHigh;
+ }
+ }
+
+ FreePool(RemoteMem);
+ }
+
+ MemoryNodeCount =3D FixedPcdGet32 (PcdNumLocalMemBlock);
+
+ MemoryNodeCount +=3D RemoteMemCount;
+ TableSize =3D sizeof (Gicc) +
+ sizeof (SratHeader) +
+ (MemoryNodeCount *
+ sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE));
+
+ Srat =3D AllocatePool (TableSize);
+
+ if (Srat =3D=3D NULL) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to allocate memory for SRAT table\n",
+ __FUNCTION__
+ ));
+
+ FreePool(RemoteMemory);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ CopyMem (
+ Srat,
+ &SratHeader,
+ sizeof (SratHeader)
+ );
+
+ SratDataNext =3D Srat + sizeof (SratHeader);
+ CopyMem (
+ SratDataNext,
+ Gicc,
+ sizeof (Gicc)
+ );
+
+ SratDataNext =3D SratDataNext + sizeof (Gicc);
+ CopyMem (
+ SratDataNext,
+ LocalMemory,
+ sizeof (LocalMemory)
+ );
+
+ SratDataNext =3D ((char *)SratDataNext + sizeof (LocalMemory));
+ if (RemoteMemCount) {
+ CopyMem (
+ SratDataNext,
+ RemoteMemory,
+ sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE) *
+ RemoteMemCount
+ );
+ }
+
+ ((EFI_ACPI_DESCRIPTION_HEADER *)Srat)->Length =3D TableSize;
+
+ Status =3D mAcpiTableProtocol->InstallAcpiTable (
+ mAcpiTableProtocol,
+ (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *)Srat,
+ TableSize,
+ &AcpiTableHandle
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: SRAT table installation failed, status: %r\n",
+ __FUNCTION__,
+ Status
+ ));
+ } else {
+ DEBUG ((DEBUG_INFO, "Installed SRAT table \n"));
+ }
+
+ return Status;
+}
--=20
2.17.1


[edk2-platforms][PATCH V1 1/3] Platform/ARM: add CXL driver

Sayanta Pattanayak
 

Adds support for CXL driver. The present solution supports -
Discovering PCIe device with CXL and DOE capbility.
Execute DOE operation to fetch CDAT structures, which holds
information about remote CXL Memory region and it's attributes.

Also installs a Protocol, which can be used by platform modules
to fetch the details about remote memory.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@...>
---
Platform/ARM/Drivers/CxlDxe/CxlDxe.dec | 21 +
Platform/ARM/Drivers/CxlDxe/CxlDxe.inf | 48 ++
Platform/ARM/Drivers/CxlDxe/CxlDxe.h | 156 ++++++
Platform/ARM/Include/Protocol/Cxl.h | 57 +++
Platform/ARM/Drivers/CxlDxe/CxlDxe.c | 530 ++++++++++++++++++++
5 files changed, 812 insertions(+)

diff --git a/Platform/ARM/Drivers/CxlDxe/CxlDxe.dec b/Platform/ARM/Driver=
s/CxlDxe/CxlDxe.dec
new file mode 100644
index 0000000000..d2ebc5ca61
--- /dev/null
+++ b/Platform/ARM/Drivers/CxlDxe/CxlDxe.dec
@@ -0,0 +1,21 @@
+#/** @file
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION =3D 0x0001001B
+ PACKAGE_NAME =3D CxlDxe
+ PACKAGE_GUID =3D cbeba70a-4351-4ff6-a074-6854337b39b=
e
+ PACKAGE_VERSION =3D 0.1
+
+[Guids.common]
+ gArmRemoteCxlMemDescriptorGuid =3D { 0x29e54f5e, 0x365a, 0x4235, { 0xb=
a, 0x62, 0xc8, 0x32, 0xd7, 0x66, 0x08, 0x52 } }
+
+[Protocols]
+ gCxlPlatformProtocolGuid =3D { 0x88c7bb9c, 0x6175, 0x4bfb, { 0x96, 0x4=
0, 0xd2, 0x53, 0xd3, 0xd8, 0x7c, 0x17 } }
+
+[Includes.common]
+ Platform/ARM/Include
diff --git a/Platform/ARM/Drivers/CxlDxe/CxlDxe.inf b/Platform/ARM/Driver=
s/CxlDxe/CxlDxe.inf
new file mode 100644
index 0000000000..8bf130d1c5
--- /dev/null
+++ b/Platform/ARM/Drivers/CxlDxe/CxlDxe.inf
@@ -0,0 +1,48 @@
+## @file
+# Discovers CXL capable device and reads out device properties.
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ INF_VERSION =3D 0x0001001B
+ BASE_NAME =3D CxlDxe
+ FILE_GUID =3D 29e54f5e-365a-4235-ba62-c832d766085=
2
+ MODULE_TYPE =3D DXE_DRIVER
+ VERSION_STRING =3D 1.0
+ ENTRY_POINT =3D CxlDxeEntryPoint
+
+[Sources.common]
+ CxlDxe.c
+
+[Guids]
+ gArmRemoteCxlMemDescriptorGuid
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+ Platform/ARM/ARM.dec
+ Platform/ARM/Drivers/CxlDxe/CxlDxe.dec
+
+[LibraryClasses]
+ ArmMmuLib
+ ArmLib
+ BaseLib
+ DebugLib
+ DevicePathLib
+ DxeServicesTableLib
+ HobLib
+ PcdLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiPciIoProtocolGuid ##CONSUMES
+ gCxlPlatformProtocolGuid ## PRODUCES
+
+[FixedPcd]
+
+[Depex]
+ gEfiPciEnumerationCompleteProtocolGuid
diff --git a/Platform/ARM/Drivers/CxlDxe/CxlDxe.h b/Platform/ARM/Drivers/=
CxlDxe/CxlDxe.h
new file mode 100644
index 0000000000..58e143c9bd
--- /dev/null
+++ b/Platform/ARM/Drivers/CxlDxe/CxlDxe.h
@@ -0,0 +1,156 @@
+/** @file
+ CXL driver file.
+
+ Defines CXL specific structures and macros.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - CXL Specificiation Revision 3.0, Version 0.7
+**/
+
+#define PCIE_EXTENDED_CAP_OFFSET 0x100
+#define PCIE_EXTENDED_CAP_ID_MASK 0xFFFF
+#define PCIE_EXTENDED_NEXT_CAP_OFFSET_MASK 0xFFF
+#define PCIE_EXTENDED_NEXT_CAP_OFFSET_SHIFT 20
+
+#define PCIE_EXT_CAP_DOE_ID 0x2E
+
+#define PCIE_EXTENDED_CAP_NEXT(n) ((n)>>(PCIE_EXTENDED_NEXT_CAP_OFFSET_=
SHIFT))
+#define IS_CXL_DVSEC(n) (((n)&(0xFFFF)) =3D=3D 0x1E98)
+
+#define DOE_DATA_OBJECT_VID 0x0000ffff
+#define DOE_DATA_OBJECT_TYPE 0x00ff0000
+#define DOE_DATA_OBJECT_LENGTH 0x0003ffff
+
+#define CXL_DOE_TABLE_ENTRY_HANDLE 0xffff0000
+
+#define CXL_DOE_TABLE_ENTRY_HANDLE_LAST 0xffff
+
+#define DVSEC_CXL_VENDOR_ID 0x1E98
+
+#define DOE_DATA_OBJ_HEADER_1 0x0
+#define DOE_DATA_OBJ_HEADER_2 0x4
+
+#define DOE_CAPABILITIES_REG 0x4
+#define DOE_CONTROL_REG 0x8
+#define DOE_STATUS_REG 0xC
+#define DOE_WRITE_DATA_MAILBOX_REG 0x10
+#define DOE_READ_DATA_MAILBOX_REG 0x14
+
+#define DOE_STAT_DOE_BUSY 0x1
+#define DOE_STAT_DATA_OBJ_READY ((0x1) << 31)
+#define DOE_CTRL_DOE_GO ((0x1) << 31)
+
+#define IS_DOE_SUPPORTED(n) \
+ (((n)&(PCIE_EXTENDED_CAP_ID_MASK))=3D=3D(PCIE_EXT_CAP_DOE_ID))
+
+typedef enum {
+ PCIE_EXT_CAP_HEADER,
+ PCIE_DVSEC_HEADER_1,
+ PCIE_DVSEC_HEADER_2,
+ PCIE_DVSEC_HEADER_MAX
+} PCIE_DVSEC_HEADER_ENUM;
+
+/**
+ * Data Object Header
+ *
+ * Data Object Exchange(DOE) Header1 and Header2 put together.
+ * Reference taken from PCI-SIG ECN and
+ * CXL Specification (Revision 3.0, Version 0.7).
+**/
+typedef struct {
+ UINT16 VendorId;
+ UINT8 DataObjType;
+ UINT8 Reserved;
+ UINT32 Length;
+} DOE_HEADER;
+
+#define DOE_DATA_OBJ_TYPE_COMPLIANCE 0x0
+#define DOE_DATA_OBJ_TYPE_CDAT 0x2
+
+/**
+ * DOE read request data
+ *
+ * DOE read request data structure. For CXL DOE requests are made
+ * to read CDAT tables.
+ * Reference taken from CXL Specification (Revision 3.0, Version 0.7).
+**/
+typedef struct {
+ DOE_HEADER Header;
+ UINT8 ReqCode;
+ UINT8 TableType;
+ UINT16 EntryHandle;
+} CXL_CDAT_READ_ENTRY_REQ;
+
+#define CXL_CDAT_DOE_ENTRYHANDLE_LAST_ENTRY 0xFFFF
+
+/* Size in DW(4 Bytes) */
+#define CDAT_READ_ENTRY_REQ_SIZE 3
+
+/**
+ * DOE read response data
+ *
+ * DOE read response data structure. For CXL, DOE responses hold
+ * information about CDAT tables.
+ * Reference taken from CXL Specification (Revision 3.0, Version 0.7).
+**/
+typedef struct {
+ DOE_HEADER Header;
+ UINT8 RspCode;
+ UINT8 TableType;
+ UINT16 EntryHandle;
+ UINT32 CdatTable[32];
+} CXL_CDAT_READ_ENTRY_RESP;
+
+/* Size in DW(4 Bytes) */
+#define CDAT_READ_ENTRY_RESP_SIZE 3
+
+/**
+ * Coherent Device Attribute Table(CDAT) Header
+ *
+ * CDAT header, which is followed by variable number of CDAT structures=
.
+ * Reference taken from CDAT Specification (Revision 1.02).
+**/
+typedef struct {
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 Reserved[6];
+ UINT32 Sequence;
+} CDAT_TABLE_HEADER;
+
+/* Size in DW(4 Bytes) */
+#define CDAT_TABLE_HEADER_SIZE 4
+
+/**
+ * Device Scoped Memory Affinity Structure (DSMAS)
+ *
+ * DSMAS returns Device Physical Address(DPA) range and it's attributes=
.
+ * Reference taken from CDAT Specification (Revision 1.02).
+**/
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved_1;
+ UINT16 Length;
+ UINT8 DsmadHandle;
+ UINT8 Flags;
+ UINT16 Reserved_2;
+ UINT64 DpaBase;
+ UINT64 DpaLength;
+} CDAT_DSMAS;
+
+/* Size in DW(4 Bytes) */
+#define CDAT_STRUCTURE_DSMAS_SIZE 6
+
+typedef enum {
+ CDAT_STRUCTURE_DSMAS,
+ CDAT_STRUCTURE_DSLBIS,
+ CDAT_STRUCTURE_DSMSCIS,
+ CDAT_STRUCTURE_DSIS,
+ CDAT_STRUCTURE_DSEMTS,
+ CDAT_STRUCTURE_SSLBIS,
+ CDAT_STRUCTURE_COUNT
+} CDAT_STRUCTURE_TYPE;
+
diff --git a/Platform/ARM/Include/Protocol/Cxl.h b/Platform/ARM/Include/P=
rotocol/Cxl.h
new file mode 100644
index 0000000000..7dd7c87894
--- /dev/null
+++ b/Platform/ARM/Include/Protocol/Cxl.h
@@ -0,0 +1,57 @@
+/** @file
+ Interface API of CXL Platform protocol.
+
+ Declares the CXL Platform protocol interfaces, which are used by other
+ platform drivers for collecting information regarding discovered remot=
e
+ memory nodes.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+/** Remote memory details
+ *
+ * Remote memory region address in device address space and length of =
the
+ * region. These informations are passed using ACPI tables, where addr=
essbase
+ * will be mapped to Host system address space.
+**/
+typedef struct {
+ UINT64 DpaAddress; /// Remote memory base in device address spac=
e
+ UINT64 DpaLength; /// Remote memory length lower bytes
+} REMOTE_MEMORY_CONFIG;
+
+/**
+ Update Remote memory information
+
+ Update the Remote memory details, Base address and Length, for number =
of
+ Remote memory nodes discovered from the CXL devices.
+
+ @param[out] RemoteMem Array for updating Remote memory config.
+ @param[in,out] MemCount Number of supported remote memory nodes.
+
+ @retval EFI_SUCCES Memory is updated successfully
+**/
+typedef
+EFI_STATUS
+(EFIAPI *CXL_GET_REMOTE_MEM) (
+ OUT REMOTE_MEMORY_CONFIG *RemoteMem,
+ IN OUT UINT32 *MemCount
+ );
+
+/**
+ Return number of remote memory nodes discovered from CXL Mem devices.
+
+ @retval UINT32 Number of supported remote memory nodes.
+**/
+typedef UINT32 (EFIAPI *CXL_GET_REMOTE_MEM_COUNT) (VOID);
+
+/**
+ * CXL Platform Protocol
+ *
+ * This protocol enables platform drivers to get number of memory range=
count
+ * and associated memory configurations.
+**/
+typedef struct {
+ CXL_GET_REMOTE_MEM CxlGetRemoteMem;
+ CXL_GET_REMOTE_MEM_COUNT CxlGetRemoteMemCount;
+} CXL_PLATFORM_PROTOCOL;
diff --git a/Platform/ARM/Drivers/CxlDxe/CxlDxe.c b/Platform/ARM/Drivers/=
CxlDxe/CxlDxe.c
new file mode 100644
index 0000000000..71ec5c0662
--- /dev/null
+++ b/Platform/ARM/Drivers/CxlDxe/CxlDxe.c
@@ -0,0 +1,530 @@
+/** @file
+ Discovers CXL capable device and reads out device capabilities.
+
+ This driver locates PciIo Protocol and discovers PCIe devices with CXL=
.Mem
+ capability. If a device with CXL.Mem capability is found then DOE capa=
bility
+ is looked for. Once DOE capability is found, CDAT structures are fetch=
ed from
+ the respective device.
+ It also installs CXL Platform portocol, which can be used by other
+ Platform drivers for capturing remote memory configurations and attrib=
utes.
+
+ Copyright (c) 2022, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - CXL Specificiation Revision 3.0, Version 0.7, Chapter 8.1.11
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Protocol/Cxl.h>
+#include <Protocol/PciIo.h>
+#include <IndustryStandard/Pci.h>
+#include <IndustryStandard/Pci22.h>
+
+#include "CxlDxe.h"
+
+STATIC UINT32 RemoteMemCount;
+//TODO: For now considered maximum 5 remote memory ranges.
+// In future it will be made dynamic.
+STATIC REMOTE_MEMORY_CONFIG RemoteMemConfig[5];
+
+/**
+ Check whether device is ready to receive new data through DOE request.
+
+ @param[in] Pci PCI IO Protocol handle.
+ @param[in] DoeBase Base offset of DOE status registers in PCIe device
+ config space.
+
+ @retval EFI_SUCCESS Successful read operation.
+ @retval Other Device not ready or failed to check device stat=
us.
+**/
+STATIC
+EFI_STATUS
+IsDoeBusy (
+ IN EFI_PCI_IO_PROTOCOL *Pci,
+ IN UINT32 DoeBase
+ )
+{
+ EFI_STATUS Status;
+ UINT32 DoeStatVal;
+
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, DoeBase, 1, &DoeSt=
atVal);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ if (DoeStatVal & DOE_STAT_DOE_BUSY)
+ return EFI_ALREADY_STARTED;
+
+ return Status;
+}
+
+/**
+ Read out CDAT structure data for host memory configuration.
+
+ From the DOE response data, various CDAT structure data are filtered o=
ut
+ for host platform configuration.
+
+ @param[in] DoeRespCdatDat Response data from DOE operation.
+ @param[in] Length DOE response data length in bytes.
+**/
+STATIC
+VOID
+UpdateCdatData (
+ IN UINT32 *DoeRespCdatData,
+ IN UINT16 Length
+ )
+{
+ UINT32 Index;
+ CDAT_DSMAS *Dsmas;
+
+ // Skipping the CDAT header.
+ Index =3D CDAT_TABLE_HEADER_SIZE;
+
+ while (Index < Length) {
+ switch (DoeRespCdatData[Index] & 0xff) {
+ case CDAT_STRUCTURE_DSMAS:
+ Dsmas =3D (CDAT_DSMAS *) (& (DoeRespCdatData [Index]));
+ RemoteMemConfig[RemoteMemCount].DpaAddress =3D Dsmas->DpaBase;
+ RemoteMemConfig[RemoteMemCount].DpaLength =3D Dsmas->DpaLength;
+ RemoteMemCount ++;
+ Index +=3D CDAT_STRUCTURE_DSMAS_SIZE;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return;
+}
+
+/**
+ Receive DOE response.
+
+ For CXL, DOE responses carry CDAT structures that hold information abo=
ut
+ remote memory ranges and it's attributes.
+ System firmware polls the Data Object Ready bit and, provided it is Se=
t, reads
+ data from the DOE Read Data Mailbox and writes 1 to the DOE Read Data =
Mailbox
+ to indicate a successful read, a DWORD at a time until the entire DOE =
Response
+ is read. Data Object Header2 holds number of DW to be transferred for
+ capturing the entire DOE response.
+
+ @param[in] Pci PCI IO Protocol handle.
+ @param[in] DoeBase Base offset of DOE registers in PCIe device c=
onfig
+ space.
+ @param[out] EntryHandle Value of next entry in table. For CXL, table =
type
+ is CDAT.
+
+ @retval EFI_SUCCESS Successful receiving of DOE response.
+ @retval Other Failed receiving of DOE response.
+**/
+STATIC
+EFI_STATUS
+DoeReceiveResponse (
+ IN EFI_PCI_IO_PROTOCOL *Pci,
+ IN UINT32 DoeBase,
+ OUT UINT16 *EntryHandle
+ )
+{
+ EFI_STATUS Status;
+ UINT32 DoeReadMbData =3D 1;
+ UINT32 DoeRespCdatData[15] =3D {};
+ UINT32 DoeStat;
+ UINT32 Index =3D 0;
+ UINT16 Length;
+ UINT64 Reg;
+ UINT32 Val;
+
+ Reg =3D DoeBase + DOE_STATUS_REG;
+ Status =3D Pci->Pci.Read ( Pci, EfiPciIoWidthUint32, Reg, 1, &DoeStat)=
;
+ if (EFI_ERROR (Status))
+ return Status;
+
+ if ((DoeStat & DOE_STAT_DATA_OBJ_READY) !=3D 0) {
+ Index =3D 0;
+ Reg =3D DoeBase + DOE_READ_DATA_MAILBOX_REG;
+
+ // Read the DOE header.
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ // Write 1 to DOE Read Data Mailbox to indicate successful Read.
+ Status =3D Pci->Pci.Write (Pci, EfiPciIoWidthUint32, Reg, 1, &DoeRea=
dMbData);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ // Read the DOE Header 2 for data length.
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ Length =3D Val & DOE_DATA_OBJECT_LENGTH;
+ if (Length < 2) {
+ DEBUG ((DEBUG_ERROR, " DOE data read error\n"));
+ return EFI_PROTOCOL_ERROR;
+ }
+
+ // Write 1 to DOE Read Data Mailbox to indicate successful Read.
+ Status =3D Pci->Pci.Write (Pci, EfiPciIoWidthUint32, Reg, 1, &DoeRea=
dMbData);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ // Read DOE read entry response header.
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ *EntryHandle =3D ((Val & CXL_DOE_TABLE_ENTRY_HANDLE) >> 16);
+ // Write 1 to DOE Read Data Mailbox to indicate successful Read.
+ Status =3D Pci->Pci.Write (Pci, EfiPciIoWidthUint32, Reg, 1, &DoeRea=
dMbData);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ Length -=3D 3;
+ while (Index < Length) {
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status))
+ return Status;
+
+ DoeRespCdatData[Index] =3D Val;
+ Index++;
+ // Write 1 to DOE Read Data Mailbox to indicate successful Read.
+ Status =3D Pci->Pci.Write (
+ Pci,
+ EfiPciIoWidthUint32,
+ Reg,
+ 1,
+ &DoeReadMbData
+ );
+ if (EFI_ERROR (Status))
+ return Status;
+ }
+
+ UpdateCdatData (DoeRespCdatData, Length);
+ }
+
+ return Status;
+}
+
+/**
+ Make DOE request to fetch CDAT structures and receive DOE response.
+
+ This function requests for DOE objects and receives response for the s=
ame.
+ The steps include -
+ 1. System firmware checks that the DOE Busy bit is Clear.
+ 2. System firmware writes entire data object a DWORD(4 Bytes) at a tim=
e via
+ DOE Write Data Mailbox register.
+ 3. System firmware writes 1b to the DOE Go bit.
+ 4. The DOE instance consumes the DOE request from the DOE mailbox.
+ 5. The DOE instance generates a DOE Response and Sets Data Object Read=
y bit.
+ 6. System firmware polls the Data Object Ready bit and, provided it is=
Set,
+ reads data from the DOE Read Data Mailbox and writes 1 to the DOE R=
ead
+ Data Mailbox to indicate a successful read, a DWORD at a time until=
the
+ entire DOE Response is read.
+ 7: DOE requests are made until response for last CDAT table entry is r=
eceived.
+
+ @param[in] Pci PCI IO Protocol handle.
+ @param[in] DoeBase Base offset of DOE registers in PCIe device config=
space.
+
+ @retval EFI_SUCCESS Successful DOE request and response receive.
+ @retval Other Failed DOE request or response receive.
+**/
+STATIC
+EFI_STATUS
+SendDoeCommand (
+ IN EFI_PCI_IO_PROTOCOL *Pci,
+ IN UINT32 DoeBase
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Val;
+ UINT64 Reg;
+ CXL_CDAT_READ_ENTRY_REQ CxlDoeReq;
+ UINT32 Index =3D 0;
+
+ // CDAT DOE Request header & Read entry request object.
+ CxlDoeReq.Header.VendorId =3D DVSEC_CXL_VENDOR_ID;
+ CxlDoeReq.Header.DataObjType =3D DOE_DATA_OBJ_TYPE_CDAT;
+ CxlDoeReq.Header.Length =3D CDAT_READ_ENTRY_REQ_SIZE;
+
+ // 0 indicates this a request to read.
+ CxlDoeReq.ReqCode =3D 0;
+
+ // 0 indicates table type as CDAT.
+ CxlDoeReq.TableType =3D 0;
+
+ // 0 represents very first entry in the table.
+ CxlDoeReq.EntryHandle =3D 0;
+
+ Reg =3D DoeBase + DOE_WRITE_DATA_MAILBOX_REG;
+
+ do {
+ Status =3D IsDoeBusy (Pci, DoeBase + DOE_STATUS_REG);
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "Device busy or DOE request can't be made\n"))=
;
+ return Status;
+ }
+
+ while (Index < CDAT_READ_ENTRY_REQ_SIZE) {
+ Val =3D *((UINT32 *) (&CxlDoeReq) + Index);
+ Status =3D Pci->Pci.Write (Pci, EfiPciIoWidthUint32, Reg, 1, &Val)=
;
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "Error while making DOE request\n"));
+ return Status;
+ }
+ Index++;
+ }
+
+ Reg =3D DoeBase + DOE_CONTROL_REG;
+ Status =3D Pci->Pci.Read (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "Error while reading DOE control reg\n"));
+ return Status;
+ }
+
+ Val |=3D DOE_CTRL_DOE_GO;
+ Status =3D Pci->Pci.Write (Pci, EfiPciIoWidthUint32, Reg, 1, &Val);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "Error while writing into DOE control reg\n"))=
;
+ return Status;
+ }
+
+ Status =3D DoeReceiveResponse (Pci, DoeBase, &CxlDoeReq.EntryHandle)=
;
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "Error while receiving DOE response\n"));
+ return Status;
+ }
+ } while (CxlDoeReq.EntryHandle < CXL_DOE_TABLE_ENTRY_HANDLE_LAST);
+
+ return Status;
+}
+
+/**
+ Return number of remote memory nodes discovered from CXL Mem devices.
+
+ @retval UINT32 Number of supported remote memory nodes
+**/
+STATIC UINT32 EFIAPI CxlGetRemoteMemCount (VOID)
+{
+ return RemoteMemCount;
+}
+
+/**
+ Update Remote memory information
+
+ Update the Remote memory details, Base address and Length, for number =
of
+ Remote memory nodes discovered from the CXL devices. If the update req=
uest
+ for number of memory nodes is more than maximum remote memory nodes, t=
hen
+ MemCount is modified to number of maximum remote memory nodes.
+
+ @param[out] RemoteMem Array for updating Remote memory config.
+ @param[in,out] MemCount Number of supported remote memory nodes.
+
+ @retval EFI_SUCCES Memory is updated successfully
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CxlGetRemoteMem (
+ OUT REMOTE_MEMORY_CONFIG *RemoteMemInfo,
+ IN OUT UINT32 *MemCount
+ )
+{
+
+ if ((*MemCount) > RemoteMemCount) {
+ DEBUG ((DEBUG_WARN, "Requested for more than max. Remote Memory node=
\n"));
+ *MemCount =3D RemoteMemCount;
+ }
+
+ CopyMem (
+ RemoteMemInfo,
+ RemoteMemConfig,
+ sizeof (REMOTE_MEMORY_CONFIG) * (*MemCount)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Installs the CXL platform protocol.
+
+ CXL platform protocol has interfaces for providing CXL mem device
+ configurations. A Platform driver can fetch such configurations
+ using these protocl interfaces.
+
+ @retval EFI_SUCCESS On successful installation of protocol interfaces=
.
+ @retval Other On failure of protocol installation.
+**/
+STATIC
+EFI_STATUS
+CxlInstallProtocol (VOID)
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *CxlPlatformHandle;
+ CXL_PLATFORM_PROTOCOL *CxlPlatformProtocol;
+
+ CxlPlatformHandle =3D (EFI_HANDLE *) AllocateZeroPool (sizeof(EFI_HAND=
LE));
+
+ CxlPlatformProtocol =3D (CXL_PLATFORM_PROTOCOL *) AllocateZeroPool (
+ sizeof(CXL_PLATFORM_=
PROTOCOL)
+ );
+ if (!CxlPlatformProtocol) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "CxlInstallProtocol: Failed to allocate memory for CxlPlatformProt=
ocol\n"
+ ));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ CxlPlatformProtocol->CxlGetRemoteMem =3D CxlGetRemoteMem;
+ CxlPlatformProtocol->CxlGetRemoteMemCount =3D CxlGetRemoteMemCount;
+
+ Status =3D gBS->InstallProtocolInterface (
+ CxlPlatformHandle,
+ &gCxlPlatformProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ CxlPlatformProtocol
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "CxlInstallProtocol: Failed to install CxlPlatformProtocol: 0x%08x=
\n",
+ Status
+ ));
+
+ return Status;
+ }
+
+ DEBUG ((DEBUG_INFO, "Installed protocol: %p\n", CxlPlatformProtocol));
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Entry point for CXL DXE.
+
+ This Dxe depends on gEfiPciEnumerationCompleteProtocolGuid. It locates
+ PciIo Protocol and discovers PCIe devices with CXL.Mem capability. If =
a
+ device with CXL.Mem capability is found then DOE capability is looked =
for.
+ After that, CXL.Mem device configurations are fetched, and thereafter =
CXL
+ Platform portocol is installed.
+
+ @param[in] ImageHandle Handle to the Efi image.
+ @param[in] SystemTable A pointer to the Efi System Table.
+
+ @retval EFI_SUCCESS On successful execution of mentioned functionliti=
es.
+ @retval Other On failure.
+**/
+EFI_STATUS
+EFIAPI
+CxlDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *Pci;
+ UINTN Seg, Bus, Dev, Func;
+ EFI_HANDLE *HandleBuffer;
+ UINTN HandleCount, Index;
+ UINT32 ExtCapOffset, NextExtCapOffset;
+ UINT32 NextDoeExtCapOffset;
+ UINT32 PcieExtCapAndDvsecHeader[3];
+ UINT32 PcieExtCapHeader;
+
+ Status =3D gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiPciIoProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to locate any PciIo protocols\n"));
+ return Status;
+ }
+
+ for (Index =3D 0; Index < HandleCount; Index++) {
+ Status =3D gBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiPciIoProtocolGuid,
+ (VOID **)&Pci
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to get Pci handle\n"));
+ return Status;
+ }
+
+ Pci->GetLocation (Pci, &Seg, &Bus, &Dev, &Func);
+ NextExtCapOffset =3D PCIE_EXTENDED_CAP_OFFSET;
+
+ do {
+ ExtCapOffset =3D NextExtCapOffset;
+ Status =3D Pci->Pci.Read (
+ Pci,
+ EfiPciIoWidthUint32,
+ ExtCapOffset,
+ PCIE_DVSEC_HEADER_MAX,
+ PcieExtCapAndDvsecHeader
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to read PCI IO for Ext. capability\=
n"));
+ return Status;
+ }
+
+ /* Check whether this is a CXL device */
+ if (IS_CXL_DVSEC(PcieExtCapAndDvsecHeader[PCIE_DVSEC_HEADER_1])) {
+ DEBUG ((DEBUG_INFO, "Found CXL Device\n"));
+
+ NextDoeExtCapOffset =3D PCIE_EXTENDED_CAP_OFFSET;
+ do {
+ ExtCapOffset =3D NextDoeExtCapOffset;
+ Status =3D Pci->Pci.Read (
+ Pci,
+ EfiPciIoWidthUint32,
+ ExtCapOffset,
+ 1,
+ &PcieExtCapHeader
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to read PCI Ext. capability\n")=
);
+ return Status;
+ }
+
+ if (IS_DOE_SUPPORTED (PcieExtCapHeader)) {
+ DEBUG ((DEBUG_INFO, "Found DOE Capability\n"));
+ Status =3D SendDoeCommand (Pci, ExtCapOffset);
+
+ if (EFI_ERROR (Status))
+ return Status;
+
+ NextExtCapOffset =3D 0;
+ break;
+ }
+
+ NextDoeExtCapOffset =3D PCIE_EXTENDED_CAP_NEXT (PcieExtCapHead=
er);
+ } while(NextDoeExtCapOffset);
+
+ Status =3D CxlInstallProtocol();
+ if (EFI_ERROR (Status))
+ return Status;
+ }
+
+ NextExtCapOffset =3D PCIE_EXTENDED_CAP_NEXT (
+ PcieExtCapAndDvsecHeader[PCIE_EXT_CAP_HEADER]
+ );
+
+ } while (NextExtCapOffset);
+ }
+
+ return EFI_SUCCESS;
+}
--=20
2.17.1


[edk2-platforms][PATCH V1 0/3] Enable CXL support and prepare necessary ACPI tables

Sayanta Pattanayak
 

This patch series adds support for discovering and reading out CXL
device capabilities, also it prepares SRAT, HMAT, CEDT tables.

First patch adds a CXL DXE. It discovers PCIe device with CXL and DOE
capability. Once DOE capability is discovered, DOE operation is
executed to fetch CDAT (DSMAS) table, which will have information about
Device physical address and range. At present only DSMAS table is tested
and using the information from DSMAS table remote memory node is
prepared by platform drivers. This Dxe also installs a protocol,
enabling platform modules to fetch details about remote memory.

The purpose of second patch is to prepare SRAT and HMAT table
dynamically for associating proximity / locality domains to memory
ranges and also describing memory attributes associated with memory
ranges. There is statically defined GICC device in SRAT table, which is
kept as it is needed for Sgi platform boot. GICC structure is just kept
to maintain platform boot integrity, otherwise it has no relation with
the purpose of this patch.

Third patch introduces CEDT structures (CFMWS, CHBS) that will allow
kernel to configure CXL host bridge HDM decoder. It also adds an
ACPI0016 object to indicate presence of CXL Host bridge. In this patch,
Interleave target number is considered 1 for demonstrating a reference
solution with CEDT structures. There is no real interleaving address
windows across multiple ports with this configuration. It is same as
single port CXL Host bridge.

CXL Specification Revision 3.0, Version 0.7 is referred for patch
preparation.

Link to github branch with the patches in this series -
https://github.com/SayantaP-arm/edk2-platforms/tree/cxl-type-3

Sayanta Pattanayak (3):
Platform/ARM: add CXL driver
Platform/Sgi: prepare SRAT, HMAT table
Platform/Sgi: Add CXL Early Discovery Table(CEDT) for Rd-N2-Cfg1
Platform

Platform/ARM/Drivers/CxlDxe/CxlDxe.dec | 21 +
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 7 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 9 +-
Platform/ARM/Drivers/CxlDxe/CxlDxe.inf | 48 ++
.../SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 7 +-
.../AcpiTableGenerator.inf | 73 +++
Platform/ARM/Drivers/CxlDxe/CxlDxe.h | 156 ++++++
Platform/ARM/Include/Protocol/Cxl.h | 57 ++
.../AcpiTableGenerator.h | 36 ++
Platform/ARM/Drivers/CxlDxe/CxlDxe.c | 530 ++++++++++++++++++
.../AcpiTableGenerator.c | 72 +++
.../HmatTableGenerator.c | 120 ++++
.../SratTableGenerator.c | 290 ++++++++++
.../ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc | 86 +++
.../ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl | 119 ++++
15 files changed, 1628 insertions(+), 3 deletions(-)
create mode 100644 Platform/ARM/Drivers/CxlDxe/CxlDxe.dec
create mode 100644 Platform/ARM/Drivers/CxlDxe/CxlDxe.inf
create mode 100644 Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/Acp=
iTableGenerator.inf
create mode 100644 Platform/ARM/Drivers/CxlDxe/CxlDxe.h
create mode 100644 Platform/ARM/Include/Protocol/Cxl.h
create mode 100644 Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/Acp=
iTableGenerator.h
create mode 100644 Platform/ARM/Drivers/CxlDxe/CxlDxe.c
create mode 100644 Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/Acp=
iTableGenerator.c
create mode 100644 Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/Hma=
tTableGenerator.c
create mode 100644 Platform/ARM/SgiPkg/Library/AcpiTableGeneratorLib/Sra=
tTableGenerator.c
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Cedt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Ssdt.asl

--=20
2.17.1


GitHub PR code review, new EDK II Reviewers team, and the edk2-codereview repository

Michael D Kinney
 

Hello,

I am exploring a proposal to use GitHub PR for code review. Specifically
the last option listed in the following discussion:

https://github.com/tianocore/edk2/discussions/3017

I am using the edk2-codereview repository to try different ideas out
and to get feedback from the community on the tools and review process.
It has all the standard CI checks enabled along with extra GitHub
Actions to assign reviewers and to verify the consistency of the
Maintainers.txt, CODEOWNERS, and REVIEWERS files.

https://github.com/tianocore/edk2-codereview

Part of that proposal is assignment of maintainers and reviewers to a PR
and use of the CODEOWNERS feature of GitHub for maintainers and adding a
second REVIEWERS file that uses the same CODEOWNERS syntax for reviewers.

In order to make a review request all maintainers and reviewers
must be members of the TianoCore organization. We already have a
team called "EDK II Maintainers" for maintainers. I have added a
new team called "EDK II Reviewers" for the set of reviewers that
are not maintainers of any other edk2 packages/directory.

If you received an invite to join the "EDK II Reviewers" team,
then please accept that invitation.

The GitHub Action CI checks I am enabling as part of this proposal
are getting errors because some reviewers are not part of the
TianoCore organization yet.

Example GitHub Action CI failure in edk2-codereview repository:

https://github.com/tianocore/edk2-codereview/runs/8259406920?check_suite_focus=true

As sample PRs are opened in edk2-codereview, you may receive email
notices. Please explore the PRs and provide feedback on the tools and
the process.

You are also welcome to take any of the active code reviews on the
mailing list and submit them to the edk2-codereview repository to
try out the GitHub PR code review experience with real examples.

Please hold off on merging PRs into edk2-codereview repo for now.

There are no changes to the dev process for the edk2 repo at this time.

Thanks,

Mike


[PATCH 1/1] AsfPkg: Add Alert standard format support

CrystalLee [李怡萱] <CrystalLee@...>
 

Hi All,

I would like to propose adding Alert standard format support which is
based on ASF2.0 specification(DSP0136).
The drivers would use smbus to send standard alert message base on the
status code reported by other drivers and report Asf ACPI table.

I'm not sure which package is appropriate for this feature, so I create
a temporarily Asfpkg to include my patch.

Drivers description:
Asf Pei driver: send Bios present and memory initial related message.
Asf Dxe driver:
1. Get boot options from device(DSP0136, ch5.2 boot option messages)
2. Install Asf Acpi table.
3. Register callback function through RscHandler Protocol, the function will
send standard messages base on the reported status code.
4. Register callback function on ready to boot event, this function will send
set system state(S0) message to device.
5. Install Asf protocol, the protocol include the boot options information in
step 1 so other drivers can get the information.

Asf branch in forked edk2 reop
REF:https://github.com/CrystalLee-77/edk2/tree/AlertStandardFormatSupport

Alert Standard format specification(DSP0136)
REF:https://www.dmtf.org/sites/default/files/standards/documents/DSP0136.pdf

Send standard alert message base on the status code reported by drivers.
Report Asf configuration and capabilities in Asf ACPI table

Signed-off-by: Crystal Lee <CrystalLee@...>
---
AsfPkg/Asf/AsfDxe/AsfDxe.c | 338 +++++++++++++++++
AsfPkg/Asf/AsfDxe/AsfDxeEvent.c | 319 ++++++++++++++++
AsfPkg/Asf/AsfPei/AsfPei.c | 384 ++++++++++++++++++++
AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.c | 210 +++++++++++
AsfPkg/Asf/AsfDxe/AsfDxe.h | 67 ++++
AsfPkg/Asf/AsfDxe/AsfDxe.inf | 52 +++
AsfPkg/Asf/AsfDxe/AsfDxe.uni | 15 +
AsfPkg/Asf/AsfDxe/AsfDxeExtra.uni | 13 +
AsfPkg/Asf/AsfPei/AsfPei.inf | 57 +++
AsfPkg/Asf/AsfPei/AsfPei.uni | 15 +
AsfPkg/Asf/AsfPei/AsfPeiExtra.uni | 13 +
AsfPkg/AsfPkg.dec | 47 +++
AsfPkg/AsfPkg.dsc | 59 +++
AsfPkg/Include/AsfMessages.h | 104 ++++++
AsfPkg/Include/IndustryStandard/Asf.h | 145 ++++++++
AsfPkg/Include/Library/AsfAcpiTableLib.h | 26 ++
AsfPkg/Include/Protocol/AsfProtocol.h | 57 +++
AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.inf | 30 ++
AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.uni | 15 +
19 files changed, 1966 insertions(+)

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxe.c b/AsfPkg/Asf/AsfDxe/AsfDxe.c
new file mode 100644
index 000000000000..1919dec6d095
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxe.c
@@ -0,0 +1,338 @@
+/** @file

+ Asf Dxe driver which is used for sending event record log to NIC or receiving

+ boot option command from NIC and provide in Asf Dxe protocol.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include <AsfDxe.h>

+

+ASF_BOOT_OPTION gAsfBootOption = { 0, 0, 0, 0, 0, 0, 0 };

+ASF_PROTOCOL gAsfProtocol = { AsfPushEvent, NULL };

+EFI_SMBUS_DEVICE_ADDRESS mFixedTargetAddress;

+EFI_SMBUS_HC_PROTOCOL *mSmBus = NULL;

+

+/**

+ Send message through SmBus to lan card.

+

+ @param[in] Command Command of System Firmware Events.

+ @param[in] Length Length of the data in bytes.

+ @param[in] AsfEvent Message data.

+

+ @retval EFI_SUCCESS Push Event successfully.

+ @retval Others Push Event error.

+**/

+EFI_STATUS

+EFIAPI

+AsfPushEvent (

+ IN UINT8 Command,

+ IN UINTN Length,

+ IN UINT8 *AsfEvent

+ )

+{

+ EFI_STATUS Status;

+

+ if (mSmBus == NULL) {

+ return EFI_UNSUPPORTED;

+ }

+

+ Status = mSmBus->Execute (

+ mSmBus,

+ mFixedTargetAddress,

+ Command,

+ EfiSmbusWriteBlock,

+ TRUE,

+ &Length,

+ AsfEvent

+ );

+ if (EFI_ERROR (Status)) {

+ DEBUG ((DEBUG_ERROR, "AsfPushEvent Status = %r\n", Status));

+ }

+

+ return Status;

+}

+

+/**

+ This function pushes the System Firmware State Events.

+

+ @param[in] SystemState System Firmware State.

+

+**/

+VOID

+EFIAPI

+AsfPushSystemState (

+ IN UINT8 SystemState

+ )

+{

+ mAsfSystemState.EventSensorType = SystemState;

+ AsfPushEvent (

+ mAsfSystemState.Command,

+ mAsfSystemState.ByteCount,

+ (UINT8 *)&(mAsfSystemState.SubCommand)

+ );

+ return;

+}

+

+/**

+ This function processes the System Firmware Progress/Error Events.

+

+ @param[in] MessageErrorLevel Progress or error or system management message Type.

+ @param[in] MessageType Specific ASF message type.

+

+**/

+VOID

+EFIAPI

+AsfPushSystemErrorProgressEvent (

+ IN UINT32 MessageErrorLevel,

+ IN ASF_MESSAGE_TYPE MessageType

+ )

+{

+ UINTN i;

+

+ if ((MessageErrorLevel & PcdGet32 (PcdAsfMessageErrorLevel)) ||

+ ((gAsfBootOption.BootOptionBit & ASF_BOP_BIT_FORCE_PROGRESS_EVENT)))

+ {

+ for ( i = 0; i < mAsfMessagesSize; i++ ) {

+ if ( mAsfMessages[i].Type == MessageType ) {

+ AsfPushEvent (

+ mAsfMessages[i].Message.Command,

+ mAsfMessages[i].Message.ByteCount,

+ (UINT8 *)&(mAsfMessages[i].Message.SubCommand)

+ );

+ break;

+ }

+ }

+ }

+

+ return;

+}

+

+/**

+ Send relate progress or error message to lan card

+

+ @param[in] CodeType Indicates the type of status code being reported.

+ @param[in] Value Describes the current status of a hardware or software entity.

+ This included information about the class and subclass that is used to

+ classify the entity as well as an operation.

+ @param[in] Instance The enumeration of a hardware or software entity within

+ the system. Valid instance numbers start with 1.

+ @param[in] CallerId This optional parameter may be used to identify the caller.

+ This parameter allows the status code driver to apply different rules to

+ different callers.

+ @param[in] Data This optional parameter may be used to pass additional data.

+

+ @retval EFI_SUCCESS Reported all the progress and error codes for Asf successfully.

+**/

+EFI_STATUS

+EFIAPI

+AsfRscHandlerCallback (

+ IN EFI_STATUS_CODE_TYPE CodeType,

+ IN EFI_STATUS_CODE_VALUE Value,

+ IN UINT32 Instance,

+ IN EFI_GUID *CallerId,

+ IN EFI_STATUS_CODE_DATA *Data

+ )

+{

+ UINTN Index;

+

+ if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) {

+ for (Index = 0; Index < mMsgProgressMapSize; Index++) {

+ if (mMsgProgressMap[Index].StatusCode == Value) {

+ AsfPushSystemErrorProgressEvent (MESSAGE_ERROR_LEVEL_PROGRESS, mMsgProgressMap[Index].MessageType);

+ break;

+ }

+ }

+ }

+

+ if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {

+ for ( Index = 0; Index < mMsgErrorMapSize; Index++ ) {

+ if ( mMsgErrorMap[Index].StatusCode == Value ) {

+ AsfPushSystemErrorProgressEvent (MESSAGE_ERROR_LEVEL_ERROR, mMsgErrorMap[Index].MessageType);

+ break;

+ }

+ }

+ }

+

+ return EFI_SUCCESS;

+}

+

+/**

+ This function issues the ASF Get/Clear Boot Option command.

+

+ @retval EFI_SUCCESS Reported all the progress and error codes for Asf successfully.

+ @retval Others Smbus Execute function return error.

+**/

+EFI_STATUS

+EFIAPI

+AsfGetBootOption (

+ IN EFI_SMBUS_DEVICE_ADDRESS AsfSlaveAddress

+ )

+{

+ EFI_STATUS Status;

+ UINTN Length = sizeof (ASF_BOOT_OPTION);

+ ASF_BOOT_OPTION BootOption;

+

+ // Initialize get boot option Buffer.

+ SetMem (&BootOption, sizeof (ASF_BOOT_OPTION), 0);

+

+ // Execute ASFMSG_CMD_CONFIG command.

+ Status = mSmBus->Execute (

+ mSmBus,

+ AsfSlaveAddress,

+ ASFMSG_CMD_CONFIG,

+ EfiSmbusReadBlock,

+ TRUE,

+ &Length,

+ &BootOption

+ );

+ if ( EFI_ERROR (Status)) {

+ return Status;

+ }

+

+ if ( BootOption.SubCommand == ASFMSG_SUBCMD_RET_BOOT_OPTION ) {

+ // copy Return Boot Option to global ASF Boot Option buffer.

+ CopyMem (&gAsfBootOption, &BootOption, sizeof (ASF_BOOT_OPTION));

+ gAsfProtocol.BootOption = &gAsfBootOption;

+ // Execute Clear Boot Option command.

+ BootOption.SubCommand = ASFMSG_SUBCMD_CLR_BOOT_OPTION;

+ BootOption.Version = 0x10;

+ Length = 2;

+ mSmBus->Execute (

+ mSmBus,

+ AsfSlaveAddress,

+ ASFMSG_CMD_CONFIG,

+ EfiSmbusWriteBlock,

+ TRUE,

+ &Length,

+ &BootOption

+ );

+ }

+

+ return Status;

+}

+

+/**

+ This Event Callback processes the requests at EFI Ready to Boot Event triggered.

+

+ @param[in] Event A pointer to the Event that triggered the callback.

+ @param[in] Context A pointer to private data registered with the callback function.

+**/

+VOID

+EFIAPI

+AsfReadyToBootEvent (

+ IN EFI_EVENT Event,

+ IN VOID *Context

+ )

+{

+ // Push System State S0 - "Working".

+ AsfPushSystemState (ASFMSG_SYSTEM_STATE_S0);

+

+ gBS->CloseEvent (Event);

+ return;

+}

+

+/**

+ Register callback if Acpi protocol is not ready, else install ASF acpi table directly.

+

+**/

+VOID

+EFIAPI

+InstallAsfAcpiTable (

+ VOID

+ )

+{

+ EFI_STATUS Status;

+ EFI_EVENT Event;

+ VOID *Registration;

+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;

+

+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTableProtocol);

+ if (!EFI_ERROR (Status)) {

+ InstallAsfAcpiTableEvent (NULL, NULL);

+ } else {

+ Status = gBS->CreateEvent (

+ EVT_NOTIFY_SIGNAL,

+ TPL_CALLBACK,

+ InstallAsfAcpiTableEvent,

+ NULL,

+ &Event

+ );

+

+ if (!EFI_ERROR (Status)) {

+ Status = gBS->RegisterProtocolNotify (

+ &gEfiAcpiTableProtocolGuid,

+ Event,

+ &Registration

+ );

+

+ if (EFI_ERROR (Status)) {

+ gBS->CloseEvent (Event);

+ }

+ }

+ }

+

+ return;

+}

+

+/**

+ This is the standard EFI driver entry point for DXE phase of ASF.

+

+ @param[in] ImageHandle Image handle of the loaded driver

+ @param[in] SystemTable Pointer to the System Table

+

+ @retval EFI_SUCCESS This driver initial correctly

+ @retval Others This driver initial fail

+**/

+EFI_STATUS

+EFIAPI

+AsfDxeEntry (

+ IN EFI_HANDLE ImageHandle,

+ IN EFI_SYSTEM_TABLE *SystemTable

+ )

+{

+ EFI_STATUS Status;

+ EFI_RSC_HANDLER_PROTOCOL *RscHandler;

+ EFI_EVENT AsfEfiReadyToBootEvent;

+

+ Status = gBS->LocateProtocol (&gEfiSmbusHcProtocolGuid, NULL, (VOID **)&mSmBus);

+ if ( EFI_ERROR (Status)) {

+ return Status;

+ }

+

+ mFixedTargetAddress.SmbusDeviceAddress = PcdGet8 (PcdSmbusSlaveAddressForDashLan) >> 1;

+ if (mFixedTargetAddress.SmbusDeviceAddress == 0) {

+ return EFI_UNSUPPORTED;

+ }

+

+ Status = AsfGetBootOption (mFixedTargetAddress);

+ if ( EFI_ERROR (Status)) {

+ return Status;

+ }

+

+ InstallAsfAcpiTable ();

+

+ // Send mother board initialization message.

+ AsfPushSystemErrorProgressEvent (MESSAGE_ERROR_LEVEL_PROGRESS, MsgMotherBoardInit);

+

+ Status = gBS->LocateProtocol (&gEfiRscHandlerProtocolGuid, NULL, (VOID **)&RscHandler);

+ if (!EFI_ERROR (Status)) {

+ RscHandler->Register (AsfRscHandlerCallback, TPL_CALLBACK);

+ }

+

+ EfiCreateEventReadyToBootEx (

+ TPL_CALLBACK,

+ AsfReadyToBootEvent,

+ NULL,

+ &AsfEfiReadyToBootEvent

+ );

+

+ gBS->InstallProtocolInterface (

+ &ImageHandle, \

+ &gAsfProtocolGuid,

+ EFI_NATIVE_INTERFACE,

+ &gAsfProtocol

+ );

+

+ return EFI_SUCCESS;

+}

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxeEvent.c b/AsfPkg/Asf/AsfDxe/AsfDxeEvent.c
new file mode 100644
index 000000000000..64265c6d5c3c
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxeEvent.c
@@ -0,0 +1,319 @@
+/** @file

+ Asf messages define

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include <AsfDxe.h>

+

+MESSAGE_DATA_HUB_MAP mMsgProgressMap[] = {

+ { MsgHddInit, EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_ENABLE },

+ { MsgApInit, EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_AP_INIT },

+ { MsgUserInitSetup, EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_USER_SETUP },

+ { MsgUsbResourceConfig, EFI_IO_BUS_USB | EFI_P_PC_ENABLE },

+ { MsgPciResourceConfig, EFI_IO_BUS_PCI | EFI_IOB_PCI_BUS_ENUM },

+ { MsgVideoInit, EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_ENABLE },

+ { MsgKbcInit, EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_ENABLE },

+ { MsgKbcTest, EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_SELF_TEST }

+};

+

+MESSAGE_DATA_HUB_MAP mMsgErrorMap[] = {

+ { MsgNoVideo, EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED },

+ { MsgKbdFailure, EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED },

+ { MsgHddFailure, EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NOT_DETECTED }

+};

+

+ASF_MESSAGE mAsfMessages[] = {

+ {

+ MsgHddInit,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_DISK,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_HARD_DISK_INITIALIZATION

+ }

+ },

+ {

+ MsgApInit,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_PROCESSOR,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_AP_INITIALIZATION

+ }

+ },

+ {

+ MsgUserInitSetup,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_BIOS,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_SETUP_INITIALIZATION

+ }

+ },

+ {

+ MsgUsbResourceConfig,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_BIOS,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_USB_RESOURCE_CONFIG

+ }

+ },

+ {

+ MsgPciResourceConfig,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_BIOS,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_PCI_RESOURCE_CONFIG

+ }

+ },

+ {

+ MsgVideoInit,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_ADD_IN_CARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_VIDEO_INITIALIZATION

+ }

+ },

+ {

+ MsgKbcInit,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_SYSTEM_BOARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_KEYBOARD_INITIALIZATION

+ }

+ },

+ {

+ MsgKbcTest,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_SYSTEM_BOARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_KEYBOARD_TEST

+ }

+ },

+ {

+ MsgMotherBoardInit,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_MONITOR,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_SYSTEM_BOARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_BOARD_INITIALIZATION

+ }

+ },

+ {

+ MsgNoVideo,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_NO_BOOTABLE_MEDIA,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_ADD_IN_CARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_NO_VIDEO

+ }

+ },

+ {

+ MsgKbdFailure,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_ERROR,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_SYSTEM_BOARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_KEYBOARD_FAILURE

+ }

+ },

+ {

+ MsgHddFailure,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_ERROR,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_RECOVERABLE,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_DISK,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_HARD_DISK_FAILURE

+ }

+ },

+ {

+ MsgChassisIntrusion,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0b, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_CHASSIS_INTRUSION,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_CHASSIS_INTRUSION,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_MONITOR,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_SYSTEM_BOARD,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED

+ }

+ },

+ {

+ MsgNoBootMedia,

+ {

+ ASFMSG_COMMAND_MESSAGING,

+ 0x0d, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_BOOT_ERROR,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_ERROR,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_RECOVERABLE,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_UNSPECIFIED,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_UNSPECIFIED

+ }

+ }

+};

+

+UINTN mMsgProgressMapSize = sizeof (mMsgProgressMap) / sizeof (MESSAGE_DATA_HUB_MAP);

+UINTN mMsgErrorMapSize = sizeof (mMsgErrorMap) / sizeof (MESSAGE_DATA_HUB_MAP);

+UINTN mAsfMessagesSize = sizeof (mAsfMessages) / sizeof (ASF_MESSAGE);

+

+ASF_MSG_NORETRANSMIT mAsfSystemState =

+{

+ ASFMSG_COMMAND_SYSTEM_STATE,

+ 0x3, // ByteCount

+ ASFMSG_SUBCOMMAND_SET_SYSTEM_STATE,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_SYSTEM_STATE_S0

+};

diff --git a/AsfPkg/Asf/AsfPei/AsfPei.c b/AsfPkg/Asf/AsfPei/AsfPei.c
new file mode 100644
index 000000000000..8b44cd26e0fe
--- /dev/null
+++ b/AsfPkg/Asf/AsfPei/AsfPei.c
@@ -0,0 +1,384 @@
+/** @file

+ Asf Pei Initialization Driver.

+

+ Follow Asf spec to send progress or error message to Smbus device

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include <AsfMessages.h>

+#include <Base.h>

+#include <Ppi/ReportStatusCodeHandler.h>

+#include <Ppi/MemoryDiscovered.h>

+#include <Ppi/Smbus2.h>

+#include <Library/DebugLib.h>

+#include <Library/PeiServicesLib.h>

+#include <Pi/PiStatusCode.h>

+

+/**

+ This Event Notify processes the ASF request at Memory Initial Completed.

+

+ @param[in] PeiServices General purpose services available to every PEIM.

+ @param[in] NotifyDescriptor The notification structure this PEIM registered on install.

+ @param[in] Ppi The memory discovered PPI. Not used.

+

+ @retval EFI_SUCCESS Succeeds.

+ @retval EFI_UNSUPPORTED Push Event error.

+

+**/

+EFI_STATUS

+EFIAPI

+MsgMemoryInitCompleted (

+ IN EFI_PEI_SERVICES **PeiServices,

+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,

+ IN VOID *Ppi

+ );

+

+STATIC EFI_PEI_NOTIFY_DESCRIPTOR mMemoryDiscoveredNotifyDes = {

+ EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,

+ &gEfiPeiMemoryDiscoveredPpiGuid,

+ MsgMemoryInitCompleted

+};

+

+ASF_MSG_NORETRANSMIT mAsfSystemStateWorking = \

+{

+ ASFMSG_COMMAND_SYSTEM_STATE,

+ 0x3, // ByteCount

+ ASFMSG_SUBCOMMAND_SET_SYSTEM_STATE,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_SYSTEM_STATE_S0

+};

+

+ASF_MSG_NORETRANSMIT mMsgStopTimer =

+{

+ ASFMSG_COMMAND_MANAGEMENT_CONTROL,

+ 0x2, // ByteCount

+ ASFMSG_SUBCOMMAND_STOP_WATCH_DOG,

+ ASFMSG_VERSION_NUMBER_10

+};

+

+// 3.1.5.3 System Firmware Progress Events

+ASF_MSG_NORETRANSMIT mMsgBiosPresent =

+{

+ ASFMSG_COMMAND_MESSAGING,

+ 0xd, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_ENTITY_PRESENCE,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_ENTITY_PRESENT,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_BIOS,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_UNSPECIFIED

+};

+

+// Starting memory initialization and test.

+ASF_MSG_NORETRANSMIT mMsgMemoryInit =

+{

+ ASFMSG_COMMAND_MESSAGING,

+ 0xd, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_MEMORY_DEVICE,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_MEMORY_INITIALIZATION

+};

+

+// Memory initialized and tested.

+ASF_MSG_NORETRANSMIT mMsgMemoryInitialized =

+{

+ ASFMSG_COMMAND_MESSAGING,

+ 0xd, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_EXIT,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_MEMORY_DEVICE,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_MEMORY_INITIALIZATION

+};

+

+ASF_MSG_NORETRANSMIT mAsfmsgCacheInit =

+{

+ ASFMSG_COMMAND_MESSAGING,

+ 0xd, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_MONITOR,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_PROCESSOR,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_CACHE_INITIALIZATION

+};

+

+ASF_MSG_NORETRANSMIT mAsfmsgMemoryMissing =

+{

+ ASFMSG_COMMAND_MESSAGING,

+ 0xd, // ByteCount

+ ASFMSG_SUBCOMMAND_NO_RETRANSMIT,

+ ASFMSG_VERSION_NUMBER_10,

+ ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS,

+ ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC,

+ ASFMSG_EVENT_OFFSET_SYS_FW_ERROR,

+ ASFMSG_EVENT_SOURCE_TYPE_ASF10,

+ ASFMSG_EVENT_SEVERITY_NON_CRITICAL,

+ ASFMSG_SENSOR_DEVICE_UNSPECIFIED,

+ ASFMSG_SENSOR_NUMBER_UNSPECIFIED,

+ ASFMSG_ENTITY_MEMORY_DEVICE,

+ ASFMSG_ENTITY_INSTANCE_UNSPECIFIED,

+ ASFMSG_EVENT_DATA1,

+ ASFMSG_EVENT_DATA_NO_MEMORY

+};

+

+/**

+ This function pushes the PEI System Firmware Progress Events.

+

+ @param[in] SmBus Pointer to the SmBus PPI.

+ @param[in] FixedTargetAddress Device address

+ @param[in] MessageErrorLevel Progress or error or system management message Type.

+ @param[in] MessageBuffer Pointer to the Event Data Buffer.

+

+**/

+VOID

+EFIAPI

+AsfPushProgressMessage (

+ IN EFI_PEI_SMBUS2_PPI *SmBus,

+ IN EFI_SMBUS_DEVICE_ADDRESS FixedTargetAddress,

+ IN UINT32 MessageErrorLevel,

+ IN UINT8 *MessageBuffer

+ )

+{

+ EFI_STATUS Status;

+ UINTN Length;

+

+ if (MessageErrorLevel & PcdGet32 (PcdAsfMessageErrorLevel)) {

+ Length = ((ASF_MSG_NORETRANSMIT *)MessageBuffer)->ByteCount;

+ Status = SmBus->Execute (

+ SmBus,

+ FixedTargetAddress,

+ ((ASF_MSG_NORETRANSMIT *)MessageBuffer)->Command,

+ EfiSmbusWriteBlock,

+ TRUE,

+ &Length,

+ (UINT8 *)(MessageBuffer+2)

+ );

+ if (EFI_ERROR (Status)) {

+ DEBUG ((DEBUG_ERROR, "Push alert message fail, status = %r\n", Status));

+ }

+ }

+

+ return;

+}

+

+/**

+ This callback registered by Report Status Code Ppi for Memory Missing PET.

+

+ @param[in] PeiServices General purpose services available to every PEIM.

+ @param[in] Type Indicates the type of status code being reported.

+ @param[in] Value Describes the current status of a hardware or software entity.

+ This included information about the class and subclass that is

+ used to classify the entity as well as an operation.

+ @param[in] Instance The enumeration of a hardware or software entity within the system.

+ Valid instance numbers start with 1.

+ @param[in] CallerId This optional parameter may be used to identify the caller.

+ This parameter allows the status code driver to apply different

+ rules to different callers.

+ @param[in] Data This optional parameter may be used to pass additional data.

+

+ @retval EFI_SUCCESS Always return EFI_SUCCESS

+

+**/

+EFI_STATUS

+EFIAPI

+AsfPeiStatusCodeCallBack (

+ IN EFI_PEI_SERVICES **PeiServices,

+ IN EFI_STATUS_CODE_TYPE Type,

+ IN EFI_STATUS_CODE_VALUE Value,

+ IN UINT32 Instance,

+ IN EFI_GUID *CallerId,

+ IN EFI_STATUS_CODE_DATA *Data

+ )

+{

+ EFI_STATUS Status;

+ EFI_PEI_SMBUS2_PPI *SmBus;

+ EFI_SMBUS_DEVICE_ADDRESS FixedTargetAddress;

+

+ FixedTargetAddress.SmbusDeviceAddress = PcdGet8 (PcdSmbusSlaveAddressForDashLan) >> 1;

+ if (FixedTargetAddress.SmbusDeviceAddress == 0) {

+ return EFI_SUCCESS;

+ }

+

+ Status = PeiServicesLocatePpi (

+ &gEfiPeiSmbus2PpiGuid,

+ 0,

+ NULL,

+ (VOID **)&SmBus

+ );

+ if ( EFI_ERROR (Status)) {

+ return EFI_SUCCESS;

+ }

+

+ if ((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {

+ if ((Value == (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_EC_MEMORY_NOT_INSTALLED)) ||

+ (Value == (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_DETECTED)))

+ {

+ // Error message - Memory Missing.

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_ERROR, (UINT8 *)&mAsfmsgMemoryMissing);

+ }

+ }

+

+ if (((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) &&

+ (Value == (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_CACHE_INIT)))

+ {

+ // Progress message - Cache initialization.

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_PROGRESS, (UINT8 *)&mAsfmsgCacheInit);

+ }

+

+ return EFI_SUCCESS;

+}

+

+/**

+ This send memory initialized message after memory discovered.

+

+ @param[in] PeiServices General purpose services available to every PEIM.

+ @param[in] NotifyDescriptor The notification structure this PEIM registered on install.

+ @param[in] Ppi The memory discovered PPI.

+

+ @retval EFI_SUCCESS Always return EFI_SUCCESS

+

+**/

+EFI_STATUS

+EFIAPI

+MsgMemoryInitCompleted (

+ IN EFI_PEI_SERVICES **PeiServices,

+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,

+ IN VOID *Ppi

+ )

+{

+ EFI_STATUS Status;

+ EFI_PEI_SMBUS2_PPI *SmBus;

+ EFI_BOOT_MODE BootMode;

+ EFI_SMBUS_DEVICE_ADDRESS FixedTargetAddress;

+

+ FixedTargetAddress.SmbusDeviceAddress = PcdGet8 (PcdSmbusSlaveAddressForDashLan) >> 1;

+ if (FixedTargetAddress.SmbusDeviceAddress == 0) {

+ return EFI_SUCCESS;

+ }

+

+ Status = PeiServicesLocatePpi (

+ &gEfiPeiSmbus2PpiGuid,

+ 0,

+ NULL,

+ (VOID **)&SmBus

+ );

+ if ( EFI_ERROR (Status)) {

+ return EFI_SUCCESS;

+ }

+

+ // Progress message - Completed memory initialization and test.

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_PROGRESS, (UINT8 *)&mMsgMemoryInitialized);

+

+ // Get Boot Path.

+ Status = PeiServicesGetBootMode (&BootMode);

+ if (!EFI_ERROR (Status) && (BootMode == BOOT_ON_S3_RESUME)) {

+ // Push System State Working if S3 resuming.

+ AsfPushProgressMessage (

+ SmBus,

+ FixedTargetAddress,

+ MESSAGE_ERROR_LEVEL_SYSTEM_MANAGEMENT,

+ (UINT8 *)&mAsfSystemStateWorking

+ );

+ }

+

+ return EFI_SUCCESS;

+}

+

+/**

+ Asf PEI module entry point

+

+ @param[in] FileHandle FileHandle Handle of the file being invoked.

+ @param[in] PeiServices Describes the list of possible PEI Services.

+

+ @retval EFI_SUCCESS The PEIM initialized successfully.

+

+**/

+EFI_STATUS

+EFIAPI

+AsfPeiEntry (

+ IN EFI_PEI_FILE_HANDLE FileHandle,

+ IN CONST EFI_PEI_SERVICES **PeiServices

+ )

+{

+ EFI_STATUS Status;

+ EFI_PEI_SMBUS2_PPI *SmBus;

+ EFI_PEI_RSC_HANDLER_PPI *RscHndrPpi;

+ EFI_SMBUS_DEVICE_ADDRESS FixedTargetAddress;

+

+ FixedTargetAddress.SmbusDeviceAddress = PcdGet8 (PcdSmbusSlaveAddressForDashLan) >> 1;

+ if (FixedTargetAddress.SmbusDeviceAddress == 0) {

+ return EFI_UNSUPPORTED;

+ }

+

+ Status = PeiServicesLocatePpi (

+ &gEfiPeiSmbus2PpiGuid,

+ 0,

+ NULL,

+ (VOID **)&SmBus

+ );

+ if (EFI_ERROR (Status)) {

+ return Status;

+ }

+

+ //

+ // If the managed client's firmware supports a system boot-failure watchdog timer,

+ // the firmware issues the Stop Watchdog Timer command to stop the timer that is

+ // automatically started by the alert-sending device at power-on reset.

+ //

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_SYSTEM_MANAGEMENT, (UINT8 *)&mMsgStopTimer);

+

+ // Progress message - BIOS Present.

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_PROGRESS, (UINT8 *)&mMsgBiosPresent);

+

+ // Progress message - Started memory initialization and test.

+ AsfPushProgressMessage (SmBus, FixedTargetAddress, MESSAGE_ERROR_LEVEL_PROGRESS, (UINT8 *)&mMsgMemoryInit);

+

+ PeiServicesNotifyPpi (&mMemoryDiscoveredNotifyDes);

+

+ Status = PeiServicesLocatePpi (

+ &gEfiPeiRscHandlerPpiGuid,

+ 0,

+ NULL,

+ (VOID **)&RscHndrPpi

+ );

+ if (!EFI_ERROR (Status)) {

+ RscHndrPpi->Register ((EFI_PEI_RSC_HANDLER_CALLBACK)AsfPeiStatusCodeCallBack);

+ }

+

+ return EFI_SUCCESS;

+}

diff --git a/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.c b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.c
new file mode 100644
index 000000000000..7476dbf52752
--- /dev/null
+++ b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.c
@@ -0,0 +1,210 @@
+/** @file

+ Asf Acpi table

+

+ Install Asf Acpi table

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include <Library/UefiBootServicesTableLib.h>

+#include <Library/DebugLib.h>

+#include <Protocol/AcpiSystemDescriptionTable.h>

+#include <IndustryStandard/AlertStandardFormatTable.h>

+#include <IndustryStandard/Acpi.h>

+#include <Protocol/AcpiTable.h>

+

+// ASF Table Definitions

+// Below array size define should follow AsfAcpiTable setting

+#define ASF_RCTL_DEVICES_ARRAY_LENGTH 4

+#define ASF_ADDR_DEVICE_ARRAY_LENGTH 11

+

+#pragma pack(push,1)

+

+//

+// Alert Remote Control System Actions.

+//

+typedef struct {

+ EFI_ACPI_ASF_RCTL AsfRctl;

+ EFI_ACPI_ASF_CONTROLDATA ControlDataArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];

+} ACPI_ASF_RCTL_ALL;

+

+//

+// SmBus Devices with fixed addresses.

+//

+typedef struct {

+ EFI_ACPI_ASF_ADDR AsfAddr;

+ UINT8 FixedSmBusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];

+} ACPI_ASF_ADDR_ALL;

+

+//

+// ACPI 1.0 Structure for ASF Descriptor Table.

+//

+typedef struct {

+ EFI_ACPI_SDT_HEADER Header;

+ EFI_ACPI_ASF_INFO AsfInfo;

+ ACPI_ASF_RCTL_ALL AsfRctlAll;

+ EFI_ACPI_ASF_RMCP AsfRmcp;

+ ACPI_ASF_ADDR_ALL AsfAddrAll;

+} ASF_DESCRIPTION_TABLE;

+

+#pragma pack(pop)

+

+#define EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION 0x20

+

+ASF_DESCRIPTION_TABLE AsfAcpiTable = {

+ {

+ EFI_ACPI_ASF_DESCRIPTION_TABLE_SIGNATURE,

+ sizeof (ASF_DESCRIPTION_TABLE),

+ EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION,

+ 0, // Checksum

+

+ // OEM identification

+ { 'O', 'E', 'M', '_', 'I', 'D' },

+

+ // OEM table identification

+ { 'D', '8', '6', '5', 'G', 'C', 'H', ' '}, // OEM table identification

+

+ 1, // OEM revision number

+ ((((('M' << 8) + 'S') << 8) + 'F') << 8) + 'T', // ASL compiler vendor ID

+ 1000000 // ASL compiler revision number

+ },

+ {

+ //

+ // EFI_ACPI_ASF_INFO

+ //

+ {

+ 0x00, // Type "ASF_INFO"

+ 0x00, // Reserved

+ sizeof (EFI_ACPI_ASF_INFO) // Length

+ },

+ 0x05, // Min Watchdog Reset Value

+ 0xFF, // Min ASF Sensor poll Wait Time

+ 0x0001, // System ID

+ 0x57010000, // IANA Manufacture ID for Intel

+ 0x00, // Feature Flag

+ {

+ 0x00, // Reserved

+ 0x00,

+ 0x00

+ } // Reserved

+ },

+ {

+ //

+ // ACPI_ASF_RCTL_ALL

+ //

+ {

+ //

+ // EFI_ACPI_ASF_RCTL

+ //

+ {

+ 0x02, // Type "ASF_RCTL"

+ 0x00, // Reserved

+ sizeof (ACPI_ASF_RCTL_ALL) // Length

+ },

+ 0x04, // Number of Controls

+ 0x04, // Array Element Length

+ 0x0000 // Reserved

+ },

+ {

+ //

+ // EFI_ACPI_ASF_CONTROLDATA

+ //

+ { 0x00, 0x88, 0x00, 0x03 }, // Control 0 --> Reset system

+ { 0x01, 0x88, 0x00, 0x02 }, // Control 1 --> Power Off system

+ { 0x02, 0x88, 0x00, 0x01 }, // Control 2 --> Power On system

+ { 0x03, 0x88, 0x00, 0x04 } // Control 3 --> Power Cycle Reset (off then on)

+ }

+ },

+ {

+ //

+ // EFI_ACPI_ASF_RMCP

+ //

+ {

+ 0x03, // Type "ASF_RMCP"

+ 0x00, // Reserved

+ sizeof (EFI_ACPI_ASF_RMCP) // Length

+ },

+ {

+ // Remote Control Capabilities supported Bit Masks

+ 0x00, // System Firmware Capabilities Bit Mask byte 1

+ 0x00, // System Firmware Capabilities Bit Mask byte 2

+ 0x00, // System Firmware Capabilities Bit Mask byte 3

+ 0x00, // System Firmware Capabilities Bit Mask byte 4

+ 0x00, // Special Commands Bit Mask byte 1

+ 0x00, // Special Commands Bit Mask byte 2

+ 0xF0 // System Capabilities Bit Mask (Supports Reset,

+ // Power-Up, Power-Down, Power-Cycle Reset for

+ // compat and secure port.

+ },

+ 0x00, // Boot Option Complete Code

+ 0x57010000, // IANA ID for Intel Manufacturer

+ 0x00, // Special Command

+ { 0x00, 0x00 }, // Special Command Parameter

+ { 0x00, 0x00 }, // Boot Options

+ { 0x00, 0x00 } // OEM Parameters

+ },

+ {

+ //

+ // ACPI_ASF_ADDR_ALL

+ //

+ {

+ //

+ // EFI_ACPI_ASF_ADDR

+ //

+ {

+ 0x84, // Type "ASF_ADDR", last record

+ 0x00, // Reserved

+ sizeof (ACPI_ASF_ADDR_ALL) // Length

+ },

+ 0x00, // SEEPROM Address

+ ASF_ADDR_DEVICE_ARRAY_LENGTH // Number Of Devices

+ },

+ //

+ // Fixed SMBus Address

+ //

+ {

+ 0x5C, 0x68, 0x88, 0xC2, 0xD2,

+ 0xDC, 0xA0, 0xA2, 0xA4, 0xA6,

+ 0xC8

+ }

+ }

+};

+

+/**

+ This function install the ASF acpi Table.

+

+ @param[in] Event A pointer to the Event that triggered the callback.

+ @param[in] Context A pointer to private data registered with the callback function.

+**/

+VOID

+EFIAPI

+InstallAsfAcpiTableEvent (

+ IN EFI_EVENT Event,

+ IN VOID *Context

+ )

+{

+ EFI_STATUS Status;

+ UINTN TableHandle = 0;

+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;

+

+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTableProtocol);

+

+ if ( EFI_ERROR (Status)) {

+ DEBUG ((DEBUG_ERROR, "Locate Acpi protocol %r Error\n", Status));

+ return;

+ }

+

+ if (Event != NULL) {

+ gBS->CloseEvent (Event);

+ }

+

+ AcpiTableProtocol->InstallAcpiTable (

+ AcpiTableProtocol,

+ &AsfAcpiTable,

+ AsfAcpiTable.Header.Length,

+ &TableHandle

+ );

+

+ return;

+}

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxe.h b/AsfPkg/Asf/AsfDxe/AsfDxe.h
new file mode 100644
index 000000000000..7f59fc27d86d
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxe.h
@@ -0,0 +1,67 @@
+/** @file

+ Asf Dxe driver which is used for sending event record log to NIC or receiving

+ boot option command from NIC and provide in Asf Dxe protocol.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#ifndef __ASF_DXE_H__

+#define __ASF_DXE_H__

+

+#include <Pi/PiStatusCode.h>

+#include <Protocol/AsfProtocol.h>

+#include <IndustryStandard/SmBus.h>

+#include <Protocol/SmbusHc.h>

+#include <Protocol/ReportStatusCodeHandler.h>

+#include <Library/BaseLib.h>

+#include <Library/UefiLib.h>

+#include <Library/DebugLib.h>

+#include <Library/UefiBootServicesTableLib.h>

+#include <Library/UefiRuntimeServicesTableLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/PrintLib.h>

+#include <Protocol/AcpiTable.h>

+#include <Library/AsfAcpiTableLib.h>

+#include <AsfMessages.h>

+

+extern MESSAGE_DATA_HUB_MAP mMsgProgressMap[];

+extern MESSAGE_DATA_HUB_MAP mMsgErrorMap[];

+extern ASF_MESSAGE mAsfMessages[];

+extern UINTN mMsgProgressMapSize;

+extern UINTN mMsgErrorMapSize;

+extern UINTN mAsfMessagesSize;

+extern ASF_MSG_NORETRANSMIT mAsfSystemState;

+

+/**

+ This function pushes the DXE System Firmware Events.

+

+ @param[in] Command Command of System Firmware Events.

+ @param[in] Length Length of the data in bytes.

+ @param[in] AsfEvent System Firmware Events Command.

+

+ @retval EFI_SUCCESS Push Event successfully.

+ @retval EFI_UNSUPPORTED Push Event error.

+**/

+EFI_STATUS

+EFIAPI

+AsfPushEvent (

+ IN UINT8 Command,

+ IN UINTN Length,

+ IN UINT8 *AsfEvent

+ );

+

+/**

+ This function install the ASF acpi Table.

+

+ @param[in] Event A pointer to the Event that triggered the callback.

+ @param[in] Context A pointer to private data registered with the callback function.

+**/

+VOID

+EFIAPI

+InstallAsfAcpiTableEvent (

+ IN EFI_EVENT Event,

+ IN VOID *Context

+ );

+

+#endif //__ASF_DXE_H__

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxe.inf b/AsfPkg/Asf/AsfDxe/AsfDxe.inf
new file mode 100644
index 000000000000..247fc6ca9da6
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxe.inf
@@ -0,0 +1,52 @@
+## @file

+# Asf Dxe driver which is used for sending event record log to NIC or receiving

+# boot option command from NIC and provide in Asf Dxe protocol.

+#

+# Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+ INF_VERSION = 0x00010005

+ BASE_NAME = AsfDxe

+ MODULE_UNI_FILE = AsfDxe.uni

+ FILE_GUID = ED7AD1A2-1427-41EC-A71E-32EC9A1549E8

+ MODULE_TYPE = DXE_DRIVER

+ VERSION_STRING = 1.0

+ ENTRY_POINT = AsfDxeEntry

+

+[Sources]

+ AsfDxe.c

+ AsfDxe.h

+ AsfDxeEvent.c

+

+[Packages]

+ MdePkg/MdePkg.dec

+ AsfPkg/AsfPkg.dec

+

+[LibraryClasses]

+ UefiDriverEntryPoint

+ UefiRuntimeServicesTableLib

+ DebugLib

+ BaseMemoryLib

+ PrintLib

+ AsfAcpiTableLib

+ UefiLib

+

+[Protocols]

+ gEfiRscHandlerProtocolGuid

+ gAsfProtocolGuid # Produce

+ gEfiAcpiTableProtocolGuid

+ gEfiSmbusHcProtocolGuid

+

+[Guids]

+

+[FixedPcd]

+ gAsfPkgTokenSpaceGuid.PcdSmbusSlaveAddressForDashLan

+ gAsfPkgTokenSpaceGuid.PcdAsfMessageErrorLevel

+

+[Depex]

+ TRUE

+

+[UserExtensions.TianoCore."ExtraFiles"]

+ AsfDxeExtra.uni

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxe.uni b/AsfPkg/Asf/AsfDxe/AsfDxe.uni
new file mode 100644
index 000000000000..02ff1f72931d
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxe.uni
@@ -0,0 +1,15 @@
+// /** @file

+// Asf DXE Module

+//

+// Follow Asf spec to send progress or error message to Smbus device

+//

+// Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+

+#string STR_MODULE_ABSTRACT #language en-US "Asf DXE Module"

+

+#string STR_MODULE_DESCRIPTION #language en-US "Follow Asf spec to send progress or error message to Smbus device."

+

diff --git a/AsfPkg/Asf/AsfDxe/AsfDxeExtra.uni b/AsfPkg/Asf/AsfDxe/AsfDxeExtra.uni
new file mode 100644
index 000000000000..dbc747257c85
--- /dev/null
+++ b/AsfPkg/Asf/AsfDxe/AsfDxeExtra.uni
@@ -0,0 +1,13 @@
+// /** @file

+// Asf Dxe Module

+//

+// Follow Asf spec to send progress or error message to Smbus device

+//

+// Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+#string STR_PROPERTIES_MODULE_NAME

+#language en-US

+"Asf DXE"

diff --git a/AsfPkg/Asf/AsfPei/AsfPei.inf b/AsfPkg/Asf/AsfPei/AsfPei.inf
new file mode 100644
index 000000000000..0569a86e0925
--- /dev/null
+++ b/AsfPkg/Asf/AsfPei/AsfPei.inf
@@ -0,0 +1,57 @@
+## @file

+# Asf PEIM

+#

+# Follow Asf spec to send progress or error message to Smbus device

+#

+# Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+ INF_VERSION = 0x00010005

+ BASE_NAME = AsfPei

+ MODULE_UNI_FILE = AsfPei.uni

+ FILE_GUID = D2603B09-B8A2-4837-AA1E-EAE8E4DF78E7

+ MODULE_TYPE = PEIM

+ VERSION_STRING = 1.0

+ ENTRY_POINT = AsfPeiEntry

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+# VALID_ARCHITECTURES = IA32 X64 EBC

+#

+

+[Sources]

+ AsfPei.c

+

+[Packages]

+ MdePkg/MdePkg.dec

+ AsfPkg/AsfPkg.dec

+

+[LibraryClasses]

+ PeimEntryPoint

+ PeiServicesLib

+ DebugLib

+

+[Guids]

+

+[Ppis]

+ gEfiPeiRscHandlerPpiGuid

+ gEfiPeiMemoryDiscoveredPpiGuid

+ gEfiPeiSmbus2PpiGuid

+

+[FeaturePcd]

+

+[Pcd]

+

+[FixedPcd]

+ gAsfPkgTokenSpaceGuid.PcdSmbusSlaveAddressForDashLan

+ gAsfPkgTokenSpaceGuid.PcdAsfMessageErrorLevel

+

+[Depex]

+ gEfiPeiSmbus2PpiGuid

+

+[UserExtensions.TianoCore."ExtraFiles"]

+ AsfPeiExtra.uni

+

diff --git a/AsfPkg/Asf/AsfPei/AsfPei.uni b/AsfPkg/Asf/AsfPei/AsfPei.uni
new file mode 100644
index 000000000000..646712917e12
--- /dev/null
+++ b/AsfPkg/Asf/AsfPei/AsfPei.uni
@@ -0,0 +1,15 @@
+// /** @file

+// Asf PEI Module

+//

+// Follow Asf spec to send progress or error message to Smbus device

+//

+// Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+

+#string STR_MODULE_ABSTRACT #language en-US "Asf PEI Module"

+

+#string STR_MODULE_DESCRIPTION #language en-US "Follow Asf spec to send progress or error message to Smbus device."

+

diff --git a/AsfPkg/Asf/AsfPei/AsfPeiExtra.uni b/AsfPkg/Asf/AsfPei/AsfPeiExtra.uni
new file mode 100644
index 000000000000..72819f49862c
--- /dev/null
+++ b/AsfPkg/Asf/AsfPei/AsfPeiExtra.uni
@@ -0,0 +1,13 @@
+// /** @file

+// Asf PEI Module

+//

+// Follow Asf spec to send progress or error message to Smbus device

+//

+// Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+#string STR_PROPERTIES_MODULE_NAME

+#language en-US

+"Asf PEI"

diff --git a/AsfPkg/AsfPkg.dec b/AsfPkg/AsfPkg.dec
new file mode 100644
index 000000000000..b7bca0ac2231
--- /dev/null
+++ b/AsfPkg/AsfPkg.dec
@@ -0,0 +1,47 @@
+## @file

+# This package defines Asf specific interfaces and library classes.

+#

+# Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+ DEC_SPECIFICATION = 0x00010005

+ PACKAGE_NAME = AsfPkg

+ PACKAGE_GUID = 025BE9BD-50B3-4139-9A70-4336E277339A

+ PACKAGE_VERSION = 1.0

+

+[Includes]

+ Include

+

+[LibraryClasses]

+ ## @libraryclass Install Asf Acpi table

+ ##

+ AsfAcpiTableLib|AsfPkg\Library\AsfAcpiTableLib\AsfAcpiTableLib.inf

+

+[Guids]

+ gAsfPkgTokenSpaceGuid = { 0xa12d9aa4, 0xe69b, 0x425c, { 0x96, 0xc5, 0x41, 0x8d, 0xb1, 0xd0, 0xb9, 0x4f }}

+

+[Ppis]

+

+[Protocols]

+ ## Asf protocol GUID

+ # Include/Protocol/AmiAsfProtocol.h

+ gAsfProtocolGuid = { 0xdec89827, 0x8a7e, 0x45e0, { 0xbc, 0xb5, 0xd5, 0x3b, 0x46, 0x14, 0xad, 0xb8 } }

+

+[PcdsFeatureFlag]

+

+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]

+ ## Specify the Dash lan SmBus slave address.

+ # @Prompt Slave address of Dash lan

+ gAsfPkgTokenSpaceGuid.PcdSmbusSlaveAddressForDashLan|0x0|UINT8|0x00000001

+

+ ## This flag is used to control which message would be send.

+ # If enabled, Asf driver will send message to device.<BR><BR>

+ # BIT0 - Progress message is enabled.<BR>

+ # BIT1 - Error message is enabled.<BR>

+ # BIT2 - System menagement message is enabled.<BR>

+ # Other - reserved

+ # @Prompt Message level

+ gAsfPkgTokenSpaceGuid.PcdAsfMessageErrorLevel|0x7|UINT32|0x00000002

+

diff --git a/AsfPkg/AsfPkg.dsc b/AsfPkg/AsfPkg.dsc
new file mode 100644
index 000000000000..acbede1ca02d
--- /dev/null
+++ b/AsfPkg/AsfPkg.dsc
@@ -0,0 +1,59 @@
+## @file

+# Asf Package

+#

+# Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+ PLATFORM_NAME = AsfPkg

+ PLATFORM_GUID = 79D22E13-3F30-470A-AF9D-B80CB4324379

+ PLATFORM_VERSION = 0.10

+ DSC_SPECIFICATION = 0x00010005

+ OUTPUT_DIRECTORY = Build/AsfPkg

+ SUPPORTED_ARCHITECTURES = IA32|X64

+ BUILD_TARGETS = DEBUG|RELEASE|NOOPT

+

+

+[LibraryClasses]

+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf

+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf

+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf

+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf

+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf

+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf

+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf

+ ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf

+ RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf

+

+

+[LibraryClasses.common.SEC]

+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+ PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+

+[LibraryClasses.common.PEIM]

+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+

+[LibraryClasses.IA32.PEIM, LibraryClasses.X64.PEIM]

+ PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+

+[LibraryClasses.common.DXE_DRIVER]

+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+ AsfAcpiTableLib|AsfPkg\Library\AsfAcpiTableLib\AsfAcpiTableLib.inf

+

+[Components]

+

+[Components.IA32, Components.X64]

+ AsfPkg/Asf/AsfPei/AsfPei.inf

+ AsfPkg/Asf/AsfDxe/AsfDxe.inf

diff --git a/AsfPkg/Include/AsfMessages.h b/AsfPkg/Include/AsfMessages.h
new file mode 100644
index 000000000000..6e79f4993f33
--- /dev/null
+++ b/AsfPkg/Include/AsfMessages.h
@@ -0,0 +1,104 @@
+/** @file

+ Asf message format define.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+ @par Revision Reference:

+ Format defined in Asf 2.0 Specification.

+**/

+

+#ifndef __ASF_MESSAGES_H__

+#define __ASF_MESSAGES_H__

+

+#include <Base.h>

+#include <IndustryStandard/Asf.h>

+

+#define MESSAGE_ERROR_LEVEL_PROGRESS BIT0

+#define MESSAGE_ERROR_LEVEL_ERROR BIT1

+#define MESSAGE_ERROR_LEVEL_SYSTEM_MANAGEMENT BIT2

+

+#pragma pack(push,1)

+

+/**

+ This message causes the alert-sending device to transmit a single,

+ un-retransmitted PET frame. If the alert-sending device is either temporarily

+ unable to handle the message or unable to send the requested PET frame

+ because the device's transport media is down, the device must NACK the message

+ according to SMBUS_2.0 definitions; otherwise, the device sends the

+ single-frame transmission.

+**/

+typedef struct {

+ UINT8 Command; ///< Message Command.

+ UINT8 ByteCount; ///< Length of the data in bytes.

+ UINT8 SubCommand; ///< SubCommand No Retransmit.

+ UINT8 Version; ///< Version Number.

+ UINT8 EventSensorType; ///< Event Sensor Type.

+ UINT8 EventType; ///< Event Type.

+ UINT8 EventOffset; ///< Event Offset.

+ UINT8 EventSourceType; ///< Describes the originator of the event.

+ UINT8 EventSeverity; ///< The severity of the event

+ UINT8 SensorDevice; ///< The Sensor Device that caused the event

+ UINT8 SensorNumber; ///< Identify a given instance of a sensor relative to the Sensor Device.

+ UINT8 Entity; ///< Indicates the platform device or subsystem associated with the event.

+ UINT8 EntityInstance; ///< Identifies which unique device is associated with the event.

+ UINT8 EventData1;

+ UINT8 EventData2;

+ UINT8 EventData3;

+ UINT8 EventData4;

+ UINT8 EventData5;

+} ASF_MSG_NORETRANSMIT;

+

+/**

+ This is the ASF START WatchDog Timer Data structure.

+

+**/

+typedef struct {

+ UINT8 Command;

+ UINT8 ByteCount;

+ UINT8 SubCommand;

+ UINT8 Version;

+} ASF_STOP_WATCHDOG;

+

+/**

+ This is the ASF Message Type structure.

+

+**/

+typedef enum {

+ MsgHddInit,

+ MsgApInit,

+ MsgUserInitSetup,

+ MsgUsbResourceConfig,

+ MsgPciResourceConfig,

+ MsgVideoInit,

+ MsgKbcInit,

+ MsgKbcTest,

+ MsgMotherBoardInit,

+ MsgNoVideo,

+ MsgKbdFailure,

+ MsgHddFailure,

+ MsgChassisIntrusion,

+ MsgNoBootMedia

+} ASF_MESSAGE_TYPE;

+

+/**

+ This is the Message Data Hub Map Structure.

+

+**/

+typedef struct {

+ ASF_MESSAGE_TYPE MessageType;

+ EFI_STATUS_CODE_VALUE StatusCode;

+} MESSAGE_DATA_HUB_MAP;

+

+/**

+ This is the ASF System Firmware Event Structure.

+

+**/

+typedef struct {

+ ASF_MESSAGE_TYPE Type;

+ ASF_MSG_NORETRANSMIT Message;

+} ASF_MESSAGE;

+

+#pragma pack(pop)

+

+#endif //__ASF_MESSAGES_H__

diff --git a/AsfPkg/Include/IndustryStandard/Asf.h b/AsfPkg/Include/IndustryStandard/Asf.h
new file mode 100644
index 000000000000..69b6a0230d4f
--- /dev/null
+++ b/AsfPkg/Include/IndustryStandard/Asf.h
@@ -0,0 +1,145 @@
+/** @file

+ Asf message commands byte define.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+ @par Revision Reference:

+ Data defined in Asf 2.0 Specification.

+**/

+

+#ifndef __ASF_H__

+#define __ASF_H__

+

+#include <Base.h>

+

+//

+// Boot option messages

+//

+#define ASFMSG_CMD_CONFIG 0x3 // ASF Configuration

+#define ASFMSG_SUBCMD_CLR_BOOT_OPTION 0x15 // Clear Boot Options

+#define ASFMSG_SUBCMD_RET_BOOT_OPTION 0x16 // Return Boot Options

+#define ASFMSG_SUBCMD_NO_BOOT_OPTION 0x17 // No Boot Options

+

+//

+// System states

+//

+#define ASFMSG_SYSTEM_STATE_S0 0 // S0/G0 "Working"

+#define ASFMSG_SYSTEM_STATE_S1 1 // S1

+#define ASFMSG_SYSTEM_STATE_S2 2 // S2

+#define ASFMSG_SYSTEM_STATE_S3 3 // S3

+#define ASFMSG_SYSTEM_STATE_S4 4 // S4

+#define ASFMSG_SYSTEM_STATE_S5 5 // S5/G2 "Soft-off"

+

+//

+// Asf version

+//

+#define ASFMSG_VERSION_NUMBER_10 0x10

+

+//

+// System firmware capabilities Bit

+//

+#define ASF_BOP_BIT_FORCE_PROGRESS_EVENT BIT12

+

+//

+// Asf message command

+//

+#define ASFMSG_COMMAND_SYSTEM_STATE 0x1

+#define ASFMSG_COMMAND_MANAGEMENT_CONTROL 0x2

+#define ASFMSG_COMMAND_MESSAGING 0x4

+

+//

+// Asf message subcommand

+//

+#define ASFMSG_SUBCOMMAND_STOP_WATCH_DOG 0x14

+#define ASFMSG_SUBCOMMAND_NO_RETRANSMIT 0x16

+#define ASFMSG_SUBCOMMAND_SET_SYSTEM_STATE 0x18

+

+//

+// Asf message event sensor type

+//

+#define ASFMSG_EVENT_SENSOR_TYPE_CHASSIS_INTRUSION 0x5

+#define ASFMSG_EVENT_SENSOR_TYPE_FW_ERROR_PROGRESS 0xF

+#define ASFMSG_EVENT_SENSOR_TYPE_BOOT_ERROR 0x1E

+#define ASFMSG_EVENT_SENSOR_TYPE_ENTITY_PRESENCE 0x25

+

+//

+// Asf message event type

+//

+#define ASFMSG_EVENT_TYPE_SENSOR_SPECIFIC 0x6F

+

+//

+// Asf message event offset

+//

+#define ASFMSG_EVENT_OFFSET_ENTITY_PRESENT 0x0

+

+#define ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_ENTRY 0x2

+#define ASFMSG_EVENT_OFFSET_SYS_FW_PROGRESS_EXIT 0x82

+#define ASFMSG_EVENT_OFFSET_SYS_FW_ERROR 0x0

+

+#define ASFMSG_EVENT_OFFSET_NO_BOOTABLE_MEDIA 0x0

+#define ASFMSG_EVENT_OFFSET_CHASSIS_INTRUSION 0x0

+

+//

+// Asf message event source type

+//

+#define ASFMSG_EVENT_SOURCE_TYPE_ASF10 0x68

+

+//

+// Asf message event severity

+//

+#define ASFMSG_EVENT_SEVERITY_MONITOR 0x1

+#define ASFMSG_EVENT_SEVERITY_NON_CRITICAL 0x8

+#define ASFMSG_EVENT_SEVERITY_CRITICAL 0x10

+#define ASFMSG_EVENT_SEVERITY_NON_RECOVERABLE 0x20

+

+//

+// Asf message sensor device

+//

+#define ASFMSG_SENSOR_DEVICE_UNSPECIFIED 0xFF

+

+//

+// Asf message sensor number

+//

+#define ASFMSG_SENSOR_NUMBER_UNSPECIFIED 0xFF

+

+//

+// Asf message Entity

+//

+

+#define ASFMSG_ENTITY_UNSPECIFIED 0x0

+#define ASFMSG_ENTITY_PROCESSOR 0x3

+#define ASFMSG_ENTITY_DISK 0x4

+#define ASFMSG_ENTITY_SYSTEM_BOARD 0x7

+#define ASFMSG_ENTITY_ADD_IN_CARD 0xB

+#define ASFMSG_ENTITY_BIOS 0x22

+#define ASFMSG_ENTITY_MEMORY_DEVICE 0x20

+

+//

+// Asf message entity instance

+//

+#define ASFMSG_ENTITY_INSTANCE_UNSPECIFIED 0x0

+

+//

+// Asf message event data

+//

+#define ASFMSG_EVENT_DATA1 0x40

+#define ASFMSG_EVENT_DATA_UNSPECIFIED 0x0

+#define ASFMSG_EVENT_DATA_MEMORY_INITIALIZATION 0x1

+#define ASFMSG_EVENT_DATA_HARD_DISK_INITIALIZATION 0x2

+#define ASFMSG_EVENT_DATA_AP_INITIALIZATION 0x3

+#define ASFMSG_EVENT_DATA_SETUP_INITIALIZATION 0x5

+#define ASFMSG_EVENT_DATA_USB_RESOURCE_CONFIG 0x6

+#define ASFMSG_EVENT_DATA_PCI_RESOURCE_CONFIG 0x7

+#define ASFMSG_EVENT_DATA_VIDEO_INITIALIZATION 0x9

+#define ASFMSG_EVENT_DATA_CACHE_INITIALIZATION 0xA

+#define ASFMSG_EVENT_DATA_KEYBOARD_INITIALIZATION 0xC

+#define ASFMSG_EVENT_DATA_BOARD_INITIALIZATION 0x14

+#define ASFMSG_EVENT_DATA_KEYBOARD_TEST 0x17

+

+#define ASFMSG_EVENT_DATA_NO_MEMORY 0x1

+#define ASFMSG_EVENT_DATA_HARD_DISK_FAILURE 0x3

+#define ASFMSG_EVENT_DATA_KEYBOARD_FAILURE 0x7

+#define ASFMSG_EVENT_DATA_NO_VIDEO 0xA

+

+#endif //__ASF_H__

diff --git a/AsfPkg/Include/Library/AsfAcpiTableLib.h b/AsfPkg/Include/Library/AsfAcpiTableLib.h
new file mode 100644
index 000000000000..4b1d687825ff
--- /dev/null
+++ b/AsfPkg/Include/Library/AsfAcpiTableLib.h
@@ -0,0 +1,26 @@
+/** @file

+ Provides services to create Asf Acpi table.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#ifndef __ASF_ACPI_TABLE_LIB_H__

+#define __ASF_ACPI_TABLE_LIB_H__

+

+#include <Uefi.h>

+

+/**

+ This function install the ASF acpi Table.

+

+ @param[in] Event A pointer to the Event that triggered the callback.

+ @param[in] Context A pointer to private data registered with the callback function.

+**/

+VOID

+EFIAPI

+InstallAsfAcpiTableEvent (

+ IN EFI_EVENT Event,

+ IN VOID *Context

+ );

+

+#endif

diff --git a/AsfPkg/Include/Protocol/AsfProtocol.h b/AsfPkg/Include/Protocol/AsfProtocol.h
new file mode 100644
index 000000000000..d3af0fba73bd
--- /dev/null
+++ b/AsfPkg/Include/Protocol/AsfProtocol.h
@@ -0,0 +1,57 @@
+/** @file

+ Asf protocol define.

+

+ Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+ SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#ifndef __ASF_PROTOCOL_H__

+#define __ASF_PROTOCOL_H__

+

+#include <IndustryStandard/SmBus.h>

+

+#define ASF_PROTOCOL_GUID \

+ { \

+ 0xdec89827, 0x8a7e, 0x45e0, { 0xbc, 0xb5, 0xd5, 0x3b, 0x46, 0x14, 0xad, 0xb8 } \

+ }

+

+#pragma pack(push, 1)

+

+/**

+ This is the ASF Boot Option data structure.

+

+**/

+typedef struct {

+ UINT8 SubCommand;

+ UINT8 Version;

+ UINT32 IanaId;

+ UINT8 SpecialCommand;

+ UINT16 SpecCmdParameter;

+ UINT16 BootOptionBit;

+ UINT16 OemParameter;

+} ASF_BOOT_OPTION;

+

+/**

+ This is the ASF PUSH EVENT Structure.

+

+**/

+typedef EFI_STATUS (EFIAPI *ASF_PUSH_EVENT)(

+ IN UINT8 Command,

+ IN UINTN Length,

+ IN UINT8 *ASFEvent

+ );

+

+/**

+ This is the AMI ASF Protocol Structure.

+

+**/

+typedef struct {

+ ASF_PUSH_EVENT PushEvent;

+ ASF_BOOT_OPTION *BootOption;

+} ASF_PROTOCOL;

+

+#pragma pack(pop)

+

+extern EFI_GUID gAsfProtocolGuid;

+

+#endif //__ASF_PROTOCOL_H__

diff --git a/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.inf b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.inf
new file mode 100644
index 000000000000..ca90d02f005b
--- /dev/null
+++ b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.inf
@@ -0,0 +1,30 @@
+## @file

+# Asf Acpi table Library instance that create Asf Acpi table

+#

+# Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+ INF_VERSION = 0x00010005

+ BASE_NAME = AsfAcpiTableLib

+ MODULE_UNI_FILE = AsfAcpiTableLib.uni

+ FILE_GUID = 9A0EC995-0F1A-444C-BA02-8C3F0482AE8C

+ MODULE_TYPE = DXE_DRIVER

+ VERSION_STRING = 1.0

+ LIBRARY_CLASS = AsfAcpiTableLib | DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION UEFI_DRIVER

+

+[Sources]

+ AsfAcpiTableLib.c

+

+[Packages]

+ MdePkg/MdePkg.dec

+ MdeModulePkg/MdeModulePkg.dec

+

+[Protocols]

+ gEfiAcpiTableProtocolGuid ## CONSUMES

+

+[LibraryClasses]

+ BaseLib

+ DebugLib

+

diff --git a/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.uni b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.uni
new file mode 100644
index 000000000000..681458140452
--- /dev/null
+++ b/AsfPkg/Library/AsfAcpiTableLib/AsfAcpiTableLib.uni
@@ -0,0 +1,15 @@
+// /** @file

+// Asf Acpi table

+//

+// Install Asf Acpi table

+//

+// Copyright (c) 1985 - 2022, AMI. All rights reserved.<BR>

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+

+#string STR_MODULE_ABSTRACT #language en-US "Asf Acpi table"

+

+#string STR_MODULE_DESCRIPTION #language en-US "Install Asf Acpi table."

+

--
2.36.0.windows.1
-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Martin Fernandez
 

That works for me too. See you on Tuesday!

On Tue, Jul 5, 2022 at 1:42 PM Demeter, Miki <miki.demeter@...> wrote:

Hi Richard

Yes, the 7th of July

That time allowance will be perfect.. I will give you the first time slot to make sure we can meet your schedule.

See you there.. Thank you for working with me on getting this date setup

-miki

--
Miki Demeter (she/her/Miki)
Security Researcher / FW Developer
FST
Intel Corporation

Co-Chair, Network of Intel African-Ancestry(NIA) - Oregon
NIA-Oregon<https://intel.sharepoint.com/sites/NIA>

Portland Women in Tech Best Speaker
miki.demeter@...<mailto:miki.demeter@...>
503.712.8030 (office)
971.248.0123 (cell)


From: Richard Hughes <hughsient@...>
Date: Tuesday, July 5, 2022 at 9:22 AM
To: Demeter, Miki <miki.demeter@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Martin Fernandez <martin.fernandez@...>
Subject: Re: [edk2-rfc] [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries
On Tue, 5 Jul 2022 at 17:18, Demeter, Miki <miki.demeter@...> wrote:
Does 9:00 am PST / 5:00pm BST work for you?
On the 7th? In which case I can do 1700 BST but I have a hard stop at
1745 -- if that helps. Sorry!

RIchard.





Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Demeter, Miki
 

Hi Richard

Yes, the 7th of July

That time allowance will be perfect.. I will give you the first time slot to make sure we can meet your schedule.

See you there.. Thank you for working with me on getting this date setup

-miki

--
Miki Demeter (she/her/Miki)
Security Researcher / FW Developer
FST
Intel Corporation

Co-Chair, Network of Intel African-Ancestry(NIA) - Oregon
NIA-Oregon<https://intel.sharepoint.com/sites/NIA>

Portland Women in Tech Best Speaker
miki.demeter@...<mailto:miki.demeter@...>
503.712.8030 (office)
971.248.0123 (cell)


From: Richard Hughes <hughsient@...>
Date: Tuesday, July 5, 2022 at 9:22 AM
To: Demeter, Miki <miki.demeter@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Martin Fernandez <martin.fernandez@...>
Subject: Re: [edk2-rfc] [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries
On Tue, 5 Jul 2022 at 17:18, Demeter, Miki <miki.demeter@...> wrote:
Does 9:00 am PST / 5:00pm BST work for you?
On the 7th? In which case I can do 1700 BST but I have a hard stop at
1745 -- if that helps. Sorry!

RIchard.


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Richard Hughes <hughsient@...>
 

On Tue, 5 Jul 2022 at 17:18, Demeter, Miki <miki.demeter@...> wrote:
Does 9:00 am PST / 5:00pm BST work for you?
On the 7th? In which case I can do 1700 BST but I have a hard stop at
1745 -- if that helps. Sorry!

RIchard.


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Richard Hughes <hughsient@...>
 

On Tue, 5 Jul 2022 at 15:50, Demeter, Miki <miki.demeter@...> wrote:
It would be 7:30pm PST
Hmm, that's 3:30 AM BST for me. Martin, that's 1:00 AM for you? I
think we might have to send our apologies Miki, unless we can record
something tomorrow for you to show?

Richard.


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Richard Hughes <hughsient@...>
 

On Mon, 6 Jun 2022 at 21:36, Demeter, Miki <miki.demeter@...> wrote:
Thank you I will add you to the agenda for the July 7th meeting at 7:30 pm
Hi Miki; what timezone please? Martin just pointed out you probably
were not talking about GMT. I'm in London so if you're talking about
PST then 4AM local time isn't going to work I'm afraid.

Richard


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Demeter, Miki
 

Does 9:00 am PST / 5:00pm BST work for you?

Sorry, I did not know you were in BST time sone

-miki
--
Miki Demeter (she/her/Miki)
Security Researcher / FW Developer
FST
Intel Corporation

Co-Chair, Network of Intel African-Ancestry(NIA) - Oregon
NIA-Oregon<https://intel.sharepoint.com/sites/NIA>

Portland Women in Tech Best Speaker
miki.demeter@...<mailto:miki.demeter@...>
503.712.8030 (office)
971.248.0123 (cell)


From: Richard Hughes <hughsient@...>
Date: Tuesday, July 5, 2022 at 9:14 AM
To: Demeter, Miki <miki.demeter@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Martin Fernandez <martin.fernandez@...>
Subject: Re: [edk2-rfc] [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries
On Tue, 5 Jul 2022 at 15:50, Demeter, Miki <miki.demeter@...> wrote:
It would be 7:30pm PST
Hmm, that's 3:30 AM BST for me. Martin, that's 1:00 AM for you? I
think we might have to send our apologies Miki, unless we can record
something tomorrow for you to show?

Richard.


Re: [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries

Demeter, Miki
 

It would be 7:30pm PST

Does this work?

-miki

--
Miki Demeter (she/her/Miki)
Security Researcher / FW Developer
FST
Intel Corporation

Co-Chair, Network of Intel African-Ancestry(NIA) - Oregon
NIA-Oregon<https://intel.sharepoint.com/sites/NIA>

Portland Women in Tech Best Speaker
miki.demeter@...<mailto:miki.demeter@...>
503.712.8030 (office)
971.248.0123 (cell)


From: Richard Hughes <hughsient@...>
Date: Monday, July 4, 2022 at 12:36 PM
To: Demeter, Miki <miki.demeter@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Martin Fernandez <martin.fernandez@...>
Subject: Re: [edk2-rfc] [PATCH] [rfc] Add SBOM (software bill of materials) to the efi binaries
On Mon, 6 Jun 2022 at 21:36, Demeter, Miki <miki.demeter@...> wrote:
Thank you I will add you to the agenda for the July 7th meeting at 7:30 pm
Hi Miki; what timezone please? Martin just pointed out you probably
were not talking about GMT. I'm in London so if you're talking about
PST then 4AM local time isn't going to work I'm afraid.

Richard


Re: RFC v2: Static Analysis in edk2 CI

Felix Polyudov
 

Yes, we can run other analyzer; however, in case of CodeChecker we also need a server to upload the result to.

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Michael D
Kinney via groups.io
Sent: Thursday, June 23, 2022 9:30 PM
To: rfc@edk2.groups.io; pedro.falcato@...; Felix Polyudov
<Felixp@...>; Kinney, Michael D <michael.d.kinney@...>
Cc: Rebecca Cran <rebecca@...>; edk2-devel-groups-io
<devel@edk2.groups.io>
Subject: [EXTERNAL] Re: [edk2-rfc] RFC v2: Static Analysis in edk2 CI


**CAUTION: The e-mail below is from an external source. Please exercise
caution before opening attachments, clicking links, or following guidance.**

I have Coverity scan builds running in a GitHub Action and then uploaded to
Coverity.

We should be able to configure a GitHub Action to run other analyzers.

Mike

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Pedro
Falcato
Sent: Tuesday, June 14, 2022 1:00 PM
To: rfc@edk2.groups.io; POLUDOV, FELIX <felixp@...>
Cc: Rebecca Cran <rebecca@...>; edk2-devel-groups-io
<devel@edk2.groups.io>
Subject: Re: [edk2-rfc] RFC v2: Static Analysis in edk2 CI

(Re-adding devel@ since Felix dropped it)

On Tue, Jun 14, 2022 at 8:59 PM Pedro Falcato
<pedro.falcato@...>
wrote:

Just want to note that if we want to go ahead with fuzzing (I
detailed a possible plan to do so in the mailing list a month or so
ago) we will definitely need somewhere to run fuzzing (even if it's Google's
syzbot).
Getting somewhere where we can run static analysis, fuzzing just
makes sense IMO (hell, who knows, maybe even CI or something like
Gerrit for mailing list-less code reviews).

On Tue, Jun 14, 2022 at 7:43 PM Felix Polyudov via groups.io
<felixp= ami.com@groups.io> wrote:

Yes, LLVM/CLANG Static Analyzer is another possibility. I've
mentioned it in the first version of the RFC.
CodeChecker
(https://codechecker.readthedocs.io/en/latest/) is an open source front-end
for the scan-build and clang-tidy.
It simplifies analyzer configuration and provides web-based report
storage. However, it has to be hosted somewhere.
If somebody has an idea on how edk2 community can host the
CodeChecker, that's definitely an option to consider.





--
Pedro Falcato
-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: RFC v2: Static Analysis in edk2 CI

Michael D Kinney
 

I have Coverity scan builds running in a GitHub Action and then uploaded to Coverity.

We should be able to configure a GitHub Action to run other analyzers.

Mike

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Pedro Falcato
Sent: Tuesday, June 14, 2022 1:00 PM
To: rfc@edk2.groups.io; POLUDOV, FELIX <felixp@...>
Cc: Rebecca Cran <rebecca@...>; edk2-devel-groups-io <devel@edk2.groups.io>
Subject: Re: [edk2-rfc] RFC v2: Static Analysis in edk2 CI

(Re-adding devel@ since Felix dropped it)

On Tue, Jun 14, 2022 at 8:59 PM Pedro Falcato <pedro.falcato@...>
wrote:

Just want to note that if we want to go ahead with fuzzing (I detailed a
possible plan to do so in the mailing list a month or so ago) we will
definitely need somewhere to run fuzzing (even if it's Google's syzbot).
Getting somewhere where we can run static analysis, fuzzing just makes
sense IMO (hell, who knows, maybe even CI or something like Gerrit for
mailing list-less code reviews).

On Tue, Jun 14, 2022 at 7:43 PM Felix Polyudov via groups.io <felixp=
ami.com@groups.io> wrote:

Yes, LLVM/CLANG Static Analyzer is another possibility. I've mentioned it
in the first version of the RFC.
CodeChecker (https://codechecker.readthedocs.io/en/latest/) is an open
source front-end for the scan-build and clang-tidy.
It simplifies analyzer configuration and provides web-based report
storage. However, it has to be hosted somewhere.
If somebody has an idea on how edk2 community can host the CodeChecker,
that's definitely an option to consider.





--
Pedro Falcato

--
Pedro Falcato




Re: RFC v2: Static Analysis in edk2 CI

Pedro Falcato
 

(Re-adding devel@ since Felix dropped it)

On Tue, Jun 14, 2022 at 8:59 PM Pedro Falcato <pedro.falcato@...>
wrote:

Just want to note that if we want to go ahead with fuzzing (I detailed a
possible plan to do so in the mailing list a month or so ago) we will
definitely need somewhere to run fuzzing (even if it's Google's syzbot).
Getting somewhere where we can run static analysis, fuzzing just makes
sense IMO (hell, who knows, maybe even CI or something like Gerrit for
mailing list-less code reviews).

On Tue, Jun 14, 2022 at 7:43 PM Felix Polyudov via groups.io <felixp=
ami.com@groups.io> wrote:

Yes, LLVM/CLANG Static Analyzer is another possibility. I've mentioned it
in the first version of the RFC.
CodeChecker (https://codechecker.readthedocs.io/en/latest/) is an open
source front-end for the scan-build and clang-tidy.
It simplifies analyzer configuration and provides web-based report
storage. However, it has to be hosted somewhere.
If somebody has an idea on how edk2 community can host the CodeChecker,
that's definitely an option to consider.





--
Pedro Falcato

--
Pedro Falcato


Re: RFC v2: Static Analysis in edk2 CI

Pedro Falcato
 

Just want to note that if we want to go ahead with fuzzing (I detailed a
possible plan to do so in the mailing list a month or so ago) we will
definitely need somewhere to run fuzzing (even if it's Google's syzbot).
Getting somewhere where we can run static analysis, fuzzing just makes
sense IMO (hell, who knows, maybe even CI or something like Gerrit for
mailing list-less code reviews).

On Tue, Jun 14, 2022 at 7:43 PM Felix Polyudov via groups.io <felixp=
ami.com@groups.io> wrote:

Yes, LLVM/CLANG Static Analyzer is another possibility. I've mentioned it
in the first version of the RFC.
CodeChecker (https://codechecker.readthedocs.io/en/latest/) is an open
source front-end for the scan-build and clang-tidy.
It simplifies analyzer configuration and provides web-based report
storage. However, it has to be hosted somewhere.
If somebody has an idea on how edk2 community can host the CodeChecker,
that's definitely an option to consider.





--
Pedro Falcato


Re: RFC v2: Static Analysis in edk2 CI

Felix Polyudov
 

Yes, LLVM/CLANG Static Analyzer is another possibility. I've mentioned it in the first version of the RFC.
CodeChecker (https://codechecker.readthedocs.io/en/latest/) is an open source front-end for the scan-build and clang-tidy.
It simplifies analyzer configuration and provides web-based report storage. However, it has to be hosted somewhere.
If somebody has an idea on how edk2 community can host the CodeChecker, that's definitely an option to consider.


Re: RFC v2: Static Analysis in edk2 CI

Rebecca Cran
 

LLVM's tools also appear to be much easier to review, for other people to run etc. I'd suggest at least starting with clang-tidy + scan-build and possibly adding Coverity later.

I've found the Coverity tools, while very powerful, tend to get ignored after a while because it's quite a process to keep it running, go through the issues it detects and keep the database up-to-date etc.


--

Rebecca Cran

On 6/13/22 15:54, Pedro Falcato wrote:
(Replying under Mike for devel visibility)

Felix,

Why coverity? I feel like we could run something akin to LLVM's clang-tidy
+ scan-build; it's open source (transparent *and* we can improve it or add
UEFI quirks) and doesn't rely on a third-party service. I'm sure we could
figure something out for hosting the thing. Otherwise, looks good to me.

Thanks,
Pedro

On Mon, Jun 13, 2022 at 7:54 PM Michael D Kinney <michael.d.kinney@...>
wrote:

+devel@edk2.groups.io

Mike

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Felix
Polyudov via groups.io
Sent: Monday, June 13, 2022 10:48 AM
To: rfc@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@...>
Subject: [edk2-rfc] RFC v2: Static Analysis in edk2 CI

This is version 2 of the proposal that provides additional details
regarding the bring up process.
The initial version is at https://edk2.groups.io/g/rfc/message/696

The goal of the proposal is integration of the static analysis (SA) into
the edk2 workflow.
- Use Open Coverity SA service to scan edk2 repository. The service is
free for open source projects.
edk2 Open Coverity project:
https://scan.coverity.com/projects/tianocore-edk2
- Update edk2 CI scripts to run analysis once a week
- Perform analysis on all the edk2 packages using package DSC files
that are used for CI build tests
(Coverity analysis is executed in the course of a specially
instrumented project build).
- SA results are uploaded to scan.coverity.com. To access them one
would need to register on the site and request tianocore-
edk2 project access. The site can be used to triage the reported issues.
Confirmed issues can be addressed using a standard edk2
process (Bugzilla, mailing list).
- During the initial bring up period, access to the SA results is
restricted to stewards, maintainers, and members of the
TianoCore InfoSec group, who are encouraged to review reported issues
with the primary goal of identifying security-related
issues. All such issues should be handled in accordance with the
following guidelines:
https://github.com/tianocore/tianocore.github.io/wiki/Reporting-Security-Issues
- The initial bring up period ends when embargo for all the identified
security issues ends or after 30 days if no security
issues have been identified
- Once brig up period is over, SA results access is open to everybody.
- The package maintainers should monitor weekly scan results for a newly
reported issues and reach back to original patch
submitters to resolve them. Package maintainers can revert the patch if
no action is taken by the submitter.
-The information contained in this message may be confidential and
proprietary to American Megatrends (AMI). This communication
is intended to be read only by the individual or entity to whom it is
addressed or by their designee. If the reader of this
message is not the intended recipient, you are on notice that any
distribution of this message, in any form, is strictly
prohibited. Please promptly notify the sender by reply e-mail or by
telephone at 770-246-8600, and then delete or destroy all
copies of the transmission.







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