Hi Hao Wu, Do you have any update on this patch? Thanks, Richard

When a platform has lots of CPU cores/threads, perf-logging on every AP produces lots of records. When this multiplies with number of SMIs during post, the records are even more. So, this patch adds a

Ray Ni (6): UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP procedures UefiCpuPkg/CpuSmm: Add perf-logging for MP procedures MdeModulePkg/SmmCore: Add perf-logging for time-consuming proced

Reminder: TianoCore Community Meeting - APAC/NAMO When: Thursday, June 8, 2023 7:30pm to 8:30pm (UTC-07:00) America/Los Angeles Where: https://teams.microsoft.com/l/meetup-join/19%3ameeting_Y2M1NDE3OD

From: Ranbir Singh <Ranbir.Singh3@...> The return value stored in Status after call to SetDriveParameters is not made of any use thereafter and hence it remains as UNUSED. Assuming, this non-usage is

Currently, we rely on the logic in DXE IPL to create new page tables from scratch when executing in X64 mode, which means that we run with the initial page tables all throughout PEI, and never enable

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4410 Inside TcgMorLockSmm.c, the SetVariableCheckHandlerMorLock() function contains a scenario to prevent a possible dictionary attack on the MorL

From: Kun Qin <kuqin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4464 This change introduced the Standalone MM based variable read capability in PEI phase for applicable platforms (such

From: Kun Qin <kuqin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4464 This change introduced the MM communicate support in PEI phase for ARM based platforms. Similar to the DXE counterp

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4464 As of today, there has been a void in the variable service in PEI phase on ARM systems that support PEI phase and standalone MM hosted variable

The DEBUG print that outputs the base and size of the page table allocation always prints 0x0 for the size, given that BufferSize will be updated by PageTableMap () and contain the unused allocation o

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3966 This change updated the default value of TPM device subclass PCD to `0x010E0000` in order to match the definition of EFI_PERIPHERAL_TPM from

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3966 This change introduces a new peripheral subclass definition from PI specification v1.8. The new subclass definition will cover system reboot

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3794 This change introduces a new error code definitions under Host Software class according to PI specification v1.8. The new error code definiti

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3794 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966 This v2 series is a follow up of previously submitted patches: https://edk2.groups.io/

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4468=0D =0D Take a step towards enabling a generic approach to manage memory=0D permissions in PEI, by wiring up the existing IA32 page table crea

Hi all, We found an issue a while back on ARM systems, where the Standalone MM drivers with Depex specified will run into a hang when TFA hands off to Standalone MM core. (https://bugzilla.tianocore.o

From: Patrick Henz <patrick.henz@...> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 Timeouts in the XhciDxe driver are taking longer than expected due to the timeout loops not accounting for

TianoCore Community Meeting EMEA/NAMO When: Thursday, June 8, 2023 8:00am to 9:00am (UTC-07:00) America/Los Angeles Where: Microsoft Teams meeting Join on your computer or mobile app Click here to joi

Reminder: TianoCore Community Meeting EMEA/NAMO When: Thursday, June 8, 2023 8:00am to 9:00am (UTC-07:00) America/Los Angeles Where: Microsoft Teams meeting Join on your computer or mobile app Click h