From: Michael Kubacki <michael.kubacki@...> Fixes CodeQL alerts for CWE-457: https://cwe.mitre.org/data/definitions/457.html Cc: Eric Dong <eric.dong@...> Cc: Erich McMillan <emcmillan@...> Cc: Michae

Cc: Sunil V L <sunilvl@...> Cc: Andrei Warkentin <andrei.warkentin@...> Cc: Daniel Schaefer <git@...> Signed-off-by: Dhaval Sharma <dhaval@...> Add support for Cache Management Operations --- OvmfPkg/

Adding code to support Cache Management Operations (CMO) defined by RV spec https://github.com/riscv/riscv-CMOs Notes: 1. CMO only supports block based Operations. Meaning complete cache flush/invd/cl

Current implementation for cache management (instruction/data flush/invd) depends on ifence instruction. All RV platforms may not use the same method for cache management. Instead RV defines CMO Cache

BufferPages is UINTN, so we need "%Lu" when printing it. Fixes: 4f441d024bee ("UefiCpuPkg/PiSmmCpuDxeSmm: fix error handling") Reported-by: Laszlo Ersek <lersek@...> Signed-off-by: Gerd Hoffmann <krax

Use the MdePkg version instead of maintaining a copy in BaseTools. Signed-off-by: Gerd Hoffmann <kraxel@...> --- .../Source/C/Include/IndustryStandard/Acpi.h | 117 --- .../C/Include/IndustryStandard/A

Cc: Rebecca Cran <rebecca@...> Cc: Michael D Kinney <michael.d.kinney@...> Cc: Jayaprakash N <n.jayaprakash@...> Signed-off-by: Ajay Kadapathri <ajay.kadapathri@...> --- .../Python-3.6.8/PyMod-3.6.8/M

Itanium support has been removed from EDK2 aroun 2019. ITANIUM_HANDOFF_STATUS data structure looks to be some leftover from that process. There is also positive sidefect of this data structure removal

When splitting leaf parent entry to smaller granularity, create child page table before modifing parent entry. In previous code logic, when splitting a leaf parent entry, parent entry will point to a

In previous code logic, when splitting a leaf parent entry to smaller granularity child page table, if the parent entry Attribute&Mask(without PageTableBaseAddress field) is equal to the input attribu

Hi all, If someone had a chance to take a look at this patchset already and would like to share thoughts? The 1st patch from this series has been already successfully reviewed. Best regards, Pawel --

Hi all, If someone had a chance to take a look at this patchset already and would like to share thoughts? The 1st patch from this series has been already successfully reviewed. Best regards, Pawel --

Hi Liming, Thank you for the review. Best regards, Pawel -- Paweł Poławski Red Hat Virtualization ppolawsk@... @RedHat Red Hat Red Hat

Nothing to do here for virtio 1.0 devices Signed-off-by: Jeff Brasen <jbrasen@...> --- .../Library/VirtioMmioDeviceLib/VirtioMmioDeviceFunctions.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(

Hello : We are writing a application to program the MAC from UEFI shell and with the updated MAC address trying to do the PXE Boot which failed. The application uses the Simple Network Protocols Stati

For all the RD-N2 platform variants, include the SSDT ACPI table that describes the devices present in SoC expansion block that is connected to the IO virtualization block. Signed-off-by: Vivek Gautam

From: Shriram K <shriram.k@...> The IO virtualization block on reference design platforms allow connecting SoC expansion devices such as PL011 UART. On platforms that support this, initialize the UART

Arm reference design platforms have multiple IO virtualization blocks that allow connecting PCIe root bus or non-PCIe SoC peripherals to the system. Each of these IO virtualization blocks consists of

Enable the virtio-p9 device that is present as part of the RoS peripherals on RD-N2 platform variants. This will allow filesystem sharing between the Host PC and target platform. Signed-off-by: Vivek

Some of the Arm reference design FVP platforms support the Virtio-p9 device as part of the RoS subsystem. Add an entry for this device in the SSDT acpi table. The device entry is listed in a new SSDT