Add support for the ImageCapsuleSupport field, introduced in version 3 of the EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER structure. This structure member is used to indicate if the corresponding pay

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3314 This patch uses Openssl's EVP API's to perform RSASSA-PSS verification of a binary blob. Cc: Jiewen Yao <jiewen.yao@...> Cc: Jian J Wang <jian.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3341 Current CLANG_BIN env variable is set without double quote around the LLVM default installation path string in windows, which causes some CI

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3332 Currently Fitgen tools verifies every detail of ACM header, so any ACM header change breaks the tool. As ACM header is verified by microcode an

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 During the SEV-SNP guest launch sequence, two special pages need to be inserted, the secrets page and cpuid page. The secrets page, contain the

The RD-E1-Edge platform includes two clusters with eight multi-thread CPUs. Each of the CPUs include 32KB L1 Data cache, 32KB L1 Instruction cache and 256KB L2 cache. Each cluster includes a 2MB L3 ca

Cancelled: TianoCore Bug Triage - APAC / NAMO This event has been cancelled. When: Tuesday, 20 April 2021 6:30pm to 7:30pm (UTC-07:00) America/Los Angeles Where: https://meetingsamer34.webex.com/meeti

Hi, all Few new issues are reported this week. Let’s cancel this week meeting. 3342 EDK2 Code unassigned@... UNCO FmpDeviceLib interface for Driver Unload is missing. 16:22:05 jrahn@... 3339 EDK2 Cod

Add helper macros for the creation for PPTT table. These macros help with initializing processor hierarchy node structure, cache type structure and ID structure. Signed-off-by: Pranav Madhu <pranav.ma

From: Michael Kubacki <michael.kubacki@...> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds a Traditional MM and Standalone MM SPI FVB Service driver to IntelSiliconPkg. These drivers p

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3314 This patch uses Openssl's EVP API's to perform RSASSA-PSS verification of a binary blob. https://github.com/sagraw2/edk2/tree/pss_1 Cc: Jiewen

Hi, Years ago, the bug(*) for PEI variable driver was filed against OVMF and it used to be one reason to block S4 support in OVMF. The bug is fixed now, and there are several MemTypeInfo fixes merged

Reminder: TianoCore Bug Triage - APAC / NAMO When: Tuesday, 20 April 2021, 6:30pm to 7:30pm, (GMT-07:00) America/Los Angeles Where:https://meetingsamer34.webex.com/meetingsamer34/j.php?MTID=mb96c5bd41

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3300 Current implementation of SetStaticPageTable routine in PiSmmCpuDxeSmm driver will check a global variable mPhysicalAddressBits, and eventually

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library has been consolidated with instances in other Intel silicon packages as a single instance in IntelSiliconPkg Cc: Chasel Chiu <chas

Hi Ray, Would you please provide feedback for this patch? It is already reviewed by Laszlo here: https://edk2.groups.io/g/devel/message/74122. Could you please let me know what it takes after your rev

Hi, When building the source observing the below error, unable to root cause the issue. Kindly help to root cause the same. build.py... : error C0DE: Unknown fatal error when processing [c:\source\wor

Changes since V2: - Addressed comments from Sami - Picked up Sami's R-b tags on applicable patches Changes since V1: - Added 2 new patches which provide virtio net support and documentation for the Mo

This series adds the Access Size parameter to the Serial Port in DynamicTablesPkg. This has been tested (by Sami) with kvmtool, which virtualises a UART with 8 bit access size. Changes available at ht

This patch implements the configuration manager for Morello platform. It enables support for generating the following ACPI tables for Morello FVP Platform: 1. FADT 2. DSDT 3. GTDT 4. MADT 5. SPCR 6. D