REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3952 In UEFI spec, it defines reconnect timing that will be activated upon exiting of the formset or the browser. However, we did't use this kind o

From: KasimX Liu <kasimx.liu@...> REF: ttps://bugzilla.tianocore.org/show_bug.cgi?id=3D3960 Currently, UniversalPayloadBuild.py don't have support python3.6, we use python3.6 will encounter f"" failur

Hello edk2-devel list, This is my first contribution to the EDK2 project. I was following upstream howto creating this email / patch. Please let me know in case I did something the wrong way. Laszlo E

Hello everyone, I have been poking around the BaseTools to understand its implementation since I will have to add Rust build support as a part of my GSoC project. The `BaseTools/Source/Python` directo

Looking for approval for the attached bounced email from edk2 below Thanks Peter -----Original Message----- From: edk2-devel-owner@... <edk2-devel-owner@...> Sent: Thursday, June 23, 2022 2:00 PM To:

Increased control is provided in Ovmf platforms to define and configure the specifications of multiple PCI host bridges in the hypervisor. The host propagates this information to the guest, initially

From: Jason1 Lin <jason1.lin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3959 As per FIT BIOS Specification 1.2 Rules, the size bytes (3 bytes)/ reserved byte (1 byte) / CheckSum byte (

From: Jason1 Lin <jason1.lin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3958 Within current FitGen tool there had limitation only allow one S-ACM to generate the Type 2 entry. This cod

Writes TianoCore debug logs into the CBMEM console ringbuffer, from where the user can retrieve them with the `cbmem` userspace utility. The intention is to aid in debugging non-fatal issues even in r

Include HardwareInfoLib classes in the IntelTdxX64.dsc for this platform to use it during build given that PciHostBridgeUtilityLib depends on it. Cc: Alexander Graf <graf@...> Cc: Gerd Hoffmann <kraxe

Include DxeHardwareInfoLib class in the common ArmVirt.dsc.inc so that ArmVirt* platforms use it during build given that PciHostBridgeUtilityLib depends on it. Cc: Alexander Graf <graf@...> Cc: Gerd H

From: Jason1 Lin <jason1.lin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3959 As per FIT BIOS Specification 1.2 Rules, the size bytes (3 bytes)/ reserved byte (1 byte) / CheckSum byte (

From: Jason1 Lin <jason1.lin@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3958 Within current FitGen tool there had limitation only allow one S-ACM to generate the Type 2 entry. This cod

TianoCore edk2-test Bug Triage Meeting When: 06/23/2022 10:00pm to 11:00pm (UTC+08:00) Asia/Shanghai Where: https://armltd.zoom.us/j/93809865843?pwd=dU1hSzk4NHM2RGhaRDRyWWZxUzY5dz09&from=addon Organiz

A simple fix to avoid overwrtiing Boot0000 when mBootMenuFile is not found. James Wang (1): BoardModulePkg: Fix Boot0000 got overwritten Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBoot

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3522 Boot0000 will be overwritten when F7 is pressed and Boot Menu is not found. Check if mBootMenuOptionNumber is valid or not before calling Regist

From: Taylor Beebe <t@...> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3869 A split page should always have the RW and P attributes set so the lowest level page frame determines the access righ

Hello everyone, Can anyone help me with understanding dynamic memory management in PEI phase? In the UEFI Platform Integration Specification, version 1.7 Errata A, Section 4.6, PEI Memory services are

From: Theo Jehl <theojehl76@...> Added -read_only_relocs suppress for XCODE5 X64 toolchain This remove the needs for XCODE5 specific source with relocation fixes Cc: Bob Feng <bob.c.feng@...> Cc: Limi

Reminder: TianoCore edk2-test Bug Triage Meeting When: 06/23/2022 10:00pm to 11:00pm (UTC+08:00) Asia/Shanghai Where: https://armltd.zoom.us/j/93809865843?pwd=dU1hSzk4NHM2RGhaRDRyWWZxUzY5dz09&from=add