Fix the following errors from gcc: Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c: In function ‘JudgeHandleIsPCIDevice’: Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c:164:22: er

gcc issued the error of "multiple deifintion" since gBS was also defined in MdePkg/Library/UefiBootServicesTableLib. Actually those global variables, gBS, pBS, and pRS, in PpmPolicy.h were only used i

Fix the following error from gcc: Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c: In function ‘PpmPolicyEntry’: Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c:50:29: error: variable ‘MaxRatio’ set but not used [-We

Reviewed-by: Yonghong Zhu <yonghong.zhu@...> Best Regards, Zhu Yonghong

We only enable "-Wno-unused-but-set-variable" for the release build and gcc would complain that the varible passed to ASSERT_EFI_ERROR wasn't used in the debug build. Just don't define MDEPKG_NDEBUG f

Thanks a lot for reply, guys. Bios form https://www.kraxel.org rly helped and my keyboard working fine. Thanks, Eugene. 2016-07-26 4:36 GMT+03:00 Tian, Feng <feng.tian@...>:

According to PI spec,EndOfDxe Event should be signaled before DxeSmmReadyToLock protocol installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@...

According to PI spec,EndOfDxe Event should be signaled before DxeSmmReadyToLock protocol installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@...

Thanks, Jeremy. Pushed to OpenPlatformPkg.

Laszlo, I sent one evaluate patch for you by adding back GDT table load in CpuDxe. Could you please help to verify if it could fix IA32 S3 issue? Another solution is to remove hardcode from PiSmmCpuDx

Import the AArch64 EBC implementation from https://source.codeaurora.org/external/server/edk2-blue/ 1/2 does not contain a "Contributed-under:" due to my interpretation of section 4 of the Tianocore C

Since we now have EBC support for AArch64, enable it by default on the QEMU platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@...> --- ArmVi

We add MP Initialize Library defined in UefiCpuPkg/Include/Library/MpInitLib.h. It will provide basic functionalities of MP services and could be consumed by CPU MP PEI and CPU MP DXE to produce CPU M

#define MSR_IA32_APIC_BASE_ADDRESS is duplicated with #define MSR_IA32_APIC_BASE defined in UefiCpuPkg/Include/Register/ArchitecturalMsr.h, so we could remove it and update the modules to use MSR_IA32

Add microcode definitions defined in Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 3A, Section 9.11. v4: 1. ProcessorSignature type changed to CPU_MICROCODE_PROCESSOR_SIGNATUR

Currently, we will allocate StartupVector buffer under 1MB at entry point function. But some modules may allocate some hard code address under 1MB. For example, LegacyBiosDxe driver tries to manage so

MP Initialize library provides basic functionalities to do APs initialization, to manage MP information and to wakeup APs to execute AP task. It could be consumed by CPU MP PEI or DXE drivers to provi

Add two MP Initialize Library instances PeiMpInitLib.inf and DxeMpInitLib.inf with NULL implementation. One PeiMpInitLib.inf is consumed by PEI MP driver. Another DxeMpInitLib.inf is consumed by DXE M

Add assembly code for AP reset vector and the definition of MP_CPU_EXCHANGE_INFO that are used to exchange the data between C code and assembly code when AP wake up. v4: 1. Copy MP_CPU_EXCHANGE_INFO f

1. Rename NumApsExecutingLoction to NumApsExecutingLocation 2. Update some comments in NASM files. 3. Remove PeiCpuMpData from MP_CPU_EXCHANGE_INFO. Cc: Michael Kinney <michael.d.kinney@...> Cc: Feng