Fix GCC build error on AARCH64 system. Signed-off-by: Nickle Wang <nicklew@...> Cc: Jian J Wang <jian.j.wang@...> Cc: Liming Gao <gaoliming@...> Cc: Nick Ramirez <nramirez@...> --- .../Universal/Regul

[AMD Official Use Only - General] Hi Sir, I meet fail when do SetDataFunction Test and this only occurred on the first time after program Bios by DediProg The Function location : HIITest -> ConfigKeyw

This is to prevent #DB interception on SEV-ES VM with enabled DebugSwap feature, more details in 3/5. This is based on sha1 dd3ba82d31a6 and pushed out at https://github.com/aik/edk2/commits/debugswap

We will need soon DebugSwap but others likely too. Signed-off-by: Alexey Kardashevskiy <aik@...> --- MdePkg/Include/Register/Amd/Fam17Msr.h | 57 +++++++++++++++++++- 1 file changed, 56 insertions(+),

The SEV-ES DebugSwap feature enables type B swaping of debug registers on #VMEXIT and makes #DB and DR7 intercepts unnecessary and unwanted. When DebugSwap is enabled, this stops booting if #VC for #D

CONFIDENTIAL_COMPUTING_GUEST_ATTR is not a simple SEV level anymore and includes a feature mask since a previous commit. This fixes AmdMemEncryptionAttrCheck to check the level and feature correctly a

This writes the feature bit into PcdConfidentialComputingGuestAttr and enables DebugSwap for the DXE stage too. Signed-off-by: Alexey Kardashevskiy <aik@...> --- OvmfPkg/PlatformPei/AmdSev.c | 13 ++++

256-bit invaildation queue descriptor could be used for both abort DMA mode and legacy mode. Signed-off-by: Sheng Wei <w.sheng@...> Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty

PcdConfidentialComputingGuestAttr so far only contained an SEV mode bit but there are more other features which do not translate to levels such as DebugSwap or SecureTsc. This adds the features mask a

From: Michael Kubacki <michael.kubacki@...> Fixes CodeQL alerts for CWE-457: https://cwe.mitre.org/data/definitions/457.html Checks the return value from `ASN1_get_object()` to verify values set by th

Upgrade openssl to 1.1.1s. Pick up bugfixes from the latest openssl release, which include some GCC build warnings cleaning up. Cc: Jian J Wang <jian.j.wang@...> Cc: Jiewen Yao <jiewen.yao@...> Signed

Fix GCC build error on AARCH64 system. Signed-off-by: Nickle Wang <nicklew@...> Cc: Jian J Wang <jian.j.wang@...> Cc: Liming Gao <gaoliming@...> Cc: Nick Ramirez <nramirez@...> --- .../Universal/Regul

Reminder: TianoCore edk2-test Bug Triage Meeting When: Thursday, December 1, 2022 10:00pm to 11:00pm (UTC+08:00) Asia/Shanghai Where: https://armltd.zoom.us/j/91247522013?pwd=ei9nUndTbG9oWEROS2M1aVREZ

TianoCore edk2-test Bug Triage Meeting When: Thursday, December 1, 2022 10:00pm to 11:00pm (UTC+08:00) Asia/Shanghai Where: https://armltd.zoom.us/j/91247522013?pwd=ei9nUndTbG9oWEROS2M1aVREZkpiQT09&fr

From: Zihong Yi <yizihong@...> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4167 In CrtLibSupport.h, time_t is defined as INT32, and its maximum value is 2147483647. That is, the corresponding

Fix GCC build error on AARCH64 system. Signed-off-by: Nickle Wang <nicklew@...> Cc: Jian J Wang <jian.j.wang@...> Cc: Liming Gao <gaoliming@...> Cc: Michael D Kinney <michael.d.kinney@...> Cc: Nick Ra

Due to allocation type used in HOB responsible for vCPU data allocation EDK2 is limited to only 1024 vCPU when running with Qemu. After some research and feedback from edk-devel mailing list it looks

Fixes problems due to code assuming it runs with frame pointers and thus updates rbp / ebp registers when switching stacks. Signed-off-by: Gerd Hoffmann <kraxel@...> --- BaseTools/Conf/tools_def.templ

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4009 Check if there is usable memory below 4 GiB before testing for allocation without the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute. Cc: G E

Adjusts the requirements for the MaxPacketLength to match what is seen on real world devices that do not follow the USB specification. This fixes enumeration on the multiple USB 3 devices made by SanD