Adding code to support Cache Management Operations (CMO) defined by RV spec https://github.com/riscv/riscv-CMOs Notes: 1. CMO only supports block based Operations. Meaning complete cache flush/invd/cl

The PE/COFF spec describes an additional DllCharacteristics field implemented as a debug directory entry, which carries flags related to which control flow integrity (CFI) features are supported by th

These are implementations of SerialPortLib using SBI console services. - SecPeiRiscVSerialPortLibSbi is appropriate for SEC/PEI (XIP) environments - PrePiDxeRiscVSerialPortLibSbi is appropriate for Pr

Add FirmwareVolumeShadow PPI to shadow an FV to memory. and use it to shadow FVs to memory. Cc: Jiewen Yao <jiewen.yao@...> Cc: Jian J Wang <jian.j.wang@...> Cc: Liming Gao <gaoliming@...> Signed-off-

Cc: Sunil V L <sunilvl@...> Cc: Andrei Warkentin <andrei.warkentin@...> Cc: Daniel Schaefer <git@...> Signed-off-by: Dhaval Sharma <dhaval@...> Add support for Cache Management Operations --- OvmfPkg/

From: Umang Patel <umang.patel@...> If FirmwareVolumeShadow PPI is available, then use it to shadow FVs to memory. Otherwise fallback to CopyMem(). Cc: Jiewen Yao <jiewen.yao@...> Cc: Jian J Wang <jia

With the new mmconfig location at 0xe0000000 above the 32-bit PCI MMIO window we don't have to special-case the mmconfig xbar any more. We'll just add a mtrr uncachable entry starting at MMIO window b

This driver provides UEFI driver for USB RNDIS device Signed-off-by: Richard Ho <richardho@...> Cc: Andrew Fish <afish@...> Cc: Leif Lindholm <quic_llindhol@...> Cc: Michael D Kinney <michael.d.kinney

Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the room between end of low memory and the start of the mmconfig bar. With a typical configuration on modern qemu with gigabyte-aligned

REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4388 This commit adds Jayaprakash N as one of the maintainers of edk2-libc repo. Cc: Rebecca Cran <rebecca@...> Cc: Michael D Kinney <michael.d.kin

Hi all, Gentle reminder on the patch. Regards, Rohit

Increase the chance that CI finds bugs in MP changes. Signed-off-by: Gerd Hoffmann <kraxel@...> --- OvmfPkg/PlatformCI/PlatformBuildLib.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --g

Move the commment up so it is placed just before the address space calculations start. Also add q35 memory layout. Signed-off-by: Gerd Hoffmann <kraxel@...> --- OvmfPkg/Library/PlatformInitLib/Platfor

Implement a CPP macro that can be called from .S files to emit the .note section carrying the annotation that informs the linker that the object file is compatible with BTI control flow integrity chec

Hello EDK2 community, The "Nvme-Fabrics-Boot" branch was created in edk2-staging repository. Role of this branch is to upstream our NVMe-over-Fabrics boot prototype created under Timberland SIG's umbr

Implement version 2 of the memory attributes table, which now contains a=0D flag informing the OS whether or not code regions may be mapped with CFI=0D mitigations such as IBT or BTI enabled.=0D =0D T

This library follows Redfish Host Interface specification and use IPMI command to get bootstrap account credential(NetFn 2Ch, Command 02h) from BMC. RedfishHostInterfaceDxe will use this credential fo

UEFI v2.10 introduces a new flag to the memory attributes table to inform the OS whether or not runtime services code regions were emitted by the compiler with guard instructions for forward edge cont

The ELF based toolchains use objcopy to create HII object files, which contain only a single .hii section. This means no GNU note is inserted that describes the object as compatible with BTI, even tho

M-mode firmware ranges should not be used by EDK2/OS. Currently, we search for mmode_resv0 node in FDT and mark it as the reserved memory in EFI memory map. However, if there are multiple M-mode firmw