[PATCH v3 18/28] Ampere: PCIe: Add PciPlatformDxe driver


Nhi Pham
 

From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Registers the Platform NotifyPhase() to prevent unexpected issues
caused by the enabled PCIe controllers which have unstable link.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Platform/Ampere/JadePkg/Jade.dsc | 5 +
Platform/Ampere/JadePkg/Jade.fdf | 1 +
Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf | 37 ++++
Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c | 212 ++++++++++++++++++++
4 files changed, 255 insertions(+)

diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index b733f8430806..ce5f2c0dc4e1 100644
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -148,6 +148,11 @@ [Components.common]
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf

+ #
+ # PCIe
+ #
+ Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
+
#
# VGA Aspeed
#
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 195da2d63a7a..8ddfabcdd9a8 100644
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -298,6 +298,7 @@ [FV.FvMain]
#
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf

#
# VGA Aspeed
diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
new file mode 100644
index 000000000000..5f5316055217
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
@@ -0,0 +1,37 @@
+## @file
+#
+# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = PciPlatformDxe
+ FILE_GUID = 73276F3D-DCBC-49B2-9890-7564F917501D
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = PciPlatformDriverEntry
+
+[Sources]
+ PciPlatformDxe.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+
+[LibraryClasses]
+ Ac01PcieLib
+ DebugLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiDevicePathProtocolGuid
+ gEfiPciHostBridgeResourceAllocationProtocolGuid
+ gEfiPciPlatformProtocolGuid
+
+[Depex]
+ TRUE
diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c
new file mode 100644
index 000000000000..196f857175e9
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c
@@ -0,0 +1,212 @@
+/** @file
+
+ Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Library/Ac01PcieLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+#include <Protocol/PciPlatform.h>
+
+#pragma pack(1)
+typedef struct {
+ ACPI_HID_DEVICE_PATH AcpiDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+/**
+
+ Perform initialization by the phase indicated.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS Must return with success.
+
+**/
+EFI_STATUS
+EFIAPI
+PhaseNotify (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+{
+ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH *RootBridgeDevPath;
+ EFI_HANDLE RootBridgeHandle = NULL;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *ResAlloc = NULL;
+ EFI_STATUS Status;
+
+ if (ChipsetPhase != ChipsetExit) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Get HostBridgeInstance from HostBridge handle.
+ //
+ Status = gBS->HandleProtocol (
+ HostBridge,
+ &gEfiPciHostBridgeResourceAllocationProtocolGuid,
+ (VOID **)&ResAlloc
+ );
+
+ while (TRUE) {
+ Status = ResAlloc->GetNextRootBridge (ResAlloc, &RootBridgeHandle);
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ Status = gBS->HandleProtocol (
+ RootBridgeHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&RootBridgeDevPath
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a %d: Failed to locate RootBridge DevicePath\n", __FUNCTION__, __LINE__));
+ break;
+ }
+
+ Ac01PcieHostBridgeNotifyPhase (RootBridgeDevPath->AcpiDevicePath.UID, 0, Phase);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ The PlatformPrepController() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Several notification points are defined at this time. More synchronization points may be
+ added as required in the future. The PCI bus driver calls the platform driver twice for
+ every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
+ is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has
+ been notified.
+ This member function may not perform any error checking on the input parameters. It also
+ does not return any error codes. If this member function detects any error condition, it
+ needs to handle those errors on its own because there is no way to surface any errors to
+ the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param RootBridge The associated PCI root bridge handle.
+ @param PciAddress The address of the PCI device on the PCI bus.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED Not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformPrepController (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_HANDLE RootBridge,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Set the PciPolicy as EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS.
+
+ @param This The pointer to the Protocol itself.
+ @param PciPolicy The returned Policy.
+
+ @retval EFI_UNSUPPORTED Function not supported.
+ @retval EFI_INVALID_PARAMETER Invalid PciPolicy value.
+
+**/
+EFI_STATUS
+EFIAPI
+GetPlatformPolicy (
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+
+ Return a PCI ROM image for the onboard device represented by PciHandle.
+
+ @param This Protocol instance pointer.
+ @param PciHandle PCI device to return the ROM image for.
+ @param RomImage PCI Rom Image for onboard device.
+ @param RomSize Size of RomImage in bytes.
+
+ @retval EFI_SUCCESS RomImage is valid.
+ @retval EFI_NOT_FOUND No RomImage.
+
+**/
+EFI_STATUS
+EFIAPI
+GetPciRom (
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage,
+ OUT UINTN *RomSize
+ )
+{
+ return EFI_NOT_FOUND;
+}
+
+//
+// Interface defintion of PCI Platform protocol.
+//
+EFI_PCI_PLATFORM_PROTOCOL mPciPlatformProtocol = {
+ .PlatformNotify = PhaseNotify,
+ .PlatformPrepController = PlatformPrepController,
+ .GetPlatformPolicy = GetPlatformPolicy,
+ .GetPciRom = GetPciRom
+};
+
+/**
+
+ The Entry point of the Pci Platform Driver.
+
+ @param ImageHandle Handle to the image.
+ @param SystemTable Handle to System Table.
+
+ @retval EFI_STATUS Status of the function calling.
+
+**/
+EFI_STATUS
+PciPlatformDriverEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE PciPlatformHandle;
+
+ //
+ // Install on a new handle
+ //
+ PciPlatformHandle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &PciPlatformHandle,
+ &gEfiPciPlatformProtocolGuid,
+ &mPciPlatformProtocol,
+ NULL
+ );
+
+ return Status;
+}
--
2.17.1


Leif Lindholm
 

On Wed, Sep 15, 2021 at 22:55:17 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Registers the Platform NotifyPhase() to prevent unexpected issues
caused by the enabled PCIe controllers which have unstable link.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>

---
Platform/Ampere/JadePkg/Jade.dsc | 5 +
Platform/Ampere/JadePkg/Jade.fdf | 1 +
Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf | 37 ++++
Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c | 212 ++++++++++++++++++++
4 files changed, 255 insertions(+)

diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index b733f8430806..ce5f2c0dc4e1 100644
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -148,6 +148,11 @@ [Components.common]
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf

+ #
+ # PCIe
+ #
+ Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
+
#
# VGA Aspeed
#
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 195da2d63a7a..8ddfabcdd9a8 100644
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -298,6 +298,7 @@ [FV.FvMain]
#
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf

#
# VGA Aspeed
diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
new file mode 100644
index 000000000000..5f5316055217
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf
@@ -0,0 +1,37 @@
+## @file
+#
+# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = PciPlatformDxe
+ FILE_GUID = 73276F3D-DCBC-49B2-9890-7564F917501D
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = PciPlatformDriverEntry
+
+[Sources]
+ PciPlatformDxe.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+
+[LibraryClasses]
+ Ac01PcieLib
+ DebugLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiDevicePathProtocolGuid
+ gEfiPciHostBridgeResourceAllocationProtocolGuid
+ gEfiPciPlatformProtocolGuid
+
+[Depex]
+ TRUE
diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c
new file mode 100644
index 000000000000..196f857175e9
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c
@@ -0,0 +1,212 @@
+/** @file
+
+ Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Library/Ac01PcieLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+#include <Protocol/PciPlatform.h>
+
+#pragma pack(1)
+typedef struct {
+ ACPI_HID_DEVICE_PATH AcpiDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+/**
+
+ Perform initialization by the phase indicated.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS Must return with success.
+
+**/
+EFI_STATUS
+EFIAPI
+PhaseNotify (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+{
+ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH *RootBridgeDevPath;
+ EFI_HANDLE RootBridgeHandle = NULL;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *ResAlloc = NULL;
+ EFI_STATUS Status;
+
+ if (ChipsetPhase != ChipsetExit) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Get HostBridgeInstance from HostBridge handle.
+ //
+ Status = gBS->HandleProtocol (
+ HostBridge,
+ &gEfiPciHostBridgeResourceAllocationProtocolGuid,
+ (VOID **)&ResAlloc
+ );
+
+ while (TRUE) {
+ Status = ResAlloc->GetNextRootBridge (ResAlloc, &RootBridgeHandle);
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ Status = gBS->HandleProtocol (
+ RootBridgeHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&RootBridgeDevPath
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a %d: Failed to locate RootBridge DevicePath\n", __FUNCTION__, __LINE__));
+ break;
+ }
+
+ Ac01PcieHostBridgeNotifyPhase (RootBridgeDevPath->AcpiDevicePath.UID, 0, Phase);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ The PlatformPrepController() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Several notification points are defined at this time. More synchronization points may be
+ added as required in the future. The PCI bus driver calls the platform driver twice for
+ every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
+ is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has
+ been notified.
+ This member function may not perform any error checking on the input parameters. It also
+ does not return any error codes. If this member function detects any error condition, it
+ needs to handle those errors on its own because there is no way to surface any errors to
+ the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param RootBridge The associated PCI root bridge handle.
+ @param PciAddress The address of the PCI device on the PCI bus.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED Not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformPrepController (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_HANDLE RootBridge,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Set the PciPolicy as EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS.
+
+ @param This The pointer to the Protocol itself.
+ @param PciPolicy The returned Policy.
+
+ @retval EFI_UNSUPPORTED Function not supported.
+ @retval EFI_INVALID_PARAMETER Invalid PciPolicy value.
+
+**/
+EFI_STATUS
+EFIAPI
+GetPlatformPolicy (
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+
+ Return a PCI ROM image for the onboard device represented by PciHandle.
+
+ @param This Protocol instance pointer.
+ @param PciHandle PCI device to return the ROM image for.
+ @param RomImage PCI Rom Image for onboard device.
+ @param RomSize Size of RomImage in bytes.
+
+ @retval EFI_SUCCESS RomImage is valid.
+ @retval EFI_NOT_FOUND No RomImage.
+
+**/
+EFI_STATUS
+EFIAPI
+GetPciRom (
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage,
+ OUT UINTN *RomSize
+ )
+{
+ return EFI_NOT_FOUND;
+}
+
+//
+// Interface defintion of PCI Platform protocol.
+//
+EFI_PCI_PLATFORM_PROTOCOL mPciPlatformProtocol = {
+ .PlatformNotify = PhaseNotify,
+ .PlatformPrepController = PlatformPrepController,
+ .GetPlatformPolicy = GetPlatformPolicy,
+ .GetPciRom = GetPciRom
+};
+
+/**
+
+ The Entry point of the Pci Platform Driver.
+
+ @param ImageHandle Handle to the image.
+ @param SystemTable Handle to System Table.
+
+ @retval EFI_STATUS Status of the function calling.
+
+**/
+EFI_STATUS
+PciPlatformDriverEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE PciPlatformHandle;
+
+ //
+ // Install on a new handle
+ //
+ PciPlatformHandle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &PciPlatformHandle,
+ &gEfiPciPlatformProtocolGuid,
+ &mPciPlatformProtocol,
+ NULL
+ );
+
+ return Status;
+}
--
2.17.1