[PATCH v3 09/22] MdePkg/BaseRngLib: Rename ArmReadIdIsar0() to ArmGetFeatRng()


PierreGondois
 

From: Pierre Gondois <pierre.gondois@...>

The MdePkg must be self contained and not have external dependencies.
ArmReadIdIsar0() is defined in MdePkg/Library/BaseRngLib and is
limited to the scope of this library.

The same function will be required to check the FEAT_AES and FEAT_RNG
extensions in other libraries. As this function is Arm specific, it
cannot be added to a library interface in MdePkg. It should be part of
ArmPkg/ArmLib.

To avoid having mutiple definitions/prototypes of ArmReadIdIsar0(),
and as BaseRngLib only requires to check the RNG capability bits,
rename the MdePkg/Library/BaseRngLib implementation to ArmGetFeatRng().

Signed-off-by: Pierre Gondois <Pierre.Gondois@...>
---
.../AArch64/{ArmReadIdIsar0.S =3D> ArmGetFeatRng.S} | 8 ++++----
.../AArch64/{ArmReadIdIsar0.asm =3D> ArmGetFeatRng.asm} | 8 ++++----
MdePkg/Library/BaseRngLib/AArch64/ArmRng.h | 2 +-
MdePkg/Library/BaseRngLib/AArch64/Rndr.c | 2 +-
MdePkg/Library/BaseRngLib/BaseRngLib.inf | 4 ++--
5 files changed, 12 insertions(+), 12 deletions(-)
rename MdePkg/Library/BaseRngLib/AArch64/{ArmReadIdIsar0.S =3D> ArmGetFe=
atRng.S} (78%)
rename MdePkg/Library/BaseRngLib/AArch64/{ArmReadIdIsar0.asm =3D> ArmGet=
FeatRng.asm} (81%)

diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S b/MdePkg/=
Library/BaseRngLib/AArch64/ArmGetFeatRng.S
similarity index 78%
rename from MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S
rename to MdePkg/Library/BaseRngLib/AArch64/ArmGetFeatRng.S
index 82a00d362212..c42d60513077 100644
--- a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S
+++ b/MdePkg/Library/BaseRngLib/AArch64/ArmGetFeatRng.S
@@ -1,6 +1,6 @@
#-----------------------------------------------------------------------=
-------
#
-# ArmReadIdIsar0() for AArch64
+# ArmGetFeatRng() for AArch64
#
# Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
#
@@ -10,7 +10,7 @@
=20
.text
.p2align 2
-GCC_ASM_EXPORT(ArmReadIdIsar0)
+GCC_ASM_EXPORT(ArmGetFeatRng)
=20
#/**
# Reads the ID_AA64ISAR0 Register.
@@ -20,11 +20,11 @@ GCC_ASM_EXPORT(ArmReadIdIsar0)
#**/
#UINT64
#EFIAPI
-#ArmReadIdIsar0 (
+#ArmGetFeatRng (
# VOID
# );
#
-ASM_PFX(ArmReadIdIsar0):
+ASM_PFX(ArmGetFeatRng):
mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register
ret
=20
diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm b/MdePk=
g/Library/BaseRngLib/AArch64/ArmGetFeatRng.asm
similarity index 81%
rename from MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm
rename to MdePkg/Library/BaseRngLib/AArch64/ArmGetFeatRng.asm
index 1d9f9a808c0c..947adfcd2749 100644
--- a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm
+++ b/MdePkg/Library/BaseRngLib/AArch64/ArmGetFeatRng.asm
@@ -1,6 +1,6 @@
;-----------------------------------------------------------------------=
-------
;
-; ArmReadIdIsar0() for AArch64
+; ArmGetFeatRng() for AArch64
;
; Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
;
@@ -8,7 +8,7 @@
;
;-----------------------------------------------------------------------=
-------
=20
- EXPORT ArmReadIdIsar0
+ EXPORT ArmGetFeatRng
AREA BaseLib_LowLevel, CODE, READONLY
=20
;/**
@@ -19,11 +19,11 @@
;**/
;UINT64
;EFIAPI
-;ArmReadIdIsar0 (
+;ArmGetFeatRng (
; VOID
; );
;
-ArmReadIdIsar0
+ArmGetFeatRng
mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register
ret
=20
diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h b/MdePkg/Library/=
BaseRngLib/AArch64/ArmRng.h
index 2d6ef48ab941..b35cba3c063a 100644
--- a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h
+++ b/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h
@@ -35,7 +35,7 @@ ArmRndr (
**/
UINT64
EFIAPI
-ArmReadIdIsar0 (
+ArmGetFeatRng (
VOID
);
=20
diff --git a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c b/MdePkg/Library/Ba=
seRngLib/AArch64/Rndr.c
index 20811bf3ebf3..0cfdf4c37149 100644
--- a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
+++ b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
@@ -47,7 +47,7 @@ BaseRngLibConstructor (
// Determine RNDR support by examining bits 63:60 of the ISAR0 registe=
r returned by
// MSR. A non-zero value indicates that the processor supports the RND=
R instruction.
//
- Isar0 =3D ArmReadIdIsar0 ();
+ Isar0 =3D ArmGetFeatRng ();
ASSERT ((Isar0 & RNDR_MASK) !=3D 0);
=20
mRndrSupported =3D ((Isar0 & RNDR_MASK) !=3D 0);
diff --git a/MdePkg/Library/BaseRngLib/BaseRngLib.inf b/MdePkg/Library/Ba=
seRngLib/BaseRngLib.inf
index 1fcceb941495..d6eccb07d469 100644
--- a/MdePkg/Library/BaseRngLib/BaseRngLib.inf
+++ b/MdePkg/Library/BaseRngLib/BaseRngLib.inf
@@ -37,10 +37,10 @@ [Sources.AARCH64]
AArch64/Rndr.c
AArch64/ArmRng.h
=20
- AArch64/ArmReadIdIsar0.S | GCC
+ AArch64/ArmGetFeatRng.S | GCC
AArch64/ArmRng.S | GCC
=20
- AArch64/ArmReadIdIsar0.asm | MSFT
+ AArch64/ArmGetFeatRng.asm | MSFT
AArch64/ArmRng.asm | MSFT
=20
[Packages]
--=20
2.25.1