[PATCH V2 2/4] Silicon/NXP: Add support of SVR handling for LS1046A SoC


Vikas Singh
 

This patch adds a generic method to get Silicon Version Register (SVR)
on LS1046A SoC. This method will be generic for all platfroms based
on LS1046A SoC, like - LS1046AFRWY, LS1046ARDB.

Signed-off-by: Vikas Singh <vikas.singh@puresoftware.com>
---
Silicon/NXP/LS1046A/Library/SocLib/SocLib.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c b/Silicon/NXP/LS10=
46A/Library/SocLib/SocLib.c
index 8fa6a7dd00..003f5bd82f 100644
--- a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
+++ b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
@@ -2,6 +2,7 @@
SoC specific Library containg functions to initialize various SoC compon=
ents=0D
=0D
Copyright 2017-2020 NXP=0D
+ Copyright 2021 Puresoftware Ltd=0D
=0D
SPDX-License-Identifier: BSD-2-Clause-Patent=0D
=0D
@@ -64,6 +65,21 @@ SocGetClock (
return ReturnValue;=0D
}=0D
=0D
+/**=0D
+ Function to get SoC's System Version Register(SVR)=0D
+ **/=0D
+UINT32=0D
+SocGetSvr (=0D
+ VOID=0D
+ )=0D
+{=0D
+ LS1046A_DEVICE_CONFIG *Dcfg;=0D
+=0D
+ Dcfg =3D (LS1046A_DEVICE_CONFIG *)LS1046A_DCFG_ADDRESS;=0D
+=0D
+ return DcfgRead32 ((UINTN)&Dcfg->Svr);=0D
+}=0D
+=0D
/**=0D
Function to select pins depending upon pcd using supplemental=0D
configuration unit(SCFG) extended RCW controlled pinmux control=0D
--=20
2.25.1


Sunny Wang
 

Looks good.
Just have some comments mentioned Patch 0/4 about moving/renaming file/folder for synchronizing with NXP LSDK opensource https://source.codeaurora.org/external/qoriq/qoriq-components/edk2-platforms.

Best Regards,
Sunny Wang

-----Original Message-----
From: Vikas Singh <vikas.singh@puresoftware.com>
Sent: Friday, June 18, 2021 11:28 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <Sami.Mujawar@arm.com>; leif@nuviainc.com; Meenakshi Aggarwal (meenakshi.aggarwal@nxp.com) <meenakshi.aggarwal@nxp.com>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; V Sethi (v.sethi@nxp.com) <v.sethi@nxp.com>; arokia.samy <arokia.samy@puresoftware.com>; kuldip.dwivedi@puresoftware.com; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; vikas.singh@nxp.com; Sunny Wang <Sunny.Wang@arm.com>
Subject: [PATCH V2 2/4] Silicon/NXP: Add support of SVR handling for LS1046A SoC

This patch adds a generic method to get Silicon Version Register (SVR)
on LS1046A SoC. This method will be generic for all platfroms based
on LS1046A SoC, like - LS1046AFRWY, LS1046ARDB.

Signed-off-by: Vikas Singh <vikas.singh@puresoftware.com>
---
Silicon/NXP/LS1046A/Library/SocLib/SocLib.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
index 8fa6a7dd00..003f5bd82f 100644
--- a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
+++ b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
@@ -2,6 +2,7 @@
SoC specific Library containg functions to initialize various SoC components



Copyright 2017-2020 NXP

+ Copyright 2021 Puresoftware Ltd



SPDX-License-Identifier: BSD-2-Clause-Patent



@@ -64,6 +65,21 @@ SocGetClock (
return ReturnValue;

}



+/**

+ Function to get SoC's System Version Register(SVR)

+ **/

+UINT32

+SocGetSvr (

+ VOID

+ )

+{

+ LS1046A_DEVICE_CONFIG *Dcfg;

+

+ Dcfg = (LS1046A_DEVICE_CONFIG *)LS1046A_DCFG_ADDRESS;

+

+ return DcfgRead32 ((UINTN)&Dcfg->Svr);

+}

+

/**

Function to select pins depending upon pcd using supplemental

configuration unit(SCFG) extended RCW controlled pinmux control

--
2.25.1

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