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[PATCH v1 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.


Jason Lou
 

This library uses a platform agnostic algorithm to get CPU cache
information. It provides user with an API(GetCpuCacheInfo) to get
detailed CPU cache information by each package, each core type
included in this package, and each cache level & type.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 602 +++++++=
+++++++++++++
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c | 131 +++++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c | 130 +++++
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 68 +++
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni | 15 +
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 64 +++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
10 files changed, 1103 insertions(+)

diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c b/UefiCpu=
Pkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
new file mode 100644
index 000000000000..e0cc6bbf7fa2
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
@@ -0,0 +1,602 @@
+/** @file=0D
+ Provides cache info for each package, core type, cache level and cache t=
ype.=0D
+=0D
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#include <Library/BaseLib.h>=0D
+#include <Library/DebugLib.h>=0D
+#include <Library/BaseMemoryLib.h>=0D
+#include <Library/MemoryAllocationLib.h>=0D
+#include <Library/CpuCacheInfoLib.h>=0D
+#include <Register/Cpuid.h>=0D
+#include <InternalCpuCacheInfoLib.h>=0D
+=0D
+/*=0D
+ Defines the maximum count of Deterministic Cache Parameters Leaf of all =
APs=0D
+ and BSP.=0D
+ To save boot time, skip starting up all APs to calculate each AP's count=
of=0D
+ Deterministic Cache Parameters Leaf, so use a definition instead.=0D
+ Anyway, definition value will be checked in CollectCoreAndCacheData func=
tion.=0D
+*/=0D
+#define MAX_NUM_OF_CACHE_PARAMS_LEAF 5=0D
+=0D
+/*=0D
+ Defines the maximum count of Core Type of all BSP and APs in one package=
.=0D
+ Core Type value comes from CPUID(1Ah).Eax[31:24].Coretype=0D
+*/=0D
+#define MAX_NUM_OF_CORE_TYPE 256=0D
+=0D
+/*=0D
+ Defines the maximum count of packages.=0D
+*/=0D
+#define MAX_NUM_OF_PACKAGE 100=0D
+=0D
+/**=0D
+ Get EFI_MP_SERVICES_PROTOCOL pointer.=0D
+=0D
+ @retval Return MP_SERVICES structure.=0D
+**/=0D
+MP_SERVICES=0D
+GetMpServices (=0D
+ VOID=0D
+ );=0D
+=0D
+/**=0D
+ Collect core and cache information of all APs and BSP via CPUID instruct=
ions.=0D
+=0D
+ @param[in] Context The pointer to COLLECT_CPUID_CACHE_DATA_=
CONTEXT structure.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheDataForAll (=0D
+ IN COLLECT_CPUID_CACHE_DATA_CONTEXT *Context=0D
+ );=0D
+=0D
+/**=0D
+ Get detailed information of the requested logical processor.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+ @param[in] ProcessorNum The requested logical processor number.=
=0D
+=0D
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical=
processors.=0D
+**/=0D
+EFI_PROCESSOR_INFORMATION=0D
+GetCurrentProcessorInfo (=0D
+ IN MP_SERVICES MpServices,=0D
+ IN UINTN ProcessorNum=0D
+ );=0D
+=0D
+/**=0D
+ Get the logical processor number.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the logical processor number.=0D
+**/=0D
+UINT32=0D
+GetCurrentProcessorNum (=0D
+ IN MP_SERVICES MpServices=0D
+ );=0D
+=0D
+/**=0D
+ Get the total number of logical processors in the platform.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the total number of logical processors.=0D
+**/=0D
+UINT32=0D
+GetNumberOfProcessor (=0D
+ IN MP_SERVICES MpServices=0D
+ );=0D
+=0D
+/**=0D
+ Print CpuidCacheData array.=0D
+=0D
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.=0D
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.=0D
+=0D
+**/=0D
+VOID=0D
+PrintCpuidCacheDataTable (=0D
+ IN CPUID_CACHE_DATA *CpuidCacheData,=0D
+ IN UINTN CpuidCacheDataCount=0D
+ )=0D
+{=0D
+ UINTN Index;=0D
+=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
------------------------------+\n"));=0D
+ DEBUG((DEBUG_ERROR, "| Index | ApicId (Pkg / Core / Thread) CoreType L=
evel Type ShareBits SizeinKB |\n"));=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
------------------------------+\n"));=0D
+=0D
+ for (Index =3D 0; Index < CpuidCacheDataCount; Index++) {=0D
+ if (Index % MAX_NUM_OF_CACHE_PARAMS_LEAF =3D=3D 0) {=0D
+ DEBUG((DEBUG_ERROR, "|*"));=0D
+ } else {=0D
+ DEBUG((DEBUG_ERROR, "| "));=0D
+ }=0D
+=0D
+ DEBUG((DEBUG_ERROR, "%4x | %4x %4x /%4x / %4x %2x %2x =
%2x %4x %8x |\n", Index, \=0D
+ CpuidCacheData[Index].ApicId, CpuidCacheData[Index].Location.Packa=
ge, CpuidCacheData[Index].Location.Core, \=0D
+ CpuidCacheData[Index].Location.Thread, CpuidCacheData[Index].CoreT=
ype, CpuidCacheData[Index].CacheLevel, \=0D
+ CpuidCacheData[Index].CacheType, CpuidCacheData[Index].CacheShareB=
its, CpuidCacheData[Index].CacheSizeinKB));=0D
+ }=0D
+=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
------------------------------+\n"));=0D
+}=0D
+=0D
+/**=0D
+ Print CpuCacheInfo array.=0D
+=0D
+ @param[in] CpuCacheInfo Pointer to the CpuCacheInfo array.=0D
+ @param[in] CpuCacheInfoCount The length of CpuCacheInfo array.=0D
+=0D
+**/=0D
+VOID=0D
+PrintCpuCacheInfoTable (=0D
+ IN CPU_CACHE_INFO *CpuCacheInfo,=0D
+ IN UINTN CpuCacheInfoCount=0D
+ )=0D
+{=0D
+ UINTN Index;=0D
+=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
--------------------------+\n"));=0D
+ DEBUG((DEBUG_ERROR, "| Index | Packge CoreType CacheLevel CacheType =
CacheSizeinKB CacheCount |\n"));=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
--------------------------+\n"));=0D
+=0D
+ for (Index =3D 0; Index < CpuCacheInfoCount; Index++) {=0D
+ DEBUG((DEBUG_ERROR, "| %4x | %4x %2x %2x %2x =
%8x %4x |\n", Index, \=0D
+ CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, CpuCach=
eInfo[Index].CacheLevel, \=0D
+ CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheSizeinKB, =
CpuCacheInfo[Index].CacheCount));=0D
+ }=0D
+=0D
+ DEBUG((DEBUG_ERROR, "+-------+------------------------------------------=
--------------------------+\n"));=0D
+}=0D
+=0D
+/**=0D
+ Get the total number of package in the platform.=0D
+=0D
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.=0D
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.=0D
+=0D
+ @retval Return the total number of package in the platform.=0D
+**/=0D
+UINT32=0D
+GetNumberOfPackage (=0D
+ IN CPUID_CACHE_DATA *CpuidCacheData,=0D
+ IN UINTN CpuidCacheDataCount=0D
+ )=0D
+{=0D
+ UINTN ProcessorNum;=0D
+ UINTN PackageIndex;=0D
+ UINT32 Package[MAX_NUM_OF_PACKAGE];=0D
+ BOOLEAN Package0Existed;=0D
+ UINTN Count;=0D
+ CPUID_CACHE_DATA *CurrentCpuidCacheData;=0D
+=0D
+ //=0D
+ // Package array is empty.=0D
+ //=0D
+ Count =3D 0;=0D
+ Package0Existed =3D FALSE;=0D
+ ZeroMem(Package, sizeof(Package));=0D
+=0D
+ for (ProcessorNum =3D 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < C=
puidCacheDataCount; ProcessorNum++) {=0D
+ CurrentCpuidCacheData =3D &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CA=
CHE_PARAMS_LEAF];=0D
+=0D
+ //=0D
+ // If package value is the same as default value of Package array.=0D
+ // We can not consider this value has already existed in the Package a=
rray.=0D
+ //=0D
+ if (CurrentCpuidCacheData->Location.Package =3D=3D 0) {=0D
+ if (!Package0Existed) {=0D
+ Package0Existed =3D TRUE;=0D
+ Count++;=0D
+ ASSERT(Count <=3D MAX_NUM_OF_PACKAGE);=0D
+ }=0D
+ continue;=0D
+ }=0D
+=0D
+ //=0D
+ // For the Package has already existed in Package array, break out the=
loop.=0D
+ //=0D
+ for (PackageIndex =3D 0; PackageIndex < MAX_NUM_OF_PACKAGE; PackageInd=
ex++) {=0D
+ if (CurrentCpuidCacheData->Location.Package =3D=3D Package[PackageIn=
dex]) {=0D
+ break;=0D
+ }=0D
+ }=0D
+=0D
+ //=0D
+ // For the new type, save it in CoreType array.=0D
+ //=0D
+ if (PackageIndex =3D=3D MAX_NUM_OF_PACKAGE) {=0D
+ Package[Count++] =3D CurrentCpuidCacheData->Location.Package;=0D
+ ASSERT(Count <=3D MAX_NUM_OF_PACKAGE);=0D
+ }=0D
+ }=0D
+=0D
+ return (UINT32)Count;=0D
+}=0D
+=0D
+/**=0D
+ Get the number of CoreType of requested package.=0D
+=0D
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.=0D
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.=0D
+ @param[in] Package The requested package number.=0D
+=0D
+ @retval Return the number of CoreType of requested package.=0D
+**/=0D
+UINT8=0D
+GetNumberOfCoreTypePerPackage (=0D
+ IN CPUID_CACHE_DATA *CpuidCacheData,=0D
+ IN UINTN CpuidCacheDataCount,=0D
+ IN UINTN Package=0D
+ )=0D
+{=0D
+ UINTN ProcessorNum;=0D
+ UINTN CoreTypeIndex;=0D
+ UINT8 CoreType[MAX_NUM_OF_CORE_TYPE];=0D
+ BOOLEAN CoreType0Existed;=0D
+ UINTN Count;=0D
+ CPUID_CACHE_DATA *CurrentCpuidCacheData;=0D
+=0D
+ //=0D
+ // CoreType array is empty.=0D
+ //=0D
+ Count =3D 0;=0D
+ CoreType0Existed =3D FALSE;=0D
+ ZeroMem(CoreType, sizeof(CoreType));=0D
+=0D
+ for (ProcessorNum =3D 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < C=
puidCacheDataCount; ProcessorNum++) {=0D
+ CurrentCpuidCacheData =3D &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CA=
CHE_PARAMS_LEAF];=0D
+=0D
+ if (CurrentCpuidCacheData->Location.Package !=3D Package) {=0D
+ continue;=0D
+=0D
+ //=0D
+ // If the type value is the same as default value of CoreType array.=0D
+ // We can not consider this value has already existed in the CoreType =
array.=0D
+ //=0D
+ } else if (CurrentCpuidCacheData->CoreType =3D=3D 0) {=0D
+ if (!CoreType0Existed) {=0D
+ CoreType0Existed =3D TRUE;=0D
+ Count++;=0D
+ ASSERT(Count <=3D MAX_NUM_OF_CORE_TYPE);=0D
+ }=0D
+ continue;=0D
+ }=0D
+=0D
+ //=0D
+ // For the type has already existed in CoreType array, break out the l=
oop.=0D
+ //=0D
+ for (CoreTypeIndex =3D 0; CoreTypeIndex < MAX_NUM_OF_CORE_TYPE; CoreTy=
peIndex++) {=0D
+ if (CurrentCpuidCacheData->CoreType =3D=3D CoreType[CoreTypeIndex]) =
{=0D
+ break;=0D
+ }=0D
+ }=0D
+=0D
+ //=0D
+ // For the new type, save it in CoreType array.=0D
+ //=0D
+ if (CoreTypeIndex =3D=3D MAX_NUM_OF_CORE_TYPE) {=0D
+ CoreType[Count++] =3D CurrentCpuidCacheData->CoreType;=0D
+ ASSERT(Count <=3D MAX_NUM_OF_CORE_TYPE);=0D
+ }=0D
+ }=0D
+=0D
+ return (UINT8)Count;=0D
+}=0D
+=0D
+/**=0D
+ Collect core and cache information of calling processor via CPUID instru=
ctions.=0D
+=0D
+ @param[in] Buffer The pointer to private data buffer.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheData (=0D
+ IN OUT VOID *Buffer=0D
+ )=0D
+{=0D
+ UINTN ProcessorNum;=0D
+ UINT32 CpuidMaxInput;=0D
+ UINT8 CoreType;=0D
+ UINT8 CacheParamLeafNum;=0D
+ CPUID_CACHE_PARAMS_EAX CacheParamEax;=0D
+ CPUID_CACHE_PARAMS_EBX CacheParamEbx;=0D
+ UINT32 CacheParamEcx;=0D
+ CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX NativeModelIdAndCoreTypeEax;=0D
+ COLLECT_CPUID_CACHE_DATA_CONTEXT *Context;=0D
+ CPUID_CACHE_DATA *CpuidCacheData;=0D
+=0D
+ Context =3D (COLLECT_CPUID_CACHE_DATA_CONTEXT *)Buffer;=0D
+=0D
+ ProcessorNum =3D GetCurrentProcessorNum (Context->MpServices);=0D
+=0D
+ CpuidCacheData =3D &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LEAF=
* ProcessorNum];=0D
+=0D
+ AsmCpuid (CPUID_SIGNATURE, &CpuidMaxInput, NULL, NULL, NULL);=0D
+=0D
+ //=0D
+ // get CoreType if CPUID_HYBRID_INFORMATION leaf is supported.=0D
+ //=0D
+ CoreType =3D 0;=0D
+ if (CpuidMaxInput >=3D CPUID_HYBRID_INFORMATION) {=0D
+ AsmCpuidEx(CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_SUB_LEAF=
, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);=0D
+ CoreType =3D (UINT8)NativeModelIdAndCoreTypeEax.Bits.CoreType;=0D
+ }=0D
+=0D
+ //=0D
+ // cache hierarchy starts with an index value of 0.=0D
+ //=0D
+ CacheParamLeafNum =3D 0;=0D
+=0D
+ while (CacheParamLeafNum !=3D MAX_NUM_OF_CACHE_PARAMS_LEAF) {=0D
+ AsmCpuidEx(CPUID_CACHE_PARAMS, CacheParamLeafNum, &CacheParamEax.Uint3=
2, &CacheParamEbx.Uint32, &CacheParamEcx, NULL);=0D
+=0D
+ if (CacheParamEax.Bits.CacheType =3D=3D 0) {=0D
+ break;=0D
+ }=0D
+=0D
+ CpuidCacheData[CacheParamLeafNum].CoreType =3D CoreType;=0D
+ CpuidCacheData[CacheParamLeafNum].CacheLevel =3D (UINT8)CacheParamEax.=
Bits.CacheLevel;=0D
+ CpuidCacheData[CacheParamLeafNum].CacheType =3D (UINT8)CacheParamEax.B=
its.CacheType;=0D
+ CpuidCacheData[CacheParamLeafNum].CacheShareBits =3D (UINT16)CachePara=
mEax.Bits.MaximumAddressableIdsForLogicalProcessors;=0D
+ CpuidCacheData[CacheParamLeafNum].CacheSizeinKB =3D ((CacheParamEbx.Bi=
ts.Ways + 1) * \=0D
+ (CacheParamEbx.Bits.LinePartitions+1) * (CacheParamEbx.Bits.LineSi=
ze+1) * (CacheParamEcx+1)) / 1024;=0D
+=0D
+ ASSERT(CacheParamLeafNum !=3D MAX_NUM_OF_CACHE_PARAMS_LEAF);=0D
+ CacheParamLeafNum++;=0D
+ }=0D
+}=0D
+=0D
+/**=0D
+ Collect processor location information of all logical processors via MpS=
ervices.=0D
+=0D
+ @param[in] Context The pointer to COLLECT_CPUID_CACHE_DATA_=
CONTEXT structure.=0D
+ @param[in] NumberOfProcessor The total number of logical processors i=
n the platform.=0D
+=0D
+**/=0D
+VOID=0D
+CollectProcessorLocationData(=0D
+ IN COLLECT_CPUID_CACHE_DATA_CONTEXT *Context,=0D
+ IN UINTN NumberOfProcessor=0D
+ )=0D
+{=0D
+ UINTN ProcessorNum;=0D
+ UINTN CacheParamLeafNum;=0D
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;=0D
+ IN CPUID_CACHE_DATA *CpuidCacheData;=0D
+=0D
+ for (ProcessorNum =3D 0; ProcessorNum < NumberOfProcessor; ProcessorNum+=
+) {=0D
+ CpuidCacheData =3D &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LE=
AF * ProcessorNum];=0D
+ ProcessorInfo =3D GetCurrentProcessorInfo(Context->MpServices, Process=
orNum);=0D
+=0D
+ for (CacheParamLeafNum =3D 0; CacheParamLeafNum < MAX_NUM_OF_CACHE_PAR=
AMS_LEAF; CacheParamLeafNum++) {=0D
+ CpuidCacheData[CacheParamLeafNum].Location.Package =3D ProcessorInfo=
.Location.Package;=0D
+ CpuidCacheData[CacheParamLeafNum].Location.Core =3D ProcessorInfo.Lo=
cation.Core;=0D
+ CpuidCacheData[CacheParamLeafNum].Location.Thread =3D ProcessorInfo.=
Location.Thread;=0D
+ CpuidCacheData[CacheParamLeafNum].ApicId =3D (UINT32)ProcessorInfo.P=
rocessorId;=0D
+ }=0D
+ }=0D
+}=0D
+=0D
+/**=0D
+ Collect CpuCacheInfo data from the CpuidCacheData.=0D
+=0D
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.=
=0D
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.=
=0D
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.=0D
+ @param[in, out] CpuCacheInfoCount As input, point to the length of res=
ponse CpuCacheInfo array.=0D
+ As output, point to the actual lengt=
h of response CpuCacheInfo array.=0D
+=0D
+ @retval EFI_SUCCESS Function completed successfully.=
=0D
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be =
allocated.=0D
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small t=
o hold the response CpuCacheInfo=0D
+ array. CpuCacheInfoCount has bee=
n updated with the length needed=0D
+ to complete the request.=0D
+**/=0D
+EFI_STATUS=0D
+CollectCpuCacheInfoData (=0D
+ IN CPUID_CACHE_DATA *CpuidCacheData,=0D
+ IN UINTN CpuidCacheDataCount,=0D
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,=0D
+ IN OUT UINTN *CpuCacheInfoCount=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINT32 NumberOfPackage;=0D
+ UINT8 NumberOfCoreType;=0D
+ UINTN TotalNumberOfCoreType;=0D
+ CPU_CACHE_INFO *TempCpuCacheInfo;=0D
+ UINTN TempCacheInfoIndex;=0D
+ UINTN TempCpuCacheInfoCount;=0D
+ UINTN PackageNum;=0D
+ UINTN CurrentCacheDataIndex;=0D
+ UINTN NextCacheDataIndex;=0D
+ UINTN CacheInfoIndex;=0D
+ UINTN Count;=0D
+=0D
+ //=0D
+ // Get number of Packages.=0D
+ //=0D
+ NumberOfPackage =3D GetNumberOfPackage (CpuidCacheData, CpuidCacheDataCo=
unt);=0D
+ DEBUG((DEBUG_ERROR, "[CacheInfoLib] NumberOfPackage =3D %d\n", NumberOfP=
ackage));=0D
+=0D
+ //=0D
+ // Get number of core types for each package and count the total number.=
=0D
+ // E.g. If Packege1 and Package2 both have 2 core types, the total numbe=
r is 4.=0D
+ //=0D
+ TotalNumberOfCoreType =3D 0;=0D
+=0D
+ for (PackageNum =3D 0; PackageNum < NumberOfPackage; PackageNum++) {=0D
+ NumberOfCoreType =3D GetNumberOfCoreTypePerPackage(CpuidCacheData, Cpu=
idCacheDataCount, PackageNum);=0D
+ DEBUG((DEBUG_ERROR, "[CacheInfoLib] Package%d: NumberOfCoreType =3D %d=
\n", PackageNum, NumberOfCoreType));=0D
+=0D
+ TotalNumberOfCoreType +=3D NumberOfCoreType;=0D
+ }=0D
+ DEBUG((DEBUG_ERROR, "[CacheInfoLib] TotalNumberOfCoreType =3D %d\n", Tot=
alNumberOfCoreType));=0D
+=0D
+ TempCpuCacheInfoCount =3D TotalNumberOfCoreType * MAX_NUM_OF_CACHE_PARAM=
S_LEAF;=0D
+ TempCpuCacheInfo =3D AllocatePages (EFI_SIZE_TO_PAGES(TempCpuCacheInfoCo=
unt * sizeof(*TempCpuCacheInfo)));=0D
+ ASSERT(TempCpuCacheInfo !=3D NULL);=0D
+ if (TempCpuCacheInfo =3D=3D NULL) {=0D
+ return EFI_OUT_OF_RESOURCES;=0D
+ }=0D
+=0D
+ ZeroMem(TempCpuCacheInfo, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(TempCpuCac=
heInfoCount * sizeof(*TempCpuCacheInfo))));=0D
+=0D
+ //=0D
+ // TempCpuCacheInfo is empty.=0D
+ //=0D
+ Count =3D 0;=0D
+=0D
+ for (CurrentCacheDataIndex =3D 0; CurrentCacheDataIndex < CpuidCacheData=
Count; CurrentCacheDataIndex++) {=0D
+ if (CpuidCacheData[CurrentCacheDataIndex].CacheSizeinKB =3D=3D 0)=0D
+ continue;=0D
+=0D
+ //=0D
+ // For the sharing caches, clear their CacheSize.=0D
+ //=0D
+ for (NextCacheDataIndex =3D CurrentCacheDataIndex + 1; NextCacheDataIn=
dex < CpuidCacheDataCount; NextCacheDataIndex++) {=0D
+ if (CpuidCacheData[NextCacheDataIndex].CacheSizeinKB =3D=3D 0)=0D
+ continue;=0D
+=0D
+ if (CpuidCacheData[CurrentCacheDataIndex].Location.Package =3D=3D Cp=
uidCacheData[NextCacheDataIndex].Location.Package && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CoreType =3D=3D CpuidCache=
Data[NextCacheDataIndex].CoreType && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CacheLevel =3D=3D CpuidCac=
heData[NextCacheDataIndex].CacheLevel && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CacheType =3D=3D CpuidCach=
eData[NextCacheDataIndex].CacheType && \=0D
+ (CpuidCacheData[CurrentCacheDataIndex].ApicId & ~CpuidCacheData[=
CurrentCacheDataIndex].CacheShareBits) =3D=3D \=0D
+ (CpuidCacheData[NextCacheDataIndex].ApicId & ~CpuidCacheData[Nex=
tCacheDataIndex].CacheShareBits)) {=0D
+ CpuidCacheData[NextCacheDataIndex].CacheSizeinKB =3D 0; // uses th=
e sharing cache=0D
+ }=0D
+ }=0D
+=0D
+ //=0D
+ // For the cache has already existed in TempCpuCacheInfo buffer, incre=
ase its CacheCount.=0D
+ //=0D
+ for (TempCacheInfoIndex =3D 0; TempCacheInfoIndex < TempCpuCacheInfoCo=
unt; TempCacheInfoIndex++) {=0D
+ if (CpuidCacheData[CurrentCacheDataIndex].Location.Package =3D=3D Te=
mpCpuCacheInfo[TempCacheInfoIndex].Package && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CoreType =3D=3D TempCpuCac=
heInfo[TempCacheInfoIndex].CoreType && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CacheLevel =3D=3D TempCpuC=
acheInfo[TempCacheInfoIndex].CacheLevel && \=0D
+ CpuidCacheData[CurrentCacheDataIndex].CacheType =3D=3D TempCpuCa=
cheInfo[TempCacheInfoIndex].CacheType) {=0D
+ TempCpuCacheInfo[TempCacheInfoIndex].CacheCount++;=0D
+ break;=0D
+ }=0D
+ }=0D
+=0D
+ //=0D
+ // For the new cache with different Package, CoreType, CacheLevel or C=
acheType, copy its=0D
+ // data into TempCpuCacheInfo buffer.=0D
+ //=0D
+ if (TempCacheInfoIndex =3D=3D TempCpuCacheInfoCount) {=0D
+ TempCpuCacheInfo[Count].Package =3D CpuidCacheData[CurrentCacheDataI=
ndex].Location.Package;=0D
+ TempCpuCacheInfo[Count].CoreType =3D CpuidCacheData[CurrentCacheData=
Index].CoreType;=0D
+ TempCpuCacheInfo[Count].CacheLevel =3D CpuidCacheData[CurrentCacheDa=
taIndex].CacheLevel;=0D
+ TempCpuCacheInfo[Count].CacheType =3D CpuidCacheData[CurrentCacheDat=
aIndex].CacheType;=0D
+ TempCpuCacheInfo[Count].CacheSizeinKB =3D CpuidCacheData[CurrentCach=
eDataIndex].CacheSizeinKB;=0D
+ TempCpuCacheInfo[Count].CacheCount =3D 1;=0D
+=0D
+ Count++;=0D
+ ASSERT(Count <=3D TempCpuCacheInfoCount);=0D
+ }=0D
+ }=0D
+=0D
+ PrintCpuidCacheDataTable(CpuidCacheData, CpuidCacheDataCount);=0D
+=0D
+ if (*CpuCacheInfoCount < Count) {=0D
+ Status =3D EFI_BUFFER_TOO_SMALL;=0D
+ } else {=0D
+ Status =3D EFI_SUCCESS;=0D
+=0D
+ for (CacheInfoIndex =3D 0; CacheInfoIndex < Count; CacheInfoIndex++) {=
=0D
+ CopyMem(&CpuCacheInfo[CacheInfoIndex], &TempCpuCacheInfo[CacheInfoIn=
dex], sizeof(*CpuCacheInfo));=0D
+ }=0D
+=0D
+ PrintCpuCacheInfoTable(CpuCacheInfo, Count);=0D
+ }=0D
+=0D
+ *CpuCacheInfoCount =3D Count;=0D
+=0D
+ FreePages(TempCpuCacheInfo, EFI_SIZE_TO_PAGES(TempCpuCacheInfoCount * si=
zeof(*TempCpuCacheInfo)));=0D
+=0D
+ return Status;=0D
+}=0D
+=0D
+/**=0D
+ Get CpuCacheInfo data array.=0D
+=0D
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.=0D
+ @param[in, out] CpuCacheInfoCount As input, point to the length of res=
ponse CpuCacheInfo array.=0D
+ As output, point to the actual lengt=
h of response CpuCacheInfo array.=0D
+=0D
+ @retval EFI_SUCCESS Function completed successfully.=
=0D
+ @retval EFI_INVALID_PARAMETER CpuCacheInfoCount is NULL.=0D
+ @retval EFI_INVALID_PARAMETER CpuCacheInfo is NULL while CpuCa=
cheInfoCount contains the value=0D
+ greater than zero.=0D
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be =
allocated.=0D
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small t=
o hold the response CpuCacheInfo=0D
+ array. CpuCacheInfoCount has bee=
n updated with the length needed=0D
+ to complete the request.=0D
+**/=0D
+EFI_STATUS=0D
+EFIAPI=0D
+GetCpuCacheInfo (=0D
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,=0D
+ IN OUT UINTN *CpuCacheInfoCount=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINT32 NumberOfProcessor;=0D
+ UINTN CpuidCacheDataCount;=0D
+ COLLECT_CPUID_CACHE_DATA_CONTEXT Context;=0D
+=0D
+ if (CpuCacheInfoCount =3D=3D NULL) {=0D
+ return EFI_INVALID_PARAMETER;=0D
+=0D
+ } else if (*CpuCacheInfoCount !=3D 0 && CpuCacheInfo =3D=3D NULL) {=0D
+ return EFI_INVALID_PARAMETER;=0D
+ }=0D
+=0D
+ //=0D
+ // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.MpServices.=0D
+ //=0D
+ Context.MpServices =3D GetMpServices();=0D
+=0D
+ NumberOfProcessor =3D GetNumberOfProcessor (Context.MpServices);=0D
+ DEBUG((DEBUG_ERROR, "[CacheInfoLib] NumberOfProcessor =3D 0x%x\n", Numbe=
rOfProcessor));=0D
+=0D
+ //=0D
+ // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.CpuidCacheData.=0D
+ //=0D
+ CpuidCacheDataCount =3D NumberOfProcessor * MAX_NUM_OF_CACHE_PARAMS_LEAF=
;=0D
+ Context.CpuidCacheData =3D AllocatePages(EFI_SIZE_TO_PAGES(CpuidCacheDat=
aCount * sizeof(*Context.CpuidCacheData)));=0D
+ ASSERT(Context.CpuidCacheData !=3D NULL);=0D
+ if (Context.CpuidCacheData =3D=3D NULL) {=0D
+ return EFI_OUT_OF_RESOURCES;=0D
+ }=0D
+=0D
+ ZeroMem(Context.CpuidCacheData, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(Cpui=
dCacheDataCount * sizeof(*Context.CpuidCacheData))));=0D
+=0D
+ //=0D
+ // Wakeup all processors for CpuidCacheData(core and cache data) collect=
ion.=0D
+ //=0D
+ CollectCoreAndCacheDataForAll (&Context);=0D
+=0D
+ //=0D
+ // Collect CpuidCacheData(ProcessorLocation data) of all processors.=0D
+ //=0D
+ CollectProcessorLocationData (&Context, NumberOfProcessor);=0D
+=0D
+ //=0D
+ // Collect CpuCacheInfo data from CpuidCacheData.=0D
+ //=0D
+ Status =3D CollectCpuCacheInfoData (Context.CpuidCacheData, CpuidCacheDa=
taCount, CpuCacheInfo, CpuCacheInfoCount);=0D
+ DEBUG((DEBUG_ERROR, "[CacheInfoLib] CollectCpuCacheInfoData: %r (CacheIn=
foCount =3D %d)\n", Status, *CpuCacheInfoCount));=0D
+=0D
+ FreePages(Context.CpuidCacheData, EFI_SIZE_TO_PAGES(CpuidCacheDataCount =
* sizeof(*Context.CpuidCacheData)));=0D
+=0D
+ return Status;=0D
+}=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c b/Uefi=
CpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
new file mode 100644
index 000000000000..4c85150e7750
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
@@ -0,0 +1,131 @@
+/** @file=0D
+ Provides cache info for each package, core type, cache level and cache t=
ype.=0D
+=0D
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#include <PiDxe.h>=0D
+#include <Library/BaseLib.h>=0D
+#include <Library/DebugLib.h>=0D
+#include <Library/UefiBootServicesTableLib.h>=0D
+#include <Library/CpuCacheInfoLib.h>=0D
+#include <InternalCpuCacheInfoLib.h>=0D
+=0D
+/**=0D
+ Collect core and cache information of calling processor via CPUID instru=
ctions.=0D
+=0D
+ @param[in] Buffer The pointer to private data buffer.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheData (=0D
+ IN OUT VOID *Buffer=0D
+ );=0D
+=0D
+/**=0D
+ Get EFI_MP_SERVICES_PROTOCOL pointer.=0D
+=0D
+ @retval Return MP_SERVICES structure.=0D
+**/=0D
+MP_SERVICES=0D
+GetMpServices (=0D
+ VOID=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ MP_SERVICES MpServices;=0D
+=0D
+ Status =3D gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID =
**)&MpServices.Protocol);=0D
+ ASSERT_EFI_ERROR (Status);=0D
+=0D
+ return MpServices;=0D
+}=0D
+=0D
+/**=0D
+ Collect core and cache information of all APs and BSP via CPUID instruct=
ions.=0D
+=0D
+ @param[in] Context The pointer to COLLECT_CPUID_CACHE_DATA_=
CONTEXT structure.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheDataForAll (=0D
+ IN COLLECT_CPUID_CACHE_DATA_CONTEXT *Context=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ MP_SERVICES MpServices;=0D
+=0D
+ MpServices =3D Context->MpServices;=0D
+=0D
+ Status =3D MpServices.Protocol->StartupAllAPs (MpServices.Protocol, Coll=
ectCoreAndCacheData, TRUE, NULL, 0, Context, NULL);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ CollectCoreAndCacheData(Context);=0D
+}=0D
+=0D
+/**=0D
+ Get detailed information of the requested logical processor.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+ @param[in] ProcessorNum The requested logical processor number.=
=0D
+=0D
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical=
processors.=0D
+**/=0D
+EFI_PROCESSOR_INFORMATION=0D
+GetCurrentProcessorInfo (=0D
+ IN MP_SERVICES MpServices,=0D
+ IN UINTN ProcessorNum=0D
+=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;=0D
+=0D
+ Status =3D MpServices.Protocol->GetProcessorInfo (MpServices.Protocol, P=
rocessorNum, &ProcessorInfo);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return ProcessorInfo;=0D
+}=0D
+=0D
+/**=0D
+ Get the logical processor number.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the logical processor number.=0D
+**/=0D
+UINT32=0D
+GetCurrentProcessorNum (=0D
+ IN MP_SERVICES MpServices=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINTN ProcessorNum;=0D
+=0D
+ Status =3D MpServices.Protocol->WhoAmI (MpServices.Protocol, &ProcessorN=
um);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return (UINT32)ProcessorNum;=0D
+}=0D
+=0D
+/**=0D
+ Get the total number of logical processors in the platform.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the total number of logical processors.=0D
+**/=0D
+UINT32=0D
+GetNumberOfProcessor (=0D
+ IN MP_SERVICES MpServices=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINTN NumberOfProcessor;=0D
+ UINTN NumberOfEnabledProcessor;=0D
+=0D
+ Status =3D MpServices.Protocol->GetNumberOfProcessors (MpServices.Protoc=
ol, &NumberOfProcessor, &NumberOfEnabledProcessor);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return (UINT32)NumberOfProcessor;=0D
+}=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c b/Uefi=
CpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
new file mode 100644
index 000000000000..2d40b7086dc7
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
@@ -0,0 +1,130 @@
+/** @file=0D
+ Provides cache info for each package, core type, cache level and cache t=
ype.=0D
+=0D
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#include <PiPei.h>=0D
+#include <Library/BaseLib.h>=0D
+#include <Library/DebugLib.h>=0D
+#include <Library/PeiServicesLib.h>=0D
+#include <Library/PeiServicesTablePointerLib.h>=0D
+#include <Library/CpuCacheInfoLib.h>=0D
+#include <InternalCpuCacheInfoLib.h>=0D
+=0D
+/**=0D
+ Collect core and cache information of calling processor via CPUID instru=
ctions.=0D
+=0D
+ @param[in] Buffer The pointer to private data buffer.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheData (=0D
+ IN OUT VOID *Buffer=0D
+ );=0D
+=0D
+/**=0D
+ Get EDKII_PEI_MP_SERVICES2_PPI pointer.=0D
+=0D
+ @retval Return MP_SERVICES structure.=0D
+**/=0D
+MP_SERVICES=0D
+GetMpServices (=0D
+ VOID=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ MP_SERVICES MpServices;=0D
+=0D
+ Status =3D PeiServicesLocatePpi (&gEdkiiPeiMpServices2PpiGuid, 0, NULL, =
(VOID **)&MpServices.Ppi);=0D
+ ASSERT_EFI_ERROR (Status);=0D
+=0D
+ return MpServices;=0D
+}=0D
+=0D
+/**=0D
+ Collect core and cache information of all APs and BSP via CPUID instruct=
ions.=0D
+=0D
+ @param[in] Context The pointer to COLLECT_CPUID_CACHE_DATA_=
CONTEXT structure.=0D
+**/=0D
+VOID=0D
+CollectCoreAndCacheDataForAll (=0D
+ IN COLLECT_CPUID_CACHE_DATA_CONTEXT *Context=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ MP_SERVICES MpServices;=0D
+=0D
+ MpServices =3D Context->MpServices;=0D
+=0D
+ Status =3D MpServices.Ppi->StartupAllCPUs (MpServices.Ppi, CollectCoreAn=
dCacheData, 0, Context);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+}=0D
+=0D
+/**=0D
+ Get detailed information of the requested logical processor.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+ @param[in] ProcessorNum The requested logical processor number.=
=0D
+=0D
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical=
processors.=0D
+**/=0D
+EFI_PROCESSOR_INFORMATION=0D
+GetCurrentProcessorInfo (=0D
+ IN MP_SERVICES MpServices,=0D
+ IN UINTN ProcessorNum=0D
+=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;=0D
+=0D
+ Status =3D MpServices.Ppi->GetProcessorInfo (MpServices.Ppi, ProcessorNu=
m, &ProcessorInfo);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return ProcessorInfo;=0D
+}=0D
+=0D
+/**=0D
+ Get the logical processor number.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the logical processor number.=0D
+**/=0D
+UINT32=0D
+GetCurrentProcessorNum (=0D
+ IN MP_SERVICES MpServices=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINTN ProcessorNum;=0D
+=0D
+ Status =3D MpServices.Ppi->WhoAmI (MpServices.Ppi, &ProcessorNum);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return (UINT32)ProcessorNum;=0D
+}=0D
+=0D
+/**=0D
+ Get the total number of logical processors in the platform.=0D
+=0D
+ @param[in] MpServices MP_SERVICES structure.=0D
+=0D
+ @retval Return the total number of logical processors.=0D
+**/=0D
+UINT32=0D
+GetNumberOfProcessor (=0D
+ IN MP_SERVICES MpServices=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ UINTN NumberOfProcessor;=0D
+ UINTN NumberOfEnabledProcessor;=0D
+=0D
+ Status =3D MpServices.Ppi->GetNumberOfProcessors (MpServices.Ppi, &Numbe=
rOfProcessor, &NumberOfEnabledProcessor);=0D
+ ASSERT_EFI_ERROR(Status);=0D
+=0D
+ return (UINT32)NumberOfProcessor;=0D
+}=0D
diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h b/UefiCpuPkg/Incl=
ude/Library/CpuCacheInfoLib.h
new file mode 100644
index 000000000000..475764f893d0
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
@@ -0,0 +1,68 @@
+/** @file=0D
+ Header file for CPU Cache info Library.=0D
+=0D
+ Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#ifndef _CPU_CACHE_INFO_LIB_H_=0D
+#define _CPU_CACHE_INFO_LIB_H_=0D
+=0D
+typedef struct {=0D
+ //=0D
+ // Package number.=0D
+ //=0D
+ UINT32 Package;=0D
+ //=0D
+ // Core type of logical processor.=0D
+ // Value =3D CPUID(1A).Eax[31:24].Coretype=0D
+ //=0D
+ UINT8 CoreType;=0D
+ //=0D
+ // Level of the cache that this package's this type of logical processor=
corresponds to.=0D
+ // Value =3D CPUID(04).Eax[07:05].CacheLevel=0D
+ //=0D
+ UINT8 CacheLevel : 3;=0D
+ //=0D
+ // Type of the cache that this package's this type of logical processor =
corresponds to.=0D
+ // Value =3D CPUID(04).Eax[04:00].CacheTypeField=0D
+ //=0D
+ UINT8 CacheType : 5;=0D
+ //=0D
+ // Size of single cache that this package's this type of logical process=
or corresponds to.=0D
+ // Value =3D (CPUID(04).Ebx[31:22].Ways + 1) * (CPUID(04).Ebx[21:12].Par=
titions + 1) * /=0D
+ // (CPUID(04).Ebx[11:00].LineSize + 1) * (CPUID(04).Ecx[31:00].S=
ets + 1)=0D
+ //=0D
+ UINT32 CacheSizeinKB;=0D
+ //=0D
+ // Number of the cache that this package's this type of logical processo=
r corresponds to.=0D
+ // Have subtracted the number of caches that are shared.=0D
+ //=0D
+ UINT16 CacheCount;=0D
+} CPU_CACHE_INFO;=0D
+=0D
+/**=0D
+ Get CpuCacheInfo data array.=0D
+=0D
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.=0D
+ @param[in, out] CpuCacheInfoCount As input, point to the length of res=
ponse CpuCacheInfo array.=0D
+ As output, point to the actual lengt=
h of response CpuCacheInfo array.=0D
+=0D
+ @retval EFI_SUCCESS Function completed successfully.=
=0D
+ @retval EFI_INVALID_PARAMETER CpuCacheInfoCount is NULL.=0D
+ @retval EFI_INVALID_PARAMETER CpuCacheInfo is NULL while CpuCa=
cheInfoCount contains the value=0D
+ greater than zero.=0D
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be =
allocated.=0D
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small t=
o hold the response CpuCacheInfo=0D
+ array. CpuCacheInfoCount has bee=
n updated with the length needed=0D
+ to complete the request.=0D
+**/=0D
+EFI_STATUS=0D
+EFIAPI=0D
+GetCpuCacheInfo (=0D
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,=0D
+ IN OUT UINTN *CpuCacheInfoCount=0D
+ );=0D
+=0D
+#endif=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni b/UefiC=
puPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
new file mode 100644
index 000000000000..1bc801f15f84
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
@@ -0,0 +1,15 @@
+// /** @file=0D
+// CPU Cache Info Library=0D
+//=0D
+// Provides cache info for each package, core type, cache level and cache =
type.=0D
+//=0D
+// Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+//=0D
+// SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+//=0D
+// **/=0D
+=0D
+=0D
+#string STR_MODULE_ABSTRACT #language en-US "CPU Cache Info Li=
brary"=0D
+=0D
+#string STR_MODULE_DESCRIPTION #language en-US "Provides cache in=
fo for each package, core type, cache level and cache type."=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf b/Ue=
fiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..f509861a5f4c
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file=0D
+# CPU Cache Info Library instance for DXE driver.=0D
+#=0D
+# Provides cache info for each package, core type, cache level and cache =
type.=0D
+#=0D
+# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+##=0D
+=0D
+[Defines]=0D
+ INF_VERSION =3D 0x00010005=0D
+ BASE_NAME =3D DxeCpuCacheInfoLib=0D
+ FILE_GUID =3D B25C288F-C309-41F1-8325-37E64DC5EA3D=
=0D
+ MODULE_TYPE =3D DXE_DRIVER=0D
+ VERSION_STRING =3D 1.0=0D
+ LIBRARY_CLASS =3D CpuCacheInfoLib|DXE_CORE DXE_DRIVER D=
XE_RUNTIME_DRIVER UEFI_APPLICATION UEFI_DRIVER=0D
+ MODULE_UNI_FILE =3D CpuCacheInfoLib.uni=0D
+=0D
+[Sources]=0D
+ InternalCpuCacheInfoLib.h=0D
+ CpuCacheInfoLib.c=0D
+ DxeCpuCacheInfoLib.c=0D
+=0D
+[Packages]=0D
+ MdePkg/MdePkg.dec=0D
+ UefiCpuPkg/UefiCpuPkg.dec=0D
+=0D
+[LibraryClasses]=0D
+ BaseLib=0D
+ DebugLib=0D
+ BaseMemoryLib=0D
+ MemoryAllocationLib=0D
+ UefiBootServicesTableLib=0D
+=0D
+[Protocols]=0D
+ gEfiMpServiceProtocolGuid=0D
+=0D
+[Pcd]=0D
+=0D
+[Depex]=0D
+ gEfiMpServiceProtocolGuid=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h b=
/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
new file mode 100644
index 000000000000..934d5f2fa5a1
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
@@ -0,0 +1,64 @@
+/** @file=0D
+ Internal header file for CPU Cache info Library.=0D
+=0D
+ Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#ifndef _INTERNAL_CPU_CACHE_INFO_LIB_H_=0D
+#define _INTERNAL_CPU_CACHE_INFO_LIB_H_=0D
+=0D
+#include <PiPei.h>=0D
+#include <Ppi/MpServices2.h>=0D
+#include <Protocol/MpService.h>=0D
+=0D
+typedef struct {=0D
+ //=0D
+ // APIC ID.=0D
+ //=0D
+ UINT32 ApicId;=0D
+ //=0D
+ // Processor location information.=0D
+ // The information comes from MP Services.=0D
+ //=0D
+ EFI_CPU_PHYSICAL_LOCATION Location;=0D
+ //=0D
+ // Core type of logical processor.=0D
+ // Value =3D CPUID(1A).Eax[31:24].Coretype=0D
+ //=0D
+ UINT8 CoreType;=0D
+ //=0D
+ // Level of the cache.=0D
+ // Value =3D CPUID(04).Eax[07:05].CacheLevel=0D
+ //=0D
+ UINT8 CacheLevel : 3;=0D
+ //=0D
+ // Type of the cache.=0D
+ // Value =3D CPUID(04).Eax[04:00].CacheTypeField=0D
+ //=0D
+ UINT8 CacheType : 5;=0D
+ //=0D
+ // Cache share bits.=0D
+ // Value =3D CPUID(04).Eax[25:14].MaximumAddressableIdsForLogicalProcess=
ors=0D
+ //=0D
+ UINT16 CacheShareBits;=0D
+ //=0D
+ // Size of single cache.=0D
+ // Value =3D (CPUID(04).Ebx[31:22].Ways + 1) * (CPUID(04).Ebx[21:12].Par=
titions + 1) * /=0D
+ // (CPUID(04).Ebx[11:00].LineSize + 1) * (CPUID(04).Ecx[31:00].S=
ets + 1)=0D
+ //=0D
+ UINT32 CacheSizeinKB;=0D
+} CPUID_CACHE_DATA;=0D
+=0D
+typedef union {=0D
+ EDKII_PEI_MP_SERVICES2_PPI *Ppi;=0D
+ EFI_MP_SERVICES_PROTOCOL *Protocol;=0D
+} MP_SERVICES;=0D
+=0D
+typedef struct {=0D
+ MP_SERVICES MpServices;=0D
+ CPUID_CACHE_DATA *CpuidCacheData;=0D
+} COLLECT_CPUID_CACHE_DATA_CONTEXT;=0D
+=0D
+#endif=0D
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf b/Ue=
fiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..a84b50219e53
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file=0D
+# CPU Cache Info Library instance for PEI module.=0D
+#=0D
+# Provides cache info for each package, core type, cache level and cache =
type.=0D
+#=0D
+# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+##=0D
+=0D
+[Defines]=0D
+ INF_VERSION =3D 0x00010005=0D
+ BASE_NAME =3D PeiCpuCacheInfoLib=0D
+ FILE_GUID =3D CFEE2DBE-53B2-4916-84CA-0BA83C3DDA6E=
=0D
+ MODULE_TYPE =3D PEIM=0D
+ VERSION_STRING =3D 1.0=0D
+ LIBRARY_CLASS =3D CpuCacheInfoLib|PEI_CORE PEIM=0D
+ MODULE_UNI_FILE =3D CpuCacheInfoLib.uni=0D
+=0D
+[Sources]=0D
+ InternalCpuCacheInfoLib.h=0D
+ CpuCacheInfoLib.c=0D
+ PeiCpuCacheInfoLib.c=0D
+=0D
+[Packages]=0D
+ MdePkg/MdePkg.dec=0D
+ UefiCpuPkg/UefiCpuPkg.dec=0D
+=0D
+[LibraryClasses]=0D
+ BaseLib=0D
+ DebugLib=0D
+ BaseMemoryLib=0D
+ MemoryAllocationLib=0D
+ PeiServicesTablePointerLib=0D
+=0D
+[Ppis]=0D
+ gEdkiiPeiMpServices2PpiGuid=0D
+=0D
+[Pcd]=0D
+=0D
+[Depex]=0D
+ gEdkiiPeiMpServices2PpiGuid=0D
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index d83c084467b3..a639ce5412e4 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -56,6 +56,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
## @libraryclass Provides function to support VMGEXIT processing.=0D
VmgExitLib|Include/Library/VmgExitLib.h=0D
=0D
+ ## @libraryclass Provides function to get CPU cache information.=0D
+ CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h=0D
+=0D
[Guids]=0D
gUefiCpuPkgTokenSpaceGuid =3D { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa,=
0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}=0D
gMsegSmramGuid =3D { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1,=
0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}=0D
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index b2b6d78a71b0..5834eafaa200 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -75,6 +75,7 @@ [LibraryClasses.common.PEIM]
LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf=0D
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf=0D
RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegi=
sterCpuFeaturesLib.inf=0D
+ CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.in=
f=0D
=0D
[LibraryClasses.IA32.PEIM, LibraryClasses.X64.PEIM]=0D
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/=
PeiServicesTablePointerLibIdt.inf=0D
@@ -86,6 +87,7 @@ [LibraryClasses.common.DXE_DRIVER]
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuE=
xceptionHandlerLib.inf=0D
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf=0D
RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegi=
sterCpuFeaturesLib.inf=0D
+ CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.in=
f=0D
=0D
[LibraryClasses.common.DXE_SMM_DRIVER]=0D
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableL=
ib.inf=0D
@@ -109,6 +111,8 @@ [Components]
UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf=0D
UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf=0D
UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf=0D
+ UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf=0D
+ UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf=0D
=0D
[Components.IA32, Components.X64]=0D
UefiCpuPkg/CpuDxe/CpuDxe.inf=0D
--=20
2.28.0.windows.1


Laszlo Ersek
 

On 11/19/20 03:36, jasonlouyun wrote:
This library uses a platform agnostic algorithm to get CPU cache
information. It provides user with an API(GetCpuCacheInfo) to get
detailed CPU cache information by each package, each core type
included in this package, and each cache level & type.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 602 ++++++++++++++++++++
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c | 131 +++++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c | 130 +++++
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 68 +++
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni | 15 +
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 64 +++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
10 files changed, 1103 insertions(+)
I defer this review to the other UefiCpuPkg reviewers / maintainers.

Two superficial suggestions:

- please file a TianoCore feature request BZ, and reference it in the
commit messages in this series

- *at least one* of the commit message and the bugzilla ticket, but
preferably both, should describe the use case. In other words, what
platforms intend to use the new library (especially if they are open
source in edk2-platforms or otherwise), and what use cases will benefit
from having cache information.

Otherwise, this library is just dead code in edk2. I don't insist that
the consumers of this library be open source, but I do insist that
*something* be publicly explained about the use case.

Thanks
Laszlo


Ni, Ray
 

Laszlo,
The library can be used by code that produces SMBIOS_TABLE_TYPE7 SMBIOS table.
It's true that right now such code is not in open source.

Thanks,
Ray

-----Original Message-----
From: Laszlo Ersek <lersek@...>
Sent: Thursday, November 19, 2020 5:52 PM
To: Lou, Yun <yun.lou@...>; devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@...>; Dong, Eric <eric.dong@...>; Kumar, Rahul1 <rahul1.kumar@...>
Subject: Re: [PATCH v1 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.

On 11/19/20 03:36, jasonlouyun wrote:
This library uses a platform agnostic algorithm to get CPU cache
information. It provides user with an API(GetCpuCacheInfo) to get
detailed CPU cache information by each package, each core type
included in this package, and each cache level & type.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 602 ++++++++++++++++++++
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c | 131 +++++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c | 130 +++++
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 68 +++
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni | 15 +
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 64 +++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
10 files changed, 1103 insertions(+)
I defer this review to the other UefiCpuPkg reviewers / maintainers.

Two superficial suggestions:

- please file a TianoCore feature request BZ, and reference it in the
commit messages in this series

- *at least one* of the commit message and the bugzilla ticket, but
preferably both, should describe the use case. In other words, what
platforms intend to use the new library (especially if they are open
source in edk2-platforms or otherwise), and what use cases will benefit
from having cache information.

Otherwise, this library is just dead code in edk2. I don't insist that
the consumers of this library be open source, but I do insist that
*something* be publicly explained about the use case.

Thanks
Laszlo


Laszlo Ersek
 

On 11/20/20 06:06, Ni, Ray wrote:
Laszlo,
The library can be used by code that produces SMBIOS_TABLE_TYPE7 SMBIOS table.
Great information, thank you! Exactly the kind that I wanted to hear.

Please add this sentence to the commit message (either via a v2 posting,
or at merge time, as you see fit).

Thanks!
Laszlo

It's true that right now such code is not in open source.

Thanks,
Ray

-----Original Message-----
From: Laszlo Ersek <lersek@...>
Sent: Thursday, November 19, 2020 5:52 PM
To: Lou, Yun <yun.lou@...>; devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@...>; Dong, Eric <eric.dong@...>; Kumar, Rahul1 <rahul1.kumar@...>
Subject: Re: [PATCH v1 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.

On 11/19/20 03:36, jasonlouyun wrote:
This library uses a platform agnostic algorithm to get CPU cache
information. It provides user with an API(GetCpuCacheInfo) to get
detailed CPU cache information by each package, each core type
included in this package, and each cache level & type.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 602 ++++++++++++++++++++
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c | 131 +++++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c | 130 +++++
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 68 +++
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni | 15 +
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 64 +++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
10 files changed, 1103 insertions(+)
I defer this review to the other UefiCpuPkg reviewers / maintainers.

Two superficial suggestions:

- please file a TianoCore feature request BZ, and reference it in the
commit messages in this series

- *at least one* of the commit message and the bugzilla ticket, but
preferably both, should describe the use case. In other words, what
platforms intend to use the new library (especially if they are open
source in edk2-platforms or otherwise), and what use cases will benefit
from having cache information.

Otherwise, this library is just dead code in edk2. I don't insist that
the consumers of this library be open source, but I do insist that
*something* be publicly explained about the use case.

Thanks
Laszlo