[edk2-platforms: PATCH v5 3/9] KabylakeOpenBoardPkg/AspireVn7Dash572G:Use same variable name for FspNvsHob


Chiu, Chasel
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678

To simplify the implementation the variable Name/GUID has been
changed to "FspNvsBuffer" and gFspNvsBufferVariableGuid
regardless it stores the data from FSP_NON_VOLATILE_STORAGE_HOB2
or FSP_NON_VOLATILE_STORAGE_HOB.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Benjamin Doron <benjamin.doron00@gmail.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/P=
eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 24 +++++++++=
+--------------
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSi=
liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c | 23 +++++++++=
--------------
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/P=
eiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 7 ++++---
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSi=
liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 2 +-
4 files changed, 24 insertions(+), 32 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp=
er/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform=
/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSilicon=
PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
index d8413d284e..a9b7e446c8 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr=
ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr=
ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -1,7 +1,7 @@
/** @file=0D
Implementation of Fsp Misc UPD Initialization.=0D
=0D
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>=0D
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>=0D
SPDX-License-Identifier: BSD-2-Clause-Patent=0D
=0D
**/=0D
@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DebugLib.h>=0D
#include <Library/PciLib.h>=0D
#include <Library/PeiLib.h>=0D
-=0D
#include <FspEas.h>=0D
#include <FspmUpd.h>=0D
#include <FspsUpd.h>=0D
@@ -34,24 +33,21 @@ PeiFspMiscUpdUpdatePreMem (
{=0D
EFI_STATUS Status;=0D
UINTN VariableSize;=0D
- VOID *MemorySavedData;=0D
+ VOID *FspNvsBufferPtr;=0D
UINT8 MorControl;=0D
VOID *MorControlPtr;=0D
=0D
//=0D
// Initialize S3 Data variable (S3DataPtr). It may be used for warm and =
fast boot paths.=0D
//=0D
- VariableSize =3D 0;=0D
- MemorySavedData =3D NULL;=0D
- Status =3D PeiGetVariable (=0D
- L"MemoryConfig",=0D
- &gFspNonVolatileStorageHobGuid,=0D
- &MemorySavedData,=0D
- &VariableSize=0D
- );=0D
- DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid=
- %r\n", Status));=0D
- DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));=0D
- FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;=0D
+ FspNvsBufferPtr =3D NULL;=0D
+ VariableSize =3D 0;=0D
+ Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG=
uid, &FspNvsBufferPtr, &VariableSize);=0D
+ if (Status =3D=3D EFI_SUCCESS) {=0D
+ DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid -=
%r\n", Status));=0D
+ DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", VariableSize));=0D
+ FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;=0D
+ }=0D
=0D
if (FspmUpd->FspmArchUpd.NvsBufferPtr !=3D NULL) {=0D
//=0D
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L=
ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Int=
el/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUp=
dateLib/PeiSiliconPolicyUpdateLib.c
index c9dfb17e0a..3764f7c3ac 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/=
PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/=
PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
@@ -431,8 +431,8 @@ SiliconPolicyUpdatePreMem (
SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig;=0D
MEMORY_CONFIG_NO_CRC *MemConfigNoCrc;=0D
VOID *Buffer;=0D
- UINTN VariableSize;=0D
- VOID *MemorySavedData;=0D
+ UINTN FspNvsBufferSize;=0D
+ VOID *FspNvsBufferPtr;=0D
UINT8 SpdAddressTable[4];=0D
=0D
DEBUG((DEBUG_INFO, "\nUpdating Policy in Pre-Mem\n"));=0D
@@ -463,18 +463,13 @@ SiliconPolicyUpdatePreMem (
// Note: AmberLake FSP does not implement the FSPM_ARCH_CONFIG_PPI a=
dded in FSP 2.1, hence=0D
// the platform specific S3DataPtr must be used instead.=0D
//=0D
- VariableSize =3D 0;=0D
- MemorySavedData =3D NULL;=0D
- Status =3D PeiGetVariable (=0D
- L"MemoryConfig",=0D
- &gFspNonVolatileStorageHobGuid,=0D
- &MemorySavedData,=0D
- &VariableSize=0D
- );=0D
- DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHob=
Guid - %r\n", Status));=0D
- DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));=0D
- if (!EFI_ERROR (Status)) {=0D
- MiscPeiPreMemConfig->S3DataPtr =3D MemorySavedData;=0D
+ FspNvsBufferPtr =3D NULL;=0D
+ FspNvsBufferSize =3D 0;=0D
+ Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVaria=
bleGuid, &FspNvsBufferPtr, &FspNvsBufferSize);=0D
+ if (Status =3D=3D EFI_SUCCESS) {=0D
+ DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGu=
id - %r\n", Status));=0D
+ DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", FspNvsBufferSize=
));=0D
+ MiscPeiPreMemConfig->S3DataPtr =3D FspNvsBufferPtr;=0D
}=0D
=0D
//=0D
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp=
er/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/=
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/Pe=
iSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
index e4a657c5f1..eac9344b0a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr=
ary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr=
ary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
@@ -1,7 +1,7 @@
## @file=0D
# Provide FSP wrapper platform related function.=0D
#=0D
-# Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2017 - 2021 Intel Corporation. All rights reserved.<BR>=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -74,7 +74,6 @@
PchInfoLib=0D
PchHsioLib=0D
PchPcieRpLib=0D
- MemoryAllocationLib=0D
SiPolicyLib=0D
PeiLib=0D
=0D
@@ -134,9 +133,11 @@
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAudioConnector=0D
=0D
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid=0D
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress=0D
+ gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRootPort4ClkInfo=0D
=0D
[Guids]=0D
- gFspNonVolatileStorageHobGuid ## CONSUMES=0D
+ gFspNvsBufferVariableGuid ## CONSUMES=0D
gTianoLogoGuid ## CONSUMES=0D
gEfiMemoryOverwriteControlDataGuid=0D
=0D
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L=
ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/I=
ntel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicy=
UpdateLib/PeiSiliconPolicyUpdateLib.inf
index 0a8cf91b07..4dcc000186 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/=
PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/=
PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -52,7 +52,7 @@
gHsioPciePreMemConfigGuid ## CONSUMES=0D
gHsioSataPreMemConfigGuid ## CONSUMES=0D
gSaMiscPeiPreMemConfigGuid ## CONSUMES=0D
- gFspNonVolatileStorageHobGuid ## CONSUMES=0D
+ gFspNvsBufferVariableGuid ## CONSUMES=0D
gIoApicConfigGuid ## CONSUMES=0D
gHpetPreMemConfigGuid ## CONSUMES=0D
gLockDownConfigGuid=0D
--=20
2.28.0.windows.1