[edk2-platforms][PATCH v3 06/41] IntelSiliconPkg: Add PCH SPI PPI


Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

This SPI PPI definition is intended to serve as the single
definition for Intel platform and silicon packages.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 +++++++++++++++++=
+++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
2 files changed, 28 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/In=
tel/IntelSiliconPkg/Include/Ppi/Spi.h
new file mode 100644
index 000000000000..b2410bd17300
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
@@ -0,0 +1,25 @@
+/** @file
+ This file defines the PCH SPI PPI which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PPI_H_
+#define _PCH_SPI_PPI_H_
+
+#include <Protocol/Spi.h>
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID gPchSpiPpiGuid;
+
+/**
+ Reuse the PCH_SPI_PROTOCOL definitions
+ This is possible becaues the PPI implementation does not rely on a Pei=
Service pointer,
+ as it uses EDKII Glue Lib to do IO accesses
+**/
+typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index fb8391000347..70f030e3a295 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -71,6 +71,9 @@ [Guids]
gEdkiiMicrocodeStorageTypeFlashGuid =3D { 0x2cba01b3, 0xd391, 0x4598, =
{ 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }
=20
[Ppis]
+ ## Include/Ppi/Spi.h
+ gPchSpiPpiGuid =3D {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0=
, 0xeb, 0x17, 0x72, 0x2d}}
+
gEdkiiVTdInfoPpiGuid =3D { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0=
x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
gEdkiiVTdNullRootEntryTableGuid =3D { 0x3de0593f, 0x6e3e, 0x4542, { 0x=
a1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
=20
--=20
2.28.0.windows.1


Chaganty, Rangasai V
 

Hi Michael,
Since there is a change in SPI protocol/PPI services (enum to EFI_GUID type for Flash region types), perhaps defining a new GUID would be better, just to make sure there are no collisions.
Do you see any downside to it?

Regards,
Sai

-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, June 17, 2021 7:07 PM
To: devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [edk2-platforms][PATCH v3 06/41] IntelSiliconPkg: Add PCH SPI PPI

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

This SPI PPI definition is intended to serve as the single definition for Intel platform and silicon packages.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
2 files changed, 28 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
new file mode 100644
index 000000000000..b2410bd17300
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
@@ -0,0 +1,25 @@
+/** @file
+ This file defines the PCH SPI PPI which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent **/ #ifndef
+_PCH_SPI_PPI_H_ #define _PCH_SPI_PPI_H_
+
+#include <Protocol/Spi.h>
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID gPchSpiPpiGuid;
+
+/**
+ Reuse the PCH_SPI_PROTOCOL definitions
+ This is possible becaues the PPI implementation does not rely on a
+PeiService pointer,
+ as it uses EDKII Glue Lib to do IO accesses **/ typedef
+PCH_SPI_PROTOCOL PCH_SPI_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index fb8391000347..70f030e3a295 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -71,6 +71,9 @@ [Guids]
gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }

[Ppis]
+ ## Include/Ppi/Spi.h
+ gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0,
+ 0xeb, 0x17, 0x72, 0x2d}}
+
gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }

--
2.28.0.windows.1


Michael Kubacki
 

Hi Sai,

That sounds fine to me. I'll send it in a v4 soon.

Thanks,
Michael

On 6/24/2021 5:56 PM, Chaganty, Rangasai V wrote:
Hi Michael,
Since there is a change in SPI protocol/PPI services (enum to EFI_GUID type for Flash region types), perhaps defining a new GUID would be better, just to make sure there are no collisions.
Do you see any downside to it?
Regards,
Sai
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, June 17, 2021 7:07 PM
To: devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [edk2-platforms][PATCH v3 06/41] IntelSiliconPkg: Add PCH SPI PPI
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This SPI PPI definition is intended to serve as the single definition for Intel platform and silicon packages.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
2 files changed, 28 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
new file mode 100644
index 000000000000..b2410bd17300
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
@@ -0,0 +1,25 @@
+/** @file
+ This file defines the PCH SPI PPI which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent **/ #ifndef
+_PCH_SPI_PPI_H_ #define _PCH_SPI_PPI_H_
+
+#include <Protocol/Spi.h>
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID gPchSpiPpiGuid;
+
+/**
+ Reuse the PCH_SPI_PROTOCOL definitions
+ This is possible becaues the PPI implementation does not rely on a
+PeiService pointer,
+ as it uses EDKII Glue Lib to do IO accesses **/ typedef
+PCH_SPI_PROTOCOL PCH_SPI_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index fb8391000347..70f030e3a295 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -71,6 +71,9 @@ [Guids]
gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }
[Ppis]
+ ## Include/Ppi/Spi.h
+ gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0,
+ 0xeb, 0x17, 0x72, 0x2d}}
+
gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
--
2.28.0.windows.1