[edk2-platforms][PATCH 06/30] Platform/U540: Provide PlatormSecPpiLib


Abner Chang
 

Provide PlatormSecPpiLib instance for U540

Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>

Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
.../FreedomU540HiFiveUnleashedBoard/U540.dsc | 1 +
.../PlatformSecPpiLib/PlatformSecPpiLib.inf | 43 +++++
.../PlatformSecPpiLib/PlatformSecPpiLib.c | 148 ++++++++++++++++++
3 files changed, 192 insertions(+)
create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/P=
latformSecPpiLib.inf
create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/P=
latformSecPpiLib.c

diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5=
40.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d=
sc
index be23fc39fd..d12af19825 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -192,6 +192,7 @@
PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf=0D
# RISC-V platform PEI core entry point.=0D
PeiCoreEntryPoint|Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/=
PeiCoreEntryPoint.inf=0D
+ PlatformSecPpiLib|Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/=
PlatformSecPpiLib.inf=0D
=0D
[LibraryClasses.common.PEIM]=0D
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf=0D
diff --git a/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/Platform=
SecPpiLib.inf b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/Platf=
ormSecPpiLib.inf
new file mode 100644
index 0000000000..7e9e1a5e20
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiL=
ib.inf
@@ -0,0 +1,43 @@
+## @file=0D
+# Library instance to to provide PPI before PEI Core=0D
+#=0D
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ=
ts reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+##=0D
+=0D
+[Defines]=0D
+ INF_VERSION =3D 0x0001001b=0D
+ BASE_NAME =3D PlatformSecPpiLib=0D
+ FILE_GUID =3D 8F8E049E-F193-427C-998E-1E8FE2612D94=
=0D
+ MODULE_TYPE =3D PEIM=0D
+ VERSION_STRING =3D 1.0=0D
+ LIBRARY_CLASS =3D PlatformSecPpiLib|PEI_CORE=0D
+=0D
+#=0D
+# The following information is for reference only and not required by the =
build tools.=0D
+#=0D
+# VALID_ARCHITECTURES =3D RISCV64=0D
+#=0D
+=0D
+[Sources]=0D
+ PlatformSecPpiLib.c=0D
+=0D
+[Ppis]=0D
+[Ppis]=0D
+ gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED=0D
+ gEfiTemporaryRamDonePpiGuid # PPI ALWAYS_PRODUCED=0D
+=0D
+[Packages]=0D
+ MdePkg/MdePkg.dec=0D
+ MdeModulePkg/MdeModulePkg.dec=0D
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec=0D
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D
+=0D
+[LibraryClasses]=0D
+ BaseLib=0D
+ PcdLib=0D
+ MemoryAllocationLib=0D
+ PrintLib=0D
+ RiscVFirmwareContextLib=0D
diff --git a/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/Platform=
SecPpiLib.c b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/Platfor=
mSecPpiLib.c
new file mode 100644
index 0000000000..ef84e8c1bc
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiL=
ib.c
@@ -0,0 +1,148 @@
+/**@file=0D
+ Library to install platform PPI before PEI Core=0D
+=0D
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right=
s reserved.<BR>=0D
+=0D
+ SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+//=0D
+// The package level header files this module uses=0D
+//=0D
+#include <PiPei.h>=0D
+=0D
+#include <IndustryStandard/RiscVOpensbi.h>=0D
+#include <Library/BaseMemoryLib.h>=0D
+#include <Library/DebugLib.h>=0D
+#include <Library/DebugPrintErrorLevelLib.h>=0D
+#include <Library/PlatformSecPpiLib.h>=0D
+#include <Library/PrintLib.h>=0D
+#include <Library/RiscVFirmwareContextLib.h>=0D
+=0D
+#include <Ppi/TemporaryRamDone.h>=0D
+#include <Ppi/TemporaryRamSupport.h>=0D
+=0D
+EFI_STATUS=0D
+EFIAPI=0D
+TemporaryRamMigration (=0D
+ IN CONST EFI_PEI_SERVICES **PeiServices,=0D
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,=0D
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,=0D
+ IN UINTN CopySize=0D
+ );=0D
+=0D
+EFI_STATUS=0D
+EFIAPI=0D
+TemporaryRamDone (=0D
+ VOID=0D
+ );=0D
+=0D
+STATIC EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi =3D {=0D
+ TemporaryRamMigration=0D
+};=0D
+=0D
+STATIC EFI_PEI_TEMPORARY_RAM_DONE_PPI mTemporaryRamDonePpi =3D {=0D
+ TemporaryRamDone=0D
+};=0D
+=0D
+STATIC EFI_PEI_PPI_DESCRIPTOR mPrivateDispatchTable[] =3D {=0D
+ {=0D
+ EFI_PEI_PPI_DESCRIPTOR_PPI,=0D
+ &gEfiTemporaryRamSupportPpiGuid,=0D
+ &mTemporaryRamSupportPpi=0D
+ },=0D
+ {=0D
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),=
=0D
+ &gEfiTemporaryRamDonePpiGuid,=0D
+ &mTemporaryRamDonePpi=0D
+ },=0D
+};=0D
+=0D
+/** Temporary RAM migration function.=0D
+=0D
+ This function migrates the data from temporary RAM to permanent=0D
+ memory.=0D
+=0D
+ @param[in] PeiServices PEI service=0D
+ @param[in] TemporaryMemoryBase Temporary memory base address=0D
+ @param[in] PermanentMemoryBase Permanent memory base address=0D
+ @param[in] CopySize Size to copy=0D
+=0D
+**/=0D
+EFI_STATUS=0D
+EFIAPI=0D
+TemporaryRamMigration (=0D
+ IN CONST EFI_PEI_SERVICES **PeiServices,=0D
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,=0D
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,=0D
+ IN UINTN CopySize=0D
+ )=0D
+{=0D
+ VOID *OldHeap;=0D
+ VOID *NewHeap;=0D
+ VOID *OldStack;=0D
+ VOID *NewStack;=0D
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;=0D
+=0D
+ DEBUG ((DEBUG_INFO,=0D
+ "%a: Temp Mem Base:0x%Lx, Permanent Mem Base:0x%Lx, CopySize:0x%Lx\n",=
=0D
+ __FUNCTION__,=0D
+ TemporaryMemoryBase,=0D
+ PermanentMemoryBase,=0D
+ (UINT64)CopySize=0D
+ ));=0D
+=0D
+ OldHeap =3D (VOID*)(UINTN)TemporaryMemoryBase;=0D
+ NewHeap =3D (VOID*)((UINTN)PermanentMemoryBase + (CopySize >> 1));=0D
+=0D
+ OldStack =3D (VOID*)((UINTN)TemporaryMemoryBase + (CopySize >> 1));=0D
+ NewStack =3D (VOID*)(UINTN)PermanentMemoryBase;=0D
+=0D
+ CopyMem (NewHeap, OldHeap, CopySize >> 1); // Migrate Heap=0D
+ CopyMem (NewStack, OldStack, CopySize >> 1); // Migrate Stack=0D
+=0D
+ //=0D
+ // Reset firmware context pointer=0D
+ //=0D
+ GetFirmwareContextPointer (&FirmwareContext);=0D
+ FirmwareContext =3D (VOID *)FirmwareContext + (unsigned long)((UINTN)New=
Stack - (UINTN)OldStack);=0D
+ SetFirmwareContextPointer (FirmwareContext);=0D
+=0D
+ //=0D
+ // Relocate PEI Service **=0D
+ //=0D
+ FirmwareContext->PeiServiceTable +=3D (unsigned long)((UINTN)NewStack - =
(UINTN)OldStack);=0D
+ DEBUG ((DEBUG_INFO, "%a: OpenSBI Firmware Context is relocated to 0x%x\n=
", __FUNCTION__, FirmwareContext));=0D
+ DEBUG ((DEBUG_INFO, "OpenSBI Firmware Context at 0x%x\n", FirmwareContex=
t));=0D
+ DEBUG ((DEBUG_INFO, " PEI Service at 0x%x\n\n", FirmwareCont=
ext->PeiServiceTable));=0D
+=0D
+ register uintptr_t a0 asm ("a0") =3D (uintptr_t)((UINTN)NewStack - (UINT=
N)OldStack);=0D
+ asm volatile ("add sp, sp, a0"::"r"(a0):);=0D
+ return EFI_SUCCESS;=0D
+}=0D
+=0D
+/** Temprary RAM done function.=0D
+=0D
+**/=0D
+EFI_STATUS EFIAPI TemporaryRamDone (=0D
+ VOID=0D
+ )=0D
+{=0D
+ DEBUG ((DEBUG_INFO, "%a: 2nd time PEI core, temporary ram done.\n", __FU=
NCTION__));=0D
+ return EFI_SUCCESS;=0D
+}=0D
+/** Return platform SEC PPI before PEI Core=0D
+=0D
+ @param[in,out] ThisPpiList Pointer to retrieve EFI_PEI_PPI_DESCRIPTOR=
.=0D
+=0D
+**/=0D
+EFI_STATUS=0D
+GetPlatformPrePeiCorePpiDescriptor (=0D
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **ThisPpiList=0D
+)=0D
+{=0D
+ *ThisPpiList =3D mPrivateDispatchTable;=0D
+ return EFI_SUCCESS;=0D
+}=0D
+=0D
--=20
2.31.1