Date
1 - 3 of 3
[edk2-platforms][PATCH V3 1/1] Silicon/ARM/NeoverseN1Soc: Update CCIX PNP ID
|
sahil
The PNP ID 0x0A09 used for CCIX host bridge in the current code is
not defined in any specification and is therefore incorrect. Also, there is no need for a separate ID for CCIX host bridge, for the following reasons: 1. CCIX doesn't have any host specific requirements/ingredients as such. 2. CCIX protocol messages flow over regular PCIe. 3. CCIX devices and root ports are natively discovered using the CCIX DVSEC. Therefore, reuse PCIe PNP ID for CCIX. Signed-off-by: sahil <sahil@...> --- Notes: v3: - added more info regarding the change in commit message [Sami Mujawar] v2: - removed licence fix, to be pushed in separate patch [Leif Lindholm] Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c | 4 = ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBrid= geLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeL= ib.c index 1f38f654a8ce..6a154d771126 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -65,8 +65,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeD= evicePath[ROOT_COMPLEX_ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)=0D }=0D },=0D - EISA_PNP_ID(0x0A09), // CCIX=0D - 0=0D + EISA_PNP_ID(0x0A08), // CCIX=0D + 1=0D },=0D {=0D END_DEVICE_PATH_TYPE,=0D --=20 2.25.1 |
|
|
|
Sami Mujawar
HI Sahil,
Thank you for the updated patch. These changes look good to me. Reviewed-by: Sami Mujawar <sami.mujawar@...> Regards, Sami Mujawar On 08/12/2022, 12:07, "sahil" <sahil@...> wrote: The PNP ID 0x0A09 used for CCIX host bridge in the current code is not defined in any specification and is therefore incorrect. Also, there is no need for a separate ID for CCIX host bridge, for the following reasons: 1. CCIX doesn't have any host specific requirements/ingredients as such. 2. CCIX protocol messages flow over regular PCIe. 3. CCIX devices and root ports are natively discovered using the CCIX DVSEC. Therefore, reuse PCIe PNP ID for CCIX. Signed-off-by: sahil <sahil@...> --- Notes: v3: - added more info regarding the change in commit message [Sami Mujawar] v2: - removed licence fix, to be pushed in separate patch [Leif Lindholm] Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c index 1f38f654a8ce..6a154d771126 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -65,8 +65,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[ROOT_COMPLEX_ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8) } }, - EISA_PNP_ID(0x0A09), // CCIX - 0 + EISA_PNP_ID(0x0A08), // CCIX + 1 }, { END_DEVICE_PATH_TYPE, -- 2.25.1 |
|
|
|
Sami Mujawar
Merged as f0385722832d..df870c7beaee
toggle quoted message
Show quoted text
Thanks. Regards, Sami Mujawar On 08/12/2022 12:51 pm, Sami Mujawar via groups.io wrote:
HI Sahil, |
|
|