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[PATCH 1/1] OvmfPkg/PciHotPlugInitDxe: fix io window size

Yao, Jiewen
 

Maybe it should be done in PciHostBridge driver, because PciBus is generic and PciHostBridge knows the smallest windows size for this platform.

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Yao,
Jiewen
Sent: Friday, December 9, 2022 3:28 PM
To: devel@edk2.groups.io; kraxel@...
Cc: Oliver Steffen <osteffen@...>; Pawel Polawski
<ppolawsk@...>; Ard Biesheuvel <ardb+tianocore@...>;
Justen, Jordan L <jordan.l.justen@...>
Subject: Re: [edk2-devel] [PATCH 1/1] OvmfPkg/PciHotPlugInitDxe: fix io
window size

Uhmm. I assume this should be done in PciBus driver.
It will be a burden to let each PciHotPlugInitDxe to fix the smallest IO
window.

+ PciBus maintainer: Ray Ni <ray.ni@...> and Hao A Wu
<hao.a.wu@...>
What's your opinion?


-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Gerd
Hoffmann
Sent: Monday, November 28, 2022 2:26 PM
To: devel@edk2.groups.io
Cc: Oliver Steffen <osteffen@...>; Gerd Hoffmann
<kraxel@...>; Pawel Polawski <ppolawsk@...>; Ard
Biesheuvel <ardb+tianocore@...>; Justen, Jordan L
<jordan.l.justen@...>; Yao, Jiewen <jiewen.yao@...>
Subject: [edk2-devel] [PATCH 1/1] OvmfPkg/PciHotPlugInitDxe: fix io
window size

Smallest IO window size for PCI bridges is 0x1000. Add a check and
fixup the Exponent of needed. Avoids broken resource assignments
like this:

[ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x7000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x200; Alignment = 0xFFF; Owner =
PPB
[00|02|00:**]
Base = 0xC200; Length = 0x40; Alignment = 0x3F; Owner = PCI
[00|1F|03:20]
Base = 0xC240; Length = 0x20; Alignment = 0x1F; Owner = PCI
[00|1F|02:20]
[ ... ]

... which the linux kernel fixes up later:

[ 0.644657] pci 0000:00:1f.3: BAR 4: assigned [io 0x1000-0x103f]
[ 0.646833] pci 0000:00:1f.2: BAR 4: assigned [io 0x1040-0x105f]

With the patch applied:

{ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x8000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x1000; Alignment = 0xFFF;
Owner
= PPB [00|02|00:**]
Base = 0xD000; Length = 0x40; Alignment = 0x3F; Owner = PCI
[00|1F|03:20]
Base = 0xD040; Length = 0x20; Alignment = 0x1F; Owner = PCI
[00|1F|02:20]
[ ... ]

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
index 3f9c84cf2b54..6c8bbc3b199d 100644
--- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
+++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
@@ -117,6 +117,10 @@ SetIoPadding (
IN UINTN SizeExponent
)
{
+ if (SizeExponent < 12) {
+ SizeExponent = 12;
+ }
+
Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
--
2.38.1
Yao, Jiewen
 

Uhmm. I assume this should be done in PciBus driver.
It will be a burden to let each PciHotPlugInitDxe to fix the smallest IO window.

+ PciBus maintainer: Ray Ni <ray.ni@...> and Hao A Wu <hao.a.wu@...>
What's your opinion?

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Gerd
Hoffmann
Sent: Monday, November 28, 2022 2:26 PM
To: devel@edk2.groups.io
Cc: Oliver Steffen <osteffen@...>; Gerd Hoffmann
<kraxel@...>; Pawel Polawski <ppolawsk@...>; Ard
Biesheuvel <ardb+tianocore@...>; Justen, Jordan L
<jordan.l.justen@...>; Yao, Jiewen <jiewen.yao@...>
Subject: [edk2-devel] [PATCH 1/1] OvmfPkg/PciHotPlugInitDxe: fix io
window size

Smallest IO window size for PCI bridges is 0x1000. Add a check and
fixup the Exponent of needed. Avoids broken resource assignments
like this:

[ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x7000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x200; Alignment = 0xFFF; Owner = PPB
[00|02|00:**]
Base = 0xC200; Length = 0x40; Alignment = 0x3F; Owner = PCI
[00|1F|03:20]
Base = 0xC240; Length = 0x20; Alignment = 0x1F; Owner = PCI
[00|1F|02:20]
[ ... ]

... which the linux kernel fixes up later:

[ 0.644657] pci 0000:00:1f.3: BAR 4: assigned [io 0x1000-0x103f]
[ 0.646833] pci 0000:00:1f.2: BAR 4: assigned [io 0x1040-0x105f]

With the patch applied:

{ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x8000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x1000; Alignment = 0xFFF; Owner
= PPB [00|02|00:**]
Base = 0xD000; Length = 0x40; Alignment = 0x3F; Owner = PCI
[00|1F|03:20]
Base = 0xD040; Length = 0x20; Alignment = 0x1F; Owner = PCI
[00|1F|02:20]
[ ... ]

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
index 3f9c84cf2b54..6c8bbc3b199d 100644
--- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
+++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
@@ -117,6 +117,10 @@ SetIoPadding (
IN UINTN SizeExponent
)
{
+ if (SizeExponent < 12) {
+ SizeExponent = 12;
+ }
+
Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
--
2.38.1
Gerd Hoffmann
 

Smallest IO window size for PCI bridges is 0x1000. Add a check and
fixup the Exponent of needed. Avoids broken resource assignments
like this:

[ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x7000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x200; Alignment = 0xFFF; Owner = PPB [00|02|00:**]
Base = 0xC200; Length = 0x40; Alignment = 0x3F; Owner = PCI [00|1F|03:20]
Base = 0xC240; Length = 0x20; Alignment = 0x1F; Owner = PCI [00|1F|02:20]
[ ... ]

... which the linux kernel fixes up later:

[ 0.644657] pci 0000:00:1f.3: BAR 4: assigned [io 0x1000-0x103f]
[ 0.646833] pci 0000:00:1f.2: BAR 4: assigned [io 0x1040-0x105f]

With the patch applied:

{ ... ]
PciBus: Resource Map for Root Bridge PciRoot(0x0)
Type = Io16; Base = 0x6000; Length = 0x8000; Alignment = 0xFFF
[ ... ]
Base = 0xC000; Length = 0x1000; Alignment = 0xFFF; Owner = PPB [00|02|00:**]
Base = 0xD000; Length = 0x40; Alignment = 0x3F; Owner = PCI [00|1F|03:20]
Base = 0xD040; Length = 0x20; Alignment = 0x1F; Owner = PCI [00|1F|02:20]
[ ... ]

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
index 3f9c84cf2b54..6c8bbc3b199d 100644
--- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
+++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c
@@ -117,6 +117,10 @@ SetIoPadding (
IN UINTN SizeExponent
)
{
+ if (SizeExponent < 12) {
+ SizeExponent = 12;
+ }
+
Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
--
2.38.1
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