devel@edk2.groups.io | [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package

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[PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package

Ni, Ray #89872 Ankit, I see. So, the goal is to build an infrastructure that makes sure mandatory ACPI tables are always populated. I am fine with that. Thanks for the explanation. toggle quoted message Show quoted text -----Original Message----- From: Sinha, Ankit <ankit.sinha@...> Sent: Wednesday, May 18, 2022 3:02 AM To: Ni, Ray <ray.ni@...>; devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@...> Cc: Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: RE: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package Hi Ray, That is a good feedback. However, since FADT is a mandatory table to boot an ACPI compliant OS, we have placed it in the implementation of MinPlatformPkg. If we move this to be a board responsibility then we will need to implement a check in the boot process to make sure FADT is published correctly before booting to OS. Thank you, Ankit -----Original Message----- From: Ni, Ray <ray.ni@...> Sent: Tuesday, May 17, 2022 7:11 AM To: devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@...> Cc: Sinha, Ankit <ankit.sinha@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: RE: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package I am thinking if most of FADT fields are configurable through PCD from BoardPkg. Then why not remove the FADT from this open-source driver but let some code in BoardPkg produces the FADT? It helps to remove the PCD layer and simplifies the data flow from PCD- FADT to FADT. Thanks, Ray -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel Sent: Tuesday, May 17, 2022 11:19 AM To: devel@edk2.groups.io Cc: Sinha, Ankit <ankit.sinha@...>; Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package From: Ankit Sinha <ankit.sinha@...> Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot. Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: Ankit Sinha <ankit.sinha@...> --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c \| 85 ++++++++++++-------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf \| 24 ++++++ Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec \| 36 +++++++- - 3 files changed, 105 insertions(+), 40 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 05fc7799fb13..b3d067def3fa 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( // Update the creator revision // TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision); + + // + // Update the oem revision + // + TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision); } } @@ -1187,44 +1192,54 @@ PlatformUpdateTables ( case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; - FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); - FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); - FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); + FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); + FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); + FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); + FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->Gpe0BlkLen = PcdGet8 (PcdAcpiGpe0BlockLength); + FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base); + FadtHeader->DutyWidth = PcdGet8 (PcdAcpiDutyWidth); - FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); - FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->Gpe0BlkLen = 0x20; - FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize); + FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize); + FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize); + FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize); + FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bCntBlkAccessSize); + FadtHeader->XPm2CntBlk.AccessSize = PcdGet8 (PcdAcpiXPm2CntBlkAccessSize); + FadtHeader->XPmTmrBlk.AccessSize = PcdGet8 (PcdAcpiXPmTmrBlkAccessSize); + FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize); + FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize); - FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - if (FadtHeader->XPm1bEvtBlk.Address == 0) { - FadtHeader->XPm1bEvtBlk.AccessSize = 0; - } - FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - if (FadtHeader->XPm1bCntBlk.Address == 0) { - FadtHeader->XPm1bCntBlk.AccessSize = 0; - } - FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - //if (FadtHeader->XPm2CntBlk.Address == 0) { - FadtHeader->XPm2CntBlk.AccessSize = 0; - //} - FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - if (FadtHeader->XGpe1Blk.Address == 0) { - FadtHeader->XGpe1Blk.AddressSpaceId = 0; - FadtHeader->XGpe1Blk.AccessSize = 0; - } + FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId); + FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 + (PcdAcpiSleepControlRegRegisterBitOffset); + FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize); + FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress); + FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId); + FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth); + FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 + (PcdAcpiSleepStatusRegRegisterBitOffset); + FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize); + FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress); + + FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 99adf9c381c9..9d91e418d4ca 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -62,6 +62,8 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags @@ -77,7 +79,29 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse + t + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq + gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index e38617ce20fd..bfc50565144f 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -112,10 +112,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount\|8\|UINT32\|0x9000 0022 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount\|4\|UINT32\|0x90 000023 - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\| 0x9 0000025 - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x 9000 0026 - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x900 0002 7 - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize\|0 x65 \|UINT32\|0x20000500 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize\|0x30 \|UIN T32\|0x20000501 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize\|0x4 02\|U INT32\|0x20000502 @@ -245,6 +241,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount \|0x1 \|UINT8\|0x4001004E gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy \|TRUE \|BOOLEAN\|0x4001004F + + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\| 0 + x90000025 + + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x 90 + 000026 + + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x900 00 + 027 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress\|0x1800\| UINT 16\|0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress\|0x0000\| UINT 16\|0x00010036 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress\|0x180 4\|UI NT16\|0x0001037 @@ -252,7 +252,33 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress\|0x1850 \|UIN T16\|0x00010039 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress\|0x1808\|UI NT16 \|0x0001003A gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress\|0x1880\|UINT1 6\|0x 0001003B - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT1 6\|0x 0001003C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength\|0x00\|UINT8\|0x 00 + 01003C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT1 6\| + 0x0001003D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base\|0x00\|UINT8\|0x000100 40 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth\|0x00\|UINT8\|0x000100 41 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize\|0x00\|UINT8 \|0 + x00010042 + + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize\|0x00\|UI NT + 8\|0x00010043 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize\|0x00\|UI NT + 8\|0x00010044 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize\|0x00\|UI NT + 8\|0x00010045 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize\|0x00\|UI NT + 8\|0x00010046 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize\|0x00\|UIN T8 + \|0x00010047 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize\|0x00\|UINT 8\| + 0x00010048 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize\|0x00\|UINT8 \|0 + x00010049 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize\|0x00\|UINT8 \|0 + x0001004A + + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId\| 0 + x00\|UINT8\|0x0001004B + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + \|0x00\|UINT8\|0x0001004C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse + t\|0x00\|UINT8\|0x0001004D + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize\|0x00\| + UINT8\|0x0001004E + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress\|0x00000 0 + 0000000000\|UINT64\|0x0001004F + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId\|0 x + 00\|UINT8\|0x00010050 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth\| + 0x00\|UINT8\|0x00010051 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + \|0x00\|UINT8\|0x00010052 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize\|0x00\| U + INT8\|0x00010053 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress\|0x000000 0 + 000000000\|UINT64\|0x00010054 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq\|0x0000\|UINT8\|0x0001 00 + 55 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength\|0x10000000\| UIN T32\|0x0010004 gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr\|0x9f 000\|U INT32\|0x30000008 -- 2.33.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. 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Ankit Sinha #89852 Hi Ray, That is a good feedback. However, since FADT is a mandatory table to boot an ACPI compliant OS, we have placed it in the implementation of MinPlatformPkg. If we move this to be a board responsibility then we will need to implement a check in the boot process to make sure FADT is published correctly before booting to OS. Thank you, Ankit toggle quoted message Show quoted text -----Original Message----- From: Ni, Ray <ray.ni@...> Sent: Tuesday, May 17, 2022 7:11 AM To: devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@...> Cc: Sinha, Ankit <ankit.sinha@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: RE: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package I am thinking if most of FADT fields are configurable through PCD from BoardPkg. Then why not remove the FADT from this open-source driver but let some code in BoardPkg produces the FADT? It helps to remove the PCD layer and simplifies the data flow from PCD- FADT to FADT. Thanks, Ray -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel Sent: Tuesday, May 17, 2022 11:19 AM To: devel@edk2.groups.io Cc: Sinha, Ankit <ankit.sinha@...>; Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package From: Ankit Sinha <ankit.sinha@...> Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot. Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: Ankit Sinha <ankit.sinha@...> --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c \| 85 ++++++++++++-------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf \| 24 ++++++ Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec \| 36 +++++++- - 3 files changed, 105 insertions(+), 40 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 05fc7799fb13..b3d067def3fa 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( // Update the creator revision // TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision); + + // + // Update the oem revision + // + TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision); } } @@ -1187,44 +1192,54 @@ PlatformUpdateTables ( case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; - FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); - FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); - FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); + FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); + FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); + FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); + FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->Gpe0BlkLen = PcdGet8 (PcdAcpiGpe0BlockLength); + FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base); + FadtHeader->DutyWidth = PcdGet8 (PcdAcpiDutyWidth); - FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); - FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->Gpe0BlkLen = 0x20; - FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize); + FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize); + FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize); + FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize); + FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bCntBlkAccessSize); + FadtHeader->XPm2CntBlk.AccessSize = PcdGet8 (PcdAcpiXPm2CntBlkAccessSize); + FadtHeader->XPmTmrBlk.AccessSize = PcdGet8 (PcdAcpiXPmTmrBlkAccessSize); + FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize); + FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize); - FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - if (FadtHeader->XPm1bEvtBlk.Address == 0) { - FadtHeader->XPm1bEvtBlk.AccessSize = 0; - } - FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - if (FadtHeader->XPm1bCntBlk.Address == 0) { - FadtHeader->XPm1bCntBlk.AccessSize = 0; - } - FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - //if (FadtHeader->XPm2CntBlk.Address == 0) { - FadtHeader->XPm2CntBlk.AccessSize = 0; - //} - FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - if (FadtHeader->XGpe1Blk.Address == 0) { - FadtHeader->XGpe1Blk.AddressSpaceId = 0; - FadtHeader->XGpe1Blk.AccessSize = 0; - } + FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId); + FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 + (PcdAcpiSleepControlRegRegisterBitOffset); + FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize); + FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress); + FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId); + FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth); + FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 + (PcdAcpiSleepStatusRegRegisterBitOffset); + FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize); + FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress); + + FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 99adf9c381c9..9d91e418d4ca 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -62,6 +62,8 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags @@ -77,7 +79,29 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse + t + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq + gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index e38617ce20fd..bfc50565144f 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -112,10 +112,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount\|8\|UINT32\|0x9000 0022 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount\|4\|UINT32\|0x90 000023 - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\| 0x9 0000025 - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x 9000 0026 - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x900 0002 7 - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize\|0 x65 \|UINT32\|0x20000500 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize\|0x30 \|UIN T32\|0x20000501 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize\|0x4 02\|U INT32\|0x20000502 @@ -245,6 +241,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount \|0x1 \|UINT8\|0x4001004E gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy \|TRUE \|BOOLEAN\|0x4001004F + + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\| 0 + x90000025 + + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x 90 + 000026 + + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x900 00 + 027 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress\|0x1800\| UINT 16\|0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress\|0x0000\| UINT 16\|0x00010036 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress\|0x180 4\|UI NT16\|0x0001037 @@ -252,7 +252,33 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress\|0x1850 \|UIN T16\|0x00010039 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress\|0x1808\|UI NT16 \|0x0001003A gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress\|0x1880\|UINT1 6\|0x 0001003B - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT1 6\|0x 0001003C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength\|0x00\|UINT8\|0x 00 + 01003C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT1 6\| + 0x0001003D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base\|0x00\|UINT8\|0x000100 40 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth\|0x00\|UINT8\|0x000100 41 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize\|0x00\|UINT8 \|0 + x00010042 + + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize\|0x00\|UI NT + 8\|0x00010043 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize\|0x00\|UI NT + 8\|0x00010044 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize\|0x00\|UI NT + 8\|0x00010045 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize\|0x00\|UI NT + 8\|0x00010046 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize\|0x00\|UIN T8 + \|0x00010047 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize\|0x00\|UINT 8\| + 0x00010048 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize\|0x00\|UINT8 \|0 + x00010049 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize\|0x00\|UINT8 \|0 + x0001004A + + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId\| 0 + x00\|UINT8\|0x0001004B + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + \|0x00\|UINT8\|0x0001004C + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse + t\|0x00\|UINT8\|0x0001004D + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize\|0x00\| + UINT8\|0x0001004E + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress\|0x00000 0 + 0000000000\|UINT64\|0x0001004F + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId\|0 x + 00\|UINT8\|0x00010050 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth\| + 0x00\|UINT8\|0x00010051 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + \|0x00\|UINT8\|0x00010052 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize\|0x00\| U + INT8\|0x00010053 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress\|0x000000 0 + 000000000\|UINT64\|0x00010054 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq\|0x0000\|UINT8\|0x0001 00 + 55 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength\|0x10000000\| UIN T32\|0x0010004 gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr\|0x9f 000\|U INT32\|0x30000008 -- 2.33.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. 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Ni, Ray #89824 I am thinking if most of FADT fields are configurable through PCD from BoardPkg. Then why not remove the FADT from this open-source driver but let some code in BoardPkg produces the FADT? It helps to remove the PCD layer and simplifies the data flow from PCD->FADT to FADT. Thanks, Ray toggle quoted message Show quoted text -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel Sent: Tuesday, May 17, 2022 11:19 AM To: devel@edk2.groups.io Cc: Sinha, Ankit <ankit.sinha@...>; Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Gao, Liming <gaoliming@...>; Dong, Eric <eric.dong@...> Subject: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package From: Ankit Sinha <ankit.sinha@...> Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot. Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: Ankit Sinha <ankit.sinha@...> --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c \| 85 ++++++++++++-------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf \| 24 ++++++ Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec \| 36 +++++++-- 3 files changed, 105 insertions(+), 40 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 05fc7799fb13..b3d067def3fa 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( // Update the creator revision // TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision); + + // + // Update the oem revision + // + TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision); } } @@ -1187,44 +1192,54 @@ PlatformUpdateTables ( case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; - FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); - FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); - FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); + FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); + FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); + FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); + FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->Gpe0BlkLen = PcdGet8 (PcdAcpiGpe0BlockLength); + FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base); + FadtHeader->DutyWidth = PcdGet8 (PcdAcpiDutyWidth); - FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); - FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); + FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); + FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); + FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); + FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); + FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->Gpe0BlkLen = 0x20; - FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize); + FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize); + FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize); + FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize); + FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bCntBlkAccessSize); + FadtHeader->XPm2CntBlk.AccessSize = PcdGet8 (PcdAcpiXPm2CntBlkAccessSize); + FadtHeader->XPmTmrBlk.AccessSize = PcdGet8 (PcdAcpiXPmTmrBlkAccessSize); + FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize); + FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize); - FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - if (FadtHeader->XPm1bEvtBlk.Address == 0) { - FadtHeader->XPm1bEvtBlk.AccessSize = 0; - } - FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); - if (FadtHeader->XPm1bCntBlk.Address == 0) { - FadtHeader->XPm1bCntBlk.AccessSize = 0; - } - FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); - //if (FadtHeader->XPm2CntBlk.Address == 0) { - FadtHeader->XPm2CntBlk.AccessSize = 0; - //} - FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - if (FadtHeader->XGpe1Blk.Address == 0) { - FadtHeader->XGpe1Blk.AddressSpaceId = 0; - FadtHeader->XGpe1Blk.AccessSize = 0; - } + FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId); + FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegRegisterBitOffset); + FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize); + FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress); + FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId); + FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth); + FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitOffset); + FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize); + FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress); + + FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq); + FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 99adf9c381c9..9d91e418d4ca 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -62,6 +62,8 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags @@ -77,7 +79,29 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq + gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index e38617ce20fd..bfc50565144f 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -112,10 +112,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount\|8\|UINT32\|0x90000022 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount\|4\|UINT32\|0x90000023 - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\|0x90000025 - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x90000026 - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x90000027 - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize\|0x65\|UINT32\|0x20000500 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize\|0x30\|UINT32\|0x20000501 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize\|0x402\|UINT32\|0x20000502 @@ -245,6 +241,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount \|0x1 \|UINT8\|0x4001004E gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy \|TRUE \|BOOLEAN\|0x4001004F + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\|0x90000025 + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x90000026 + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x90000027 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress\|0x1800\|UINT16\|0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress\|0x0000\|UINT16\|0x00010036 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress\|0x1804\|UINT16\|0x0001037 @@ -252,7 +252,33 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress\|0x1850\|UINT16\|0x00010039 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress\|0x1808\|UINT16\|0x0001003A gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress\|0x1880\|UINT16\|0x0001003B - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT16\|0x0001003C + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength\|0x00\|UINT8\|0x0001003C + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT16\|0x0001003D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base\|0x00\|UINT8\|0x00010040 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth\|0x00\|UINT8\|0x00010041 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize\|0x00\|UINT8\|0x00010042 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize\|0x00\|UINT8\|0x00010043 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize\|0x00\|UINT8\|0x00010044 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize\|0x00\|UINT8\|0x00010045 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize\|0x00\|UINT8\|0x00010046 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize\|0x00\|UINT8\|0x00010047 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize\|0x00\|UINT8\|0x00010048 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize\|0x00\|UINT8\|0x00010049 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize\|0x00\|UINT8\|0x0001004A + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId\|0x00\|UINT8\|0x0001004B + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth\|0x00\|UINT8\|0x0001004C + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset\|0x00\|UINT8\|0x0001004D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize\|0x00\|UINT8\|0x0001004E + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress\|0x0000000000000000\|UINT64\|0x0001004F + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId\|0x00\|UINT8\|0x00010050 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth\|0x00\|UINT8\|0x00010051 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset\|0x00\|UINT8\|0x00010052 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize\|0x00\|UINT8\|0x00010053 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress\|0x0000000000000000\|UINT64\|0x00010054 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq\|0x0000\|UINT8\|0x00010055 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength\|0x10000000\|UINT32\|0x0010004 gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr\|0x9f000\|UINT32\|0x30000008 -- 2.33.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. 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Chiu, Chasel #89792 From: Ankit Sinha <ankit.sinha@...> Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot. Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: Ankit Sinha <ankit.sinha@...> --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c \| 85 ++++++= ++++++-------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf \| 24 ++++++ Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec \| 36 ++++++= +-- 3 files changed, 105 insertions(+), 40 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 05fc7799fb13..b3d067def3fa 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( // Update the creator revision=0D //=0D TableHeader->CreatorRevision =3D PcdGet32(PcdAcpiDefaultCreatorRevis= ion);=0D +=0D + //=0D + // Update the oem revision=0D + //=0D + TableHeader->OemRevision =3D PcdGet32(PcdAcpiDefaultOemRevision);=0D }=0D }=0D =0D @@ -1187,44 +1192,54 @@ PlatformUpdateTables ( case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:=0D FadtHeader =3D (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table;=0D =0D - FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPreferredPmProfile)= ;=0D - FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtIaPcBootArch);=0D - FadtHeader->Flags =3D PcdGet32 (PcdFadtFlags);=0D + FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPref= erredPmProfile);=0D + FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtIaP= cBootArch);=0D + FadtHeader->Flags =3D PcdGet32 (PcdFadtFla= gs);=0D + FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEnab= leSwSmi);=0D + FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDisa= bleSwSmi);=0D + FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress);=0D + FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiPm1= BEventBlockAddress);=0D + FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiPm1= AControlBlockAddress);=0D + FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiPm1= BControlBlockAddress);=0D + FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiPm2= ControlBlockAddress);=0D + FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiPmT= imerBlockAddress);=0D + FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiGpe= 0BlockAddress);=0D + FadtHeader->Gpe0BlkLen =3D PcdGet8 (PcdAcpiGpe0= BlockLength);=0D + FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiGpe= 1BlockAddress);=0D + FadtHeader->Gpe1Base =3D PcdGet8 (PcdAcpiGpe1= Base);=0D + FadtHeader->DutyWidth =3D PcdGet8 (PcdAcpiDuty= Width);=0D =0D - FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEnableSwSmi);=0D - FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDisableSwSmi);=0D + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress);=0D + FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiPm1= AControlBlockAddress);=0D + FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiPm1= BControlBlockAddress);=0D + FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiPm2= ControlBlockAddress);=0D + FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiPmT= imerBlockAddress);=0D + FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiGpe= 0BlockAddress);=0D + FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiGpe= 1BlockAddress);=0D =0D - FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiPm1AEventBlockAddress);=0D - FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiPm1BEventBlockAddress);=0D - FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiPm1AControlBlockAddress);= =0D - FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiPm1BControlBlockAddress);= =0D - FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiPm2ControlBlockAddress);=0D - FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiPmTimerBlockAddress);=0D - FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiGpe0BlockAddress);=0D - FadtHeader->Gpe0BlkLen =3D 0x20;=0D - FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiGpe1BlockAddress);=0D + FadtHeader->ResetReg.AccessSize =3D PcdGet8 (PcdAcpiRese= tRegAccessSize);=0D + FadtHeader->XPm1aEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= aEvtBlkAccessSize);=0D + FadtHeader->XPm1bEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= bEvtBlkAccessSize);=0D + FadtHeader->XPm1aCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= aCntBlkAccessSize);=0D + FadtHeader->XPm1bCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= bCntBlkAccessSize);=0D + FadtHeader->XPm2CntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm2= CntBlkAccessSize);=0D + FadtHeader->XPmTmrBlk.AccessSize =3D PcdGet8 (PcdAcpiXPmT= mrBlkAccessSize);=0D + FadtHeader->XGpe0Blk.AccessSize =3D PcdGet8 (PcdAcpiXGpe= 0BlkAccessSize);=0D + FadtHeader->XGpe1Blk.AccessSize =3D PcdGet8 (PcdAcpiXGpe= 1BlkAccessSize);=0D =0D - FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1AEventBlockAdd= ress);=0D - FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1BEventBlockAdd= ress);=0D - if (FadtHeader->XPm1bEvtBlk.Address =3D=3D 0) {=0D - FadtHeader->XPm1bEvtBlk.AccessSize =3D 0;=0D - }=0D - FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiPm1AControlBlockA= ddress);=0D - FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiPm1BControlBlockA= ddress);=0D - if (FadtHeader->XPm1bCntBlk.Address =3D=3D 0) {=0D - FadtHeader->XPm1bCntBlk.AccessSize =3D 0;=0D - }=0D - FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiPm2ControlBlockAd= dress);=0D - //if (FadtHeader->XPm2CntBlk.Address =3D=3D 0) {=0D - FadtHeader->XPm2CntBlk.AccessSize =3D 0;=0D - //}=0D - FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiPmTimerBlockAddre= ss);=0D - FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiGpe0BlockAddress)= ;=0D - FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiGpe1BlockAddress)= ;=0D - if (FadtHeader->XGpe1Blk.Address =3D=3D 0) {=0D - FadtHeader->XGpe1Blk.AddressSpaceId =3D 0;=0D - FadtHeader->XGpe1Blk.AccessSize =3D 0;=0D - }=0D + FadtHeader->SleepControlReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSlee= pControlRegAddressSpaceId);=0D + FadtHeader->SleepControlReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSlee= pControlRegRegisterBitOffset);=0D + FadtHeader->SleepControlReg.AccessSize =3D PcdGet8 (PcdAcpiSlee= pControlRegAccessSize);=0D + FadtHeader->SleepControlReg.Address =3D PcdGet64 (PcdAcpiSle= epControlRegAddress);=0D + FadtHeader->SleepStatusReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSlee= pStatusRegAddressSpaceId);=0D + FadtHeader->SleepStatusReg.RegisterBitWidth =3D PcdGet8 (PcdAcpiSlee= pStatusRegRegisterBitWidth);=0D + FadtHeader->SleepStatusReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSlee= pStatusRegRegisterBitOffset);=0D + FadtHeader->SleepStatusReg.AccessSize =3D PcdGet8 (PcdAcpiSlee= pStatusRegAccessSize);=0D + FadtHeader->SleepStatusReg.Address =3D PcdGet64 (PcdAcpiSle= epStatusRegAddress);=0D +=0D + FadtHeader->S4BiosReq =3D PcdGet8 (PcdAcpiS4Bi= osReq);=0D + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress);=0D + FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= BEventBlockAddress);=0D =0D DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table));=0D DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)= );=0D diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf= b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 99adf9c381c9..9d91e418d4ca 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -62,6 +62,8 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount=0D =0D gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth=0D gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch=0D gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags=0D =0D @@ -77,7 +79,29 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq=0D +=0D =0D gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress=0D gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress=0D diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index e38617ce20fd..bfc50565144f 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -112,10 +112,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount\|8\|UINT32\|0x90000022=0D gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount\|4\|UINT32\|0x90000023=0D =0D - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\|0x900= 00025=0D - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x900000= 26=0D - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x90000027= =0D -=0D gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize\|0x65\|U= INT32\|0x20000500=0D gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize\|0x30\|UINT3= 2\|0x20000501=0D gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize\|0x402\|UIN= T32\|0x20000502=0D @@ -245,6 +241,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount \|0x1 \|UI= NT8\|0x4001004E=0D gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy \|TRUE \|BOOL= EAN\|0x4001004F=0D =0D + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile\|0x02\|UINT8\|0x900= 00025=0D + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch\|0x0001\|UINT16\|0x900000= 26=0D + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags\|0x000086A5\|UINT32\|0x90000027= =0D +=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress\|0x1800\|UINT16= \|0x00010035=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress\|0x0000\|UINT16= \|0x00010036=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress\|0x1804\|UINT= 16\|0x0001037=0D @@ -252,7 +252,33 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress\|0x1850\|UINT1= 6\|0x00010039=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress\|0x1808\|UINT16\|0= x0001003A=0D gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress\|0x1880\|UINT16\|0x00= 01003B=0D - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT16\|0x00= 01003C=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength\|0x00\|UINT8\|0x000100= 3C=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress\|0x0000\|UINT16\|0x00= 01003D=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base\|0x00\|UINT8\|0x00010040=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth\|0x00\|UINT8\|0x00010041=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize\|0x00\|UINT8\|0x000= 10042=0D +=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize\|0x00\|UINT8\|0x= 00010043=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize\|0x00\|UINT8\|0x= 00010044=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize\|0x00\|UINT8\|0x= 00010045=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize\|0x00\|UINT8\|0x= 00010046=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize\|0x00\|UINT8\|0x0= 0010047=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize\|0x00\|UINT8\|0x00= 010048=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize\|0x00\|UINT8\|0x000= 10049=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize\|0x00\|UINT8\|0x000= 1004A=0D +=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId\|0x00\|= UINT8\|0x0001004B=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth\|0x0= 0\|UINT8\|0x0001004C=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset\|0x= 00\|UINT8\|0x0001004D=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize\|0x00\|UINT= 8\|0x0001004E=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress\|0x0000000000= 000000\|UINT64\|0x0001004F=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId\|0x00\|U= INT8\|0x00010050=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth\|0x00= \|UINT8\|0x00010051=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset\|0x0= 0\|UINT8\|0x00010052=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize\|0x00\|UINT8= \|0x00010053=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress\|0x00000000000= 00000\|UINT64\|0x00010054=0D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq\|0x0000\|UINT8\|0x00010055=0D +=0D =0D gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength\|0x10000000\|UINT3= 2\|0x0010004=0D gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr\|0x9f000\|UIN= T32\|0x30000008=0D --=20 2.33.0.windows.1
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