[staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.


Chao Li
 

Implement LoongArch CPU related functions in BaseCpuLib.

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>

Signed-off-by: Chao Li <lichao@...>
---
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 +++++++++++++++
MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 +++++++++++++++
4 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/Base=
CpuLib/BaseCpuLib.inf
index 950f5229b2..3101fc656e 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -8,6 +8,7 @@
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>=
=0D
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>=0D
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ=
ts reserved.<BR>=0D
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A=
ll rights reserved.<BR>=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -25,7 +26,7 @@
=0D
=0D
#=0D
-# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64=0D
+# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 LOON=
GARCH64=0D
#=0D
=0D
[Sources.IA32]=0D
@@ -63,6 +64,10 @@
[Sources.RISCV64]=0D
RiscV/Cpu.S=0D
=0D
+[Sources.LOONGARCH64]=0D
+ LoongArch/CpuFlushTlb.S | GCC=0D
+ LoongArch/CpuSleep.S | GCC=0D
+=0D
[Packages]=0D
MdePkg/MdePkg.dec=0D
=0D
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/Base=
CpuLib/BaseCpuLib.uni
index 80dc495786..7c5c8dfb37 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,13 +1,14 @@
// /** @file=0D
// Instance of CPU Library for various architecture.=0D
//=0D
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,=
=0D
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and=
LoongArch64,=0D
// PAL CALLs for IPF, and empty functions for EBC.=0D
//=0D
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>=
=0D
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>=
=0D
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>=0D
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ=
ts reserved.<BR>=0D
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A=
ll rights reserved.<BR>=0D
//=0D
// SPDX-License-Identifier: BSD-2-Clause-Patent=0D
//=0D
@@ -16,5 +17,5 @@
=0D
#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU L=
ibrary for various architectures"=0D
=0D
-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library imple=
mented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, a=
nd empty functions for EBC."=0D
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library imple=
mented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL CAL=
Ls for IPF, and empty functions for EBC."=0D
=0D
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S b/MdePkg/Lib=
rary/BaseCpuLib/LoongArch/CpuFlushTlb.S
new file mode 100644
index 0000000000..8b792f0a37
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
@@ -0,0 +1,15 @@
+#-------------------------------------------------------------------------=
-----=0D
+#=0D
+# CpuFlushTlb() for LoongArch64=0D
+#=0D
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights =
reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+#-------------------------------------------------------------------------=
-----=0D
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)=0D
+=0D
+ASM_PFX(CpuFlushTlb):=0D
+ tlbflush=0D
+ jirl $zero, $ra, 0=0D
+ .end=0D
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S b/MdePkg/Librar=
y/BaseCpuLib/LoongArch/CpuSleep.S
new file mode 100644
index 0000000000..eb31b10714
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
@@ -0,0 +1,15 @@
+#-------------------------------------------------------------------------=
-----=0D
+#=0D
+# CpuSleep() for LoongArch64=0D
+#=0D
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights =
reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+#-------------------------------------------------------------------------=
-----=0D
+ASM_GLOBAL ASM_PFX(CpuSleep)=0D
+=0D
+ASM_PFX(CpuSleep):=0D
+ idle 0=0D
+ jirl $zero, $ra, 0=0D
+ .end=0D
--=20
2.27.0


Abner Chang
 

Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.

Thanks
Abner

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
Sent: Wednesday, February 9, 2022 2:56 PM
To: devel@edk2.groups.io
Cc: Michael D Kinney <michael.d.kinney@...>; Liming Gao
<gaoliming@...>; Zhiguang Liu <zhiguang.liu@...>
Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.

Implement LoongArch CPU related functions in BaseCpuLib.

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>

Signed-off-by: Chao Li <lichao@...>
---
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
+++++++++++++++
MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
+++++++++++++++
4 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 950f5229b2..3101fc656e 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -8,6 +8,7 @@
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -25,7 +26,7 @@


#
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
LOONGARCH64
#

[Sources.IA32]
@@ -63,6 +64,10 @@
[Sources.RISCV64]
RiscV/Cpu.S

+[Sources.LOONGARCH64]
+ LoongArch/CpuFlushTlb.S | GCC
+ LoongArch/CpuSleep.S | GCC
+
[Packages]
MdePkg/MdePkg.dec

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index 80dc495786..7c5c8dfb37 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,13 +1,14 @@
// /** @file
// Instance of CPU Library for various architecture.
//
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
and LoongArch64,
// PAL CALLs for IPF, and empty functions for EBC.
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -16,5 +17,5 @@

#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
Library for various architectures"

-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
IPF, and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
PAL CALLs for IPF, and empty functions for EBC."

diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
new file mode 100644
index 0000000000..8b792f0a37
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
@@ -0,0 +1,15 @@
+#------------------------------------------------------------------------------
+#
+# CpuFlushTlb() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+ASM_PFX(CpuFlushTlb):
+ tlbflush
+ jirl $zero, $ra, 0
+ .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
new file mode 100644
index 0000000000..eb31b10714
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
@@ -0,0 +1,15 @@
+#------------------------------------------------------------------------------
+#
+# CpuSleep() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+ASM_PFX(CpuSleep):
+ idle 0
+ jirl $zero, $ra, 0
+ .end
--
2.27.0





Chao Li
 

Hi Abner,

You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned.

--
Thanks,
Chao
------------------------


On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@...> wrote:
Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.

Thanks
Abner

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <michael.d.kinney@...>; Liming Gao
> <gaoliming@...>; Zhiguang Liu <zhiguang.liu@...>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
>
> Implement LoongArch CPU related functions in BaseCpuLib.
>
> Cc: Michael D Kinney <michael.d.kinney@...>
> Cc: Liming Gao <gaoliming@...>
> Cc: Zhiguang Liu <zhiguang.liu@...>
>
> Signed-off-by: Chao Li <lichao@...>
> ---
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> +++++++++++++++
> MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> +++++++++++++++
> 4 files changed, 39 insertions(+), 3 deletions(-)
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> index 950f5229b2..3101fc656e 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> @@ -8,6 +8,7 @@
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -25,7 +26,7 @@
>
>
> #
> -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> LOONGARCH64
> #
>
> [Sources.IA32]
> @@ -63,6 +64,10 @@
> [Sources.RISCV64]
> RiscV/Cpu.S
>
> +[Sources.LOONGARCH64]
> + LoongArch/CpuFlushTlb.S | GCC
> + LoongArch/CpuSleep.S | GCC
> +
> [Packages]
> MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> index 80dc495786..7c5c8dfb37 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> @@ -1,13 +1,14 @@
> // /** @file
> // Instance of CPU Library for various architecture.
> //
> -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> and LoongArch64,
> // PAL CALLs for IPF, and empty functions for EBC.
> //
> // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> All rights reserved.<BR>
> //
> // SPDX-License-Identifier: BSD-2-Clause-Patent
> //
> @@ -16,5 +17,5 @@
>
> #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> Library for various architectures"
>
> -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> IPF, and empty functions for EBC."
> +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> PAL CALLs for IPF, and empty functions for EBC."
>
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> new file mode 100644
> index 0000000000..8b792f0a37
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuFlushTlb() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> +
> +ASM_PFX(CpuFlushTlb):
> + tlbflush
> + jirl $zero, $ra, 0
> + .end
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> new file mode 100644
> index 0000000000..eb31b10714
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuSleep() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuSleep)
> +
> +ASM_PFX(CpuSleep):
> + idle 0
> + jirl $zero, $ra, 0
> + .end
> --
> 2.27.0
>
>
>
>


Abner Chang
 

Hi Li,
Maybe I forget to attach it. The cover letter of that CpuLib patch set attached.

Regards,
Abner

From: Chao Li <lichao@...>
Sent: Wednesday, April 13, 2022 11:17 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>; Michael D Kinney <michael.d.kinney@...>; Liming Gao <gaoliming@...>; Zhiguang Liu <zhiguang.liu@...>
Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
 
Hi Abner,

You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned.

--
Thanks,
Chao
------------------------


On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@...> wrote:

Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.

Thanks
Abner

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <michael.d.kinney@...>; Liming Gao
> <gaoliming@...>; Zhiguang Liu <zhiguang.liu@...>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
>
> Implement LoongArch CPU related functions in BaseCpuLib.
>
> Cc: Michael D Kinney <michael.d.kinney@...>
> Cc: Liming Gao <gaoliming@...>
> Cc: Zhiguang Liu <zhiguang.liu@...>
>
> Signed-off-by: Chao Li <lichao@...>
> ---
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> +++++++++++++++
> MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> +++++++++++++++
> 4 files changed, 39 insertions(+), 3 deletions(-)
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> index 950f5229b2..3101fc656e 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> @@ -8,6 +8,7 @@
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -25,7 +26,7 @@
>
>
> #
> -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> LOONGARCH64
> #
>
> [Sources.IA32]
> @@ -63,6 +64,10 @@
> [Sources.RISCV64]
> RiscV/Cpu.S
>
> +[Sources.LOONGARCH64]
> + LoongArch/CpuFlushTlb.S | GCC
> + LoongArch/CpuSleep.S | GCC
> +
> [Packages]
> MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> index 80dc495786..7c5c8dfb37 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> @@ -1,13 +1,14 @@
> // /** @file
> // Instance of CPU Library for various architecture.
> //
> -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> and LoongArch64,
> // PAL CALLs for IPF, and empty functions for EBC.
> //
> // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> All rights reserved.<BR>
> //
> // SPDX-License-Identifier: BSD-2-Clause-Patent
> //
> @@ -16,5 +17,5 @@
>
> #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> Library for various architectures"
>
> -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> IPF, and empty functions for EBC."
> +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> PAL CALLs for IPF, and empty functions for EBC."
>
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> new file mode 100644
> index 0000000000..8b792f0a37
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuFlushTlb() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> +
> +ASM_PFX(CpuFlushTlb):
> + tlbflush
> + jirl $zero, $ra, 0
> + .end
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> new file mode 100644
> index 0000000000..eb31b10714
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuSleep() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuSleep)
> +
> +ASM_PFX(CpuSleep):
> + idle 0
> + jirl $zero, $ra, 0
> + .end
> --
> 2.27.0
>
>
>
>