[PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY


Vikas Singh
 

This patch enables the use of ConfigurationManager (CM) and
its services to leverage the Dynamic ACPI support for NXP's
LS1046aFrwy platform.

Signed-off-by: Vikas Singh <vikas.singh@puresoftware.com>
---
Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++
Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++
Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++
Silicon/NXP/LS1046A/LS1046A.dsc.inc | 11 ++
4 files changed, 204 insertions(+)

diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/=
LS1046aFrwyPkg/Include/Platform.h
new file mode 100644
index 0000000000..3c68d65cd3
--- /dev/null
+++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
@@ -0,0 +1,152 @@
+/** @file=0D
+ * Platform headers=0D
+ *=0D
+ * Copyright 2021 NXP=0D
+ * Copyright 2021 Puresoftware Ltd=0D
+ *=0D
+ * SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+ *=0D
+**/=0D
+=0D
+=0D
+#ifndef LS1046AFRWY_PLATFORM_H=0D
+#define LS1046AFRWY_PLATFORM_H=0D
+=0D
+#define EFI_ACPI_ARM_OEM_REVISION 0x00000000=0D
+=0D
+// Soc defines=0D
+#define PLAT_SOC_NAME "LS1046AFRWY"=0D
+=0D
+// Gic=0D
+#define GIC_VERSION 2=0D
+#define GICD_BASE 0x1410000=0D
+#define GICC_BASE 0x142f000=0D
+#define GICH_BASE 0x1440000=0D
+#define GICV_BASE 0x1460000=0D
+=0D
+// UART=0D
+#define UART0_BASE 0x21C0500=0D
+#define UART0_IT 86=0D
+#define UART0_LENGTH 0x100=0D
+#define SPCR_FLOW_CONTROL_NONE 0=0D
+=0D
+// Timer=0D
+#define TIMER_BLOCK_COUNT 1=0D
+#define TIMER_FRAME_COUNT 4=0D
+#define TIMER_WATCHDOG_COUNT 1=0D
+#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase=0D
+#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase=0D
+#define TIMER_SEC_IT 29=0D
+#define TIMER_NON_SEC_IT 30=0D
+#define TIMER_VIRT_IT 27=0D
+#define TIMER_HYP_IT 26=0D
+#define TIMER_FRAME0_IT 78=0D
+#define TIMER_FRAME1_IT 79=0D
+#define TIMER_FRAME2_IT 92=0D
+=0D
+// Mcfg=0D
+#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000=0D
+#define LS1046A_PCI_SEG0 0x0=0D
+#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0=0D
+#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff=0D
+#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000=0D
+#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000=0D
+#define LS1046A_PCI_SEG1 0x1=0D
+#define LS1046A_PCI_SEG2 0x2=0D
+=0D
+// Platform specific info needed by Configuration Manager=0D
+=0D
+#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ')=0D
+=0D
+// Specify the OEM defined tables=0D
+#define OEM_ACPI_TABLES 0=0D
+=0D
+#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0=0D
+#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE=0D
+#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1=0D
+#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN=0D
+#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX=0D
+#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE=0D
+#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2=0D
+=0D
+#define PLAT_GIC_VERSION GIC_VERSION=0D
+#define PLAT_GICD_BASE GICD_BASE=0D
+#define PLAT_GICI_BASE GICI_BASE=0D
+#define PLAT_GICR_BASE GICR_BASE=0D
+#define PLAT_GICR_LEN GICR_LEN=0D
+#define PLAT_GICC_BASE GICC_BASE=0D
+#define PLAT_GICH_BASE GICH_BASE=0D
+#define PLAT_GICV_BASE GICV_BASE=0D
+=0D
+#define PLAT_CPU_COUNT 4=0D
+#define PLAT_GTBLOCK_COUNT 0=0D
+#define PLAT_GTFRAME_COUNT 0=0D
+#define PLAT_PCI_CONFG_COUNT 2=0D
+=0D
+#define PLAT_WATCHDOG_COUNT 0=0D
+#define PLAT_GIC_REDISTRIBUTOR_COUNT 0=0D
+#define PLAT_GIC_ITS_COUNT 0=0D
+=0D
+/* GIC CPU Interface information=0D
+ GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency=
)=0D
+ */=0D
+#define PLAT_GIC_CPU_INTERFACE { \=0D
+ GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \=0D
+ GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \=0D
+ GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \=0D
+ GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \=0D
+}=0D
+=0D
+#define PLAT_WATCHDOG_INFO \=0D
+ { \=0D
+ } \=0D
+=0D
+#define PLAT_TIMER_BLOCK_INFO \=0D
+ { \=0D
+ } \=0D
+=0D
+#define PLAT_TIMER_FRAME_INFO \=0D
+ { \=0D
+ } \=0D
+=0D
+#define PLAT_GIC_DISTRIBUTOR_INFO \=0D
+ { \=0D
+ PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \=0D
+ 0, /* UINT32 SystemVectorBase */ \=0D
+ PLAT_GIC_VERSION /* UINT8 GicVersion */ \=0D
+ } \=0D
+=0D
+#define PLAT_GIC_REDISTRIBUTOR_INFO \=0D
+ { \=0D
+ } \=0D
+=0D
+#define PLAT_GIC_ITS_INFO \=0D
+ { \=0D
+ } \=0D
+=0D
+#define PLAT_MCFG_INFO \=0D
+ { \=0D
+ { \=0D
+ PLAT_PCI_SEG1_CONFIG_BASE, \=0D
+ PLAT_PCI_SEG1, \=0D
+ PLAT_PCI_SEG_BUSNUM_MIN, \=0D
+ PLAT_PCI_SEG_BUSNUM_MAX, \=0D
+ }, \=0D
+ { \=0D
+ PLAT_PCI_SEG2_CONFIG_BASE, \=0D
+ PLAT_PCI_SEG2, \=0D
+ PLAT_PCI_SEG_BUSNUM_MIN, \=0D
+ PLAT_PCI_SEG_BUSNUM_MAX, \=0D
+ } \=0D
+ } \=0D
+=0D
+#define PLAT_SPCR_INFO =
\=0D
+ { =
\=0D
+ UART0_BASE, =
\=0D
+ UART0_IT, =
\=0D
+ 115200, =
\=0D
+ 0, =
\=0D
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 =
\=0D
+ } =
\=0D
+=0D
+#endif // LS1046AFRWY_PLATFORM_H=0D
diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/=
LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
index 67cf15cbe4..20111e6037 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
@@ -3,6 +3,7 @@
# LS1046AFRWY Board package.=0D
#=0D
# Copyright 2019-2020 NXP=0D
+# Copyright 2021 Puresoftware Ltd=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -22,10 +23,18 @@
OUTPUT_DIRECTORY =3D Build/LS1046aFrwyPkg=0D
FLASH_DEFINITION =3D Platform/NXP/LS1046aFrwyPkg/LS1046aFr=
wyPkg.fdf=0D
=0D
+ # This flag controls the dynamic acpi generation=0D
+ #=0D
+ DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE=0D
+=0D
!include Silicon/NXP/NxpQoriqLs.dsc.inc=0D
!include MdePkg/MdeLibs.dsc.inc=0D
!include Silicon/NXP/LS1046A/LS1046A.dsc.inc=0D
=0D
+!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D
+ !include DynamicTablesPkg/DynamicTables.dsc.inc=0D
+!endif=0D
+=0D
[LibraryClasses.common]=0D
ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPla=
tformLib.inf=0D
RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualReal=
TimeClockLib.inf=0D
@@ -46,4 +55,23 @@
=0D
Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf=0D
=0D
+ #=0D
+ # Dynamic Table Factory=0D
+ !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D
+ DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe=
.inf {=0D
+ <LibraryClasses>=0D
+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibA=
rm.inf=0D
+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibA=
rm.inf=0D
+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibA=
rm.inf=0D
+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibA=
rm.inf=0D
+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibA=
rm.inf=0D
+ }=0D
+ !endif=0D
+=0D
+ #=0D
+ # Acpi Support=0D
+ #=0D
+ MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf=0D
+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf=0D
+=0D
##=0D
diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/=
LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
index 34c4e5a025..f3cac033bc 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
@@ -3,6 +3,7 @@
# FLASH layout file for LS1046a board.=0D
#=0D
# Copyright 2019-2020 NXP=0D
+# Copyright 2021 Puresoftware Ltd=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -99,6 +100,18 @@ READ_LOCK_STATUS =3D TRUE
INF MdeModulePkg/Universal/Metronome/Metronome.inf=0D
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D
=0D
+=0D
+ #=0D
+ # Acpi Support=0D
+ #=0D
+ INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf=0D
+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf=0D
+=0D
+ !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D
+ INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Confi=
gurationManagerDxe.inf=0D
+ !include DynamicTablesPkg/DynamicTables.fdf.inc=0D
+ !endif=0D
+=0D
#=0D
# Multiple Console IO support=0D
#=0D
diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10=
46A.dsc.inc
index 7004533ed5..caebb321d0 100644
--- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc
+++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
@@ -2,6 +2,7 @@
# LS1046A Soc package.=0D
#=0D
# Copyright 2017-2020 NXP=0D
+# Copyright 2021-2021 Puresoftware Ltd=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -48,4 +49,14 @@
[Components.common]=0D
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf=0D
=0D
+#=0D
+# Configuration Manager=0D
+!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D
+ Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configurati=
onManagerDxe.inf {=0D
+ <BuildOptions>=0D
+ *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/=
Include=0D
+ *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include=
=0D
+ }=0D
+!endif=0D
+=0D
##=0D
--=20
2.25.1


Sunny Wang
 

Hi Vikas,

Just have two comments below. Others look good to me.
1. In LS1046aFrwyPkg.dsc, since you already include DynamicTablesPkg/DynamicTables.dsc.inc, I think we need to remove DynamicTableFactoryDxe.inf code block. Could you check this?
2. Remove " DEFINE DYNAMIC_ACPI_ENABLE = TRUE ". In our offline discussion, this would cause some build problems with the current CM implementation (Multiple NXP platforms share One CM folder).

Best Regards,
Sunny Wang

-----Original Message-----
From: Vikas Singh <vikas.singh@puresoftware.com>
Sent: Friday, June 18, 2021 11:28 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <Sami.Mujawar@arm.com>; leif@nuviainc.com; Meenakshi Aggarwal (meenakshi.aggarwal@nxp.com) <meenakshi.aggarwal@nxp.com>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; V Sethi (v.sethi@nxp.com) <v.sethi@nxp.com>; arokia.samy <arokia.samy@puresoftware.com>; kuldip.dwivedi@puresoftware.com; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; vikas.singh@nxp.com; Sunny Wang <Sunny.Wang@arm.com>
Subject: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY

This patch enables the use of ConfigurationManager (CM) and
its services to leverage the Dynamic ACPI support for NXP's
LS1046aFrwy platform.

Signed-off-by: Vikas Singh <vikas.singh@puresoftware.com>
---
Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++
Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++
Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++
Silicon/NXP/LS1046A/LS1046A.dsc.inc | 11 ++
4 files changed, 204 insertions(+)

diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
new file mode 100644
index 0000000000..3c68d65cd3
--- /dev/null
+++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
@@ -0,0 +1,152 @@
+/** @file

+ * Platform headers

+ *

+ * Copyright 2021 NXP

+ * Copyright 2021 Puresoftware Ltd

+ *

+ * SPDX-License-Identifier: BSD-2-Clause-Patent

+ *

+**/

+

+

+#ifndef LS1046AFRWY_PLATFORM_H

+#define LS1046AFRWY_PLATFORM_H

+

+#define EFI_ACPI_ARM_OEM_REVISION 0x00000000

+

+// Soc defines

+#define PLAT_SOC_NAME "LS1046AFRWY"

+

+// Gic

+#define GIC_VERSION 2

+#define GICD_BASE 0x1410000

+#define GICC_BASE 0x142f000

+#define GICH_BASE 0x1440000

+#define GICV_BASE 0x1460000

+

+// UART

+#define UART0_BASE 0x21C0500

+#define UART0_IT 86

+#define UART0_LENGTH 0x100

+#define SPCR_FLOW_CONTROL_NONE 0

+

+// Timer

+#define TIMER_BLOCK_COUNT 1

+#define TIMER_FRAME_COUNT 4

+#define TIMER_WATCHDOG_COUNT 1

+#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase

+#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase

+#define TIMER_SEC_IT 29

+#define TIMER_NON_SEC_IT 30

+#define TIMER_VIRT_IT 27

+#define TIMER_HYP_IT 26

+#define TIMER_FRAME0_IT 78

+#define TIMER_FRAME1_IT 79

+#define TIMER_FRAME2_IT 92

+

+// Mcfg

+#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000

+#define LS1046A_PCI_SEG0 0x0

+#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0

+#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff

+#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000

+#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000

+#define LS1046A_PCI_SEG1 0x1

+#define LS1046A_PCI_SEG2 0x2

+

+// Platform specific info needed by Configuration Manager

+

+#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ')

+

+// Specify the OEM defined tables

+#define OEM_ACPI_TABLES 0

+

+#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0

+#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE

+#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1

+#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN

+#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX

+#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE

+#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2

+

+#define PLAT_GIC_VERSION GIC_VERSION

+#define PLAT_GICD_BASE GICD_BASE

+#define PLAT_GICI_BASE GICI_BASE

+#define PLAT_GICR_BASE GICR_BASE

+#define PLAT_GICR_LEN GICR_LEN

+#define PLAT_GICC_BASE GICC_BASE

+#define PLAT_GICH_BASE GICH_BASE

+#define PLAT_GICV_BASE GICV_BASE

+

+#define PLAT_CPU_COUNT 4

+#define PLAT_GTBLOCK_COUNT 0

+#define PLAT_GTFRAME_COUNT 0

+#define PLAT_PCI_CONFG_COUNT 2

+

+#define PLAT_WATCHDOG_COUNT 0

+#define PLAT_GIC_REDISTRIBUTOR_COUNT 0

+#define PLAT_GIC_ITS_COUNT 0

+

+/* GIC CPU Interface information

+ GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency)

+ */

+#define PLAT_GIC_CPU_INTERFACE { \

+ GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \

+ GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \

+ GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \

+ GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \

+}

+

+#define PLAT_WATCHDOG_INFO \

+ { \

+ } \

+

+#define PLAT_TIMER_BLOCK_INFO \

+ { \

+ } \

+

+#define PLAT_TIMER_FRAME_INFO \

+ { \

+ } \

+

+#define PLAT_GIC_DISTRIBUTOR_INFO \

+ { \

+ PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \

+ 0, /* UINT32 SystemVectorBase */ \

+ PLAT_GIC_VERSION /* UINT8 GicVersion */ \

+ } \

+

+#define PLAT_GIC_REDISTRIBUTOR_INFO \

+ { \

+ } \

+

+#define PLAT_GIC_ITS_INFO \

+ { \

+ } \

+

+#define PLAT_MCFG_INFO \

+ { \

+ { \

+ PLAT_PCI_SEG1_CONFIG_BASE, \

+ PLAT_PCI_SEG1, \

+ PLAT_PCI_SEG_BUSNUM_MIN, \

+ PLAT_PCI_SEG_BUSNUM_MAX, \

+ }, \

+ { \

+ PLAT_PCI_SEG2_CONFIG_BASE, \

+ PLAT_PCI_SEG2, \

+ PLAT_PCI_SEG_BUSNUM_MIN, \

+ PLAT_PCI_SEG_BUSNUM_MAX, \

+ } \

+ } \

+

+#define PLAT_SPCR_INFO \

+ { \

+ UART0_BASE, \

+ UART0_IT, \

+ 115200, \

+ 0, \

+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 \

+ } \

+

+#endif // LS1046AFRWY_PLATFORM_H

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
index 67cf15cbe4..20111e6037 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
@@ -3,6 +3,7 @@
# LS1046AFRWY Board package.

#

# Copyright 2019-2020 NXP

+# Copyright 2021 Puresoftware Ltd

#

# SPDX-License-Identifier: BSD-2-Clause-Patent

#

@@ -22,10 +23,18 @@
OUTPUT_DIRECTORY = Build/LS1046aFrwyPkg

FLASH_DEFINITION = Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf



+ # This flag controls the dynamic acpi generation

+ #

+ DEFINE DYNAMIC_ACPI_ENABLE = TRUE

+

!include Silicon/NXP/NxpQoriqLs.dsc.inc

!include MdePkg/MdeLibs.dsc.inc

!include Silicon/NXP/LS1046A/LS1046A.dsc.inc



+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+ !include DynamicTablesPkg/DynamicTables.dsc.inc

+!endif

+

[LibraryClasses.common]

ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf

RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf

@@ -46,4 +55,23 @@


Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf



+ #

+ # Dynamic Table Factory

+ !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+ DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf {

+ <LibraryClasses>

+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf

+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf

+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf

+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf

+ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.inf

+ }

+ !endif

+

+ #

+ # Acpi Support

+ #

+ MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

##

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
index 34c4e5a025..f3cac033bc 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
@@ -3,6 +3,7 @@
# FLASH layout file for LS1046a board.

#

# Copyright 2019-2020 NXP

+# Copyright 2021 Puresoftware Ltd

#

# SPDX-License-Identifier: BSD-2-Clause-Patent

#

@@ -99,6 +100,18 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Metronome/Metronome.inf

INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf



+

+ #

+ # Acpi Support

+ #

+ INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

+ !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+ INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf

+ !include DynamicTablesPkg/DynamicTables.fdf.inc

+ !endif

+

#

# Multiple Console IO support

#

diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
index 7004533ed5..caebb321d0 100644
--- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc
+++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
@@ -2,6 +2,7 @@
# LS1046A Soc package.

#

# Copyright 2017-2020 NXP

+# Copyright 2021-2021 Puresoftware Ltd

#

# SPDX-License-Identifier: BSD-2-Clause-Patent

#

@@ -48,4 +49,14 @@
[Components.common]

MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf



+#

+# Configuration Manager

+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+ Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf {

+ <BuildOptions>

+ *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/Include

+ *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include

+ }

+!endif

+

##

--
2.25.1

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.


Vikas Singh
 

Sunny, Thank you for reviewing my code. Here are my remarks. PSB


From: Sunny Wang <Sunny.Wang@...>
Sent: Monday, July 12, 2021 4:07 PM
To: Vikas Singh <vikas.singh@...>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Sami Mujawar <Sami.Mujawar@...>; leif@... <leif@...>; Meenakshi Aggarwal (meenakshi.aggarwal@...) <meenakshi.aggarwal@...>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; V Sethi (v.sethi@...) <v.sethi@...>; Arokia Samy <arokia.samy@...>; Kuldip Dwivedi <kuldip.dwivedi@...>; Ard Biesheuvel <Ard.Biesheuvel@...>; vikas.singh@... <vikas.singh@...>; White Weng <white.weng@...>; Ran Wang <ran.wang_1@...>; Sunny Wang <Sunny.Wang@...>
Subject: RE: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY
 
Hi Vikas,

Just have two comments below. Others look good to me.
1. In LS1046aFrwyPkg.dsc, since you already include DynamicTablesPkg/DynamicTables.dsc.inc, I think we need to remove DynamicTableFactoryDxe.inf code block. Could you check this?
[[VIKAS]] No, DynamicTableFactoryDxe.inf code block Is required to override, or I would say to choose what we want for our platform from DynamicTablesPkg.
This block can expose different "inf" files for different platforms as per the need basis.

2. Remove " DEFINE DYNAMIC_ACPI_ENABLE = TRUE ". In our offline discussion, this would cause some build problems with the current CM implementation (Multiple NXP platforms share One CM folder).
[[VIKAS]] I don't think "DEFINE DYNAMIC_ACPI_ENABLE = TRUE" should cause any problem while building other platforms. In fact this flag is to avoid any build issue with other platforms. CM is common for all layer scape platforms but it will be only visible to any platform if and only if "DEFINE DYNAMIC_ACPI_ENABLE = TRUE". Else platform must be building in old native mode. Could you share any scenario or something that I have missed out, will check this implementation and try to rectify.

Best Regards,
Sunny Wang

-----Original Message-----
From: Vikas Singh <vikas.singh@...>
Sent: Friday, June 18, 2021 11:28 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <Sami.Mujawar@...>; leif@...; Meenakshi Aggarwal (meenakshi.aggarwal@...) <meenakshi.aggarwal@...>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; V Sethi (v.sethi@...) <v.sethi@...>; arokia.samy <arokia.samy@...>; kuldip.dwivedi@...; Ard Biesheuvel <Ard.Biesheuvel@...>; vikas.singh@...; Sunny Wang <Sunny.Wang@...>
Subject: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY

This patch enables the use of ConfigurationManager (CM) and
its services to leverage the Dynamic ACPI support for NXP's
LS1046aFrwy platform.

Signed-off-by: Vikas Singh <vikas.singh@...>
---
 Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++
 Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc |  28 ++++
 Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf |  13 ++
 Silicon/NXP/LS1046A/LS1046A.dsc.inc            |  11 ++
 4 files changed, 204 insertions(+)

diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
new file mode 100644
index 0000000000..3c68d65cd3
--- /dev/null
+++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
@@ -0,0 +1,152 @@
+/** @file

+ *  Platform headers

+ *

+ *  Copyright 2021 NXP

+ *  Copyright 2021 Puresoftware Ltd

+ *

+ *  SPDX-License-Identifier: BSD-2-Clause-Patent

+ *

+**/

+

+

+#ifndef LS1046AFRWY_PLATFORM_H

+#define LS1046AFRWY_PLATFORM_H

+

+#define EFI_ACPI_ARM_OEM_REVISION    0x00000000

+

+// Soc defines

+#define PLAT_SOC_NAME                "LS1046AFRWY"

+

+// Gic

+#define GIC_VERSION                  2

+#define GICD_BASE                    0x1410000

+#define GICC_BASE                    0x142f000

+#define GICH_BASE                    0x1440000

+#define GICV_BASE                    0x1460000

+

+// UART

+#define UART0_BASE                   0x21C0500

+#define UART0_IT                     86

+#define UART0_LENGTH                 0x100

+#define SPCR_FLOW_CONTROL_NONE       0

+

+// Timer

+#define TIMER_BLOCK_COUNT            1

+#define TIMER_FRAME_COUNT            4

+#define TIMER_WATCHDOG_COUNT         1

+#define TIMER_BASE_ADDRESS           0x23E0000 // a.k.a CNTControlBase

+#define TIMER_READ_BASE_ADDRESS      0x23F0000 // a.k.a CNTReadBase

+#define TIMER_SEC_IT                 29

+#define TIMER_NON_SEC_IT             30

+#define TIMER_VIRT_IT                27

+#define TIMER_HYP_IT                 26

+#define TIMER_FRAME0_IT              78

+#define TIMER_FRAME1_IT              79

+#define TIMER_FRAME2_IT              92

+

+// Mcfg

+#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000

+#define LS1046A_PCI_SEG0             0x0

+#define LS1046A_PCI_SEG_BUSNUM_MIN   0x0

+#define LS1046A_PCI_SEG_BUSNUM_MAX   0xff

+#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000

+#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000

+#define LS1046A_PCI_SEG1             0x1

+#define LS1046A_PCI_SEG2             0x2

+

+// Platform specific info needed by Configuration Manager

+

+#define CFG_MGR_TABLE_ID  SIGNATURE_64 ('L','S','1','0','4','6',' ',' ')

+

+// Specify the OEM defined tables

+#define OEM_ACPI_TABLES             0

+

+#define PLAT_PCI_SEG0               LS1046A_PCI_SEG0

+#define PLAT_PCI_SEG1_CONFIG_BASE   LS1046A_PCI_SEG1_CONFIG_BASE

+#define PLAT_PCI_SEG1               LS1046A_PCI_SEG1

+#define PLAT_PCI_SEG_BUSNUM_MIN     LS1046A_PCI_SEG_BUSNUM_MIN

+#define PLAT_PCI_SEG_BUSNUM_MAX     LS1046A_PCI_SEG_BUSNUM_MAX

+#define PLAT_PCI_SEG2_CONFIG_BASE   LS1046A_PCI_SEG2_CONFIG_BASE

+#define PLAT_PCI_SEG2               LS1046A_PCI_SEG2

+

+#define PLAT_GIC_VERSION            GIC_VERSION

+#define PLAT_GICD_BASE              GICD_BASE

+#define PLAT_GICI_BASE              GICI_BASE

+#define PLAT_GICR_BASE              GICR_BASE

+#define PLAT_GICR_LEN               GICR_LEN

+#define PLAT_GICC_BASE              GICC_BASE

+#define PLAT_GICH_BASE              GICH_BASE

+#define PLAT_GICV_BASE              GICV_BASE

+

+#define PLAT_CPU_COUNT              4

+#define PLAT_GTBLOCK_COUNT          0

+#define PLAT_GTFRAME_COUNT          0

+#define PLAT_PCI_CONFG_COUNT        2

+

+#define PLAT_WATCHDOG_COUNT           0

+#define PLAT_GIC_REDISTRIBUTOR_COUNT  0

+#define PLAT_GIC_ITS_COUNT            0

+

+/* GIC CPU Interface information

+   GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency)

+ */

+#define PLAT_GIC_CPU_INTERFACE    {                          \

+             GICC_ENTRY (0,  GET_MPID (0, 0), 138, 0x19, 0), \

+             GICC_ENTRY (1,  GET_MPID (0, 1), 139, 0x19, 0), \

+             GICC_ENTRY (2,  GET_MPID (0, 2), 127, 0x19, 0), \

+             GICC_ENTRY (3,  GET_MPID (0, 3), 129, 0x19, 0), \

+}

+

+#define PLAT_WATCHDOG_INFO                    \

+  {                                           \

+  }                                           \

+

+#define PLAT_TIMER_BLOCK_INFO                 \

+  {                                           \

+  }                                           \

+

+#define PLAT_TIMER_FRAME_INFO                 \

+  {                                           \

+  }                                           \

+

+#define PLAT_GIC_DISTRIBUTOR_INFO                                      \

+  {                                                                    \

+    PLAT_GICD_BASE,                  /* UINT64  PhysicalBaseAddress */ \

+    0,                               /* UINT32  SystemVectorBase */    \

+    PLAT_GIC_VERSION                 /* UINT8   GicVersion */          \

+  }                                                                    \

+

+#define PLAT_GIC_REDISTRIBUTOR_INFO                                    \

+  {                                                                    \

+  }                                                                    \

+

+#define PLAT_GIC_ITS_INFO                                              \

+  {                                                                    \

+  }                                                                    \

+

+#define PLAT_MCFG_INFO                \

+  {                                   \

+    {                                 \

+      PLAT_PCI_SEG1_CONFIG_BASE,      \

+      PLAT_PCI_SEG1,                  \

+      PLAT_PCI_SEG_BUSNUM_MIN,        \

+      PLAT_PCI_SEG_BUSNUM_MAX,        \

+    },                                \

+    {                                 \

+      PLAT_PCI_SEG2_CONFIG_BASE,      \

+      PLAT_PCI_SEG2,                  \

+      PLAT_PCI_SEG_BUSNUM_MIN,        \

+      PLAT_PCI_SEG_BUSNUM_MAX,        \

+    }                                 \

+  }                                   \

+

+#define PLAT_SPCR_INFO                                                            \

+  {                                                                               \

+    UART0_BASE,                                                                   \

+    UART0_IT,                                                                     \

+    115200,                                                                       \

+    0,                                                                            \

+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550           \

+  }                                                                               \

+

+#endif // LS1046AFRWY_PLATFORM_H

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
index 67cf15cbe4..20111e6037 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
@@ -3,6 +3,7 @@
 #  LS1046AFRWY Board package.

 #

 #  Copyright 2019-2020 NXP

+#  Copyright 2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -22,10 +23,18 @@
   OUTPUT_DIRECTORY               = Build/LS1046aFrwyPkg

   FLASH_DEFINITION               = Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf



+  # This flag controls the dynamic acpi generation

+  #

+  DEFINE DYNAMIC_ACPI_ENABLE     = TRUE

+

 !include Silicon/NXP/NxpQoriqLs.dsc.inc

 !include MdePkg/MdeLibs.dsc.inc

 !include Silicon/NXP/LS1046A/LS1046A.dsc.inc



+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+  !include DynamicTablesPkg/DynamicTables.dsc.inc

+!endif

+

 [LibraryClasses.common]

   ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf

   RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf

@@ -46,4 +55,23 @@


   Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf



+  #

+  # Dynamic Table Factory

+  !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+    DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf {

+      <LibraryClasses>

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.inf

+    }

+  !endif

+

+  #

+  # Acpi Support

+  #

+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

 ##

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
index 34c4e5a025..f3cac033bc 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
@@ -3,6 +3,7 @@
 #  FLASH layout file for LS1046a board.

 #

 #  Copyright 2019-2020 NXP

+#  Copyright 2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -99,6 +100,18 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/Metronome/Metronome.inf

   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf



+

+  #

+  # Acpi Support

+  #

+  INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

+  !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+    INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf

+    !include DynamicTablesPkg/DynamicTables.fdf.inc

+  !endif

+

   #

   # Multiple Console IO support

   #

diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
index 7004533ed5..caebb321d0 100644
--- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc
+++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
@@ -2,6 +2,7 @@
 #  LS1046A Soc package.

 #

 #  Copyright 2017-2020 NXP

+#  Copyright 2021-2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -48,4 +49,14 @@
 [Components.common]

   MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf



+#

+# Configuration Manager

+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+  Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf {

+    <BuildOptions>

+      *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/Include

+      *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include

+  }

+!endif

+

 ##

--
2.25.1

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.


Sunny Wang
 

Hi Vikas,

 

Sorry for the delay and thanks for clarifying.

1. OK. I was just curious why we need to override it to include fewer tables. Isn't it better to support more ACPI tables? Anyways, I'm fine with the current change because it is intended. We can discuss this later once we're done with synchronizing edk2-platform with NXP-LSDK.    

2. OK, I just thought that you would like to use the same way (build flag) as what we used in NXP LSDK. I'm also fine with the current approach. We can co-work with NXP to update NXP-LSDK later.

 

Reviewed-by: Sunny Wang <sunny.wang@...>


Best Regards,

Sunny Wang

 

From: Vikas Singh <vikas.singh@...>
Sent: Monday, July 26, 2021 9:08 PM
To: Sunny Wang <Sunny.Wang@...>; devel@edk2.groups.io
Cc: Sami Mujawar <Sami.Mujawar@...>; leif@...; Meenakshi Aggarwal (meenakshi.aggarwal@...) <meenakshi.aggarwal@...>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; V Sethi (v.sethi@...) <v.sethi@...>; Arokia Samy <arokia.samy@...>; Kuldip Dwivedi <kuldip.dwivedi@...>; Ard Biesheuvel <Ard.Biesheuvel@...>; vikas.singh@...; White Weng <white.weng@...>; Ran Wang <ran.wang_1@...>
Subject: Re: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY

 

Sunny, Thank you for reviewing my code. Here are my remarks. PSB

 


From: Sunny Wang <Sunny.Wang@...>
Sent: Monday, July 12, 2021 4:07 PM
To: Vikas Singh <vikas.singh@...>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Sami Mujawar <Sami.Mujawar@...>; leif@... <leif@...>; Meenakshi Aggarwal (meenakshi.aggarwal@...) <meenakshi.aggarwal@...>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; V Sethi (v.sethi@...) <v.sethi@...>; Arokia Samy <arokia.samy@...>; Kuldip Dwivedi <kuldip.dwivedi@...>; Ard Biesheuvel <Ard.Biesheuvel@...>; vikas.singh@... <vikas.singh@...>; White Weng <white.weng@...>; Ran Wang <ran.wang_1@...>; Sunny Wang <Sunny.Wang@...>
Subject: RE: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY

 

Hi Vikas,

Just have two comments below. Others look good to me.
1. In LS1046aFrwyPkg.dsc, since you already include DynamicTablesPkg/DynamicTables.dsc.inc, I think we need to remove DynamicTableFactoryDxe.inf code block. Could you check this?

[[VIKAS]] No, DynamicTableFactoryDxe.inf code block Is required to override, or I would say to choose what we want for our platform from DynamicTablesPkg.
This block can expose different "inf" files for different platforms as per the need basis.


2. Remove " DEFINE DYNAMIC_ACPI_ENABLE = TRUE ". In our offline discussion, this would cause some build problems with the current CM implementation (Multiple NXP platforms share One CM folder).
[[VIKAS]] I don't think "DEFINE DYNAMIC_ACPI_ENABLE = TRUE" should cause any problem while building other platforms. In fact this flag is to avoid any build issue with other platforms. CM is common for all layer scape platforms but it will be only visible to any platform if and only if "DEFINE DYNAMIC_ACPI_ENABLE = TRUE". Else platform must be building in old native mode. Could you share any scenario or something that I have missed out, will check this implementation and try to rectify.

Best Regards,
Sunny Wang

-----Original Message-----
From: Vikas Singh <vikas.singh@...>
Sent: Friday, June 18, 2021 11:28 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <Sami.Mujawar@...>; leif@...; Meenakshi Aggarwal (meenakshi.aggarwal@...) <meenakshi.aggarwal@...>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; V Sethi (v.sethi@...) <v.sethi@...>; arokia.samy <arokia.samy@...>; kuldip.dwivedi@...; Ard Biesheuvel <Ard.Biesheuvel@...>; vikas.singh@...; Sunny Wang <Sunny.Wang@...>
Subject: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY

This patch enables the use of ConfigurationManager (CM) and
its services to leverage the Dynamic ACPI support for NXP's
LS1046aFrwy platform.

Signed-off-by: Vikas Singh <vikas.singh@...>
---
 Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++
 Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc |  28 ++++
 Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf |  13 ++
 Silicon/NXP/LS1046A/LS1046A.dsc.inc            |  11 ++
 4 files changed, 204 insertions(+)

diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
new file mode 100644
index 0000000000..3c68d65cd3
--- /dev/null
+++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h
@@ -0,0 +1,152 @@
+/** @file

+ *  Platform headers

+ *

+ *  Copyright 2021 NXP

+ *  Copyright 2021 Puresoftware Ltd

+ *

+ *  SPDX-License-Identifier: BSD-2-Clause-Patent

+ *

+**/

+

+

+#ifndef LS1046AFRWY_PLATFORM_H

+#define LS1046AFRWY_PLATFORM_H

+

+#define EFI_ACPI_ARM_OEM_REVISION    0x00000000

+

+// Soc defines

+#define PLAT_SOC_NAME                "LS1046AFRWY"

+

+// Gic

+#define GIC_VERSION                  2

+#define GICD_BASE                    0x1410000

+#define GICC_BASE                    0x142f000

+#define GICH_BASE                    0x1440000

+#define GICV_BASE                    0x1460000

+

+// UART

+#define UART0_BASE                   0x21C0500

+#define UART0_IT                     86

+#define UART0_LENGTH                 0x100

+#define SPCR_FLOW_CONTROL_NONE       0

+

+// Timer

+#define TIMER_BLOCK_COUNT            1

+#define TIMER_FRAME_COUNT            4

+#define TIMER_WATCHDOG_COUNT         1

+#define TIMER_BASE_ADDRESS           0x23E0000 // a.k.a CNTControlBase

+#define TIMER_READ_BASE_ADDRESS      0x23F0000 // a.k.a CNTReadBase

+#define TIMER_SEC_IT                 29

+#define TIMER_NON_SEC_IT             30

+#define TIMER_VIRT_IT                27

+#define TIMER_HYP_IT                 26

+#define TIMER_FRAME0_IT              78

+#define TIMER_FRAME1_IT              79

+#define TIMER_FRAME2_IT              92

+

+// Mcfg

+#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000

+#define LS1046A_PCI_SEG0             0x0

+#define LS1046A_PCI_SEG_BUSNUM_MIN   0x0

+#define LS1046A_PCI_SEG_BUSNUM_MAX   0xff

+#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000

+#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000

+#define LS1046A_PCI_SEG1             0x1

+#define LS1046A_PCI_SEG2             0x2

+

+// Platform specific info needed by Configuration Manager

+

+#define CFG_MGR_TABLE_ID  SIGNATURE_64 ('L','S','1','0','4','6',' ',' ')

+

+// Specify the OEM defined tables

+#define OEM_ACPI_TABLES             0

+

+#define PLAT_PCI_SEG0               LS1046A_PCI_SEG0

+#define PLAT_PCI_SEG1_CONFIG_BASE   LS1046A_PCI_SEG1_CONFIG_BASE

+#define PLAT_PCI_SEG1               LS1046A_PCI_SEG1

+#define PLAT_PCI_SEG_BUSNUM_MIN     LS1046A_PCI_SEG_BUSNUM_MIN

+#define PLAT_PCI_SEG_BUSNUM_MAX     LS1046A_PCI_SEG_BUSNUM_MAX

+#define PLAT_PCI_SEG2_CONFIG_BASE   LS1046A_PCI_SEG2_CONFIG_BASE

+#define PLAT_PCI_SEG2               LS1046A_PCI_SEG2

+

+#define PLAT_GIC_VERSION            GIC_VERSION

+#define PLAT_GICD_BASE              GICD_BASE

+#define PLAT_GICI_BASE              GICI_BASE

+#define PLAT_GICR_BASE              GICR_BASE

+#define PLAT_GICR_LEN               GICR_LEN

+#define PLAT_GICC_BASE              GICC_BASE

+#define PLAT_GICH_BASE              GICH_BASE

+#define PLAT_GICV_BASE              GICV_BASE

+

+#define PLAT_CPU_COUNT              4

+#define PLAT_GTBLOCK_COUNT          0

+#define PLAT_GTFRAME_COUNT          0

+#define PLAT_PCI_CONFG_COUNT        2

+

+#define PLAT_WATCHDOG_COUNT           0

+#define PLAT_GIC_REDISTRIBUTOR_COUNT  0

+#define PLAT_GIC_ITS_COUNT            0

+

+/* GIC CPU Interface information

+   GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency)

+ */

+#define PLAT_GIC_CPU_INTERFACE    {                          \

+             GICC_ENTRY (0,  GET_MPID (0, 0), 138, 0x19, 0), \

+             GICC_ENTRY (1,  GET_MPID (0, 1), 139, 0x19, 0), \

+             GICC_ENTRY (2,  GET_MPID (0, 2), 127, 0x19, 0), \

+             GICC_ENTRY (3,  GET_MPID (0, 3), 129, 0x19, 0), \

+}

+

+#define PLAT_WATCHDOG_INFO                    \

+  {                                           \

+  }                                           \

+

+#define PLAT_TIMER_BLOCK_INFO                 \

+  {                                           \

+  }                                           \

+

+#define PLAT_TIMER_FRAME_INFO                 \

+  {                                           \

+  }                                           \

+

+#define PLAT_GIC_DISTRIBUTOR_INFO                                      \

+  {                                                                    \

+    PLAT_GICD_BASE,                  /* UINT64  PhysicalBaseAddress */ \

+    0,                               /* UINT32  SystemVectorBase */    \

+    PLAT_GIC_VERSION                 /* UINT8   GicVersion */          \

+  }                                                                    \

+

+#define PLAT_GIC_REDISTRIBUTOR_INFO                                    \

+  {                                                                    \

+  }                                                                    \

+

+#define PLAT_GIC_ITS_INFO                                              \

+  {                                                                    \

+  }                                                                    \

+

+#define PLAT_MCFG_INFO                \

+  {                                   \

+    {                                 \

+      PLAT_PCI_SEG1_CONFIG_BASE,      \

+      PLAT_PCI_SEG1,                  \

+      PLAT_PCI_SEG_BUSNUM_MIN,        \

+      PLAT_PCI_SEG_BUSNUM_MAX,        \

+    },                                \

+    {                                 \

+      PLAT_PCI_SEG2_CONFIG_BASE,      \

+      PLAT_PCI_SEG2,                  \

+      PLAT_PCI_SEG_BUSNUM_MIN,        \

+      PLAT_PCI_SEG_BUSNUM_MAX,        \

+    }                                 \

+  }                                   \

+

+#define PLAT_SPCR_INFO                                                            \

+  {                                                                               \

+    UART0_BASE,                                                                   \

+    UART0_IT,                                                                     \

+    115200,                                                                       \

+    0,                                                                            \

+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550           \

+  }                                                                               \

+

+#endif // LS1046AFRWY_PLATFORM_H

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
index 67cf15cbe4..20111e6037 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc
@@ -3,6 +3,7 @@
 #  LS1046AFRWY Board package.

 #

 #  Copyright 2019-2020 NXP

+#  Copyright 2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -22,10 +23,18 @@
   OUTPUT_DIRECTORY               = Build/LS1046aFrwyPkg

   FLASH_DEFINITION               = Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf



+  # This flag controls the dynamic acpi generation

+  #

+  DEFINE DYNAMIC_ACPI_ENABLE     = TRUE

+

 !include Silicon/NXP/NxpQoriqLs.dsc.inc

 !include MdePkg/MdeLibs.dsc.inc

 !include Silicon/NXP/LS1046A/LS1046A.dsc.inc



+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+  !include DynamicTablesPkg/DynamicTables.dsc.inc

+!endif

+

 [LibraryClasses.common]

   ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf

   RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf

@@ -46,4 +55,23 @@


   Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf



+  #

+  # Dynamic Table Factory

+  !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+    DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf {

+      <LibraryClasses>

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf

+        NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.inf

+    }

+  !endif

+

+  #

+  # Acpi Support

+  #

+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

 ##

diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
index 34c4e5a025..f3cac033bc 100755
--- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
+++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf
@@ -3,6 +3,7 @@
 #  FLASH layout file for LS1046a board.

 #

 #  Copyright 2019-2020 NXP

+#  Copyright 2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -99,6 +100,18 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/Metronome/Metronome.inf

   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf



+

+  #

+  # Acpi Support

+  #

+  INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+

+  !if $(DYNAMIC_ACPI_ENABLE) == TRUE

+    INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf

+    !include DynamicTablesPkg/DynamicTables.fdf.inc

+  !endif

+

   #

   # Multiple Console IO support

   #

diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
index 7004533ed5..caebb321d0 100644
--- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc
+++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc
@@ -2,6 +2,7 @@
 #  LS1046A Soc package.

 #

 #  Copyright 2017-2020 NXP

+#  Copyright 2021-2021 Puresoftware Ltd

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -48,4 +49,14 @@
 [Components.common]

   MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf



+#

+# Configuration Manager

+!if $(DYNAMIC_ACPI_ENABLE) == TRUE

+  Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf {

+    <BuildOptions>

+      *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/Include

+      *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include

+  }

+!endif

+

 ##

--
2.25.1

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IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.