Update the TF-A binaries with support for Cortex-A72 cpu. This support was merged into TF-A as part of the following: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7117 Also include t

Hi Tomas, Tested this patch series and didn't face any issues. Tested-by: Tanmay Jagdale <tanmay.jagdale@...>

The Qemu device tree for Sbsa platform now contains MPIDR value for every CPU in the form of "reg" property under every CPU's node. Hence, add a function that provides support to read this value from

Hi Graeme, Thanks for the fix. So shall I push an interim patch that uses the aforementioned formula to derive the MPIDR ? Or wait for the qemu patch to get merged and then read MPIDR directly from th

Signed-off-by: Tanmay Jagdale <tanmay.jagdale@...> --- Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 + Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 67 ++++++++++++++++++++ 2 files changed

Add support to create Processor Properties Topology Table at runtime. The cache topology of each CPU is as follows: CPU N ------------------------ | -------- -------- | | | L1-I | | L1-D | | | | 32KB

- Add support to create SSDT table at runtime. Since SSDT table is a data table, added a few helper macros to create the AML entries. - Also added a function to calculate the length of Packages. Signe

- Add support to create MADT table at runtime. - Included a macro for GIC Redistributor structure initialisation. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@...> --- Silicon/Qemu/SbsaQemu/Dr

- Add a new ACPI driver for the SbsaQemu platform which would handle any modifications needed for the ACPI tables. - Add a parser function in this driver which parses the FDT created by Qemu to determ

- Since the core count is dynamic and controlled by Qemu, move the PcdCoreCount from [PcdsFixedAtBuild] to [PcdsDynamic] section. - Move FdtLib from [LibraryClasses.common.PEIM] to [LibraryClasses.com

Add PCI related entries to DSDT table along with the routing entries. Also add the MCFG table. Co-authored-by: Graeme Gregory <graeme.gregory@...> Signed-off-by: Tanmay Jagdale <tanmay.jagdale@

- Add the following ACPI tables for SbsaQemu platform DSDT, FADT, GTDT, SPCR - Created an Include directory to hold common header files. - Also included the Acpiview shell utility. Co-authored-by: Gra

This patch series adds ACPI tables support for the SbsaQemu platform. We are using a pseudo static approach to create the ACPI tables. The ACPI tables namely DBG2, DSDT, MCFG, SPCR, GTDT are created i

Signed-off-by: Tanmay Jagdale <tanmay.jagdale@...> --- Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 + Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 67 ++++++++++++++++++++ 2 files changed

Add support to create Processor Properties Topology Table at runtime. The cache topology of each CPU is as follows: CPU N ------------------------ | -------- -------- | | | L1-I | | L1-D | | | | 32KB

- Add support to create SSDT table at runtime. Since SSDT table is a data table, added a few helper macros to create the AML entries. - Also added a function to calculate the length of Packages. Signe

- Add support to create MADT table at runtime. - Included a macro for GIC Redistributor structure initialisation. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@...> --- Silicon/Qemu/SbsaQemu/Dr

- Add a new ACPI driver for the SbsaQemu platform which would handle any modifications needed for the ACPI tables. - Add a parser function in this driver which parses the FDT created by Qemu to determ

- Since the core count is dynamic and controlled by Qemu, move the PcdCoreCount from [PcdsFixedAtBuild] to [PcdsDynamic] section. - Move FdtLib from [LibraryClasses.common.PEIM] to [LibraryClasses.com

Add PCI related entries to DSDT table along with the routing entries. Also add the MCFG table. Co-authored-by: Graeme Gregory <graeme.gregory@...> Signed-off-by: Tanmay Jagdale <tanmay.jagdale@