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[PATCH] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers
Setting the Always-on Capability bit in GTDT table for system PE timers in sbsa platform.This is also required for ACS sbsa level 3 test compliancy. Cc: Leif Lindholm <leif@...> Cc: Ard Biesh
Setting the Always-on Capability bit in GTDT table for system PE timers in sbsa platform.This is also required for ACS sbsa level 3 test compliancy. Cc: Leif Lindholm <leif@...> Cc: Ard Biesh
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By
Shashi Mallela
· #82773
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[PATCH RESEND v1 2/2] Silicon/Qemu: Update MADT with GICv3 ITS info
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
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By
Shashi Mallela
· #78784
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[PATCH RESEND v1 1/2] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define GICv3 ITS base address
Define new pcd setting for specifying the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the GIC ITS structure
Define new pcd setting for specifying the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the GIC ITS structure
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By
Shashi Mallela
· #78783
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[PATCH RESEND v1 0/2] Add GIC ITS entry to MADT
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
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By
Shashi Mallela
· #78782
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[PATCH v1 0/2] Add GIC ITS entry to MADT
Gentle reminder for ITS changes review. The accompanying qemu git branch with ITS changes is available at https://github.com/shashi-j/qemu.git
Gentle reminder for ITS changes review. The accompanying qemu git branch with ITS changes is available at https://github.com/shashi-j/qemu.git
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By
Shashi Mallela
· #75018
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[PATCH v1] ArmPkg/ArmPkg.dec: New pcd defined for GICv3 ITS
Hi Ard, Thanks for your comments. Please ignore this edk2 patch as i have now localised the new pcd creation and reference within SbsaQemu of edk2-platform. The edk2-platform patchset has been updated
Hi Ard, Thanks for your comments. Please ignore this edk2 patch as i have now localised the new pcd creation and reference within SbsaQemu of edk2-platform. The edk2-platform patchset has been updated
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By
Shashi Mallela
· #72694
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[PATCH v1 2/2] Silicon/Qemu: Update MADT with GICv3 ITS info
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
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By
Shashi Mallela
· #72693
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[PATCH v1 1/2] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define GICv3 ITS base address
Define new pcd setting for specifying the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the GIC ITS structure
Define new pcd setting for specifying the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the GIC ITS structure
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By
Shashi Mallela
· #72692
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[PATCH v1 0/2] Add GIC ITS entry to MADT
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
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By
Shashi Mallela
· #72691
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[PATCH v1] ArmPkg/ArmPkg.dec: New pcd defined for GICv3 ITS
To enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,a new pcd setting has been created in edk2.This pcd setting would be referenced by edk2-platform code to advertis
To enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,a new pcd setting has been created in edk2.This pcd setting would be referenced by edk2-platform code to advertis
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By
Shashi Mallela
· #72685
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[PATCH v1 2/2] Silicon/Qemu: Update MADT with GICv3 ITS info
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt Translation Service capability in the ACPI MADT,the GIC ITS structure is created with the relevant values for each of its fields.The
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By
Shashi Mallela
· #72684
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[PATCH v1 1/2] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define GICv3 ITS base address
Update the new pcd setting (defined in edk2 ArmPkg) with the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the
Update the new pcd setting (defined in edk2 ArmPkg) with the base address of GICv3 Interrupt Translation Service.For Qemu sbsa-ref platforms,this enables the detection of GIC ITS capability within the
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By
Shashi Mallela
· #72683
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[PATCH v1 0/2] Add GIC ITS entry to MADT
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
This patchset implements ACPI MADT functionality extension to include the GICv3 ITS functionality. This enables devices to use message signalled LPI interrupts in addition to SPIs,PPIs supported on AR
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By
Shashi Mallela
· #72682
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[PATCH v1-resend 1/1] Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
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By
Shashi Mallela
· #68803
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[PATCH v1-resend 0/1] sbsa-wdt interrupt id update
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
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By
Shashi Mallela
· #68802
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[PATCH v1 1/1] Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update
The previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform. This was preventing the watchdog interrupt from getting identified.Updated SBSA-wdt interrupt
The previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform. This was preventing the watchdog interrupt from getting identified.Updated SBSA-wdt interrupt
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By
Shashi Mallela
· #68800
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[PATCH v1 0/1] sbsa-wdt interrupt id update
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
The previous value of interrupt id used was not in sync with the interrupt id being used in qemu sbsa-ref platform due to a conflict before merging and was missed in last review. This was preventing t
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By
Shashi Mallela
· #68799
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[PATCH v1 1/1] Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update
The previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform. This was preventing the watchdog interrupt from getting identified.Updated SBSA-wdt interrupt
The previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform. This was preventing the watchdog interrupt from getting identified.Updated SBSA-wdt interrupt
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By
Shashi Mallela
· #68720
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[PATCH v1 0/1] sbsa-wdt interrupt id update
This patch contains an update to interrupt id value of sbsa wdt,since the previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform.This was preventing the
This patch contains an update to interrupt id value of sbsa wdt,since the previous value of interrupt id used was causing conflict with a different device of sbsa-ref platform.This was preventing the
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By
Shashi Mallela
· #68719
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[PATCH v1 1/1] Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update
Updated SBSA-wdt interrupt id in Gtdt table since the previous value was being used by a different source in qemu sbsa-ref platform. Cc: Leif Lindholm <leif@...> Cc: Ard Biesheuvel <ard.biesh
Updated SBSA-wdt interrupt id in Gtdt table since the previous value was being used by a different source in qemu sbsa-ref platform. Cc: Leif Lindholm <leif@...> Cc: Ard Biesheuvel <ard.biesh
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By
Shashi Mallela
· #68614
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