Date   

Re: [PATCH V8 00/47] Enable Intel TDX in OvmfPkg (Config-A)

Min Xu
 

On March 15, 2022 11:55 AM, Gao Liming wrote:
Min:
As Jiewen mentions, EFI_RESOURCE_MEMORY_UNACCEPTED will be in next
public spec. So, it can't be added now.

I suggest to add edk2 definition for this type in MdeModulePkg first, such as
EDKII_RESOURCE_MEMORY_UNACCEPTED. It can be removed after new spec is
published.
Thanks for the comments. In the patch EFI_RESOURCE_MEMORY_UNACCEPTED was defined in MdePkg/Include/Pi/PiHob.h.
I check the MdeModulePkg/Include but don't find some proper header files for this definition.

Or can we define EFI_RESOURCE_MEMORY_UNACCEPTED in OvmfPkg/Library/PlatformInitLib/IntelTdx.c?
In current stage all the unaccepted memory passed from host VMM are all accepted in OvmfPkg/Library/PlatformInitLib/IntelTdx.c. After that these unaccepted memory hob are transferred to private memory hob. So currently EFI_RESOURCE_MEMORY_UNACCEPTED is only seen in above IntelTdx.c.

[TDVF] Sec 7.3.1 defines the unaccepted memory resource HOB for DXE phase. But this is for the lazy-accept feature which will be implemented in the future.

What's your suggestion?

[TDVF] https://www.intel.com/content/dam/develop/external/us/en/documents/tdx-virtual-firmware-design-guide-rev-1.01.pdf

Thanks
Min


Re: [PATCH v2] MdePkg/AcpiXX.h: Update Error Severity type for Generic Error Status Block

Wu, Hao A
 

Hello,

Any feedback for the patch? Thanks in advance.

Best Regards,
Hao Wu

-----Original Message-----
From: Wu, Hao A <hao.a.wu@...>
Sent: Tuesday, March 8, 2022 1:43 PM
To: devel@edk2.groups.io
Cc: Wu, Hao A <hao.a.wu@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Liming <gaoliming@...>; Liu,
Zhiguang <zhiguang.liu@...>; Ni, Ray <ray.ni@...>
Subject: [PATCH v2] MdePkg/AcpiXX.h: Update Error Severity type for Generic
Error Status Block

Starting from ACPI Specification Version 5.1 Errata B, the term
'Correctable' is no longer being used as an error severity of the
reported error in Chapter 18 APEI.

This commit will
a) For Acpi40.h & Acpi50.h
Add new macro EFI_ACPI_X_X_ERROR_SEVERITY_RECOVERABLE, since both the
terms 'Correctable' and 'Recoverable' are used to denote the same error
severity.

b) Header files starting from Acpi51.h to Acpi64.h
Add new macro EFI_ACPI_X_X_ERROR_SEVERITY_RECOVERABLE.
Keeps the origin EFI_ACPI_X_X_ERROR_SEVERITY_CORRECTABLE for
compatibility
consideration, but add comments to mark it as deprecated and should no
longer be used.

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Cc: Ray Ni <ray.ni@...>
Signed-off-by: Hao A Wu <hao.a.wu@...>
---
MdePkg/Include/IndustryStandard/Acpi40.h | 3 ++-
MdePkg/Include/IndustryStandard/Acpi50.h | 3 ++-
MdePkg/Include/IndustryStandard/Acpi51.h | 10 ++++++++--
MdePkg/Include/IndustryStandard/Acpi60.h | 10 ++++++++--
MdePkg/Include/IndustryStandard/Acpi61.h | 10 ++++++++--
MdePkg/Include/IndustryStandard/Acpi62.h | 10 ++++++++--
MdePkg/Include/IndustryStandard/Acpi63.h | 10 ++++++++--
MdePkg/Include/IndustryStandard/Acpi64.h | 10 ++++++++--
8 files changed, 52 insertions(+), 14 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/Acpi40.h
b/MdePkg/Include/IndustryStandard/Acpi40.h
index 862113dff9..a2da09346f 100644
--- a/MdePkg/Include/IndustryStandard/Acpi40.h
+++ b/MdePkg/Include/IndustryStandard/Acpi40.h
@@ -1,7 +1,7 @@
/** @file

ACPI 4.0 definitions from the ACPI Specification Revision 4.0a April 5, 2010



- Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

**/



@@ -690,6 +690,7 @@ typedef struct {
// Boot Error Severity types

//

#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_4_0_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_4_0_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_4_0_ERROR_SEVERITY_NONE 0x03

diff --git a/MdePkg/Include/IndustryStandard/Acpi50.h
b/MdePkg/Include/IndustryStandard/Acpi50.h
index be8f85f577..76706aa640 100644
--- a/MdePkg/Include/IndustryStandard/Acpi50.h
+++ b/MdePkg/Include/IndustryStandard/Acpi50.h
@@ -2,7 +2,7 @@
ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13,
2013.



Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>

- Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

**/

@@ -1361,6 +1361,7 @@ typedef struct {
// Boot Error Severity types

//

#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_5_0_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03

diff --git a/MdePkg/Include/IndustryStandard/Acpi51.h
b/MdePkg/Include/IndustryStandard/Acpi51.h
index d8ee3ef8f2..01ef544c3a 100644
--- a/MdePkg/Include/IndustryStandard/Acpi51.h
+++ b/MdePkg/Include/IndustryStandard/Acpi51.h
@@ -2,7 +2,7 @@
ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January,
2016.



Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>

- Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>

(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>

Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -1376,10 +1376,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

diff --git a/MdePkg/Include/IndustryStandard/Acpi60.h
b/MdePkg/Include/IndustryStandard/Acpi60.h
index f4ab016d70..5ac3be6ad7 100644
--- a/MdePkg/Include/IndustryStandard/Acpi60.h
+++ b/MdePkg/Include/IndustryStandard/Acpi60.h
@@ -1,7 +1,7 @@
/** @file

ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January,
2016.



- Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>

(C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR>

Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -1560,10 +1560,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_6_0_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

diff --git a/MdePkg/Include/IndustryStandard/Acpi61.h
b/MdePkg/Include/IndustryStandard/Acpi61.h
index 5ab31e7520..7af67d832b 100644
--- a/MdePkg/Include/IndustryStandard/Acpi61.h
+++ b/MdePkg/Include/IndustryStandard/Acpi61.h
@@ -1,7 +1,7 @@
/** @file

ACPI 6.1 definitions from the ACPI Specification Revision 6.1 January, 2016.



- Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>

(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>

Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -1566,10 +1566,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_6_1_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_6_1_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_6_1_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_6_1_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_6_1_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_6_1_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

diff --git a/MdePkg/Include/IndustryStandard/Acpi62.h
b/MdePkg/Include/IndustryStandard/Acpi62.h
index 0ede23c716..313db63044 100644
--- a/MdePkg/Include/IndustryStandard/Acpi62.h
+++ b/MdePkg/Include/IndustryStandard/Acpi62.h
@@ -1,7 +1,7 @@
/** @file

ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017.



- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

**/

@@ -1738,10 +1738,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_6_2_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

diff --git a/MdePkg/Include/IndustryStandard/Acpi63.h
b/MdePkg/Include/IndustryStandard/Acpi63.h
index e4d5825946..b1e9d5db5b 100644
--- a/MdePkg/Include/IndustryStandard/Acpi63.h
+++ b/MdePkg/Include/IndustryStandard/Acpi63.h
@@ -1,7 +1,7 @@
/** @file

ACPI 6.3 definitions from the ACPI Specification Revision 6.3 Jan, 2019.



- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2019 - 2020, ARM Ltd. All rights reserved.<BR>



SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -1702,10 +1702,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_6_3_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_6_3_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_6_3_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

diff --git a/MdePkg/Include/IndustryStandard/Acpi64.h
b/MdePkg/Include/IndustryStandard/Acpi64.h
index a79b7f2eaa..232697f228 100644
--- a/MdePkg/Include/IndustryStandard/Acpi64.h
+++ b/MdePkg/Include/IndustryStandard/Acpi64.h
@@ -1,7 +1,7 @@
/** @file

ACPI 6.4 definitions from the ACPI Specification Revision 6.4 Jan, 2021.



- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>



SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -1783,10 +1783,16 @@ typedef struct {
//

// Boot Error Severity types

//

-#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTABLE 0x00

+#define EFI_ACPI_6_4_ERROR_SEVERITY_RECOVERABLE 0x00

#define EFI_ACPI_6_4_ERROR_SEVERITY_FATAL 0x01

#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTED 0x02

#define EFI_ACPI_6_4_ERROR_SEVERITY_NONE 0x03

+//

+// The term 'Correctable' is no longer being used as an error severity of the

+// reported error since ACPI Specification Version 5.1 Errata B.

+// The below macro is considered as deprecated and should no longer be used.

+//

+#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTABLE 0x00



///

/// Generic Error Data Entry Definition

--
2.27.0.windows.1


Re: [PATCH V8 35/47] MdeModulePkg: Skip setting IA32_ERER.NXE if it has already been set

Wang, Jian J
 

Reviewed-by: Jian J Wang <jian.j.wang@...>

Regards,
Jian

-----Original Message-----
From: Xu, Min M <min.m.xu@...>
Sent: Saturday, March 12, 2022 9:54 AM
To: devel@edk2.groups.io
Cc: Xu, Min M <min.m.xu@...>; Wang, Jian J <jian.j.wang@...>;
Wu, Hao A <hao.a.wu@...>; Brijesh Singh <brijesh.singh@...>;
Aktas, Erdem <erdemaktas@...>; James Bottomley
<jejb@...>; Yao, Jiewen <jiewen.yao@...>; Tom Lendacky
<thomas.lendacky@...>; Gerd Hoffmann <kraxel@...>
Subject: [PATCH V8 35/47] MdeModulePkg: Skip setting IA32_ERER.NXE if it has
already been set

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

If IA32_ERER.NXE has already been set, skip setting it again.

Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Cc: Gerd Hoffmann <kraxel@...>
Acked-by: Gerd Hoffmann <kraxel@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 0700f310b203..bb426d0d0a6f 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -179,9 +179,11 @@ EnableExecuteDisableBit (
{
UINT64 MsrRegisters;

- MsrRegisters = AsmReadMsr64 (0xC0000080);
- MsrRegisters |= BIT11;
- AsmWriteMsr64 (0xC0000080, MsrRegisters);
+ MsrRegisters = AsmReadMsr64 (0xC0000080);
+ if ((MsrRegisters & BIT11) == 0) {
+ MsrRegisters |= BIT11;
+ AsmWriteMsr64 (0xC0000080, MsrRegisters);
+ }
}

/**
--
2.29.2.windows.2


Re: [PATCH V8 36/47] MdeModulePkg: Add PcdTdxSharedBitMask

Wang, Jian J
 

Reviewed-by: Jian J Wang <jian.j.wang@...>

Regards,
Jian

-----Original Message-----
From: Xu, Min M <min.m.xu@...>
Sent: Saturday, March 12, 2022 9:54 AM
To: devel@edk2.groups.io
Cc: Xu, Min M <min.m.xu@...>; Wang, Jian J <jian.j.wang@...>;
Wu, Hao A <hao.a.wu@...>; Brijesh Singh <brijesh.singh@...>;
Aktas, Erdem <erdemaktas@...>; James Bottomley
<jejb@...>; Yao, Jiewen <jiewen.yao@...>; Tom Lendacky
<thomas.lendacky@...>; Gerd Hoffmann <kraxel@...>
Subject: [PATCH V8 36/47] MdeModulePkg: Add PcdTdxSharedBitMask

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Guest Physical Address (GPA) space in Td guest is divided into private
and shared sub-spaces, determined by the SHARED bit of GPA. This PCD
holds the shared bit mask. Its default value is 0 and it will be set
in PlatformPei driver if it is of Td guest.

Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Cc: Gerd Hoffmann <kraxel@...>
Acked-by: Gerd Hoffmann <kraxel@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
MdeModulePkg/MdeModulePkg.dec | 4 ++++
OvmfPkg/AmdSev/AmdSevX64.dsc | 3 +++
OvmfPkg/Bhyve/BhyveX64.dsc | 3 +++
OvmfPkg/CloudHv/CloudHvX64.dsc | 3 +++
OvmfPkg/Microvm/MicrovmX64.dsc | 3 +++
OvmfPkg/OvmfPkgIa32.dsc | 3 +++
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
OvmfPkg/OvmfPkgX64.dsc | 3 +++
OvmfPkg/OvmfXen.dsc | 3 +++
9 files changed, 26 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec
b/MdeModulePkg/MdeModulePkg.dec
index 463e889e9a68..1a2425974f44 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2079,6 +2079,10 @@
# @Prompt Enable PCIe Resizable BAR Capability support.

gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport|FALSE|BOOLE
AN|0x10000024

+ ## This PCD holds the shared bit mask for page table entries when Tdx is
enabled.
+ # @Prompt The shared bit mask when Intel Tdx is enabled.
+
gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0|UINT64|0x100
00025
+
[PcdsPatchableInModule]
## Specify memory size with page number for PEI code when
# Loading Module at Fixed Address feature is enabled.
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc
b/OvmfPkg/AmdSev/AmdSevX64.dsc
index c173a72134f4..dda98aa43bdb 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -558,6 +558,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 656e407473bb..0daae82d6705 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -550,6 +550,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x00

# MdeModulePkg resolution sets up the system display resolution
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc
b/OvmfPkg/CloudHv/CloudHvX64.dsc
index c307f1cc7550..1732f281b435 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -603,6 +603,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc
b/OvmfPkg/Microvm/MicrovmX64.dsc
index 0eac0c02c630..cde90f523520 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -592,6 +592,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 8f02dca63869..01a26c234a88 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -618,6 +618,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 98a6748c62dd..bf08e893e053 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -631,6 +631,7 @@

# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0

# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 2df5b2999610..3092036bb7f6 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -642,6 +642,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
# Set SEV-ES defaults
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index aa27e2256ae9..470c8cfe4d23 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -495,6 +495,9 @@
# Set memory encryption mask

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|
0x0

+ # Set Tdx shared bit mask
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0
+
gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x00


#################################################################
###############
--
2.29.2.windows.2


[edk2-platforms PATCH v1 1/1] BoardModulePkg: Copy device path before processing

Abdul Lateef Attar
 

GCC compiler puts the DevicePath PCDs to the read-only
section. During boot if try to process the device path
after PtrGetPtr it throws a page fault exception.

Hence making a local copy using DuplicateDevicePath()
to avoid the page fault exception.

Cc: Eric Dong <eric.dong@...>
Cc: Liming Gao <gaoliming@...>

Signed-off-by: Abdul Lateef Attar <abdattar@...>
---
Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
index 0bcee7c9a4ba..8700118d255a 100644
--- a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
+++ b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
@@ -3,6 +3,7 @@
implementation instance of the BDS hook library

Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2022 Advanced Micro Devices, Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -131,7 +132,7 @@ IsTrustedConsole (

switch (ConsoleType) {
case ConIn:
- TrustedConsoleDevicepath = PcdGetPtr (PcdTrustedConsoleInputDevicePath);
+ TrustedConsoleDevicepath = DuplicateDevicePath (PcdGetPtr (PcdTrustedConsoleInputDevicePath));
break;
case ConOut:
//
@@ -147,7 +148,7 @@ IsTrustedConsole (
TempDevicePath = NextDevicePathNode (TempDevicePath);
}

- TrustedConsoleDevicepath = PcdGetPtr (PcdTrustedConsoleOutputDevicePath);
+ TrustedConsoleDevicepath = DuplicateDevicePath (PcdGetPtr (PcdTrustedConsoleOutputDevicePath));
break;
default:
ASSERT (FALSE);
@@ -171,7 +172,9 @@ IsTrustedConsole (
} while (TempDevicePath != NULL);

FreePool (ConsoleDevice);
-
+ if (TrustedConsoleDevicepath != NULL) {
+ FreePool (TrustedConsoleDevicepath);
+ }
return FALSE;
}

@@ -624,7 +627,7 @@ ConnectTrustedStorage (
EFI_STATUS Status;
EFI_HANDLE DeviceHandle;

- TrustedStorageDevicepath = PcdGetPtr (PcdTrustedStorageDevicePath);
+ TrustedStorageDevicepath = DuplicateDevicePath (PcdGetPtr (PcdTrustedStorageDevicePath));
DumpDevicePath (L"TrustedStorage", TrustedStorageDevicepath);

TempDevicePath = TrustedStorageDevicepath;
@@ -649,6 +652,9 @@ ConnectTrustedStorage (

FreePool (Instance);
} while (TempDevicePath != NULL);
+ if (TrustedStorageDevicepath != NULL) {
+ FreePool (TrustedStorageDevicepath);
+ }
}


@@ -1031,7 +1037,7 @@ AddConsoleVariable (
EFI_HANDLE GraphicsControllerHandle;
EFI_DEVICE_PATH *GopDevicePath;

- TempDevicePath = ConsoleDevicePath;
+ TempDevicePath = DuplicateDevicePath (ConsoleDevicePath);
do {
Instance = GetNextDevicePathInstance (&TempDevicePath, &Size);
if (Instance == NULL) {
@@ -1074,6 +1080,9 @@ AddConsoleVariable (

FreePool (Instance);
} while (TempDevicePath != NULL);
+ if (TempDevicePath != NULL) {
+ FreePool (TempDevicePath);
+ }
}


--
2.25.1


[edk2-platforms PATCH v1 0/1] BoardModulePkg: Copy device path

Abdul Lateef Attar
 

(Resending patch with [edk2-platforms] prefix with correct emailid).
GCC compiler puts the DevicePath PCDs to the read-only
section. During boot if try to process the device path
after PtrGetPtr it throws a page fault exception.

Hence making a local copy using DuplicateDevicePath()
to avoid the page fault exception.

REF : https://github.com/abdattar/edk2-platforms/tree/BoardModulePkg

Cc: Eric Dong <eric.dong@...>
Cc: Liming Gao <gaoliming@...>

Abdul Lateef Attar (1):
BoardModulePkg: Copy device path before processing

Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)

--
2.25.1


回复: [edk2-devel] [PATCH V8 00/47] Enable Intel TDX in OvmfPkg (Config-A)

gaoliming
 

Min:
As Jiewen mentions, EFI_RESOURCE_MEMORY_UNACCEPTED will be in next public spec. So, it can't be added now.

I suggest to add edk2 definition for this type in MdeModulePkg first, such as EDKII_RESOURCE_MEMORY_UNACCEPTED. It can be removed after new spec is published.

Thanks
Liming

-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Min Xu
发送时间: 2022年3月12日 9:53
收件人: devel@edk2.groups.io
抄送: Min Xu <min.m.xu@...>; Brijesh Singh
<brijesh.singh@...>; Eric Dong <eric.dong@...>; Erdem Aktas
<erdemaktas@...>; Hao A Wu <hao.a.wu@...>; Jian J Wang
<jian.j.wang@...>; James Bottomley <jejb@...>; Jiewen
Yao <jiewen.yao@...>; Liming Gao <gaoliming@...>;
Michael D Kinney <michael.d.kinney@...>; Ray Ni <ray.ni@...>;
Rahul Kumar <rahul1.kumar@...>; Tom Lendacky
<thomas.lendacky@...>; Zhiguang Liu <zhiguang.liu@...>; Gerd
Hoffmann <kraxel@...>
主题: [edk2-devel] [PATCH V8 00/47] Enable Intel TDX in OvmfPkg (Config-A)

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3249

Intel's Trust Domain Extensions (Intel TDX) refers to an Intel technology
that extends Virtual Machines Extensions (VMX) and Multi-Key Total Memory
Encryption (MKTME) with a new kind of virutal machines guest called a
Trust Domain (TD). A TD is desinged to run in a CPU mode that protects the
confidentiality of TD memory contents and the TD's CPU state from other
software, including the hosting Virtual-Machine Monitor (VMM), unless
explicitly shared by the TD itself.

There are 2 configurations for TDVF to upstream. See below link for
the definitions of the 2 configurations.
https://edk2.groups.io/g/devel/message/76367

This patch-set is to enable Config-A in OvmfPkg.
- Merge the *basic* TDVF feature to existing OvmfX64Pkg.dsc. (Align
with existing SEV)
- Threat model: VMM is NOT out of TCB. (We don’t make things worse.)
- The OvmfX64Pkg.dsc includes SEV/TDX/normal OVMF basic boot capability.
The final binary can run on SEV/TDX/normal OVMF
- No changes to existing OvmfPkgX64 image layout.
- No need to add additional security features if they do not exist today
- No need to remove features if they exist today.
- RTMR is not supported
- PEI phase is NOT skipped in either Td or Non-Td

Patch 01 - 33 are changes in SEC phase. Also some libraries in these
patches are workable in SEC/PEI/DXE.

Patch 16 - 29 extract the common codes from OvmfPkg/PlatformPei to a new
PlatformInitLib. After that OvmfPkg/PlatformPei is refactored with this
lib. These 14 patches are currently reviewed in another separate
patch-set. https://edk2.groups.io/g/devel/message/87327

Patch 34 - 39 are changes in PEI phase.

Patch 40 - 44 are changes in DXE phase.

Patch 45 - 47 are for local Apic timer DXE driver.

[TDX]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-whitepaper-final9-17.pdf

[TDX-Module]: https://software.intel.com/content/dam/develop/external/
us/en/documents/tdx-module-1.0-public-spec-v0.931.pdf

[TDVF]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-virtual-firmware-design-guide-rev-1.pdf

[GCHI]: https://software.intel.com/content/dam/develop/external/us/en/
documents/intel-tdx-guest-hypervisor-communication-interface-1.0-344426-
002.pdf

Code is at https://github.com/mxu9/edk2/tree/tdvf_wave2.v8

v8 changes:
- Based on the comments of PlatformInitLib and OvmfPkg/PlatformPei,
a separte patch-set is created for the changes. It is now under review
https://edk2.groups.io/g/devel/message/87327
- Based on the comments, TdCall/TdVmCall/TdIsEnabled is wrapped with
MDE_CPU_IA32 and MDE_CPU_X64.
- EFI_RESOURCE_ATTRIBUTE_ENCRYPTED is removed based on the TDVF
Spec
update. Instead EFI_RESOURCE_MEMORY_UNACCEPTED is added to
indicate
the memory which to be accepted in TDVF. The corresponding logic
of AcceptMemory is updated as well. Please see Patch 31.
- PcdIa32EferChangeAllowed is deleted. Because for Td guest
IA32_EFER.NXE is set by default. So we only need check whether it has
been set before it is to be set again. See Patch 35.
- Based on comments PcdTdxSharedBitMask is defined in
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic,
PcdsDynamicEx]
- Delete un-necessary header files in TdxLib.h.
- Other minor updates and changes.

v7 changes:
- Based on the comments from last review, 8 PlatformInitLib patches
are squashed into 4 patches (#17-#20). These 4 patches are not
related to Tdx guest. Tdx related codes of PlatformInitLib is
in #21.
- gUefiOvmfPkgTdxPlatformGuid is renamed as
gUefiOvmfPkgPlatformInfoGuid.
Because this GUID is used not only by Tdx guest, but also by
Legacy guest.
- PlatformInitLibNull is deleted.
- In PlatformPei Pml4Entries is cap at 512 entries when
mPhysMemAddressWidth > 48.

v7 not-addressed comments
- Comments in MpInitLib have not been addressed yet. It will be
addressed in the following version.
- Thanks much for your understanding.

v6 changes:
- PlatformInitLib and OvmfPkg/PlatformPei refactoring are covered in
patch from 17 - 24. These patches are not related to Tdx guest. Tdx
related codes of PlatformInitLib is in patch 25.
- In the previous patch-sets, TdHob is processed in
OvmfPkg/Sec/IntelTdx.c. Per Gerd's suggestion they are now moved
to PlatformInitLib/IntelTdx.c. So that they can be reused in Config-B.
- The default Accept page size is changed from 4K to 2M.
- The BspAcceptMemoryResourceRange is refactored according to Gerd's
comment.
- In ApRunLoop.nasm command field is set to zero as acknowledgement.
This is a fix based on the ACPI Spec v6.4,Sec titled "Multiprocessor
Wakeup Structure".

v6 not-addressed comments
- Comments in MpInitLib have not been addressed yet. It will be
addressed in the following version.
- Thanks much for your understanding.

v5 changes:
- PlatformInitLib is introduced which wraps the common functions in
OvmfPkg/PlatformPei. It is because there are a lot of duplicated
codes for Platform initialization in PEI phase and there are at least
3 variants of PlatformPei. Another reason is that in TDVF Config-B
PEI-less boot needs the similar initiliazation as PlatformPei. Based
on the discussion with the community, PlatformInitLib is introduced.
As the first stage OvmfPkg/PlatformPei is refactored with this lib.
In the future the other 2 PlatformPei variants will be refactored
as well.
- PcdIgnoreVeHalt is deprecated.
- Add spec link for Mailbox.
- Other minor changes, such as comments, uncrustify formats, etc.

v5 not-addressed comments
- Comments in MpInitLib have not been addressed yet. It will be
addressed in the following version.
- Some comments may be missed. I will re-visit the review emails.
- Thanks much for your understanding.

v4 changes:
- Split the TdxLib into 2 libraries. The TDX basic functions
(TdCall / TdVmCall / TdIsEnabled) are moved to BaseLib (#2).
The other functions are in TdxLib. (#3)
- Based on above changes (TdCall/TdVmCall/TdIsEnabled in BaseLib)
the TdxLib.inf is not necessary in some Pkgs, such as
UefiPayloadPkg. The duplicated source code are deleted (BaseIoLib
is the sample).
- Drop the Accepting pages with TDX MP service. Instead only BSP
accepts pages. There maybe boot performance issue. There are some
mitigations to it, such as 2M accept page size, lazy accept, etc.
We will re-visit this issue in a separate patch-set.
- Relocate Mailbox in TdxDxe driver instead of in PlatformPei. This
is to keep consistence with Config-B (PEI is skipped in Config-B).
- SetMmioSharedBit in TdxDxe driver instead of in DxeIplPeim after
CreateIdentityMappingPageTables. This is to keep consistence with
Config-B (PEI is skipped in Config-B).
- Some other minor changes, such as switch-case indention.
- Rebase the code base (commit: 8c06c53b585a) and update the code with
uncrustify.

v4 not-addressed comments:
- Comments in MpInitLib have not been addressed yet. It will be
addressed in the next version.
- BaseMemEncryptTdxLib is suggested to be merged with
BaseMemEncryptSevLib. It will be addressed in the next version.
- Gerd suggests a generic page table walker which is able to set
and clear bits for a given memory range in both SEV and TDX guest.
This suggestion will be addressed in the next version.
- Some comments may be missed. I will re-visit the review emails.
- Thanks much for your understanding.

v3 changes:
- LocalApicTimerDxe is split out to be a separate patch-series.
- VmTdExitLibNull/VmgExitLib are removed. Instead the VmgExitLib
is extended to handle #VE exception. (Patch 3-5)
- Split the Tdx support of base IoLib into 4 commits. (Patch 6-9)
- Alter of MADT table is updated. In previous version it was
created from scratch. Now it gets the installed table, copy
it to a larger buffer and append the ACPI_MADT_MPWK to it.
(Patch 25)
- Changes in BaseXApicX2ApicLib is refined based on the
feedbacks. (Add spec link of MSR access definition, rename
some funtion name, etc.) (Patch 11)
- Use PcdConfidentialComputingGuestAttr to probe TDX guest instead
of CPUID. But in some cases PcdConfidentialComputingGuestAttr
cannot be used because it has not been set yet.
- Some other minor changes.

v3 not-addressed comments:
- Some of the comments have not been addressed. This is because I
need more time to consider how to address these comments.
At the same time I want to submit a new version based on the above
changes so that community can review in a more efficient way.
(v2 is the version one month ago).
- Comments in MpInitLib have not been addressed yet. It will be
addressed in v4.
- BaseMemEncryptTdxLib should be merged with BaseMemEncryptSevLib.
It will be addressed in v4.
- Some comments may be missed. I will re-visit the review emails.
- Thanks much for your understanding.

v2 changes:
- Remove TdxProbeLib. It is to reduce the depencies of the lib.
- In v1 a new function (AllocatePagesWithMemoryType) is added in
PeiMemoryAllocationLib. This function is not necessary. It can
be replaced by PeiServicesAllocatePages.
- IoLibFifo.c is added in BaseIoLibIntrinsic. This file includes
the functions of read/write of I/O port fifo. These functions
will call TdIoReadFifo or SevIoReadFifo by checking TDX or SEV
in run-time.
- DXE related patches are added. (Patch 22-28)
- Fix typo in commit/comment message, or some minor changes.
- Rebase the edk2 code base. (4cc1458dbe00)

Cc: Brijesh Singh <brijesh.singh@...>
Cc: Eric Dong <eric.dong@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Jian J Wang <jian.j.wang@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Liming Gao <gaoliming@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Cc: Gerd Hoffmann <kraxel@...>
Signed-off-by: Min Xu <min.m.xu@...>

Min Xu (47):
MdePkg: Add Tdx.h
MdePkg: Introduce basic Tdx functions in BaseLib
MdePkg: Add TdxLib to wrap Tdx operations
UefiCpuPkg: Extend VmgExitLibNull to handle #VE exception
OvmfPkg: Extend VmgExitLib to handle #VE exception
UefiCpuPkg/CpuExceptionHandler: Add base support for the #VE exception
MdePkg: Add helper functions for Tdx guest in BaseIoLibIntrinsic
MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsic
MdePkg: Support IoFifo for Tdx guest in BaseIoLibIntrinsic
MdePkg: Support IoRead/IoWrite for Tdx guest in BaseIoLibIntrinsic
UefiCpuPkg: Support TDX in BaseXApicX2ApicLib
MdePkg: Add macro to check SEV / TDX guest
UefiCpuPkg: Enable Tdx support in MpInitLib
OvmfPkg: Add IntelTdx.h in OvmfPkg/Include/IndustryStandard
OvmfPkg: Add TdxMailboxLib
OvmfPkg: Create initial version of PlatformInitLib
OvmfPkg/PlatformInitLib: Add hob functions
OvmfPkg/PlatformPei: Move global variables to PlatformInfoHob
OvmfPkg/PlatformPei: Refactor MiscInitialization
OvmfPkg/PlatformPei: Refactor MiscInitialization for CloudHV
OvmfPkg/PlatformPei: Refactor AddressWidthInitialization
OvmfPkg/PlatformPei: Refactor MaxCpuCountInitialization
OvmfPkg/PlatformPei: Refactor QemuUc32BaseInitialization
OvmfPkg/PlatformPei: Refactor InitializeRamRegions
OvmfPkg/PlatformPei: Refactor MemMapInitialization
OvmfPkg/PlatformPei: Refactor NoexecDxeInitialization
OvmfPkg/PlatformPei: Refactor MiscInitialization
OvmfPkg/PlatformInitLib: Create MemDetect.c
OvmfPkg/PlatformInitLib: Move functions to Platform.c
MdePkg: Add EFI_RESOURCE_MEMORY_UNACCEPTED defition
OvmfPkg: Update PlatformInitLib to process Tdx hoblist
OvmfPkg/Sec: Declare local variable as volatile in
SecCoreStartupWithStack
OvmfPkg: Update Sec to support Tdx
OvmfPkg: Check Tdx in QemuFwCfgPei to avoid DMA operation
MdeModulePkg: Skip setting IA32_ERER.NXE if it has already been set
MdeModulePkg: Add PcdTdxSharedBitMask
UefiCpuPkg: Update AddressEncMask in CpuPageTable
OvmfPkg: Update PlatformInitLib for Tdx guest
OvmfPkg: Update PlatformPei to support Tdx guest
OvmfPkg: Update AcpiPlatformDxe to alter MADT table
OvmfPkg/BaseMemEncryptTdxLib: Add TDX helper library
OvmfPkg: Add TdxDxe driver
OvmfPkg/QemuFwCfgLib: Support Tdx in QemuFwCfgDxe
OvmfPkg: Update IoMmuDxe to support TDX
OvmfPkg: Rename XenTimerDxe to LocalApicTimerDxe
UefiCpuPkg: Setting initial-count register as the last step
OvmfPkg: Switch timer in build time for OvmfPkg

.../Core/DxeIplPeim/X64/VirtualMemory.c | 8 +-
MdeModulePkg/MdeModulePkg.dec | 4 +
.../Include/ConfidentialComputingGuestAttr.h | 3 +
MdePkg/Include/IndustryStandard/Tdx.h | 203 ++++
MdePkg/Include/Library/BaseLib.h | 66 ++
MdePkg/Include/Library/TdxLib.h | 92 ++
MdePkg/Include/Pi/PiHob.h | 3 +-
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 2 +
.../BaseIoLibIntrinsicSev.inf | 7 +
MdePkg/Library/BaseIoLibIntrinsic/IoLib.c | 81 +-
MdePkg/Library/BaseIoLibIntrinsic/IoLibFifo.c | 217 ++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c | 51 +-
.../BaseIoLibIntrinsic/IoLibInternalTdx.c | 674 +++++++++++++
.../BaseIoLibIntrinsic/IoLibInternalTdxNull.c | 497 +++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c | 73 +-
MdePkg/Library/BaseIoLibIntrinsic/IoLibSev.h | 166 +++
MdePkg/Library/BaseIoLibIntrinsic/IoLibTdx.h | 410 ++++++++
.../BaseIoLibIntrinsic/X64/IoFifoSev.nasm | 34 +-
MdePkg/Library/BaseLib/BaseLib.inf | 4 +
MdePkg/Library/BaseLib/IntelTdxNull.c | 83 ++
MdePkg/Library/BaseLib/X64/TdCall.nasm | 85 ++
MdePkg/Library/BaseLib/X64/TdProbe.c | 62 ++
MdePkg/Library/BaseLib/X64/TdVmcall.nasm | 145 +++
MdePkg/Library/TdxLib/AcceptPages.c | 181 ++++
MdePkg/Library/TdxLib/Rtmr.c | 84 ++
MdePkg/Library/TdxLib/TdInfo.c | 115 +++
MdePkg/Library/TdxLib/TdxLib.inf | 37 +
MdePkg/Library/TdxLib/TdxLibNull.c | 106 ++
MdePkg/MdePkg.dec | 3 +
MdePkg/MdePkg.dsc | 1 +
OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 1 +
OvmfPkg/AcpiPlatformDxe/QemuFwCfgAcpi.c | 14 +-
OvmfPkg/AmdSev/AmdSevX64.dsc | 11 +-
OvmfPkg/AmdSev/AmdSevX64.fdf | 3 +-
OvmfPkg/Bhyve/BhyveX64.dsc | 5 +
OvmfPkg/CloudHv/CloudHvX64.dsc | 8 +-
OvmfPkg/CloudHv/CloudHvX64.fdf | 2 +-
OvmfPkg/Include/IndustryStandard/IntelTdx.h | 67 ++
OvmfPkg/Include/Library/MemEncryptTdxLib.h | 81 ++
OvmfPkg/Include/Library/PlatformInitLib.h | 237 +++++
OvmfPkg/Include/Library/TdxMailboxLib.h | 76 ++
.../Include/Protocol/QemuAcpiTableNotify.h | 27 +
OvmfPkg/Include/TdxCommondefs.inc | 51 +
OvmfPkg/IoMmuDxe/AmdSevIoMmu.c | 103 +-
OvmfPkg/IoMmuDxe/AmdSevIoMmu.h | 6 +-
OvmfPkg/IoMmuDxe/IoMmuDxe.c | 6 +-
OvmfPkg/IoMmuDxe/IoMmuDxe.inf | 5 +
.../BaseMemEncryptTdxLib.inf | 44 +
.../BaseMemEncryptTdxLibNull.inf | 35 +
.../BaseMemoryEncryptionNull.c | 90 ++
.../BaseMemEncryptTdxLib/MemoryEncryption.c | 948
++++++++++++++++++
.../BaseMemEncryptTdxLib/VirtualMemory.h | 181 ++++
.../PlatformInitLib}/Cmos.c | 32 +-
OvmfPkg/Library/PlatformInitLib/IntelTdx.c | 563 +++++++++++
.../Library/PlatformInitLib/IntelTdxNull.c | 46 +
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 856
++++++++++++++++
OvmfPkg/Library/PlatformInitLib/Platform.c | 573 +++++++++++
.../PlatformInitLib/PlatformInitLib.inf | 98 ++
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgDxe.c | 9 +-
.../Library/QemuFwCfgLib/QemuFwCfgDxeLib.inf | 1 +
.../QemuFwCfgLib/QemuFwCfgLibInternal.h | 11 +
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c | 32 +
.../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf | 2 +
OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c | 141 +++
.../Library/TdxMailboxLib/TdxMailboxLib.inf | 52 +
.../Library/TdxMailboxLib/TdxMailboxNull.c | 85 ++
OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf | 3 +-
OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h | 32 +
.../Library/VmgExitLib/VmTdExitVeHandler.c | 559 +++++++++++
OvmfPkg/Library/VmgExitLib/VmgExitLib.inf | 2 +
.../Library/VmgExitLib/X64/TdVmcallCpuid.nasm | 146 +++
.../LocalApicTimerDxe.c} | 4 +-
.../LocalApicTimerDxe.h} | 4 +-
.../LocalApicTimerDxe.inf} | 7 +-
OvmfPkg/Microvm/MicrovmX64.dsc | 8 +-
OvmfPkg/Microvm/MicrovmX64.fdf | 2 +-
OvmfPkg/OvmfPkg.dec | 17 +
OvmfPkg/OvmfPkgIa32.dsc | 15 +-
OvmfPkg/OvmfPkgIa32.fdf | 8 +-
OvmfPkg/OvmfPkgIa32X64.dsc | 15 +-
OvmfPkg/OvmfPkgIa32X64.fdf | 8 +-
OvmfPkg/OvmfPkgX64.dsc | 32 +-
OvmfPkg/OvmfPkgX64.fdf | 11 +-
OvmfPkg/OvmfXen.dsc | 7 +-
OvmfPkg/OvmfXen.fdf | 2 +-
OvmfPkg/PlatformPei/AmdSev.c | 10 +-
OvmfPkg/PlatformPei/Cmos.h | 48 -
OvmfPkg/PlatformPei/FeatureControl.c | 7 +-
OvmfPkg/PlatformPei/Fv.c | 6 +-
OvmfPkg/PlatformPei/IntelTdx.c | 51 +
OvmfPkg/PlatformPei/MemDetect.c | 885 ++--------------
OvmfPkg/PlatformPei/MemTypeInfo.c | 4 +-
OvmfPkg/PlatformPei/Platform.c | 629 ++----------
OvmfPkg/PlatformPei/Platform.h | 97 +-
OvmfPkg/PlatformPei/PlatformPei.inf | 6 +-
OvmfPkg/Sec/SecMain.c | 44 +-
OvmfPkg/Sec/SecMain.inf | 3 +
OvmfPkg/Sec/X64/SecEntry.nasm | 82 ++
OvmfPkg/TdxDxe/TdxAcpiTable.c | 213 ++++
OvmfPkg/TdxDxe/TdxAcpiTable.h | 60 ++
OvmfPkg/TdxDxe/TdxDxe.c | 261 +++++
OvmfPkg/TdxDxe/TdxDxe.inf | 64 ++
OvmfPkg/TdxDxe/X64/ApRunLoop.nasm | 90 ++
UefiCpuPkg/CpuDxe/CpuDxe.inf | 1 +
UefiCpuPkg/CpuDxe/CpuPageTable.c | 4 +
UefiCpuPkg/Include/Library/VmgExitLib.h | 28 +
.../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 170 +++-
.../PeiDxeSmmCpuException.c | 17 +
.../SecPeiCpuException.c | 18 +
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 3 +
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 15 +-
UefiCpuPkg/Library/MpInitLib/MpIntelTdx.h | 71 ++
UefiCpuPkg/Library/MpInitLib/MpLib.c | 27 +
UefiCpuPkg/Library/MpInitLib/MpLibTdx.c | 128 +++
UefiCpuPkg/Library/MpInitLib/MpLibTdxNull.c | 73 ++
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 3 +
.../Library/VmgExitLibNull/VmTdExitNull.c | 38 +
.../Library/VmgExitLibNull/VmgExitLibNull.inf | 1 +
118 files changed, 10411 insertions(+), 1627 deletions(-)
create mode 100644 MdePkg/Include/IndustryStandard/Tdx.h
create mode 100644 MdePkg/Include/Library/TdxLib.h
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibFifo.c
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
create mode 100644
MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdxNull.c
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibSev.h
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibTdx.h
create mode 100644 MdePkg/Library/BaseLib/IntelTdxNull.c
create mode 100644 MdePkg/Library/BaseLib/X64/TdCall.nasm
create mode 100644 MdePkg/Library/BaseLib/X64/TdProbe.c
create mode 100644 MdePkg/Library/BaseLib/X64/TdVmcall.nasm
create mode 100644 MdePkg/Library/TdxLib/AcceptPages.c
create mode 100644 MdePkg/Library/TdxLib/Rtmr.c
create mode 100644 MdePkg/Library/TdxLib/TdInfo.c
create mode 100644 MdePkg/Library/TdxLib/TdxLib.inf
create mode 100644 MdePkg/Library/TdxLib/TdxLibNull.c
create mode 100644 OvmfPkg/Include/IndustryStandard/IntelTdx.h
create mode 100644 OvmfPkg/Include/Library/MemEncryptTdxLib.h
create mode 100644 OvmfPkg/Include/Library/PlatformInitLib.h
create mode 100644 OvmfPkg/Include/Library/TdxMailboxLib.h
create mode 100644 OvmfPkg/Include/Protocol/QemuAcpiTableNotify.h
create mode 100644 OvmfPkg/Include/TdxCommondefs.inc
create mode 100644
OvmfPkg/Library/BaseMemEncryptTdxLib/BaseMemEncryptTdxLib.inf
create mode 100644
OvmfPkg/Library/BaseMemEncryptTdxLib/BaseMemEncryptTdxLibNull.inf
create mode 100644
OvmfPkg/Library/BaseMemEncryptTdxLib/BaseMemoryEncryptionNull.c
create mode 100644
OvmfPkg/Library/BaseMemEncryptTdxLib/MemoryEncryption.c
create mode 100644
OvmfPkg/Library/BaseMemEncryptTdxLib/VirtualMemory.h
rename OvmfPkg/{PlatformPei => Library/PlatformInitLib}/Cmos.c (61%)
create mode 100644 OvmfPkg/Library/PlatformInitLib/IntelTdx.c
create mode 100644 OvmfPkg/Library/PlatformInitLib/IntelTdxNull.c
create mode 100644 OvmfPkg/Library/PlatformInitLib/MemDetect.c
create mode 100644 OvmfPkg/Library/PlatformInitLib/Platform.c
create mode 100644 OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
create mode 100644 OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c
create mode 100644 OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf
create mode 100644 OvmfPkg/Library/TdxMailboxLib/TdxMailboxNull.c
create mode 100644 OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h
create mode 100644 OvmfPkg/Library/VmgExitLib/VmTdExitVeHandler.c
create mode 100644 OvmfPkg/Library/VmgExitLib/X64/TdVmcallCpuid.nasm
rename OvmfPkg/{XenTimerDxe/XenTimerDxe.c =>
LocalApicTimerDxe/LocalApicTimerDxe.c} (95%)
rename OvmfPkg/{XenTimerDxe/XenTimerDxe.h =>
LocalApicTimerDxe/LocalApicTimerDxe.h} (96%)
rename OvmfPkg/{XenTimerDxe/XenTimerDxe.inf =>
LocalApicTimerDxe/LocalApicTimerDxe.inf} (80%)
delete mode 100644 OvmfPkg/PlatformPei/Cmos.h
create mode 100644 OvmfPkg/PlatformPei/IntelTdx.c
create mode 100644 OvmfPkg/TdxDxe/TdxAcpiTable.c
create mode 100644 OvmfPkg/TdxDxe/TdxAcpiTable.h
create mode 100644 OvmfPkg/TdxDxe/TdxDxe.c
create mode 100644 OvmfPkg/TdxDxe/TdxDxe.inf
create mode 100644 OvmfPkg/TdxDxe/X64/ApRunLoop.nasm
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpIntelTdx.h
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLibTdx.c
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLibTdxNull.c
create mode 100644 UefiCpuPkg/Library/VmgExitLibNull/VmTdExitNull.c

--
2.29.2.windows.2





Re: [PATCH v2] IntelFsp2Pkg: BaseFspSwitchStackLib Support for X64

Chiu, Chasel
 

Thanks Ted for updating patch! Looks good to me.
Reviewed-by: Chasel Chiu <chasel.chiu@...>

-----Original Message-----
From: Kuo, Ted <ted.kuo@...>
Sent: Monday, March 14, 2022 10:48 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L
<nathaniel.l.desimone@...>; Zeng, Star <star.zeng@...>; S, Ashraf
Ali <ashraf.ali.s@...>
Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: BaseFspSwitchStackLib Support
for X64

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3832
Add BaseFspSwitchStackLib Support for X64.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Cc: Ashraf Ali S <ashraf.ali.s@...>
Signed-off-by: Ted Kuo <ted.kuo@...>
---
IntelFsp2Pkg/Include/PushPopRegsNasm.inc | 67 ++++++++++++++++++++
.../BaseFspSwitchStackLib.inf | 5 +-
.../BaseFspSwitchStackLib/FspSwitchStackLib.c | 8 +--
.../Library/BaseFspSwitchStackLib/X64/Stack.nasm | 72
++++++++++++++++++++++
4 files changed, 147 insertions(+), 5 deletions(-) create mode 100644
IntelFsp2Pkg/Include/PushPopRegsNasm.inc
create mode 100644
IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm

diff --git a/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
new file mode 100644
index 0000000000..ec103940d8
--- /dev/null
+++ b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
@@ -0,0 +1,67 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR> ;
+SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Abstract:
+;
+; Provide macro to push/pop registers in X64
+;
+;----------------------------------------------------------------------
+--------
+
+;-----------------------------------------------------------------------------
+; Macro: PUSHA_64
+;
+; Description: Saves all registers on stack ;
+; Input: None
+;
+; Output: None
+;-----------------------------------------------------------------------------
+%macro PUSHA_64 0
+ push r8
+ push r9
+ push r10
+ push r11
+ push r12
+ push r13
+ push r14
+ push r15
+ push rax
+ push rcx
+ push rdx
+ push rbx
+ push rsp
+ push rbp
+ push rsi
+ push rdi
+%endmacro
+
+;-----------------------------------------------------------------------------
+; Macro: POPA_64
+;
+; Description: Restores all registers from stack ;
+; Input: None
+;
+; Output: None
+;-----------------------------------------------------------------------------
+%macro POPA_64 0
+ pop rdi
+ pop rsi
+ pop rbp
+ pop rsp
+ pop rbx
+ pop rdx
+ pop rcx
+ pop rax
+ pop r15
+ pop r14
+ pop r13
+ pop r12
+ pop r11
+ pop r10
+ pop r9
+ pop r8
+%endmacro
+
diff --git
a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
index 3dcf3b9598..6909aec651 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.i
+++ nf
@@ -15,12 +15,15 @@
VERSION_STRING = 1.0
LIBRARY_CLASS = FspSwitchStackLib

-[Sources.IA32]
+[Sources]
FspSwitchStackLib.c

[Sources.IA32]
Ia32/Stack.nasm

+[Sources.X64]
+ X64/Stack.nasm
+
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
index 618c25c3b0..dae4e27172 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
@@ -20,16 +20,16 @@


**/
-UINT32
+UINTN
SwapStack (
- IN UINT32 NewStack
+ IN UINTN NewStack
)
{
FSP_GLOBAL_DATA *FspData;
- UINT32 OldStack;
+ UINTN OldStack;

FspData = GetFspGlobalDataPointer ();
OldStack = FspData->CoreStack;
- FspData->CoreStack = NewStack;
+ FspData->CoreStack = (UINTN) NewStack;
return OldStack;
}
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
new file mode 100644
index 0000000000..bd36fe4b8b
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
@@ -0,0 +1,72 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR> ;
+SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;----------------------------------------------------------------------
+--------
+
+ SECTION .text
+
+%include "PushPopRegsNasm.inc"
+
+extern ASM_PFX(SwapStack)
+
+;----------------------------------------------------------------------
+--------
+; UINT32
+; EFIAPI
+; Pei2LoaderSwitchStack (
+; VOID
+; )
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(Pei2LoaderSwitchStack)
+ASM_PFX(Pei2LoaderSwitchStack):
+ xor rax, rax
+ jmp ASM_PFX(FspSwitchStack)
+
+;----------------------------------------------------------------------
+--------
+; UINT32
+; EFIAPI
+; Loader2PeiSwitchStack (
+; VOID
+; )
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(Loader2PeiSwitchStack)
+ASM_PFX(Loader2PeiSwitchStack):
+ jmp ASM_PFX(FspSwitchStack)
+
+;----------------------------------------------------------------------
+--------
+; UINT32
+; EFIAPI
+; FspSwitchStack (
+; VOID
+; )
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(FspSwitchStack)
+ASM_PFX(FspSwitchStack):
+ ; Save current contexts
+ push rdx ; ApiParam2
+ push rcx ; ApiParam1
+ push rax ; FspInfoHeader
+ pushfq
+ cli
+ PUSHA_64
+ sub rsp, 16
+ sidt [rsp]
+
+ ; Load new stack
+ mov rcx, rsp
+ call ASM_PFX(SwapStack)
+ mov rsp, rax
+
+ ; Restore previous contexts
+ lidt [rsp]
+ add rsp, 16
+ POPA_64
+ popfq
+ add rsp, 24 ; FspInfoHeader + ApiParam[2]
+ ret
+
--
2.16.2.windows.1


Re: [PATCH v2] IntelFsp2Pkg: BaseFspDebugLibSerialPort Support for X64

Chiu, Chasel
 

Thanks Ted for updating patch!
Reviewed-by: Chasel Chiu <chasel.chiu@...>

-----Original Message-----
From: Kuo, Ted <ted.kuo@...>
Sent: Monday, March 14, 2022 10:33 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L
<nathaniel.l.desimone@...>; Zeng, Star <star.zeng@...>; S, Ashraf
Ali <ashraf.ali.s@...>
Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: BaseFspDebugLibSerialPort
Support for X64

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3833
Add BaseFspDebugLibSerialPort Support for X64.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Cc: Ashraf Ali S <ashraf.ali.s@...>
Cc: Ted Kuo <ted.kuo@...>
Signed-off-by: Ted Kuo <ted.kuo@...>
---
.../BaseFspDebugLibSerialPort.inf | 5 ++-
.../Library/BaseFspDebugLibSerialPort/DebugLib.c | 39 +++++++++++++---------
.../BaseFspDebugLibSerialPort/X64/FspDebug.nasm | 25 ++++++++++++++
3 files changed, 53 insertions(+), 16 deletions(-) create mode 100644
IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm

diff --git
a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.i
nf
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.i
nf
index 14b1899e6c..395def57c3 100644
---
a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.i
nf
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSeri
+++ alPort.inf
@@ -16,7 +16,7 @@
LIBRARY_CLASS = DebugLib

#
-# VALID_ARCHITECTURES = IA32
+# VALID_ARCHITECTURES = IA32 X64
#

[Sources]
@@ -25,6 +25,9 @@
[Sources.Ia32]
Ia32/FspDebug.nasm

+[Sources.X64]
+ X64/FspDebug.nasm
+
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
index c8824cde7f..cb2317bfb2 100644
--- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
@@ -33,7 +33,7 @@ VA_LIST mVaListNull;

@return StackFramePointer stack frame pointer of function call.
**/
-UINT32 *
+UINTN *
EFIAPI
GetStackFramePointer (
VOID
@@ -193,13 +193,13 @@ DebugBPrint (
**/
VOID
FillHex (
- UINT32 Value,
+ UINTN Value,
CHAR8 *Buffer
)
{
INTN Idx;

- for (Idx = 7; Idx >= 0; Idx--) {
+ for (Idx = (sizeof (UINTN) * 2) - 1; Idx >= 0; Idx--) {
Buffer[Idx] = mHexTable[Value & 0x0F];
Value >>= 4;
}
@@ -228,26 +228,35 @@ DebugAssertInternal (
)
{
CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
- UINT32 *Frame;
+ UINTN *Frame;

- Frame = (UINT32 *)GetStackFramePointer ();
+ Frame = (UINTN *)GetStackFramePointer ();

//
// Generate the ASSERT() message in Ascii format
//
- AsciiStrnCpyS (
- Buffer,
- sizeof (Buffer) / sizeof (CHAR8),
- "-> EBP:0x00000000 EIP:0x00000000\n",
- sizeof (Buffer) / sizeof (CHAR8) - 1
- );
+ if (sizeof (UINTN) == sizeof (UINT32)) {
+ AsciiStrnCpyS (
+ Buffer,
+ sizeof (Buffer) / sizeof (CHAR8),
+ "-> EBP:0x00000000 EIP:0x00000000\n",
+ sizeof (Buffer) / sizeof (CHAR8) - 1
+ );
+ } else {
+ AsciiStrnCpyS (
+ Buffer,
+ sizeof (Buffer) / sizeof (CHAR8),
+ "-> RBP:0x0000000000000000 RIP:0x0000000000000000\n",
+ sizeof (Buffer) / sizeof (CHAR8) - 1
+ );
+ }
SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
while (Frame != NULL) {
- FillHex ((UINT32)Frame, Buffer + 9);
- FillHex (Frame[1], Buffer + 9 + 8 + 8);
+ FillHex ((UINTN)Frame, Buffer + 9);
+ FillHex (Frame[1], Buffer + 9 + (sizeof (UINTN) * 2) + 8);
SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
- if ((Frame[0] > (UINT32)Frame) && (Frame[0] < (UINT32)Frame +
0x00100000)) {
- Frame = (UINT32 *)Frame[0];
+ if ((Frame[0] > (UINTN)Frame) && (Frame[0] < (UINTN)Frame + 0x00100000))
{
+ Frame = (UINTN *)Frame[0];
} else {
Frame = NULL;
}
diff --git
a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
new file mode 100644
index 0000000000..6cf0f0af8b
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
@@ -0,0 +1,25 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR> ;
+SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Abstract:
+;
+; FSP Debug functions
+;
+;----------------------------------------------------------------------
+--------
+
+ SECTION .text
+
+;----------------------------------------------------------------------
+--------
+; UINT32 *
+; EFIAPI
+; GetStackFramePointer (
+; VOID
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(GetStackFramePointer)
+ASM_PFX(GetStackFramePointer):
+ mov rax, rbp
+ ret
+
--
2.16.2.windows.1


Re: [PATCH edk2-platforms 0/3] JunoPkg: Fix AcpiSsdtRootPci.asl to use spaces and reserve ECAM area

Rebecca Cran
 

Could someone review this please?


Thanks.

Rebecca Cran

On 3/4/22 21:19, Rebecca Cran wrote:
I noticed Linux reports a firmware bug with the current Juno ACPI
tables. These patches fix it by reserving the ECAM area with a RES0
device, while also converting AcpiSsdtRootPci.asl from tabs to spaces
and using the standard Pcd from MdePkg for the ECAM base address.

Rebecca Cran (3):
Platform/ARM/JunoPkg: Convert AcpiSsdtRootPci.asl from tabs to spaces
Platform/ARM/JunoPkg: Use MdePkg PcdPciExpressBaseAddress for ECAM
addr
Platform/ARM/JunoPkg: Reserve the ECAM area in ACPI with RES0 device

Platform/ARM/JunoPkg/ArmJuno.dec | 4 +-
Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf | 4 +
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 2 +-
Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf | 2 +-
Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf | 2 +-
Platform/ARM/JunoPkg/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.inf | 2 +-
Platform/ARM/JunoPkg/Library/JunoPciHostBridgeLib/XPressRich3.h | 2 +-
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 2 +-
Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/AcpiTables.c | 2 +-
Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c | 4 +-
Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl | 301 ++++++++++----------
11 files changed, 172 insertions(+), 155 deletions(-)


Re: [PATCH] EmulatorPkg/RedfishPlatformCredentialLib: Check EFI_SECURE_BOOT_MODE_NAME

Nickle Wang
 

Reviewed-by: Nickle Wang <nickle.wang@...>

Thanks,
Nickle

-----Original Message-----
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Sent: Thursday, March 10, 2022 1:42 PM
To: devel@edk2.groups.io
Cc: Wang, Nickle (Server BIOS) <nickle.wang@...>; Andrew Fish <afish@...>; Ray Ni <ray.ni@...>
Subject: [PATCH] EmulatorPkg/RedfishPlatformCredentialLib: Check EFI_SECURE_BOOT_MODE_NAME

Check EFI_SECURE_BOOT_MODE_NAME before setting the flags to
prohibit acquiring Redfish service credential and using Redfish
service.

Signed-off-by: Abner Chang <abner.chang@...>
Cc: Nickle Wang <nickle.wang@...>
Cc: Andrew Fish <afish@...>
Cc: Ray Ni <ray.ni@...>
---
.../RedfishPlatformCredentialLib.c | 32 +++++++++----------
1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
index eaf9c56450..a0233a984d 100644
--- a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
+++ b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
@@ -165,6 +165,9 @@ LibStopRedfishService (
IN EDKII_REDFISH_CREDENTIAL_STOP_SERVICE_TYPE ServiceStopType
)
{
+ EFI_STATUS Status;
+ UINT8 *SecureBootVar;
+
if (ServiceStopType >= ServiceStopTypeMax) {
return EFI_INVALID_PARAMETER;
}
@@ -177,8 +180,18 @@ LibStopRedfishService (
if (!PcdGetBool (PcdRedfishServieStopIfSecureBootDisabled)) {
return EFI_UNSUPPORTED;
} else {
- mStopRedfishService = TRUE;
- DEBUG ((DEBUG_INFO, "EFI Redfish service is stopped due to SecureBoot is disabled!!\n"));
+ //
+ // Check Secure Boot status and lock Redfish service if Secure Boot is disabled.
+ //
+ Status = GetVariable2 (EFI_SECURE_BOOT_MODE_NAME, &gEfiGlobalVariableGuid, (VOID **)&SecureBootVar, NULL);
+ if (EFI_ERROR (Status) || (*SecureBootVar != SECURE_BOOT_MODE_ENABLE)) {
+ //
+ // Secure Boot is disabled
+ //
+ mSecureBootDisabled = TRUE;
+ mStopRedfishService = TRUE;
+ DEBUG ((DEBUG_INFO, "EFI Redfish service is stopped due to SecureBoot is disabled!!\n"));
+ }
}
} else if (ServiceStopType == ServiceStopTypeExitBootService) {
//
@@ -224,18 +237,5 @@ LibCredentialEndOfDxeNotify (
IN EDKII_REDFISH_CREDENTIAL_PROTOCOL *This
)
{
- EFI_STATUS Status;
- UINT8 *SecureBootVar;
-
- //
- // Check Secure Boot status and lock Redfish service if Secure Boot is disabled.
- //
- Status = GetVariable2 (EFI_SECURE_BOOT_MODE_NAME, &gEfiGlobalVariableGuid, (VOID **)&SecureBootVar, NULL);
- if (EFI_ERROR (Status) || (*SecureBootVar != SECURE_BOOT_MODE_ENABLE)) {
- //
- // Secure Boot is disabled
- //
- mSecureBootDisabled = TRUE;
- LibStopRedfishService (This, ServiceStopTypeSecureBootDisabled);
- }
+ LibStopRedfishService (This, ServiceStopTypeSecureBootDisabled);
}
--
2.17.1


Event: TianoCore Bug Triage - APAC / NAMO - 03/15/2022 #cal-reminder

devel@edk2.groups.io Calendar <noreply@...>
 

Reminder: TianoCore Bug Triage - APAC / NAMO

When:
03/15/2022
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%226e4ce4c4-1242-431b-9a51-92cd01a5df3c%22%7d

Organizer: Liming Gao gaoliming@...

View Event

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

Microsoft Teams meeting

Join on your computer or mobile app

Click here to join the meeting

Join with a video conferencing device

teams@...

Video Conference ID: 116 062 094 0

Alternate VTC dialing instructions

Or call in (audio only)

+1 916-245-6934,,77463821#   United States, Sacramento

Phone Conference ID: 774 638 21#

Find a local number | Reset PIN

Learn More | Meeting options


Re: [PATCH v2] BaseTools/GenFw: Enhance GenFw to support PRM GCC build

Bob Feng
 

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Bob Feng
Sent: Monday, March 14, 2022 2:45 PM
To: Huang, Li-Xia <lisa.huang@...>; devel@edk2.groups.io
Cc: Gao, Liming <gaoliming@...>; Chen, Christine <yuwei.chen@...>
Subject: Re: [edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support PRM GCC build

This patch looks good to me.

Reviewed-by: Bob Feng <bob.c.feng@...>

-----Original Message-----
From: Huang, Li-Xia <lisa.huang@...>
Sent: Monday, March 14, 2022 1:27 PM
To: devel@edk2.groups.io
Cc: Huang, Li-Xia <lisa.huang@...>; Gao, Liming <gaoliming@...>; Feng, Bob C <bob.c.feng@...>; Chen, Christine <yuwei.chen@...>
Subject: [edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support PRM GCC build

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3802

Since PRM module needs to support export table in PE-COFF, we'll enhance GenFw tool to support this.

Add one export flag in GenFw tool. If export flag is set:
Step1: Scan ELF symbol table based on PRM module descriptor to get descriptor offset address;
Step2: Find PRM handlers number and name in COFF file based on the address from step1;
Step3: Write PRM info such as handler name and export RVA into COFF export table.

PRM option currently only supports DXE RUNTIME driver and X64 arch.

Cc: Liming Gao <gaoliming@...>
Cc: Bob Feng <bob.c.feng@...>
Cc: Yuwei Chen <yuwei.chen@...>
Signed-off-by: Lixia Huang <lisa.huang@...>
---
BaseTools/Source/C/GenFw/Elf64Convert.c | 242 +++++++++++++++++-
BaseTools/Source/C/GenFw/ElfConvert.c | 8 +
BaseTools/Source/C/GenFw/ElfConvert.h | 43 +++-
BaseTools/Source/C/GenFw/GenFw.c | 20 +-
.../C/Include/IndustryStandard/PeImage.h | 7 +
5 files changed, 315 insertions(+), 5 deletions(-)

diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index 0bb3ead228..2aa9bfcc94 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -56,6 +56,12 @@ WriteDebug64 (
VOID ); +STATIC+VOID+WriteExport64 (+ VOID+ );+ STATIC VOID SetImageSize64 (@@ -106,7 +112,7 @@ STATIC UINT32 mCoffAlignment = 0x20;
// // PE section alignment. //-STATIC const UINT16 mCoffNbrSections = 4;+STATIC UINT16 mCoffNbrSections = 4; // // ELF sections to offset in Coff file.@@ -122,7 +128,7 @@ STATIC UINT32 mDataOffset; STATIC UINT32 mHiiRsrcOffset; STATIC UINT32 mRelocOffset; STATIC UINT32 mDebugOffset;-+STATIC UINT32 mExportOffset; // // Used for RISC-V relocations. //@@ -132,6 +138,14 @@ STATIC Elf64_Half mRiscVPass1SymSecIndex = 0;
STATIC INT32 mRiscVPass1Offset; STATIC INT32 mRiscVPass1GotFixup; +//+// Used for Export section.+//+STATIC UINT32 mExportSize;+STATIC UINT32 mExportRVA[PRM_MODULE_EXPORT_SYMBOL_NUM];+STATIC UINT32 mExportSymNum;+STATIC CHAR8 mExportSymName[PRM_MODULE_EXPORT_SYMBOL_NUM][PRM_HANDLER_NAME_MAXIMUM_LENGTH];+ // // Initialization Function //@@ -171,6 +185,13 @@ InitializeElf64 (
return FALSE; } + if (mExportFlag) {+ if (mEhdr->e_machine != EM_X86_64) {+ Error (NULL, 0, 3000, "Unsupported", "--prm option currently only supports X64 arch.");+ return FALSE;+ }+ }+ // // Update section header pointers //@@ -200,6 +221,11 @@ InitializeElf64 (
ElfFunctions->SetImageSize = SetImageSize64; ElfFunctions->CleanUp = CleanUp64; + if (mExportFlag) {+ mCoffNbrSections ++;+ ElfFunctions->WriteExport = WriteExport64;+ }+ return TRUE; } @@ -263,6 +289,17 @@ IsHiiRsrcShdr (
return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0); } +STATIC+BOOLEAN+IsSymbolShdr (+ Elf_Shdr *Shdr+ )+{+ Elf_Shdr *Namehdr = GetShdrByIndex(mEhdr->e_shstrndx);++ return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namehdr->sh_offset + Shdr->sh_name, ELF_SYMBOL_SECTION_NAME) == 0);+}+ STATIC BOOLEAN IsDataShdr (@@ -335,6 +372,37 @@ GetSymName (
return StrtabContents + Sym->st_name; } +//+// Get Prm Handler number and name+//+STATIC+VOID+FindPrmHandler (+ UINT64 Offset+ )+{+ PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER *PrmExport;+ PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT *PrmHandler;+ UINT32 HandlerNum;++ PrmExport = (PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER*)((UINT8*)mEhdr + Offset);+ PrmHandler = (PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT *)(PrmExport + 1);++ for (HandlerNum = 0; HandlerNum < PrmExport->NumberPrmHandlers; HandlerNum++) {+ strcpy(mExportSymName[mExportSymNum], PrmHandler->PrmHandlerName);+ mExportSymNum ++;+ PrmHandler += 1;++ //+ // Check if PRM handler number is larger than (PRM_MODULE_EXPORT_SYMBOL_NUM - 1)+ //+ if (mExportSymNum >= (PRM_MODULE_EXPORT_SYMBOL_NUM - 1)) {+ Error (NULL, 0, 3000, "Invalid", "FindPrmHandler: Number %u is too high.", mExportSymNum);+ exit(EXIT_FAILURE);+ }+ }+}+ // // Find the ELF section hosting the GOT from an ELF Rva // of a single GOT entry. Normally, GOT is placed in@@ -717,6 +785,7 @@ ScanSections64 (
UINT32 CoffEntry; UINT32 SectionCount; BOOLEAN FoundSection;+ UINT32 Offset; CoffEntry = 0; mCoffOffset = 0;@@ -880,6 +949,82 @@ ScanSections64 (
Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 data section. Source level debug might not work correctly.", mInImageName); } + //+ // The Symbol sections.+ //+ if (mExportFlag) {+ UINT32 SymIndex;+ Elf_Sym *Sym;+ UINT64 SymNum;+ const UINT8 *SymName;++ mExportOffset = mCoffOffset;+ mExportSize = sizeof(EFI_IMAGE_EXPORT_DIRECTORY) + strlen(mInImageName) + 1;++ for (i = 0; i < mEhdr->e_shnum; i++) {++ //+ // Determine if this is a symbol section.+ //+ Elf_Shdr *shdr = GetShdrByIndex(i);+ if (!IsSymbolShdr(shdr)) {+ continue;+ }++ UINT8 *Symtab = (UINT8*)mEhdr + shdr->sh_offset;+ SymNum = (shdr->sh_size) / (shdr->sh_entsize);++ //+ // First Get PrmModuleExportDescriptor+ //+ for (SymIndex = 0; SymIndex < SymNum; SymIndex++) {+ Sym = (Elf_Sym *)(Symtab + SymIndex * shdr->sh_entsize);+ SymName = GetSymName(Sym);+ if (SymName == NULL) {+ continue;+ }++ if (strcmp((CHAR8*)SymName, PRM_MODULE_EXPORT_DESCRIPTOR_NAME) == 0) {+ //+ // Find PrmHandler Number and Name+ //+ FindPrmHandler(Sym->st_value);++ strcpy(mExportSymName[mExportSymNum], (CHAR8*)SymName);+ mExportRVA[mExportSymNum] = (UINT32)(Sym->st_value);+ mExportSize += 2 * EFI_IMAGE_EXPORT_ADDR_SIZE + EFI_IMAGE_EXPORT_ORDINAL_SIZE + strlen((CHAR8 *)SymName) + 1;+ mExportSymNum ++;+ break;+ }+ }++ //+ // Second Get PrmHandler+ //+ for (SymIndex = 0; SymIndex < SymNum; SymIndex++) {+ UINT32 ExpIndex;+ Sym = (Elf_Sym *)(Symtab + SymIndex * shdr->sh_entsize);+ SymName = GetSymName(Sym);+ if (SymName == NULL) {+ continue;+ }++ for (ExpIndex = 0; ExpIndex < (mExportSymNum -1); ExpIndex++) {+ if (strcmp((CHAR8*)SymName, mExportSymName[ExpIndex]) != 0) {+ continue;+ }+ mExportRVA[ExpIndex] = (UINT32)(Sym->st_value);+ mExportSize += 2 * EFI_IMAGE_EXPORT_ADDR_SIZE + EFI_IMAGE_EXPORT_ORDINAL_SIZE + strlen((CHAR8 *)SymName) + 1;+ }+ }++ break;+ }++ mCoffOffset += mExportSize;+ mCoffOffset = CoffAlign(mCoffOffset);+ }+ // // The HII resource sections. //@@ -989,8 +1134,17 @@ ScanSections64 (
NtHdr->Pe32Plus.FileHeader.NumberOfSections--; } + //+ // If found symbol, add edata section between data and rsrc section+ //+ if(mExportFlag) {+ Offset = mExportOffset;+ } else {+ Offset = mHiiRsrcOffset;+ }+ if ((mHiiRsrcOffset - mDataOffset) > 0) {- CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,+ CreateSectionHeader (".data", mDataOffset, Offset - mDataOffset, EFI_IMAGE_SCN_CNT_INITIALIZED_DATA | EFI_IMAGE_SCN_MEM_WRITE | EFI_IMAGE_SCN_MEM_READ);@@ -999,6 +1153,20 @@ ScanSections64 (
NtHdr->Pe32Plus.FileHeader.NumberOfSections--; } + if(mExportFlag) {+ if ((mHiiRsrcOffset - mExportOffset) > 0) {+ CreateSectionHeader (".edata", mExportOffset, mHiiRsrcOffset - mExportOffset,+ EFI_IMAGE_SCN_CNT_INITIALIZED_DATA+ | EFI_IMAGE_SCN_MEM_READ);+ NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXPORT].Size = mHiiRsrcOffset - mExportOffset;+ NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXPORT].VirtualAddress = mExportOffset;++ } else {+ // Don't make a section of size 0.+ NtHdr->Pe32Plus.FileHeader.NumberOfSections--;+ }+ }+ if ((mRelocOffset - mHiiRsrcOffset) > 0) { CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset, EFI_IMAGE_SCN_CNT_INITIALIZED_DATA@@ -1757,4 +1925,72 @@ CleanUp64 (
} } +STATIC+VOID+WriteExport64 (+ VOID+ )+{+ EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;+ EFI_IMAGE_EXPORT_DIRECTORY *ExportDir;+ EFI_IMAGE_DATA_DIRECTORY *DataDir;+ UINT32 FileNameOffset;+ UINT32 NameOffset;+ UINT16 Index;+ UINT8 *Tdata = NULL;++ ExportDir = (EFI_IMAGE_EXPORT_DIRECTORY*)(mCoffFile + mExportOffset);+ ExportDir->Characteristics = 0;+ ExportDir->TimeDateStamp = 0;+ ExportDir->MajorVersion = 0;+ ExportDir->MinorVersion =0;+ ExportDir->Name = 0;+ ExportDir->NumberOfFunctions = mExportSymNum;+ ExportDir->NumberOfNames = mExportSymNum;+ ExportDir->Base = EFI_IMAGE_EXPORT_ORDINAL_BASE;+ ExportDir->AddressOfFunctions = mExportOffset + sizeof(EFI_IMAGE_EXPORT_DIRECTORY);+ ExportDir->AddressOfNames = ExportDir->AddressOfFunctions + EFI_IMAGE_EXPORT_ADDR_SIZE * mExportSymNum;+ ExportDir->AddressOfNameOrdinals = ExportDir->AddressOfNames + EFI_IMAGE_EXPORT_ADDR_SIZE * mExportSymNum;++ FileNameOffset = ExportDir->AddressOfNameOrdinals + EFI_IMAGE_EXPORT_ORDINAL_SIZE * mExportSymNum;+ NameOffset = FileNameOffset + strlen(mInImageName) + 1;++ // Write Input image Name RVA+ ExportDir->Name = FileNameOffset;++ // Write Input image Name+ strcpy((char *)(mCoffFile + FileNameOffset), mInImageName);++ for (Index = 0; Index < mExportSymNum; Index++) {+ //+ // Write Export Address Table+ //+ Tdata = mCoffFile + ExportDir->AddressOfFunctions + Index * EFI_IMAGE_EXPORT_ADDR_SIZE;+ *(UINT32 *)Tdata = mExportRVA[Index];++ //+ // Write Export Name Pointer Table+ //+ Tdata = mCoffFile + ExportDir->AddressOfNames + Index * EFI_IMAGE_EXPORT_ADDR_SIZE;+ *(UINT32 *)Tdata = NameOffset;++ //+ // Write Export Ordinal table+ //+ Tdata = mCoffFile + ExportDir->AddressOfNameOrdinals + Index * EFI_IMAGE_EXPORT_ORDINAL_SIZE;+ *(UINT16 *)Tdata = Index;++ //+ // Write Export Name Table+ //+ strcpy((char *)(mCoffFile + NameOffset), mExportSymName[Index]);+ NameOffset += strlen(mExportSymName[Index]) + 1;+ }++ NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);+ DataDir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXPORT];+ DataDir->VirtualAddress = mExportOffset;+ DataDir->Size = mExportSize;++} diff --git a/BaseTools/Source/C/GenFw/ElfConvert.c b/BaseTools/Source/C/GenFw/ElfConvert.c
index 7db8721167..be98544056 100644
--- a/BaseTools/Source/C/GenFw/ElfConvert.c
+++ b/BaseTools/Source/C/GenFw/ElfConvert.c
@@ -223,6 +223,14 @@ ConvertElf (
VerboseMsg ("Write debug info."); ElfFunctions.WriteDebug (); + //+ // For PRM Driver to Write export info.+ //+ if (mExportFlag) {+ VerboseMsg ("Write export info.");+ ElfFunctions.WriteExport ();+ }+ // // Make sure image size is correct before returning the new image. //diff --git a/BaseTools/Source/C/GenFw/ElfConvert.h b/BaseTools/Source/C/GenFw/ElfConvert.h
index 801e8de4a2..6ab4605227 100644
--- a/BaseTools/Source/C/GenFw/ElfConvert.h
+++ b/BaseTools/Source/C/GenFw/ElfConvert.h
@@ -24,6 +24,7 @@ extern UINT8 *mCoffFile; extern UINT32 mTableOffset; extern UINT32 mOutImageType; extern UINT32 mFileBufferSize;+extern BOOLEAN mExportFlag; // // Common EFI specific data.@@ -31,6 +32,44 @@ extern UINT32 mFileBufferSize;
#define ELF_HII_SECTION_NAME ".hii" #define ELF_STRTAB_SECTION_NAME ".strtab" #define MAX_COFF_ALIGNMENT 0x10000+#define ELF_SYMBOL_SECTION_NAME ".symtab"++//+// Platform Runtime Mechanism (PRM) specific data.+//+#define PRM_MODULE_EXPORT_SYMBOL_NUM 256++// <to-do> to include PRM header directly once PrmPkg is in main repo+#define PRM_HANDLER_NAME_MAXIMUM_LENGTH 128++#define PRM_MODULE_EXPORT_DESCRIPTOR_NAME "PrmModuleExportDescriptor"+#define PRM_MODULE_EXPORT_DESCRIPTOR_SIGNATURE SIGNATURE_64 ('P', 'R', 'M', '_', 'M', 'E', 'D', 'T')+#define PRM_MODULE_EXPORT_REVISION 0x0++//+// Platform Runtime Mechanism (PRM) Export Descriptor Structures+//+#pragma pack(push, 1)++typedef struct {+ EFI_GUID PrmHandlerGuid;+ CHAR8 PrmHandlerName[PRM_HANDLER_NAME_MAXIMUM_LENGTH];+} PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT;++typedef struct {+ UINT64 Signature;+ UINT16 Revision;+ UINT16 NumberPrmHandlers;+ EFI_GUID PlatformGuid;+ EFI_GUID ModuleGuid;+} PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER;++typedef struct {+ PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER Header;+ PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT PrmHandlerExportDescriptors[1];+} PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT;++#pragma pack(pop) // // Filter Types@@ -38,7 +77,8 @@ extern UINT32 mFileBufferSize;
typedef enum { SECTION_TEXT, SECTION_HII,- SECTION_DATA+ SECTION_DATA,+ SECTION_SYMBOL } SECTION_FILTER_TYPES; @@ -50,6 +90,7 @@ typedef struct {
BOOLEAN (*WriteSections) (SECTION_FILTER_TYPES FilterType); VOID (*WriteRelocations) (); VOID (*WriteDebug) ();+ VOID (*WriteExport) (); VOID (*SetImageSize) (); VOID (*CleanUp) (); diff --git a/BaseTools/Source/C/GenFw/GenFw.c b/BaseTools/Source/C/GenFw/GenFw.c
index 8cab70ba4d..6f61f16788 100644
--- a/BaseTools/Source/C/GenFw/GenFw.c
+++ b/BaseTools/Source/C/GenFw/GenFw.c
@@ -87,7 +87,7 @@ UINT32 mImageTimeStamp = 0;
UINT32 mImageSize = 0; UINT32 mOutImageType = FW_DUMMY_IMAGE; BOOLEAN mIsConvertXip = FALSE;-+BOOLEAN mExportFlag = FALSE; STATIC EFI_STATUS@@ -279,6 +279,10 @@ Returns:
except for -o or -r option. It is a action option.\n\ If it is combined with other action options, the later\n\ input action option will override the previous one.\n");+ fprintf (stdout, " --prm Scan symbol section from ELF image and \n\+ write export table into PE-COFF.\n\+ This option can be used together with -e.\n\+ It doesn't work for other options.\n"); fprintf (stdout, " -v, --verbose Turn on verbose output with informational messages.\n"); fprintf (stdout, " -q, --quiet Disable all messages except key message and fatal error\n"); fprintf (stdout, " -d, --debug level Enable debug messages, at input debug level.\n");@@ -1436,6 +1440,20 @@ Returns:
continue; } + if (stricmp (argv[0], "--prm") == 0) {+ if (stricmp (ModuleType, "DXE_RUNTIME_DRIVER") != 0 ){+ Error (NULL, 0, 1001, "Invalid", "--prm option only supports DXE RUNTIME driver.");+ goto Finish;+ }++ if (!mExportFlag) {+ mExportFlag = TRUE;+ }+ argc --;+ argv ++;+ continue;+ }+ if (argv[0][0] == '-') { Error (NULL, 0, 1000, "Unknown option", argv[0]); goto Finish;diff --git a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
index f17b8ee19b..21c968e650 100644
--- a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
+++ b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
@@ -571,6 +571,13 @@ typedef struct {
UINT32 AddressOfNameOrdinals; } EFI_IMAGE_EXPORT_DIRECTORY; +//+// Based export types.+//+#define EFI_IMAGE_EXPORT_ORDINAL_BASE 1+#define EFI_IMAGE_EXPORT_ADDR_SIZE 4+#define EFI_IMAGE_EXPORT_ORDINAL_SIZE 2+ /// /// DLL support. /// Import Format--
2.26.2.windows.1


Now: Tools, CI, Code base construction meeting series - 03/14/2022 #cal-notice

devel@edk2.groups.io Calendar <noreply@...>
 

Tools, CI, Code base construction meeting series

When:
03/14/2022
4:30pm to 5:30pm
(UTC-07:00) America/Los Angeles

Where:
https://github.com/tianocore/edk2/discussions/2614

View Event

Description:

TianoCore community,

Microsoft and Intel will be hosting a series of open meetings to discuss build, CI, tools, and other related topics. If you are interested, have ideas/opinions please join us. These meetings will be Monday 4:30pm Pacific Time on Microsoft Teams.

MS Teams Link in following discussion: * https://github.com/tianocore/edk2/discussions/2614

Anyone is welcome to join.

MS Teams Browser Clients * https://docs.microsoft.com/en-us/microsoftteams/get-clients?tabs=Windows#browser-client


Re: [edk2-platforms][PATCH V1 1/1] WhitleyOpenBoardPkg/JunctionCity: Build ACPI content

manickavasakam karpagavinayagam
 

Isaac/Nate :

 

Extracted the patch (refer the attached patch) from this email. When trying to apply the patch on latest edk2-platform (7cd51aa3c1ee601e0bf56d34dcf0533334c38997), we are seeing patch apply failure.

It says conflict at line number 39 or 26 based on the patch command used.

 

 

 

Please let us know EDKII-Platform commit you used for creating the patch ? Also, let us know which EDKII tag used by you to build the source ?

 

Thank you

 

-Manic

 

-----Original Message-----
From: Isaac Oram <isaac.w.oram@...>
Sent: Friday, March 11, 2022 6:31 PM
To: devel@edk2.groups.io
Cc: Nate DeSimone <nathaniel.l.desimone@...>; Chasel Chiu <chasel.chiu@...>; Manickavasakam Karpagavinayagam <manickavasakamk@...>
Subject: [EXTERNAL] [edk2-devel][edk2-platforms][PATCH V1 1/1] WhitleyOpenBoardPkg/JunctionCity: Build ACPI content

 

 

**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

 

Use source versions of AcpiTables, AcpiPlatform, and StaticSkuDataDxe.

 

Cc: Nate DeSimone <nathaniel.l.desimone@...>

Cc: Chasel Chiu <chasel.chiu@...>

Cc: Manickavasakam Karpagavinayagam <manickavasakamk@...>

Signed-off-by: Isaac Oram <isaac.w.oram@...>

---

Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/PlatformPkg.fdf  |  3 +

Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py   | 63 ++++++++++++++++++++

Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_config.cfg | 15 +++++

3 files changed, 81 insertions(+)

 

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/PlatformPkg.fdf b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/PlatformPkg.fdf

index 0b919b5ea9..b72aa2b688 100644

--- a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/PlatformPkg.fdf

+++ b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/PlatformPkg.fdf

@@ -601,6 +601,7 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize         = 0x01000000

   # UBA DXE common and board specific components

   #

   !include WhitleyOpenBoardPkg/Uba/UbaDxeCommon.fdf

+  INF $(RP_PKG)/Uba/UbaMain/StaticSkuDataDxe/StaticSkuDataDxe.inf

   INF $(RP_PKG)/$(BOARD_NAME)/Uba/TypeJunctionCity/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf

   INF $(RP_PKG)/$(BOARD_NAME)/Uba/TypeJunctionCity/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf

   INF $(RP_PKG)/$(BOARD_NAME)/Uba/TypeJunctionCity/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf

@@ -682,6 +683,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize         = 0x01000000

   INF  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf

   INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

 

+  INF  RuleOverride = ACPITABLE

+ WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/AcpiTables10nm.inf

+  INF  WhitleyOpenBoardPkg/Features/Acpi/AcpiPlatform/AcpiPlatform.inf

   INF  WhitleyOpenBoardPkg/Features/AcpiVtd/AcpiVtd.inf

   INF  MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf

 

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py

index 33698f9809..72d0c5089a 100644

--- a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py

+++ b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_board.py

@@ -25,6 +25,7 @@ def pre_build_ex(config, functions):

     :returns: nothing

     """

     print("pre_build_ex")

+

     config["BUILD_DIR_PATH"] = os.path.join(config["WORKSPACE"],

                                             'Build',

                                             config["PLATFORM_BOARD_PACKAGE"], @@ -55,6 +56,68 @@ def pre_build_ex(config, functions):

 

     if config.get("API_MODE_FSP_WRAPPER_BUILD", "FALSE") == "TRUE":

         raise ValueError("FSP API Mode is currently unsupported on Ice Lake Xeon Scalable")

+

+    # Build the ACPI AML offset table *.offset.h

+    print("Info: re-generating PlatformOffset header files")

+

+    execute_script = functions.get("execute_script")

+

+    command = ["build", "-D", "MAX_SOCKET=" + config["MAX_SOCKET"]]

+

+    if config["EXT_BUILD_FLAGS"] and config["EXT_BUILD_FLAGS"] != "":

+        ext_build_flags = config["EXT_BUILD_FLAGS"].split(" ")

+        ext_build_flags = [x.strip() for x in ext_build_flags]

+        ext_build_flags = [x for x in ext_build_flags if x != ""]

+        command.extend(ext_build_flags)

+

+    aml_offsets_split = os.path.split(os.path.normpath(config["AML_OFFSETS_PATH"]))

+    command.append("-p")

+    command.append(os.path.normpath(config["AML_OFFSETS_PATH"]) + '.dsc')

+    command.append("-m")

+    command.append(os.path.join(aml_offsets_split[0], aml_offsets_split[1], aml_offsets_split[1] + '.inf'))

+    command.append("-y")

+    command.append(os.path.join(config["WORKSPACE"], "PreBuildReport.txt"))

+    command.append("--log=" + os.path.join(config["WORKSPACE"],

+ "PreBuild.log"))

+

+    _, _, _, code = execute_script(command, config)

+    if code != 0:

+        print(" ".join(command))

+        print("Error re-generating PlatformOffset header files")

+        sys.exit(1)

+

+    # Build AmlGenOffset command to consume the *.offset.h and produce AmlOffsetTable.c for StaticSkuDataDxe use.

+

+    # Get destination path and filename from config

+    relative_file_path = os.path.normpath(config["STRIPPED_AML_OFFSETS_FILE_PATH"])     # get path relative to Platform/Intel

+    out_file_path = os.path.join(config["WORKSPACE_PLATFORM"], relative_file_path)      # full path to output file

+    out_file_dir = os.path.dirname(out_file_path)                                       # remove filename

+

+    out_file_root_ext = os.path.splitext(os.path.basename(out_file_path))               # root and extension of output file

+

+    # Get relative path for the generated offset.h file

+    relative_dsdt_file_path = os.path.normpath(config["DSDT_TABLE_FILE_PATH"])          # path relative to Platform/Intel

+    dsdt_file_root_ext = os.path.splitext(os.path.basename(relative_dsdt_file_path))    # root and extension of generated offset.h file

+

+    # Generate output directory if it doesn't exist

+    if not os.path.exists(out_file_dir):

+        os.mkdir(out_file_dir)

+

+    command = ["python",

+               os.path.join(config["MIN_PACKAGE_TOOLS"], "AmlGenOffset", "AmlGenOffset.py"),

+               "-d", "--aml_filter", config["AML_FILTER"],

+               "-o", out_file_path,

+               os.path.join(config["BUILD_X64"], aml_offsets_split[0],

+ aml_offsets_split[1], aml_offsets_split[1], "OUTPUT",

+ os.path.dirname(relative_dsdt_file_path), dsdt_file_root_ext[0] +

+ ".offset.h")]

+

+    # execute the command

+    _, _, _, code = execute_script(command, config)

+    if code != 0:

+        print(" ".join(command))

+        print("Error re-generating PlatformOffset header files")

+        sys.exit(1)

+

+    print("GenOffset done")

+

+

     return None

 

def _merge_files(files, ofile):

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_config.cfg b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_config.cfg

index 8744e9072c..3b66995128 100644

--- a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_config.cfg

+++ b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/build_config.cfg

@@ -35,3 +35,18 @@ FSP_BINARY_BUILD = FALSE  FSP_TEST_RELEASE = FALSE  SECURE_BOOT_ENABLE = FALSE  BIOS_INFO_GUID = 4A4CA1C6-871C-45BB-8801-6910A7AA5807

+

+#

+# AML offset table generation configuration options # All paths should

+use / and be relative to edk2-platforms/Platform/Intel #

+# AML_FILTER                      - AML filter is used to strip out unused AML offset data

+# AML_OFFSETS_PATH                - Path to INF file that builds AML offsets C source file

+#   The directory name, DSC file name, INF file name, and BASE_NAME must match identically

+# DSDT_TABLE_FILE_PATH            - Path to DSDT ASL file for the board

+# STRIPPED_AML_OFFSETS_FILE_PATH  - Target AML offset data file

+consumed by UBA driver # AML_FILTER = \"PSYS\" .\.DRVT\"

+.\.FIX[0-9,A-Z] BBI[0] BBU[0] CRCM BAR0 .\.CCT[0-9A-Z]\"

+.\.CFH[0-9A-Z]\" .\.FXCD\" .\.FXST\" .\.FXIN\" .\.FXOU\" .\.FXBS\"

+.\.FXFH\" .\.CENA\" .\.DRVT\" .\.CFIS\" {NULL }; AML_OFFSETS_PATH =

+WhitleyOpenBoardPkg/WilsonCityRvp/AmlOffsets

+DSDT_TABLE_FILE_PATH =

+WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Dsdt/EPRPPlatform10nm.asl

+STRIPPED_AML_OFFSETS_FILE_PATH =

+WhitleyOpenBoardPkg/Uba/UbaMain/StaticSkuDataDxe/AmlOffsetTable.c

--

2.27.0.windows.1

 

-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [edk2-platforms PATCH] Marvell/SolidRun: Rework Readme.md files

Sunny Wang
 

Looks good. Thanks much, Marcin.

This will be helpful as http://wiki.macchiatobin.net/tiki-index.php has been not accessible for quite a while.

Reviewed-by: Sunny Wang <sunny.wang@...>

Best Regards,
Sunny

-----Original Message-----
From: Marcin Wojtas <mw@...>
Sent: 14 March 2022 12:06
To: devel@edk2.groups.io
Cc: quic_llindhol@...; ardb+tianocore@...; jaz@...; gjb@...; Sunny Wang <Sunny.Wang@...>; Marcin Wojtas <mw@...>
Subject: [edk2-platforms PATCH] Marvell/SolidRun: Rework Readme.md files

From: Grzegorz Bernacki <gjb@...>

This patch reworks Readme.md files of Marvell and SolidRun
platforms as follows:
* Add supported features list.
* Leave minmal EDK2 build command.
* Add 'NOTE' box about INCLUDE_TFTP_COMMAND build flag.
* Move full firmware image build/burn howtos to external wiki pages.
* Add links and update paragraphs.

Signed-off-by: Marcin Wojtas <mw@...>

---
In order to ease review/merge the patch is available in a public repository:
https://github.com/Semihalf/edk2-platforms/commits/marvell-howtos-upstream-r20220314

Platform/Marvell/Cn913xDb/Readme.md | 104 +++++++-----------
Platform/SolidRun/Armada80x0McBin/Readme.md | 113 ++++++++------------
Platform/SolidRun/Cn913xCEx7Eval/Readme.md | 109 ++++++++-----------
3 files changed, 124 insertions(+), 202 deletions(-)

diff --git a/Platform/Marvell/Cn913xDb/Readme.md b/Platform/Marvell/Cn913xDb/Readme.md
index ecdb78302b..0b2ab676f8 100644
--- a/Platform/Marvell/Cn913xDb/Readme.md
+++ b/Platform/Marvell/Cn913xDb/Readme.md
@@ -5,93 +5,65 @@


This is a port of 64-bit TianoCore EDK II firmware for the Marvell CN913x Development Board.



-# Building the firmware

-

-## Prepare toolchain (for cross-compilation only):

-

-1. Download the toolchain:

-

- ```

- wget https://releases.linaro.org/components/toolchain/binaries/7.5-2019.12/aarch64-linux-gnu/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu.tar.xz

- ```

+# Supported features



-1. After extracting, setup the path and compiler prefix to GCC5\_AARCH64\_PREFIX variable:

+Features supported in EDK2:



- ```

- export GCC5_AARCH64_PREFIX=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

+* 1x PCIE root complex

+* Networking:

+ * 3x 10 GbE via SFP+

+ * 2x 1 GbE RGMII via RJ45

+* 5x USB 2.0/3.0

+* 3x SATA

+* 2x uSD

+* 1x eMMC

+* RTC

+* SPI flash & memory-mapped variable storage access

+* I2C

+* GPIO



-## Prepare prerequisites

+Hardware description:



-1. Create a new folder (directory) on your local development machine

- for use as your workspace. This example uses `/work/git/tianocore`, modify as

- appropriate for your needs.

+* ACPI (default)

+* Device Tree



- ```

- $ export WORKSPACE=/work/git/tianocore

- $ mkdir -p $WORKSPACE

- $ cd $WORKSPACE

- ```

+Others:



-1. Clone the Trusted Firmware repository:

+* Signed capsule update

+* X64 option ROM emulator



- ```

- $ cd ${WORKSPACE}

- $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git

- ```

-1. Clone repository for auxiliary firmware on the SoC co-processors and checkout to binaries-marvell-armada-SDK10.0.1.0:

-

- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/binaries-marvell.git

- $ cd binaries-marvell/

- $ git checkout -b binaries-marvell-armada-SDK10.0.1.0 origin/binaries-marvell-armada-SDK10.0.1.0

- ```

-1. Clone the DDR training code from:

+# Building the firmware



- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git

- ```

## Prepare EDKII environment:



-Please follow instructions from "Obtaining source code" and "Manual building" from the top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).

+Please follow instructions from [Obtaining source code](https://github.com/tianocore/edk2-platforms#obtaining-source-code)

+and [Manual building](https://github.com/tianocore/edk2-platforms#manual-building) from the

+top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).



## Build EDKII:



-1. Use below build command:

+Use below build command:



- ```

- $ cd ${WORKSPACE}

- $ build -a AARCH64 -t GCC5 -b RELEASE -D CN9132 -D INCLUDE_TFTP_COMMAND -D CAPSULE_ENABLE -p Platform/Marvell/Cn913xDb/Cn913xDbA.dsc

- ```

+ ```

+ $ build -a AARCH64 -t GCC5 -b RELEASE -D CN9132 -D CAPSULE_ENABLE -D X64EMU_ENABLE -p Platform/Marvell/Cn913xDb/Cn913xDbA.dsc

+ ```



-## Build the final firmware image:

+---

+**NOTE**



-1. Set BL33 variable to path to EDK II output binary:

+'-D INCLUDE_TFTP_COMMAND' is optional and can be added in order to enable `tftp` command in UEFI Shell.



- ```

- $ export BL33=${WORKSPACE}/Build/Cn9132DbA-AARCH64/RELEASE_GCC5/FV/ARMADA_EFI.fd

- ```

-1. Export SCP_BL2 variable:

+---



- ```

- $ export SCP_BL2=${WORKSKPACE}/binaries-marvell/mrvl_scp_bl2.img

- ```

-1. Export compiler variables (for cross-compilation only):

+## Build the final firmware image:



- ```

- $ export ARCH=arm64

- $ export CROSS_COMPILE=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

-1. Build the image:

+In addition to EDKII binary, the complete firmware image comprises the TF-A and other components.

+A complete build instruction can be found at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Build_firmware).



- ```

- $ cd ${WORKSPACE}/trusted-firmware-a/

- $ make LOG_LEVEL=20 MV_DDR_PATH=${WORKSPACE}/mv-ddr-marvell CP_NUM=3 PLAT=t9130 all fip mrvl_flash

+## Burning the firmware



- ```

-The firmware image `flash-image.bin` can be found in `build/t9130/release/` directory.

+Please follow instruction at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Burning_firmware)

+to burn image to desired boot device.



# ARM System Ready certification.



diff --git a/Platform/SolidRun/Armada80x0McBin/Readme.md b/Platform/SolidRun/Armada80x0McBin/Readme.md
index c63cf41b2d..8c514835c4 100644
--- a/Platform/SolidRun/Armada80x0McBin/Readme.md
+++ b/Platform/SolidRun/Armada80x0McBin/Readme.md
@@ -3,94 +3,69 @@


# Summary



-This is a port of 64-bit TianoCore EDK II firmware for the SolidRun MacchiatoBin platform based on the Marvell ARMADA 8040 SoC.

+This is a port of 64-bit TianoCore EDK II firmware for the [SolidRun MacchiatoBin Double Shot](https://solidrun.atlassian.net/wiki/spaces/developer/pages/286655749/MACCHIATObin+Single+Double+Shot+Quick+Start+Guide)

+platform based on the Marvell ARMADA 8040 SoC.



-# Building the firmware

+# Supported features



-## Prepare toolchain (for cross-compilation only):

+Features supported in EDK2:



-1. Download the toolchain:

+* 1x PCIE x4

+* Networking:

+ * 2x 10 GbE via SFP+ / RJ45

+ * 1x 2500 Base-X via SFP+

+ * 1x 1 GbE SGMII via RJ45

+* 1x USB 3.0

+* 2x USB 2.0

+* 3x SATA

+* 1x uSD

+* 1x eMMC

+* RTC

+* SPI flash & memory-mapped variable storage access

+* GPIO



- ```

- wget https://releases.linaro.org/components/toolchain/binaries/7.5-2019.12/aarch64-linux-gnu/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu.tar.xz

- ```

+Hardware description:



-1. After extracting, setup the path and compiler prefix to GCC5\_AARCH64\_PREFIX variable:

+* ACPI (default)

+* Device Tree



- ```

- export GCC5_AARCH64_PREFIX=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

+Others:



-## Prepare prerequisites

+* Signed capsule update

+* X64 option ROM emulator



-1. Create a new folder (directory) on your local development machine

- for use as your workspace. This example uses `/work/git/tianocore`, modify as

- appropriate for your needs.

+# Building the firmware



- ```

- $ export WORKSPACE=/work/git/tianocore

- $ mkdir -p $WORKSPACE

- $ cd $WORKSPACE

- ```

+## Prepare EDKII environment:



-1. Clone the Trusted Firmware repository:

+Please follow instructions from [Obtaining source code](https://github.com/tianocore/edk2-platforms#obtaining-source-code)

+and [Manual building](https://github.com/tianocore/edk2-platforms#manual-building) from the

+top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).



- ```

- $ cd ${WORKSPACE}

- $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git

- ```

-1. Clone repository for auxiliary firmware on the SoC co-processors and checkout to binaries-marvell-armada-SDK10.0.1.0:

+## Build EDKII:



- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/binaries-marvell.git

- $ cd binaries-marvell/

- $ git checkout -b binaries-marvell-armada-SDK10.0.1.0 origin/binaries-marvell-armada-SDK10.0.1.0

- ```

-1. Clone the DDR training code from:

+Use below build command:



- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git

- ```

-## Prepare EDKII environment:

+ ```

+ $ build -a AARCH64 -t GCC5 -b RELEASE -D X64EMU_ENABLE -p Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc

+ ```



-Please follow instructions from "Obtaining source code" and "Manual building" from the top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).

+---

+**NOTE**



-## Build EDKII:

-

-1. Use below build command:

+'-D INCLUDE_TFTP_COMMAND' is optional and can be added in order to enable `tftp` command in UEFI Shell.



- ```

- $ cd ${WORKSPACE}

- $ build -a AARCH64 -t GCC5 -b RELEASE -D INCLUDE_TFTP_COMMAND -D X64EMU_ENABLE -p Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc

- ```

+---



## Build the final firmware image:



-1. Set BL33 variable to path to EDK II output binary:

-

- ```

- $ export BL33=${WORKSPACE}/Build/Armada80x0McBin-AARCH64/RELEASE_GCC5/FV/ARMADA_EFI.fd

- ```

-1. Export SCP_BL2 variable:

-

- ```

- $ export SCP_BL2=${WORKSKPACE}/binaries-marvell/mrvl_scp_bl2.img

- ```

-1. Export compiler variables (for cross-compilation only):

-

- ```

- $ export ARCH=arm64

- $ export CROSS_COMPILE=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

-1. Build the image:

-

- ```

- $ cd ${WORKSPACE}/trusted-firmware-a/

- $ make LOG_LEVEL=20 MV_DDR_PATH=${WORKSPACE}/mv-ddr-marvell PLAT=a80x0_mcbin all fip mrvl_flash

- ```

-The firmware image `flash-image.bin` can be found in `build/a80x0_mcbin/release/` directory.

+In addition to EDKII binary, the complete firmware image comprises the TF-A and other components.

+A complete build instruction can be found at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Build_firmware).

+

+## Burning the firmware

+

+Please follow instruction at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Burning_firmware)

+to burn image to desired boot device.



# ARM System Ready certification.



diff --git a/Platform/SolidRun/Cn913xCEx7Eval/Readme.md b/Platform/SolidRun/Cn913xCEx7Eval/Readme.md
index 813e723b65..0db22b5175 100644
--- a/Platform/SolidRun/Cn913xCEx7Eval/Readme.md
+++ b/Platform/SolidRun/Cn913xCEx7Eval/Readme.md
@@ -3,95 +3,70 @@


# Summary



-This is a port of 64-bit TianoCore EDK II firmware for the SolidRun CN913x CEx7 Evaluation Board.

+This is a port of 64-bit TianoCore EDK II firmware for the [SolidRun CN913x CEx7 Evaluation Board](https://solidrun.atlassian.net/wiki/spaces/developer/pages/197493948/CN9132+COM+EVK+Quick+Start+Guide).



-# Building the firmware

-

-## Prepare toolchain (for cross-compilation only):

-

-1. Download the toolchain:

-

- ```

- wget https://releases.linaro.org/components/toolchain/binaries/7.5-2019.12/aarch64-linux-gnu/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu.tar.xz

- ```

+# Supported features



-1. After extracting, setup the path and compiler prefix to GCC5\_AARCH64\_PREFIX variable:

+Features supported in EDK2:



- ```

- export GCC5_AARCH64_PREFIX=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

+* 1x PCIE x4 + 6x PCIE x1

+* Networking:

+ * 1x 10 GbE via SFP+

+ * 2x 5 GbE via RJ45

+ * 1x 2500 Base-X via quad 1 Gbps switch

+ * 1x 1 GbE RGMII via RJ45

+* 2x USB 3.0

+* 4x USB 2.0

+* 2x SATA

+* 1x uSD

+* 1x eMMC

+* RTC

+* SPI flash & memory-mapped variable storage access

+* I2C

+* GPIO



-## Prepare prerequisites

+Hardware description:



-1. Create a new folder (directory) on your local development machine

- for use as your workspace. This example uses `/work/git/tianocore`, modify as

- appropriate for your needs.

+* ACPI (default)

+* Device Tree



- ```

- $ export WORKSPACE=/work/git/tianocore

- $ mkdir -p $WORKSPACE

- $ cd $WORKSPACE

- ```

+Others:



-1. Clone the Trusted Firmware repository:

+* Signed capsule update

+* X64 option ROM emulator



- ```

- $ cd ${WORKSPACE}

- $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git

- ```

-1. Clone repository for auxiliary firmware on the SoC co-processors and checkout to binaries-marvell-armada-SDK10.0.1.0:

-

- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/binaries-marvell.git

- $ cd binaries-marvell/

- $ git checkout -b binaries-marvell-armada-SDK10.0.1.0 origin/binaries-marvell-armada-SDK10.0.1.0

- ```

-1. Clone the DDR training code from:

+# Building the firmware



- ```

- $ cd ${WORKSPACE}

- $ git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git

- ```

## Prepare EDKII environment:



-Please follow instructions from "Obtaining source code" and "Manual building" from the top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).

+Please follow instructions from [Obtaining source code](https://github.com/tianocore/edk2-platforms#obtaining-source-code)

+and [Manual building](https://github.com/tianocore/edk2-platforms#manual-building) from the

+top level edk2-platforms [Readme.md](https://github.com/tianocore/edk2-platforms#readme).



## Build EDKII:



-1. Use below build command:

+Use below build command:



- ```

- $ cd ${WORKSPACE}

- $ build -a AARCH64 -t GCC5 -b RELEASE -D INCLUDE_TFTP_COMMAND -D CAPSULE_ENABLE -D X64EMU_ENABLE -p Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc

- ```

+ ```

+ build -a AARCH64 -t GCC5 -b RELEASE -D CAPSULE_ENABLE -D X64EMU_ENABLE -p Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc

+ ```



-## Build the final firmware image:

+---

+**NOTE**



-1. Set BL33 variable to path to EDK II output binary:

+'-D INCLUDE_TFTP_COMMAND' is optional and can be added in order to enable `tftp` command in UEFI Shell.



- ```

- $ export BL33=${WORKSPACE}/Build/Cn913xCEx7Eval-AARCH64/RELEASE_GCC5/FV/ARMADA_EFI.fd

- ```

-1. Export SCP_BL2 variable:

+---



- ```

- $ export SCP_BL2=${WORKSKPACE}/binaries-marvell/mrvl_scp_bl2.img

- ```

-1. Export compiler variables (for cross-compilation only):

+## Build the final firmware image:



- ```

- $ export ARCH=arm64

- $ export CROSS_COMPILE=<toolchain_path>/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

- ```

-1. Build the image:

+In addition to EDKII binary, the complete firmware image comprises the TF-A and other components.

+A complete build instruction can be found at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Build_firmware).



- ```

- $ cd ${WORKSPACE}/trusted-firmware-a/

- $ make LOG_LEVEL=20 MV_DDR_PATH=${WORKSPACE}/mv-ddr-marvell CP_NUM=3 PLAT=t9130_cex7_eval all fip mrvl_flash

+## Burning the firmware



- ```

-The firmware image `flash-image.bin` can be found in `build/t9130_cex7_eval/release/` directory.

+Please follow instruction at [wiki page](https://github.com/Semihalf/edk2-platforms/wiki/Burning_firmware)

+to burn image to desired boot device.



# ARM System Ready certification.



--
2.29.0

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.


Re: [PATCH] UefiPayloadPkg: Fix build error

Guo Dong
 

You would understand it when you look at the NetworkPkg/Network.dsc.inc
In that DSC file, network components could be built as X64 or IA32 depending on PLATFORMX64_ENABLE.

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Sunday, March 13, 2022 8:13 PM
To: devel@edk2.groups.io; Rhodes, Sean <sean@...>
Cc: Dong, Guo <guo.dong@...>; Ma, Maurice <maurice.ma@...>; You, Benjamin <benjamin.you@...>
Subject: RE: [edk2-devel] [PATCH] UefiPayloadPkg: Fix build error

I don't understand the need of "+ DEFINE PLATFORMX64_ENABLE = TRUE".

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Sean Rhodes
Sent: Friday, March 11, 2022 9:41 PM
To: devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Ni, Ray <ray.ni@...>; Ma, Maurice <maurice.ma@...>; You, Benjamin <benjamin.you@...>
Subject: [edk2-devel] [PATCH] UefiPayloadPkg: Fix build error

From: Guo Dong <guo.dong@...>

On windows build, need add -DPLATFORMX64_ENABLE=TRUE in the build command line beside -DNETWORK_DRIVER_ENABLE=TRUE in order build network features. So set PLATFORMX64_ENABLE to TRUE when need build network feature.
On Linux build, DSC file should not have PcdAllowHttpConnections when network feature is not built, else would cause build error.

Cc: Guo Dong <guo.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Maurice Ma <maurice.ma@...>
Cc: Benjamin You <benjamin.you@...>
Signed-off-by: Guo Dong <guo.dong@...>
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 558513baf1..f3806a8ebc 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -407,7 +407,9 @@
[PcdsPatchableInModule.X64]

gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTER)

gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGISTER)

+!if $(NETWORK_DRIVER_ENABLE) == TRUE

gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE

+!endif



[PcdsPatchableInModule.common]

gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }

@@ -530,6 +532,8 @@
# UEFI network modules

#

!if $(NETWORK_DRIVER_ENABLE) == TRUE

+[Defines]

+ DEFINE PLATFORMX64_ENABLE = TRUE

!include NetworkPkg/Network.dsc.inc

!endif



--
2.32.0



-=-=-=-=-=-=
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#87463): https://edk2.groups.io/g/devel/message/87463
Mute This Topic: https://groups.io/mt/89710183/1712937
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@...]
-=-=-=-=-=-=


[edk2-platforms PATCH 8/8] Marvell/Drivers: Pp2Dxe: Fix Pp2SnpReceive

Marcin Wojtas
 

This patch adds missing parameter's and SNP instance
status checks in SnpReceive callback. Additionally,
the local variables declarations are cleaned-up.

Signed-off-by: Marcin Wojtas <mw@...>
---
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 ++++++++++++++++----
1 file changed, 36 insertions(+), 7 deletions(-)

diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/=
Drivers/Net/Pp2Dxe/Pp2Dxe.c
index 841a1c8f84..5e463ac932 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -1214,23 +1214,50 @@ Pp2SnpReceive (
)=0D
{=0D
INTN ReceivedPackets;=0D
- PP2DXE_CONTEXT *Pp2Context =3D INSTANCE_FROM_SNP(This);=0D
- PP2DXE_PORT *Port =3D &Pp2Context->Port;=0D
- MVPP2_SHARED *Mvpp2Shared =3D Pp2Context->Port.Priv;=0D
+ PP2DXE_CONTEXT *Pp2Context;=0D
+ PP2DXE_PORT *Port;=0D
UINTN PhysAddr, VirtAddr;=0D
- EFI_STATUS Status =3D EFI_SUCCESS;=0D
+ EFI_STATUS Status;=0D
EFI_TPL SavedTpl;=0D
UINT32 StatusReg;=0D
INTN PoolId;=0D
UINTN PktLength;=0D
UINT8 *DataPtr;=0D
MVPP2_RX_DESC *RxDesc;=0D
- MVPP2_RX_QUEUE *Rxq =3D &Port->Rxqs[0];=0D
+ MVPP2_RX_QUEUE *Rxq;=0D
+=0D
+ /* Check input parameters. */=0D
+ if (This =3D=3D NULL || Buffer =3D=3D NULL || BufferSize =3D=3D NULL) {=
=0D
+ return EFI_INVALID_PARAMETER;=0D
+ }=0D
+=0D
+ SavedTpl =3D gBS->RaiseTPL (TPL_CALLBACK);=0D
+=0D
+ Pp2Context =3D INSTANCE_FROM_SNP (This);=0D
=0D
+ /* Check whether the driver was started and initialized. */=0D
+ if (This->Mode->State !=3D EfiSimpleNetworkInitialized) {=0D
+ switch (This->Mode->State) {=0D
+ case EfiSimpleNetworkStopped:=0D
+ DEBUG ((DEBUG_WARN, "Pp2Dxe%d: not started\n", Pp2Context->Instance)=
);=0D
+ ReturnUnlock (SavedTpl, EFI_NOT_STARTED);=0D
+ case EfiSimpleNetworkStarted:=0D
+ DEBUG ((DEBUG_WARN, "Pp2Dxe%d: not initialized\n", Pp2Context->Insta=
nce));=0D
+ ReturnUnlock (SavedTpl, EFI_DEVICE_ERROR);=0D
+ default:=0D
+ DEBUG ((DEBUG_WARN,=0D
+ "Pp2Dxe%d: wrong state: %u\n",=0D
+ Pp2Context->Instance,=0D
+ This->Mode->State));=0D
+ ReturnUnlock (SavedTpl, EFI_DEVICE_ERROR);=0D
+ }=0D
+ }=0D
+=0D
+ Port =3D &Pp2Context->Port;=0D
ASSERT (Port !=3D NULL);=0D
+ Rxq =3D &Port->Rxqs[0];=0D
ASSERT (Rxq !=3D NULL);=0D
=0D
- SavedTpl =3D gBS->RaiseTPL (TPL_CALLBACK);=0D
ReceivedPackets =3D Mvpp2RxqReceived(Port, Rxq->Id);=0D
=0D
if (ReceivedPackets =3D=3D 0) {=0D
@@ -1285,10 +1312,12 @@ Pp2SnpReceive (
*EtherType =3D NTOHS (*(UINT16 *)(&DataPtr[12]));=0D
}=0D
=0D
+ Status =3D EFI_SUCCESS;=0D
+=0D
drop:=0D
/* Refill: pass packet back to BM */=0D
PoolId =3D (StatusReg & MVPP2_RXD_BM_POOL_ID_MASK) >> MVPP2_RXD_BM_POOL_=
ID_OFFS;=0D
- Mvpp2BmPoolPut(Mvpp2Shared, PoolId, PhysAddr, VirtAddr);=0D
+ Mvpp2BmPoolPut (Pp2Context->Port.Priv, PoolId, PhysAddr, VirtAddr);=0D
=0D
/* Update counters with 1 packet received and 1 packet refilled */=0D
Mvpp2RxqStatusUpdate(Port, Rxq->Id, 1, 1);=0D
--=20
2.29.0


[edk2-platforms PATCH 7/8] Marvell/Drivers: Pp2Dxe: Fix Pp2SnpReset

Marcin Wojtas
 

This patch adds missing parameter's and SNP instance
status checks.

igned-off-by: Marcin Wojtas <mw@...>
---
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 27 ++++++++++++++++++++
1 file changed, 27 insertions(+)

diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/=
Drivers/Net/Pp2Dxe/Pp2Dxe.c
index deb3f34625..841a1c8f84 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -647,6 +647,33 @@ Pp2SnpReset (
IN BOOLEAN ExtendedVerification=0D
)=0D
{=0D
+ PP2DXE_CONTEXT *Pp2Context;=0D
+=0D
+ /* Check This Instance. */=0D
+ if (This =3D=3D NULL) {=0D
+ return EFI_INVALID_PARAMETER;=0D
+ }=0D
+=0D
+ Pp2Context =3D INSTANCE_FROM_SNP (This);=0D
+=0D
+ /* Check that driver was started and initialized. */=0D
+ if (This->Mode->State !=3D EfiSimpleNetworkInitialized) {=0D
+ switch (This->Mode->State) {=0D
+ case EfiSimpleNetworkStopped:=0D
+ DEBUG ((DEBUG_WARN, "Pp2Dxe%d: not started\n", Pp2Context->Instance)=
);=0D
+ return EFI_NOT_STARTED;=0D
+ case EfiSimpleNetworkStarted:=0D
+ DEBUG ((DEBUG_WARN, "Pp2Dxe%d: not initialized\n", Pp2Context->Insta=
nce));=0D
+ return EFI_DEVICE_ERROR;=0D
+ default:=0D
+ DEBUG ((DEBUG_WARN,=0D
+ "Pp2Dxe%d: wrong state: %u\n",=0D
+ Pp2Context->Instance,=0D
+ This->Mode->State));=0D
+ return EFI_DEVICE_ERROR;=0D
+ }=0D
+ }=0D
+=0D
return EFI_SUCCESS;=0D
}=0D
=0D
--=20
2.29.0


[edk2-platforms PATCH 6/8] Marvell/Drivers: Pp2Dxe: Fix Pp2SnpTransmit

Marcin Wojtas
 

Error checking for invalid input parameters was too
hard. Replace ASSERT with returning error value.
Moreover set EtherType only when we are sure it
won't be dereferencing NULL pointer.

Signed-off-by: Marcin Wojtas <mw@...>
---
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/=
Drivers/Net/Pp2Dxe/Pp2Dxe.c
index 8a4c4545c8..deb3f34625 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -1074,9 +1074,15 @@ Pp2SnpTransmit (
}=0D
=0D
if (HeaderSize !=3D 0) {=0D
- ASSERT (HeaderSize =3D=3D This->Mode->MediaHeaderSize);=0D
- ASSERT (EtherTypePtr !=3D NULL);=0D
- ASSERT (DestAddr !=3D NULL);=0D
+ if (HeaderSize !=3D This->Mode->MediaHeaderSize ||=0D
+ EtherTypePtr =3D=3D NULL ||=0D
+ DestAddr =3D=3D NULL) {=0D
+ return EFI_INVALID_PARAMETER;=0D
+ }=0D
+ }=0D
+=0D
+ if (BufferSize < This->Mode->MediaHeaderSize) {=0D
+ return EFI_BUFFER_TOO_SMALL;=0D
}=0D
=0D
SavedTpl =3D gBS->RaiseTPL (TPL_CALLBACK);=0D
@@ -1100,8 +1106,6 @@ Pp2SnpTransmit (
ReturnUnlock(SavedTpl, EFI_NOT_READY);=0D
}=0D
=0D
- EtherType =3D HTONS (*EtherTypePtr);=0D
-=0D
/* Fetch next descriptor */=0D
TxDesc =3D Mvpp2TxqNextDescGet(AggrTxq);=0D
=0D
@@ -1118,6 +1122,8 @@ Pp2SnpTransmit (
else=0D
CopyMem(DataPtr + NET_ETHER_ADDR_LEN, &This->Mode->CurrentAddress, N=
ET_ETHER_ADDR_LEN);=0D
=0D
+ EtherType =3D HTONS (*EtherTypePtr);=0D
+=0D
CopyMem(DataPtr + NET_ETHER_ADDR_LEN * 2, &EtherType, 2);=0D
}=0D
=0D
--=20
2.29.0