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[edk2-platforms][PATCH v1 0/5] MinPlatformPkg: TestPointCheckLib bug fixes and improvements
Michael Kubacki
From: Michael Kubacki <michael.kubacki@...>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3531 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3518 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3520 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3521 This patch series groups together several bug fixes and improvements to TestPointCheckLib. The first patch is required for the others since it fixes a MinPlatformPkg build issue that occurs with the current edk2/master branch. Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: Michael Kubacki <michael.kubacki@...> Michael Kubacki (5): MinPlatformPkg/TestPointCheckLib: Fix MessageLength cast issue MinPlatformPkg/TestPointCheckLib: Set required size field in protocol MinPlatformPkg/TestPointCheckLib: Fix incorrect array index MinPlatformPkg/TestPointCheckLib: Improve adjacent region checking MinPlatformPkg/TestPointCheckLib: Make OutTable parameter optional Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeCheckAcp= i.c | 32 +++++------ Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeCheckSmi= HandlerInstrument.c | 4 +- Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeCheckSmm= Info.c | 56 ++++++++++---------- Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeCheckTcg= TrustedBoot.c | 1 + Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPoin= tCheckLib.c | 15 +++++- Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPoin= tCheckLib.c | 4 +- Platform/Intel/MinPlatformPkg/Test/TestPointStubDxe/TestPointStubDxe.c = | 10 ++-- Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPoin= tCheckLib.inf | 1 + 8 files changed, 70 insertions(+), 53 deletions(-) --=20 2.28.0.windows.1
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Re: [PATCH 0/3] reuse the SevEsWork area
Brijesh Singh
Hi Jiewen,
On 8/4/21 9:18 PM, Yao, Jiewen wrote: HI BrijeshCan you use the sizeof() inside the OvmfPkg.fdf ? I was not able to find a reference usage for it in this file. Also, can a .fdf refer the C header file ? We need to know the size of the header so that we can set the fixed PcdOvmfSevEsWorkArea. In the current approach the .fdf sets the PCD as shown below: SET PcdOvmfSevEsWorkArea = PcdOvmfWorkAreaBase + <HeaderSize> I am hard coding the header size to be 4 so that pcd points to the correct location within the WorkArea. thanks typedef struct {
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Cancelled Event: TianoCore Design Meeting - APAC/NAMO - Friday, August 6, 2021
#cal-cancelled
devel@edk2.groups.io Calendar <noreply@...>
Cancelled: TianoCore Design Meeting - APAC/NAMO This event has been cancelled. When: Where: Organizer: Ray Ni ray.ni@... Description: TOPIC
For more info, see here: https://www.tianocore.org/design-meeting/ Microsoft Teams meetingJoin on your computer or mobile appClick here to join the meeting Join with a video conferencing deviceteams@... Video Conference ID: 119 715 416 0
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Is there any use case of FirmwarePerformanceStandaloneMm.inf now?
Dandan Bi
Hi Kun,
I plan to make some change for FirmwarePerformanceSmm.inf, may also update the behavior of FirmwarePerformanceStandaloneMm.inf as they are sharing codes now. And I saw you are the submitter of this driver. Could you help clarify following questions ? Thanks in advance.
If there is not any module to report Standalone MM performance data to FirmwarePerformanceStandaloneMm.inf, I think it should be OK to remove them from FirmwarePerformanceStandaloneMm now.
Change: SMM performance data collection now:
Now I want to simplify the process to make DxeCorePerformanceLib communicate with SmmCorePerformanceLib directly to collect SMM performance data, so FirmwarePerformanceDataTableSmm don’t need to get the SMM performance data from SmmCorePerformanceLib and register SMI handler for the communication with DxeCorePerformanceLib. For FirmwarePerformanceStandaloneMm.inf, just remove this logic if there is no module to prepare MM performance data to it now.
Thanks, Dandan
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Re: [PATCH 0/3] reuse the SevEsWork area
Brijesh Singh
Hi Jiewen,
toggle quoted messageShow quoted text
Thanks for the quick feedback. I will make the recommended change and send the updated patch. I was under assumption that union will be done when Min adds the SGX support because that's when we start reusing the WorkArea for SEV and TDX. But I guess its good idea for me to do it now so that Min does not have to touch the SEV code in his series. thanks
On 8/4/21 9:18 PM, Yao, Jiewen wrote:
HI Brijesh
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Re: [PATCH v6 0/6] SEV Live Migration support for OVMF.
Ashish Kalra
On Thu, Aug 05, 2021 at 05:17:15AM +0000, Yao, Jiewen wrote:
HiYes, it is created by UEFI but consumed by the (guest) linux kernel. This is actually part of a 3-way negotiation of the live migration feature between hypervisor, guest OVMF and guest kernel. Host indicates support for live migration, which is detected by OVMF and correspondingly OVMF sets this SetLiveMigrationEnabled UEFI variable, which is read by the guest kernel and it indicates to the guest kernel that both host and OVMF support and have enabled the live migration feature. The guest flow for detecting live migration feature is captured below (from the corresponding kernel patch): The guest support for detecting and enabling SEV Live migration feature uses the following logic : - kvm_init_plaform() checks if its booted under the EFI - If not EFI, i) if kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL), issue a wrmsrl() to enable the SEV live migration support - If EFI, i) If kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL), read the UEFI variable which indicates OVMF support for live migration (SetLiveMigrationEnabled) ii) the variable indicates live migration is supported, issue a wrmsrl() to enable the SEV live migration support Yes. Actually this is hypervisor based live migration, so it relies on host KVM and qemu support and it mainly requires OVMF support to make hypercalls for any decrypted memory regions it sets up, for example, MMIO and non-existant memory regions, so that hypervisor can keep track of guest firmware's page encryption status. So this is the full patch-set for UEFI for PSP based live migration. Thanks, Ashish Thank you
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[edk2-platforms: PATCH V5] Platform/Intel: Correct CPU APIC IDs
JackX Lin
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3365
BIOS cannot find correct AcpiProcId in mApicIdMap because of there is no suitable map, that causes ACPI_BIOS_ERROR. Remove mApicIdMap for determing AcpiProcId, uses normal countings instead. Signed-off-by: JackX Lin <JackX.Lin@...> Cc: Chasel Chiu <chasel.chiu@...> Cc: Jenny Huang <jenny.huang@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Cc: Donald Kuo <Donald.Kuo@...> Cc: Chandana C Kumar <chandana.c.kumar@...> Cc: JackX Lin <JackX.Lin@...> Change-Id: Ib64e519686b2f324a0a57c3b5bba220a7b75fda1 --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 536 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 1 file changed, 204 insertions(+), 332 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 2b51c34ef2..d027e2852b 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1,22 +1,19 @@ /** @file ACPI Platform Driver -Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR> +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include "AcpiPlatform.h" -#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount)) - #pragma pack(1) typedef struct { UINT32 AcpiProcessorId; UINT32 ApicId; UINT32 Flags; - UINT32 SwProcApicId; UINT32 SocketNum; } EFI_CPU_ID_ORDER_MAP; @@ -50,7 +47,7 @@ VOID *mLocalTable[] = { &Wsmt, }; -EFI_ACPI_TABLE_PROTOCOL *mAcpiTable; +EFI_ACPI_TABLE_PROTOCOL *mAcpiTable; UINT32 mNumOfBitShift = 6; BOOLEAN mForceX2ApicId; @@ -58,138 +55,19 @@ BOOLEAN mX2ApicEnabled; EFI_MP_SERVICES_PROTOCOL *mMpService; BOOLEAN mCpuOrderSorted; -EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM]; -UINTN mNumberOfCPUs = 0; +EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable = NULL; +UINTN mNumberOfCpus = 0; UINTN mNumberOfEnabledCPUs = 0; -// following are possible APICID Map for SKX -static const UINT32 ApicIdMapA[] = { //for SKUs have number of core > 16 - //it is 14 + 14 + 14 + 14 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x00000010, 0x00000011, - 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019, - 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022, 0x00000023, - 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, - 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035, - 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x0000003D -}; - -static const UINT32 ApicIdMapB[] = { //for SKUs have number of cores <= 16 use 32 ID space - //it is 16+16 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, - 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - - -static const UINT32 ApicIdMapC[] = { //for SKUs have number of cores <= 16 use 64 ID space - //it is 16+0+16+0 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027, - 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - -static const UINT32 ApicIdMapD[] = { //for SKUs have number of cores <= 8 use 16 ID space - //it is 16 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - -const UINT32 *mApicIdMap = NULL; - /** - This function detect the APICID map and update ApicID Map pointer + Find BSP in mCpuApicIdOrderTable. - @param None + This function searches mCpuApicIdOrderTable to find the BSP ApicId, and returns a number where the BSP is. - @retval VOID - -**/ -VOID DetectApicIdMap(VOID) -{ - UINTN CoreCount; - - CoreCount = 0; - - if(mApicIdMap != NULL) { - return; //aleady initialized - } - - mApicIdMap = ApicIdMapA; // default to > 16C SKUs - - CoreCount = mNumberOfEnabledCPUs / 2; - DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount)); - - //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift)); - // Dont assert for single core, single thread system. - //ASSERT (CoreCount != 0); - - if(CoreCount <= 16) { - - if(mNumOfBitShift == 4) { - mApicIdMap = ApicIdMapD; - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap)); - } - - if(mNumOfBitShift == 5) { - mApicIdMap = ApicIdMapB; - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap)); - } - - if(mNumOfBitShift == 6) { - mApicIdMap = ApicIdMapC; - //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap)); - } - - } - - return; -} - -/** - This function return the CoreThreadId of ApicId from ACPI ApicId Map array - - @param ApicId - - @retval Index of ACPI ApicId Map array + @param[in] ApicId Apic ID. + @return Where the BSP is. **/ -UINT32 -GetIndexFromApicId ( - UINT32 ApicId - ) -{ - UINT32 CoreThreadId; - UINT32 i; - - ASSERT (mApicIdMap != NULL); - - CoreThreadId = ApicId & ((1 << mNumOfBitShift) - 1); - - for(i = 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)); i++) { - if(mApicIdMap[i] == CoreThreadId) { - break; - } - } - - ASSERT (i <= (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount))); - - return i; -} - UINT32 ApicId2SwProcApicId ( UINT32 ApicId @@ -197,7 +75,7 @@ ApicId2SwProcApicId ( { UINT32 Index; - for (Index = 0; Index < MAX_CPU_NUM; Index++) { + for (Index = 0; Index < mNumberOfCpus; Index++) { if ((mCpuApicIdOrderTable[Index].Flags == 1) && (mCpuApicIdOrderTable[Index].ApicId == ApicId)) { return Index; } @@ -207,21 +85,25 @@ ApicId2SwProcApicId ( } +/** + Print Cpu Apic ID Table + + @param[in] CpuApicIdOrderTable Data will be dumped. +**/ VOID -DebugDisplayReOrderTable( - VOID +DebugDisplayReOrderTable ( + IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable ) { UINT32 Index; - DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n")); - for (Index=0; Index<MAX_CPU_NUM; Index++) { - DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n", - Index, mCpuApicIdOrderTable[Index].AcpiProcessorId, - mCpuApicIdOrderTable[Index].ApicId, - mCpuApicIdOrderTable[Index].Flags, - mCpuApicIdOrderTable[Index].SwProcApicId, - mCpuApicIdOrderTable[Index].SocketNum)); + DEBUG ((DEBUG_INFO, "Index AcpiProcId ApicId Flags Skt\n")); + for (Index = 0; Index < mNumberOfCpus; Index++) { + DEBUG ((DEBUG_INFO, " %02d 0x%02X 0x%02X %d %d\n", + Index, CpuApicIdOrderTable[Index].AcpiProcessorId, + CpuApicIdOrderTable[Index].ApicId, + CpuApicIdOrderTable[Index].Flags, + CpuApicIdOrderTable[Index].SocketNum)); } } @@ -284,125 +166,111 @@ SortCpuLocalApicInTable ( UINT32 TempVal = 0; EFI_CPU_ID_ORDER_MAP *CpuIdMapPtr; UINT32 CoreThreadMask; + EFI_CPU_ID_ORDER_MAP *TempCpuApicIdOrderTable; Index = 0; Status = EFI_SUCCESS; + TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP)); CoreThreadMask = (UINT32) ((1 << mNumOfBitShift) - 1); if(!mCpuOrderSorted) { - - Index = 0; - - for (CurrProcessor = 0; CurrProcessor < mNumberOfCPUs; CurrProcessor++) { + for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) { Status = mMpService->GetProcessorInfo ( - mMpService, - CurrProcessor, - &ProcessorInfoBuffer - ); + mMpService, + CurrProcessor, + &ProcessorInfoBuffer + ); if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) { - if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2]; - } else { //is primary thread - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index]; - Index++; - } + CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &TempCpuApicIdOrderTable[Index]; CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0); CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package; - CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId; - CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask)); - if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous - //may not necessory!!!!! - } + CpuIdMapPtr->AcpiProcessorId = ((UINT32)ProcessorInfoBuffer.Location.Package * (UINT32)mNumberOfCpus * 2) + Index; //update processorbitMask if (CpuIdMapPtr->Flags == 1) { - if(mForceX2ApicId) { CpuIdMapPtr->SocketNum &= 0x7; CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt - CpuIdMapPtr->SwProcApicId &= 0xFF; } } } else { //not enabled - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index]; + CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&TempCpuApicIdOrderTable[Index]; CpuIdMapPtr->ApicId = (UINT32)-1; CpuIdMapPtr->Flags = 0; CpuIdMapPtr->AcpiProcessorId = (UINT32)-1; - CpuIdMapPtr->SwProcApicId = (UINT32)-1; CpuIdMapPtr->SocketNum = (UINT32)-1; } //end if PROC ENABLE } //end for CurrentProcessor //keep for debug purpose - DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift)); - DebugDisplayReOrderTable(); + DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift)); + DebugDisplayReOrderTable (TempCpuApicIdOrderTable); //make sure 1st entry is BSP if(mX2ApicEnabled) { - BspApicId = (UINT32)AsmReadMsr64(0x802); + BspApicId = (UINT32)AsmReadMsr64 (0x802); } else { BspApicId = (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24; } - DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId)); + DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId)); - if(mCpuApicIdOrderTable[0].ApicId != BspApicId) { + if (TempCpuApicIdOrderTable[0].ApicId != BspApicId) { //check to see if 1st entry is BSP, if not swap it Index = ApicId2SwProcApicId(BspApicId); - if(MAX_CPU_NUM <= Index) { - DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n")); + if(mNumberOfCpus <= Index) { + DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n")); return EFI_INVALID_PARAMETER; } - TempVal = mCpuApicIdOrderTable[Index].ApicId; - mCpuApicIdOrderTable[Index].ApicId = mCpuApicIdOrderTable[0].ApicId; - mCpuApicIdOrderTable[0].ApicId = TempVal; - mCpuApicIdOrderTable[Index].Flags = mCpuApicIdOrderTable[0].Flags; - mCpuApicIdOrderTable[0].Flags = 1; - TempVal = mCpuApicIdOrderTable[Index].SwProcApicId; - mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId; - mCpuApicIdOrderTable[0].SwProcApicId = TempVal; + TempVal = TempCpuApicIdOrderTable[Index].ApicId; + TempCpuApicIdOrderTable[Index].ApicId = TempCpuApicIdOrderTable[0].ApicId; + TempCpuApicIdOrderTable[0].ApicId = TempVal; + TempCpuApicIdOrderTable[Index].Flags = TempCpuApicIdOrderTable[0].Flags; + TempCpuApicIdOrderTable[0].Flags = 1; //swap AcpiProcId - TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId; - mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId; - mCpuApicIdOrderTable[0].AcpiProcessorId = TempVal; - + TempVal = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + TempCpuApicIdOrderTable[Index].AcpiProcessorId = TempCpuApicIdOrderTable[0].AcpiProcessorId; + TempCpuApicIdOrderTable[0].AcpiProcessorId = TempVal; } //Make sure no holes between enabled threads - for(CurrProcessor = 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) { - - if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) { - //make sure disabled entry has ProcId set to FFs - mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1; - mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1; - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1; - - for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) { - if(mCpuApicIdOrderTable[Index].Flags == 1) { - //move enabled entry up - mCpuApicIdOrderTable[CurrProcessor].Flags = 1; - mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId; - mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId; - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId; - mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum; - //disable moved entry - mCpuApicIdOrderTable[Index].Flags = 0; - mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1; - mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1; - mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1; - break; - } - } + for (CurrProcessor = 0, Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].ApicId & 1) == 0) { // primary thread + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; + } + } + + for (Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].ApicId & 1) == 1) { //second thread + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; + } + } + + for (Index = 0; Index < mNumberOfCpus; Index++) { + if (TempCpuApicIdOrderTable[Index].Flags == 0) { // not enabled + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; } } //keep for debug purpose - DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n")); - DebugDisplayReOrderTable(); + DEBUG ((DEBUG_INFO, "APIC ID Order Table ReOrdered\n")); + DebugDisplayReOrderTable (mCpuApicIdOrderTable); mCpuOrderSorted = TRUE; } @@ -602,11 +470,11 @@ InitializeMadtHeader ( } Status = InitializeHeader ( - &MadtHeader->Header, - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, - 0 - ); + &MadtHeader->Header, + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + 0 + ); if (EFI_ERROR (Status)) { return Status; } @@ -784,11 +652,11 @@ BuildAcpiTable ( // Allocate the memory needed for the table. // Status = AllocateTable ( - TableSpecificHdrLength, - Structures, - StructureCount, - &InternalTable - ); + TableSpecificHdrLength, + Structures, + StructureCount, + &InternalTable + ); if (EFI_ERROR (Status)) { return Status; } @@ -871,18 +739,22 @@ InstallMadtFromScratch ( NewMadtTable = NULL; MaxMadtStructCount = 0; - DetectApicIdMap(); + mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP)); + if (mCpuApicIdOrderTable == NULL) { + DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable structure pointer array\n")); + return EFI_OUT_OF_RESOURCES; + } // Call for Local APIC ID Reorder Status = SortCpuLocalApicInTable (); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); goto Done; } MaxMadtStructCount = (UINT32) ( - MAX_CPU_NUM + // processor local APIC structures - MAX_CPU_NUM + // processor local x2APIC structures + mNumberOfCpus + // processor local APIC structures + mNumberOfCpus + // processor local x2APIC structures 1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures 2 + // interrupt source override structures 1 + // local APIC NMI structures @@ -906,11 +778,11 @@ InstallMadtFromScratch ( // Status = InitializeMadtHeader (&MadtTableHeader); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Status)); goto Done; } - DEBUG ((EFI_D_INFO, "Number of CPUs detected = %d \n", mNumberOfCPUs)); + DEBUG ((DEBUG_INFO, "Number of CPUs detected = %d \n", mNumberOfCpus)); // // Build Processor Local APIC Structures and Processor Local X2APIC Structures @@ -923,7 +795,7 @@ InstallMadtFromScratch ( ProcLocalX2ApicStruct.Reserved[0] = 0; ProcLocalX2ApicStruct.Reserved[1] = 0; - for (Index = 0; Index < MAX_CPU_NUM; Index++) { + for (Index = 0; Index < mNumberOfCpus; Index++) { // // If x2APIC mode is not enabled, and if it is possible to express the // APIC ID as a UINT8, use a processor local APIC structure. Otherwise, @@ -936,10 +808,10 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &ProcLocalApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &ProcLocalApicStruct, + &MadtStructs[MadtStructsIndex++] + ); } else if (mCpuApicIdOrderTable[Index].ApicId != 0xFFFFFFFF) { ProcLocalX2ApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags; ProcLocalX2ApicStruct.X2ApicId = mCpuApicIdOrderTable[Index].ApicId; @@ -947,13 +819,13 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct, + &MadtStructs[MadtStructsIndex++] + ); } if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status)); goto Done; } } @@ -965,44 +837,44 @@ InstallMadtFromScratch ( IoApicStruct.Length = sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE); IoApicStruct.Reserved = 0; - PcIoApicEnable = PcdGet32(PcdPcIoApicEnable); + PcIoApicEnable = PcdGet32 (PcdPcIoApicEnable); - if (FixedPcdGet32(PcdMaxCpuSocketCount) <= 4) { + if (FixedPcdGet32 (PcdMaxCpuSocketCount) <= 4) { IoApicStruct.IoApicId = PcdGet8(PcdIoApicId); IoApicStruct.IoApicAddress = PcdGet32(PcdIoApicAddress); IoApicStruct.GlobalSystemInterruptBase = 0; ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IoApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IoApicStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); goto Done; } } for (PcIoApicIndex = 0; PcIoApicIndex < PcdGet8(PcdPcIoApicCount); PcIoApicIndex++) { - PcIoApicMask = (1 << PcIoApicIndex); - if ((PcIoApicEnable & PcIoApicMask) == 0) { - continue; - } + PcIoApicMask = (1 << PcIoApicIndex); + if ((PcIoApicEnable & PcIoApicMask) == 0) { + continue; + } - IoApicStruct.IoApicId = (UINT8)(PcdGet8(PcdPcIoApicIdBase) + PcIoApicIndex); - IoApicStruct.IoApicAddress = CurrentIoApicAddress; - CurrentIoApicAddress = (CurrentIoApicAddress & 0xFFFF8000) + 0x8000; - IoApicStruct.GlobalSystemInterruptBase = (UINT32)(24 + (PcIoApicIndex * 8)); - ASSERT (MadtStructsIndex < MaxMadtStructCount); - Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IoApicStruct, - &MadtStructs[MadtStructsIndex++] - ); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); - goto Done; - } + IoApicStruct.IoApicId = (UINT8)(PcdGet8(PcdPcIoApicIdBase) + PcIoApicIndex); + IoApicStruct.IoApicAddress = CurrentIoApicAddress; + CurrentIoApicAddress = (CurrentIoApicAddress & 0xFFFF8000) + 0x8000; + IoApicStruct.GlobalSystemInterruptBase = (UINT32)(24 + (PcIoApicIndex * 8)); + ASSERT (MadtStructsIndex < MaxMadtStructCount); + Status = CopyStructure ( + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IoApicStruct, + &MadtStructs[MadtStructsIndex++] + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); + goto Done; + } } // @@ -1021,12 +893,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IntSrcOverrideStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IntSrcOverrideStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status)); goto Done; } @@ -1040,12 +912,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IntSrcOverrideStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IntSrcOverrideStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status)); goto Done; } @@ -1060,12 +932,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &LocalApciNmiStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &LocalApciNmiStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)); goto Done; } @@ -1084,10 +956,10 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "CopyMadtStructure (x2APIC NMI) failed: %r\n", Status)); goto Done; @@ -1098,14 +970,14 @@ InstallMadtFromScratch ( // Build Madt Structure from the Madt Header and collection of pointers in MadtStructs[] // Status = BuildAcpiTable ( - (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader, - sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER), - MadtStructs, - MadtStructsIndex, - (UINT8 **)&NewMadtTable - ); + (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader, + sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER), + MadtStructs, + MadtStructsIndex, + (UINT8 **) &NewMadtTable + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "BuildAcpiTable failed: %r\n", Status)); goto Done; } @@ -1113,11 +985,11 @@ InstallMadtFromScratch ( // Publish Madt Structure to ACPI // Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - NewMadtTable, - NewMadtTable->Header.Length, - &TableHandle - ); + mAcpiTable, + NewMadtTable, + NewMadtTable->Header.Length, + &TableHandle + ); Done: // @@ -1136,6 +1008,10 @@ Done: FreePool (NewMadtTable); } + if (mCpuApicIdOrderTable != NULL) { + FreePool (mCpuApicIdOrderTable); + } + return Status; } @@ -1155,8 +1031,8 @@ InstallMcfgFromScratch ( PciSegmentInfo = GetPciSegmentInfo (&SegmentCount); McfgTable = AllocateZeroPool ( - sizeof(EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) + - sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) + + sizeof (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount ); if (McfgTable == NULL) { DEBUG ((DEBUG_ERROR, "Could not allocate MCFG structure\n")); @@ -1164,11 +1040,11 @@ InstallMcfgFromScratch ( } Status = InitializeHeader ( - &McfgTable->Header, - EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, - 0 - ); + &McfgTable->Header, + EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, + 0 + ); if (EFI_ERROR (Status)) { return Status; } @@ -1192,11 +1068,11 @@ InstallMcfgFromScratch ( // Publish Madt Structure to ACPI // Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - McfgTable, - McfgTable->Header.Length, - &TableHandle - ); + mAcpiTable, + McfgTable, + McfgTable->Header.Length, + &TableHandle + ); return Status; } @@ -1280,7 +1156,7 @@ PlatformUpdateTables ( switch (Table->Signature) { case EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE: - ASSERT(FALSE); + ASSERT (FALSE); break; case EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: @@ -1324,9 +1200,9 @@ PlatformUpdateTables ( FadtHeader->XGpe1Blk.AccessSize = 0; } - DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table )); - DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch )); - DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags )); + DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); + DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); + DEBUG ((DEBUG_INFO, " Flags 0x%x\n", FadtHeader->Flags)); break; case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE: @@ -1346,12 +1222,12 @@ PlatformUpdateTables ( HpetBlockId.Bits.VendorId = HpetCapabilities.Bits.VendorId; HpetTable->EventTimerBlockId = HpetBlockId.Uint32; HpetTable->MainCounterMinimumClockTickInPeriodicMode = (UINT16)HpetCapabilities.Bits.CounterClockPeriod; - DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table )); - DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress) )); + DEBUG ((DEBUG_INFO, "ACPI HPET table @ address 0x%x\n", Table)); + DEBUG ((DEBUG_INFO, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress))); break; case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE: - ASSERT(FALSE); + ASSERT (FALSE); break; default: @@ -1403,8 +1279,8 @@ IsHardwareChange ( // pFADT->XDsdt // HWChangeSize = HandleCount + 1; - HWChange = AllocateZeroPool( sizeof(UINT32) * HWChangeSize ); - ASSERT( HWChange != NULL ); + HWChange = AllocateZeroPool (sizeof(UINT32) * HWChangeSize); + ASSERT(HWChange != NULL); if (HWChange == NULL) return; @@ -1445,14 +1321,14 @@ IsHardwareChange ( // Calculate CRC value with HWChange data. // Status = gBS->CalculateCrc32(HWChange, HWChangeSize, &CRC); - DEBUG((DEBUG_INFO, "CRC = %x and Status = %r\n", CRC, Status)); + DEBUG ((DEBUG_INFO, "CRC = %x and Status = %r\n", CRC, Status)); // // Set HardwareSignature value based on CRC value. // FacsPtr = (EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)(UINTN)pFADT->FirmwareCtrl; FacsPtr->HardwareSignature = CRC; - FreePool( HWChange ); + FreePool (HWChange); } VOID @@ -1475,17 +1351,16 @@ UpdateLocalTable ( if (Version != EFI_ACPI_TABLE_VERSION_NONE) { Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - CurrentTable, - CurrentTable->Length, - &TableHandle - ); + mAcpiTable, + CurrentTable, + CurrentTable->Length, + &TableHandle + ); ASSERT_EFI_ERROR (Status); } } } - VOID EFIAPI AcpiEndOfDxeEvent ( @@ -1493,16 +1368,14 @@ AcpiEndOfDxeEvent ( VOID *ParentImageHandle ) { - if (Event != NULL) { - gBS->CloseEvent(Event); + gBS->CloseEvent (Event); } - // // Calculate Hardware Signature value based on current platform configurations // - IsHardwareChange(); + IsHardwareChange (); } /** @@ -1526,7 +1399,6 @@ InstallAcpiPlatform ( EFI_STATUS Status; EFI_EVENT EndOfDxeEvent; - Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&mMpService); ASSERT_EFI_ERROR (Status); @@ -1550,19 +1422,19 @@ InstallAcpiPlatform ( // Determine the number of processors // mMpService->GetNumberOfProcessors ( - mMpService, - &mNumberOfCPUs, - &mNumberOfEnabledCPUs - ); - ASSERT (mNumberOfCPUs <= MAX_CPU_NUM && mNumberOfEnabledCPUs >= 1); - DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs)); + mMpService, + &mNumberOfCpus, + &mNumberOfEnabledCPUs + ); + + DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumberOfCpus)); DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs)); DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled)); DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId)); // support up to 64 threads/socket - AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL); + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL); mNumOfBitShift &= 0x1F; DEBUG ((DEBUG_INFO, "mNumOfBitShift - 0x%x\n", mNumOfBitShift)); -- 2.32.0.windows.2
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[edk2-platforms: PATCH V4] Platform/Intel: Correct CPU APIC IDs
JackX Lin
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3365
BIOS cannot find correct AcpiProcId in mApicIdMap because of there is no suitable map, that causes ACPI_BIOS_ERROR. Remove mApicIdMap for determing AcpiProcId, uses normal countings instead. Signed-off-by: JackX Lin <JackX.Lin@...> Cc: Chasel Chiu <chasel.chiu@...> Cc: Jenny Huang <jenny.huang@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Cc: Donald Kuo <Donald.Kuo@...> Cc: Chandana C Kumar <chandana.c.kumar@...> Cc: Tinax Chen <tinax.y.chen@...> Cc: JackX Lin <JackX.Lin@...> Change-Id: Ib64e519686b2f324a0a57c3b5bba220a7b75fda1 --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 538 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 1 file changed, 206 insertions(+), 332 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 2b51c34ef2..4d9c709e4f 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1,22 +1,19 @@ /** @file ACPI Platform Driver -Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR> +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include "AcpiPlatform.h" -#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount)) - #pragma pack(1) typedef struct { UINT32 AcpiProcessorId; UINT32 ApicId; UINT32 Flags; - UINT32 SwProcApicId; UINT32 SocketNum; } EFI_CPU_ID_ORDER_MAP; @@ -50,7 +47,7 @@ VOID *mLocalTable[] = { &Wsmt, }; -EFI_ACPI_TABLE_PROTOCOL *mAcpiTable; +EFI_ACPI_TABLE_PROTOCOL *mAcpiTable; UINT32 mNumOfBitShift = 6; BOOLEAN mForceX2ApicId; @@ -58,138 +55,19 @@ BOOLEAN mX2ApicEnabled; EFI_MP_SERVICES_PROTOCOL *mMpService; BOOLEAN mCpuOrderSorted; -EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM]; -UINTN mNumberOfCPUs = 0; +EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable = NULL; +UINTN mNumberOfCpus = 0; UINTN mNumberOfEnabledCPUs = 0; -// following are possible APICID Map for SKX -static const UINT32 ApicIdMapA[] = { //for SKUs have number of core > 16 - //it is 14 + 14 + 14 + 14 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x00000010, 0x00000011, - 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019, - 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022, 0x00000023, - 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, - 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035, - 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x0000003D -}; - -static const UINT32 ApicIdMapB[] = { //for SKUs have number of cores <= 16 use 32 ID space - //it is 16+16 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, - 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - - -static const UINT32 ApicIdMapC[] = { //for SKUs have number of cores <= 16 use 64 ID space - //it is 16+0+16+0 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027, - 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - -static const UINT32 ApicIdMapD[] = { //for SKUs have number of cores <= 8 use 16 ID space - //it is 16 format - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF -}; - -const UINT32 *mApicIdMap = NULL; - /** - This function detect the APICID map and update ApicID Map pointer + Find BSP in mCpuApicIdOrderTable. - @param None + This function searches mCpuApicIdOrderTable to find the BSP ApicId, and returns a number where the BSP is. - @retval VOID - -**/ -VOID DetectApicIdMap(VOID) -{ - UINTN CoreCount; - - CoreCount = 0; - - if(mApicIdMap != NULL) { - return; //aleady initialized - } - - mApicIdMap = ApicIdMapA; // default to > 16C SKUs - - CoreCount = mNumberOfEnabledCPUs / 2; - DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount)); - - //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift)); - // Dont assert for single core, single thread system. - //ASSERT (CoreCount != 0); - - if(CoreCount <= 16) { - - if(mNumOfBitShift == 4) { - mApicIdMap = ApicIdMapD; - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap)); - } - - if(mNumOfBitShift == 5) { - mApicIdMap = ApicIdMapB; - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap)); - } - - if(mNumOfBitShift == 6) { - mApicIdMap = ApicIdMapC; - //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap)); - } - - } - - return; -} - -/** - This function return the CoreThreadId of ApicId from ACPI ApicId Map array - - @param ApicId - - @retval Index of ACPI ApicId Map array + @param[in] ApicId Apic ID. + @return Where the BSP is. **/ -UINT32 -GetIndexFromApicId ( - UINT32 ApicId - ) -{ - UINT32 CoreThreadId; - UINT32 i; - - ASSERT (mApicIdMap != NULL); - - CoreThreadId = ApicId & ((1 << mNumOfBitShift) - 1); - - for(i = 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)); i++) { - if(mApicIdMap[i] == CoreThreadId) { - break; - } - } - - ASSERT (i <= (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount))); - - return i; -} - UINT32 ApicId2SwProcApicId ( UINT32 ApicId @@ -197,7 +75,7 @@ ApicId2SwProcApicId ( { UINT32 Index; - for (Index = 0; Index < MAX_CPU_NUM; Index++) { + for (Index = 0; Index < mNumberOfCpus; Index++) { if ((mCpuApicIdOrderTable[Index].Flags == 1) && (mCpuApicIdOrderTable[Index].ApicId == ApicId)) { return Index; } @@ -207,21 +85,25 @@ ApicId2SwProcApicId ( } +/** + Print Cpu Apic ID Table + + @param[in] CpuApicIdOrderTable Data will be dumped. +**/ VOID -DebugDisplayReOrderTable( - VOID +DebugDisplayReOrderTable ( + IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable ) { UINT32 Index; - DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n")); - for (Index=0; Index<MAX_CPU_NUM; Index++) { - DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n", - Index, mCpuApicIdOrderTable[Index].AcpiProcessorId, - mCpuApicIdOrderTable[Index].ApicId, - mCpuApicIdOrderTable[Index].Flags, - mCpuApicIdOrderTable[Index].SwProcApicId, - mCpuApicIdOrderTable[Index].SocketNum)); + DEBUG ((DEBUG_INFO, "Index AcpiProcId ApicId Flags Skt\n")); + for (Index = 0; Index < mNumberOfCpus; Index++) { + DEBUG ((DEBUG_INFO, " %02d 0x%02X 0x%02X %d %d\n", + Index, CpuApicIdOrderTable[Index].AcpiProcessorId, + CpuApicIdOrderTable[Index].ApicId, + CpuApicIdOrderTable[Index].Flags, + CpuApicIdOrderTable[Index].SocketNum)); } } @@ -284,125 +166,113 @@ SortCpuLocalApicInTable ( UINT32 TempVal = 0; EFI_CPU_ID_ORDER_MAP *CpuIdMapPtr; UINT32 CoreThreadMask; + EFI_CPU_ID_ORDER_MAP *TempCpuApicIdOrderTable; Index = 0; Status = EFI_SUCCESS; + TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP)); CoreThreadMask = (UINT32) ((1 << mNumOfBitShift) - 1); if(!mCpuOrderSorted) { - - Index = 0; - - for (CurrProcessor = 0; CurrProcessor < mNumberOfCPUs; CurrProcessor++) { + for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) { Status = mMpService->GetProcessorInfo ( - mMpService, - CurrProcessor, - &ProcessorInfoBuffer - ); + mMpService, + CurrProcessor, + &ProcessorInfoBuffer + ); if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) { - if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2]; - } else { //is primary thread - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index]; - Index++; - } + CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &TempCpuApicIdOrderTable[Index]; CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0); CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package; - CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId; - CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask)); - if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous - //may not necessory!!!!! - } + CpuIdMapPtr->AcpiProcessorId = ((UINT32)ProcessorInfoBuffer.Location.Package * (UINT32)mNumberOfCpus * 2) + Index; //update processorbitMask if (CpuIdMapPtr->Flags == 1) { - if(mForceX2ApicId) { CpuIdMapPtr->SocketNum &= 0x7; CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt - CpuIdMapPtr->SwProcApicId &= 0xFF; } } } else { //not enabled - CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index]; + CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&TempCpuApicIdOrderTable[Index]; CpuIdMapPtr->ApicId = (UINT32)-1; CpuIdMapPtr->Flags = 0; CpuIdMapPtr->AcpiProcessorId = (UINT32)-1; - CpuIdMapPtr->SwProcApicId = (UINT32)-1; CpuIdMapPtr->SocketNum = (UINT32)-1; } //end if PROC ENABLE } //end for CurrentProcessor //keep for debug purpose - DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift)); - DebugDisplayReOrderTable(); + DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift)); + DebugDisplayReOrderTable (TempCpuApicIdOrderTable); //make sure 1st entry is BSP if(mX2ApicEnabled) { - BspApicId = (UINT32)AsmReadMsr64(0x802); + BspApicId = (UINT32)AsmReadMsr64 (0x802); } else { BspApicId = (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24; } - DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId)); + DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId)); - if(mCpuApicIdOrderTable[0].ApicId != BspApicId) { + if (TempCpuApicIdOrderTable[0].ApicId != BspApicId) { //check to see if 1st entry is BSP, if not swap it Index = ApicId2SwProcApicId(BspApicId); - if(MAX_CPU_NUM <= Index) { - DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n")); + if(mNumberOfCpus <= Index) { + DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n")); return EFI_INVALID_PARAMETER; } - TempVal = mCpuApicIdOrderTable[Index].ApicId; - mCpuApicIdOrderTable[Index].ApicId = mCpuApicIdOrderTable[0].ApicId; - mCpuApicIdOrderTable[0].ApicId = TempVal; - mCpuApicIdOrderTable[Index].Flags = mCpuApicIdOrderTable[0].Flags; - mCpuApicIdOrderTable[0].Flags = 1; - TempVal = mCpuApicIdOrderTable[Index].SwProcApicId; - mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId; - mCpuApicIdOrderTable[0].SwProcApicId = TempVal; + TempVal = TempCpuApicIdOrderTable[Index].ApicId; + TempCpuApicIdOrderTable[Index].ApicId = TempCpuApicIdOrderTable[0].ApicId; + TempCpuApicIdOrderTable[0].ApicId = TempVal; + TempCpuApicIdOrderTable[Index].Flags = TempCpuApicIdOrderTable[0].Flags; + TempCpuApicIdOrderTable[0].Flags = 1; //swap AcpiProcId - TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId; - mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId; - mCpuApicIdOrderTable[0].AcpiProcessorId = TempVal; - + TempVal = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + TempCpuApicIdOrderTable[Index].AcpiProcessorId = TempCpuApicIdOrderTable[0].AcpiProcessorId; + TempCpuApicIdOrderTable[0].AcpiProcessorId = TempVal; } //Make sure no holes between enabled threads - for(CurrProcessor = 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) { - - if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) { - //make sure disabled entry has ProcId set to FFs - mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1; - mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1; - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1; - - for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) { - if(mCpuApicIdOrderTable[Index].Flags == 1) { - //move enabled entry up - mCpuApicIdOrderTable[CurrProcessor].Flags = 1; - mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId; - mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId; - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId; - mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum; - //disable moved entry - mCpuApicIdOrderTable[Index].Flags = 0; - mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1; - mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1; - mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1; - break; - } - } + mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP)); + + for (CurrProcessor = 0, Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].ApicId & 1) == 0) { // primary thread + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; + } + } + + for (Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].ApicId & 1) == 1) { //second thread + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; + } + } + + for (Index = 0; Index < mNumberOfCpus; Index++) { + if (TempCpuApicIdOrderTable[Index].Flags == 0) { // not enabled + mCpuApicIdOrderTable[CurrProcessor].ApicId = TempCpuApicIdOrderTable[Index].ApicId; + mCpuApicIdOrderTable[CurrProcessor].Flags = TempCpuApicIdOrderTable[Index].Flags; + mCpuApicIdOrderTable[CurrProcessor].SocketNum = TempCpuApicIdOrderTable[Index].SocketNum; + mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = TempCpuApicIdOrderTable[Index].AcpiProcessorId; + CurrProcessor++; } } //keep for debug purpose - DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n")); - DebugDisplayReOrderTable(); + DEBUG ((DEBUG_INFO, "APIC ID Order Table ReOrdered\n")); + DebugDisplayReOrderTable (mCpuApicIdOrderTable); mCpuOrderSorted = TRUE; } @@ -602,11 +472,11 @@ InitializeMadtHeader ( } Status = InitializeHeader ( - &MadtHeader->Header, - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, - 0 - ); + &MadtHeader->Header, + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + 0 + ); if (EFI_ERROR (Status)) { return Status; } @@ -784,11 +654,11 @@ BuildAcpiTable ( // Allocate the memory needed for the table. // Status = AllocateTable ( - TableSpecificHdrLength, - Structures, - StructureCount, - &InternalTable - ); + TableSpecificHdrLength, + Structures, + StructureCount, + &InternalTable + ); if (EFI_ERROR (Status)) { return Status; } @@ -871,18 +741,22 @@ InstallMadtFromScratch ( NewMadtTable = NULL; MaxMadtStructCount = 0; - DetectApicIdMap(); + mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP)); + if (mCpuApicIdOrderTable == NULL) { + DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable structure pointer array\n")); + return EFI_OUT_OF_RESOURCES; + } // Call for Local APIC ID Reorder Status = SortCpuLocalApicInTable (); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); goto Done; } MaxMadtStructCount = (UINT32) ( - MAX_CPU_NUM + // processor local APIC structures - MAX_CPU_NUM + // processor local x2APIC structures + mNumberOfCpus + // processor local APIC structures + mNumberOfCpus + // processor local x2APIC structures 1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures 2 + // interrupt source override structures 1 + // local APIC NMI structures @@ -906,11 +780,11 @@ InstallMadtFromScratch ( // Status = InitializeMadtHeader (&MadtTableHeader); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Status)); goto Done; } - DEBUG ((EFI_D_INFO, "Number of CPUs detected = %d \n", mNumberOfCPUs)); + DEBUG ((DEBUG_INFO, "Number of CPUs detected = %d \n", mNumberOfCpus)); // // Build Processor Local APIC Structures and Processor Local X2APIC Structures @@ -923,7 +797,7 @@ InstallMadtFromScratch ( ProcLocalX2ApicStruct.Reserved[0] = 0; ProcLocalX2ApicStruct.Reserved[1] = 0; - for (Index = 0; Index < MAX_CPU_NUM; Index++) { + for (Index = 0; Index < mNumberOfCpus; Index++) { // // If x2APIC mode is not enabled, and if it is possible to express the // APIC ID as a UINT8, use a processor local APIC structure. Otherwise, @@ -936,10 +810,10 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &ProcLocalApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &ProcLocalApicStruct, + &MadtStructs[MadtStructsIndex++] + ); } else if (mCpuApicIdOrderTable[Index].ApicId != 0xFFFFFFFF) { ProcLocalX2ApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags; ProcLocalX2ApicStruct.X2ApicId = mCpuApicIdOrderTable[Index].ApicId; @@ -947,13 +821,13 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct, + &MadtStructs[MadtStructsIndex++] + ); } if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status)); goto Done; } } @@ -965,44 +839,44 @@ InstallMadtFromScratch ( IoApicStruct.Length = sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE); IoApicStruct.Reserved = 0; - PcIoApicEnable = PcdGet32(PcdPcIoApicEnable); + PcIoApicEnable = PcdGet32 (PcdPcIoApicEnable); - if (FixedPcdGet32(PcdMaxCpuSocketCount) <= 4) { + if (FixedPcdGet32 (PcdMaxCpuSocketCount) <= 4) { IoApicStruct.IoApicId = PcdGet8(PcdIoApicId); IoApicStruct.IoApicAddress = PcdGet32(PcdIoApicAddress); IoApicStruct.GlobalSystemInterruptBase = 0; ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IoApicStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IoApicStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); goto Done; } } for (PcIoApicIndex = 0; PcIoApicIndex < PcdGet8(PcdPcIoApicCount); PcIoApicIndex++) { - PcIoApicMask = (1 << PcIoApicIndex); - if ((PcIoApicEnable & PcIoApicMask) == 0) { - continue; - } + PcIoApicMask = (1 << PcIoApicIndex); + if ((PcIoApicEnable & PcIoApicMask) == 0) { + continue; + } - IoApicStruct.IoApicId = (UINT8)(PcdGet8(PcdPcIoApicIdBase) + PcIoApicIndex); - IoApicStruct.IoApicAddress = CurrentIoApicAddress; - CurrentIoApicAddress = (CurrentIoApicAddress & 0xFFFF8000) + 0x8000; - IoApicStruct.GlobalSystemInterruptBase = (UINT32)(24 + (PcIoApicIndex * 8)); - ASSERT (MadtStructsIndex < MaxMadtStructCount); - Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IoApicStruct, - &MadtStructs[MadtStructsIndex++] - ); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); - goto Done; - } + IoApicStruct.IoApicId = (UINT8)(PcdGet8(PcdPcIoApicIdBase) + PcIoApicIndex); + IoApicStruct.IoApicAddress = CurrentIoApicAddress; + CurrentIoApicAddress = (CurrentIoApicAddress & 0xFFFF8000) + 0x8000; + IoApicStruct.GlobalSystemInterruptBase = (UINT32)(24 + (PcIoApicIndex * 8)); + ASSERT (MadtStructsIndex < MaxMadtStructCount); + Status = CopyStructure ( + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IoApicStruct, + &MadtStructs[MadtStructsIndex++] + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); + goto Done; + } } // @@ -1021,12 +895,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IntSrcOverrideStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IntSrcOverrideStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status)); goto Done; } @@ -1040,12 +914,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &IntSrcOverrideStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &IntSrcOverrideStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status)); goto Done; } @@ -1060,12 +934,12 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &LocalApciNmiStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &LocalApciNmiStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)); goto Done; } @@ -1084,10 +958,10 @@ InstallMadtFromScratch ( ASSERT (MadtStructsIndex < MaxMadtStructCount); Status = CopyStructure ( - &MadtTableHeader.Header, - (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct, - &MadtStructs[MadtStructsIndex++] - ); + &MadtTableHeader.Header, + (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct, + &MadtStructs[MadtStructsIndex++] + ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "CopyMadtStructure (x2APIC NMI) failed: %r\n", Status)); goto Done; @@ -1098,14 +972,14 @@ InstallMadtFromScratch ( // Build Madt Structure from the Madt Header and collection of pointers in MadtStructs[] // Status = BuildAcpiTable ( - (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader, - sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER), - MadtStructs, - MadtStructsIndex, - (UINT8 **)&NewMadtTable - ); + (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader, + sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER), + MadtStructs, + MadtStructsIndex, + (UINT8 **) &NewMadtTable + ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "BuildAcpiTable failed: %r\n", Status)); goto Done; } @@ -1113,11 +987,11 @@ InstallMadtFromScratch ( // Publish Madt Structure to ACPI // Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - NewMadtTable, - NewMadtTable->Header.Length, - &TableHandle - ); + mAcpiTable, + NewMadtTable, + NewMadtTable->Header.Length, + &TableHandle + ); Done: // @@ -1136,6 +1010,10 @@ Done: FreePool (NewMadtTable); } + if (mCpuApicIdOrderTable != NULL) { + FreePool (mCpuApicIdOrderTable); + } + return Status; } @@ -1155,8 +1033,8 @@ InstallMcfgFromScratch ( PciSegmentInfo = GetPciSegmentInfo (&SegmentCount); McfgTable = AllocateZeroPool ( - sizeof(EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) + - sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) + + sizeof (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount ); if (McfgTable == NULL) { DEBUG ((DEBUG_ERROR, "Could not allocate MCFG structure\n")); @@ -1164,11 +1042,11 @@ InstallMcfgFromScratch ( } Status = InitializeHeader ( - &McfgTable->Header, - EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, - 0 - ); + &McfgTable->Header, + EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, + 0 + ); if (EFI_ERROR (Status)) { return Status; } @@ -1192,11 +1070,11 @@ InstallMcfgFromScratch ( // Publish Madt Structure to ACPI // Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - McfgTable, - McfgTable->Header.Length, - &TableHandle - ); + mAcpiTable, + McfgTable, + McfgTable->Header.Length, + &TableHandle + ); return Status; } @@ -1280,7 +1158,7 @@ PlatformUpdateTables ( switch (Table->Signature) { case EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE: - ASSERT(FALSE); + ASSERT (FALSE); break; case EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: @@ -1324,9 +1202,9 @@ PlatformUpdateTables ( FadtHeader->XGpe1Blk.AccessSize = 0; } - DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table )); - DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch )); - DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags )); + DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); + DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); + DEBUG ((DEBUG_INFO, " Flags 0x%x\n", FadtHeader->Flags)); break; case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE: @@ -1346,12 +1224,12 @@ PlatformUpdateTables ( HpetBlockId.Bits.VendorId = HpetCapabilities.Bits.VendorId; HpetTable->EventTimerBlockId = HpetBlockId.Uint32; HpetTable->MainCounterMinimumClockTickInPeriodicMode = (UINT16)HpetCapabilities.Bits.CounterClockPeriod; - DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table )); - DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress) )); + DEBUG ((DEBUG_INFO, "ACPI HPET table @ address 0x%x\n", Table)); + DEBUG ((DEBUG_INFO, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress))); break; case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE: - ASSERT(FALSE); + ASSERT (FALSE); break; default: @@ -1403,8 +1281,8 @@ IsHardwareChange ( // pFADT->XDsdt // HWChangeSize = HandleCount + 1; - HWChange = AllocateZeroPool( sizeof(UINT32) * HWChangeSize ); - ASSERT( HWChange != NULL ); + HWChange = AllocateZeroPool (sizeof(UINT32) * HWChangeSize); + ASSERT(HWChange != NULL); if (HWChange == NULL) return; @@ -1445,14 +1323,14 @@ IsHardwareChange ( // Calculate CRC value with HWChange data. // Status = gBS->CalculateCrc32(HWChange, HWChangeSize, &CRC); - DEBUG((DEBUG_INFO, "CRC = %x and Status = %r\n", CRC, Status)); + DEBUG ((DEBUG_INFO, "CRC = %x and Status = %r\n", CRC, Status)); // // Set HardwareSignature value based on CRC value. // FacsPtr = (EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)(UINTN)pFADT->FirmwareCtrl; FacsPtr->HardwareSignature = CRC; - FreePool( HWChange ); + FreePool (HWChange); } VOID @@ -1475,17 +1353,16 @@ UpdateLocalTable ( if (Version != EFI_ACPI_TABLE_VERSION_NONE) { Status = mAcpiTable->InstallAcpiTable ( - mAcpiTable, - CurrentTable, - CurrentTable->Length, - &TableHandle - ); + mAcpiTable, + CurrentTable, + CurrentTable->Length, + &TableHandle + ); ASSERT_EFI_ERROR (Status); } } } - VOID EFIAPI AcpiEndOfDxeEvent ( @@ -1493,16 +1370,14 @@ AcpiEndOfDxeEvent ( VOID *ParentImageHandle ) { - if (Event != NULL) { - gBS->CloseEvent(Event); + gBS->CloseEvent (Event); } - // // Calculate Hardware Signature value based on current platform configurations // - IsHardwareChange(); + IsHardwareChange (); } /** @@ -1526,7 +1401,6 @@ InstallAcpiPlatform ( EFI_STATUS Status; EFI_EVENT EndOfDxeEvent; - Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&mMpService); ASSERT_EFI_ERROR (Status); @@ -1550,19 +1424,19 @@ InstallAcpiPlatform ( // Determine the number of processors // mMpService->GetNumberOfProcessors ( - mMpService, - &mNumberOfCPUs, - &mNumberOfEnabledCPUs - ); - ASSERT (mNumberOfCPUs <= MAX_CPU_NUM && mNumberOfEnabledCPUs >= 1); - DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs)); + mMpService, + &mNumberOfCpus, + &mNumberOfEnabledCPUs + ); + + DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumberOfCpus)); DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs)); DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled)); DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId)); // support up to 64 threads/socket - AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL); + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL); mNumOfBitShift &= 0x1F; DEBUG ((DEBUG_INFO, "mNumOfBitShift - 0x%x\n", mNumOfBitShift)); -- 2.32.0.windows.2
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[PATCH edk2-platform v2 0/1] Hisilicon:Fix header file issues
wenyi,xie
Main Changes since v1:
1.change the name of header file. Wenyi Xie (1): Hisilicon:Fix header file issues Silicon/Hisilicon/HisiPkg.dec | 2 +- Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h | 2 +- Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h | 2 +- Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h | 15 +-------------- Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 2 +- Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 2 +- Silicon/Hisilicon/Include/Library/{OemMiscLib.h => OemHisiMiscLib.h} | 0 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c | 2 +- Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 2 +- Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 2 +- Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c | 2 +- Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 2 +- Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c | 2 +- Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 +- Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c | 2 +- Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c | 2 +- 22 files changed, 21 insertions(+), 34 deletions(-) rename Silicon/Hisilicon/Include/Library/{OemMiscLib.h => OemHisiMiscLib.h} (100%) -- 2.20.1.windows.1
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[PATCH edk2-platform v2 1/1] Hisilicon:Fix header file issues
wenyi,xie
EDK2 has removed header file ArmLibPrivate.h, so need to
use ArmLib.h instead. A new file OemMiscLib.h is added to EDK2, its name is same with the header file in Hisilicon\Include and it will being included first. So changing the name of header file from OemMiscLib.h to OemHisiMiscLib.h. Cc: Leif Lindholm <leif@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Signed-off-by: Wenyi Xie <xiewenyi2@...> --- Silicon/Hisilicon/HisiPkg.dec | 2 +- Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h | 2 +- Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h | 2 +- Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h | 15 +-------------- Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 2 +- Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 2 +- Silicon/Hisilicon/Include/Library/{OemMiscLib.h => OemHisiMiscLib.h} | 0 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c | 2 +- Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 2 +- Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 2 +- Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c | 2 +- Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 2 +- Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c | 2 +- Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 +- Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c | 2 +- Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c | 2 +- 22 files changed, 21 insertions(+), 34 deletions(-) diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 051b5b8c3d88..e7ae01ffc750 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -49,7 +49,7 @@ [LibraryClasses] PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h CpldIoLib|Include/Library/CpldIoLib.h OemAddressMapLib|Include/Library/OemAddressMapLib.h - OemMiscLib|Include/Library/OemMiscLib.h + OemMiscLib|Include/Library/OemHisiMiscLib.h I2CLib|Include/Library/I2CLib.h PlatformPciLib|Include/Library/PlatformPciLib.h FdtUpdateLib|Include/Library/FdtUpdateLib.h diff --git a/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h b/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h index 7194ae589042..7f50c8ff317d 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h +++ b/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.h @@ -25,6 +25,6 @@ #include <Library/PrintLib.h> #include <Library/UefiBootServicesTableLib.h> #include <Library/MemoryAllocationLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #endif diff --git a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h index 22c7f6797168..d28f7095ef37 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h +++ b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.h @@ -30,7 +30,7 @@ #include <Guid/DebugMask.h> #include <Guid/MemoryMapData.h> #include <Library/PlatformSysCtrlLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> // // This is the generated header file which includes whatever needs to be exported (strings + IFR) diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h index 3ce180d21df3..14a1b44d8db4 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h @@ -25,7 +25,7 @@ #include <Library/PcdLib.h> #include <PlatformArch.h> #include <Library/PlatformSysCtrlLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/ArmLib.h> // @@ -68,19 +68,6 @@ typedef union { UINT16 Data; }CACHE_CONFIGURATION; -// -// Processor Status -// -typedef union { - struct { - UINT8 CpuStatus :3; // Indicates the status of the processor. - UINT8 Reserved1 :3; // Reserved for future use. Should be set to zero. - UINT8 SocketPopulated :1; // Indicates if the processor socket is populated or not. - UINT8 Reserved2 :1; // Reserved for future use. Should be set to zero. - } Bits; - UINT8 Data; -}PROCESSOR_STATUS_DATA; - // // Processor Characteristics // diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h index a0ad31a990db..0cb9a6e31e65 100644 --- a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h @@ -13,7 +13,7 @@ #define _PPTT_H_ #include <IndustryStandard/Acpi.h> -#include <Library/ArmLib/ArmLibPrivate.h> +#include <Library/ArmLib.h> #include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/MemoryAllocationLib.h> diff --git a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h index 30ba5fff65ce..7d8228503dba 100644 --- a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h +++ b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h @@ -14,7 +14,7 @@ #include <PlatformArch.h> #include <IndustryStandard/Acpi.h> -#include <Library/ArmLib/ArmLibPrivate.h> +#include <Library/ArmLib.h> #include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/MemoryAllocationLib.h> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemHisiMiscLib.h similarity index 100% rename from Silicon/Hisilicon/Include/Library/OemMiscLib.h rename to Silicon/Hisilicon/Include/Library/OemHisiMiscLib.h diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c index 75b6dec34b30..88b5e3e57e66 100644 --- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c +++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c @@ -18,7 +18,7 @@ #include <PlatformArch.h> #include <Library/PlatformSysCtrlLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/OemAddressMapLib.h> #include <Library/ArmLib.h> diff --git a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c index a242e4bd9af5..d52782e84dbe 100755 --- a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c +++ b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c @@ -21,7 +21,7 @@ #include <Library/MemoryAllocationLib.h> #include <Protocol/HisiBoardNicProtocol.h> #include <Library/UefiRuntimeServicesTableLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> typedef union AA_DAW { diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c index 1670cac1d491..a88afe4fe884 100644 --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c @@ -14,7 +14,7 @@ #include <IndustryStandard/SmBios.h> #include <PlatformArch.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/I2CLib.h> #include <Library/HiiLib.h> diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c index 1d9c3dfd491b..22d04c5c72d4 100644 --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c @@ -14,7 +14,7 @@ #include <Library/IoLib.h> #include <Library/TimerLib.h> #include <Library/SerialPortLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <PlatformArch.h> #include <Library/PlatformSysCtrlLib.h> #include <Library/OemAddressMapLib.h> diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c index 05aefc90f789..1af3df9ea4d9 100644 --- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c +++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c @@ -16,7 +16,7 @@ #include <Library/DebugLib.h> #include <Library/IoLib.h> #include <Library/OemAddressMapLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PlatformSysCtrlLib.h> diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c index ac013ca30890..323a420e2d7f 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c @@ -15,7 +15,7 @@ #include <Library/HiiLib.h> #include <Library/I2CLib.h> #include <Library/IoLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Protocol/Smbios.h> diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c index 2ee15dbc7b43..151f3f779aef 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c @@ -15,7 +15,7 @@ #include <Library/IoLib.h> #include <Library/LpcLib.h> #include <Library/OemAddressMapLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PlatformPciLib.h> #include <Library/PlatformSysCtrlLib.h> diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c index 72f30ff07550..6e10765b5952 100644 --- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c +++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c @@ -14,7 +14,7 @@ #include <Library/DebugLib.h> #include <Library/IoLib.h> #include <Library/OemAddressMapLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PlatformSysCtrlLib.h> #include <PiPei.h> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c index 980eabfe3355..284a58669f43 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c @@ -14,7 +14,7 @@ #include <Library/HiiLib.h> #include <Library/I2CLib.h> #include <Library/IoLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Protocol/Smbios.h> #include <PlatformArch.h> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 1b0a2180c179..bc781ccedc48 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -15,7 +15,7 @@ #include <Library/IoLib.h> #include <Library/LpcLib.h> #include <Library/OemAddressMapLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PlatformSysCtrlLib.h> #include <Library/SerialPortLib.h> diff --git a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c index 1be7de5ccf44..463281e0f9fa 100644 --- a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -13,7 +13,7 @@ #include <Library/DevicePathLib.h> #include <Library/IoLib.h> #include <Library/MemoryAllocationLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PciHostBridgeLib.h> #include <Library/PlatformPciLib.h> diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index 39f7f6b1a333..98bce6e7a234 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -11,7 +11,7 @@ #include <Library/HobLib.h> #include <Library/HwMemInitLib.h> #include <Library/OemConfigData.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/UefiBootServicesTableLib.h> #include <Library/UefiRuntimeServicesTableLib.h> #include <Library/UefiLib.h> diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c index 929288519780..976382183939 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c @@ -11,7 +11,7 @@ #include "SmbiosMisc.h" -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie0Data; extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie1Data; diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c index 954655d47087..d02f6e982cc6 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c @@ -10,7 +10,7 @@ #include "PcieInit.h" #include <Library/UefiBootServicesTableLib.h> #include <Library/PcdLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PlatformPciLib.h> diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c index 4fb092009a25..cacf5db22cea 100644 --- a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c +++ b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c @@ -11,7 +11,7 @@ #include <IndustryStandard/Acpi.h> #include <Library/DebugLib.h> #include <Library/IoLib.h> -#include <Library/OemMiscLib.h> +#include <Library/OemHisiMiscLib.h> #include <Library/PcdLib.h> #include <Library/PciExpressLib.h> #include <Library/PlatformPciLib.h> -- 2.20.1.windows.1
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Re: [PATCH v6 0/6] SEV Live Migration support for OVMF.
Yao, Jiewen
Hi
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I have some questions: 1) May I know what is the usage of this UEFI variable - SevLiveMigrationEnabled? I only see it is created, but I do not see how it is consumed. 2) Is this a full live migration patch, or is this just a startup and there will be more on the way? Thank you Yao Jiewen
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回复: [edk2-devel] [PATCH v7 1/3] BaseTools: Remove COMMON section from the GCC discard list
gaoliming
Ard:
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Chris explains this change in https://edk2.groups.io/g/devel/message/77662. And, he also verifies the patch in OVMF with GCC5 tool chain. Thanks Liming
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Re: "StdLibPkg" branch on edk2-staging
Kilian Kegel
Hi all,
I plan to come back with the https://github.com/tianocore/edk2-staging/tree/CdePkg end of this year and to unroll the source code of fundamental parts of my C Library and discuss that along the 30. anniversary of “The C Book” https://publications.gbdirect.co.uk/c_book/chapter9
Additionally I will discuss the details you need to know:
processor and chipset independent for x86 UEFI platforms
since “CI“ won’t help at all in this regards
Note: If UEFI is going to provide Standard-C-Functions for all drivers, you will have soon e.g. “sprintf()” in all drivers. The amount of code for a proper sprintf() + scanf() + wscanf() + strtok() + wcstok() + malloc() … implementation that is not tailored for embedded FW, will overrun the BIOS FLASH space instantly. I consider commercial BIOS implementations that runs really many drivers (> 100) to start a platform.
Currently I implement more feature to CdePkg/Torito C Library:
that allows usage of predefined DEBUG-messages to run in a CdePkg-based driver.
Sole purpose is to have DEBUG/RELEASE mode _NOT_ globally, but locally to get trace messages selectively for specific drivers only. (to speed up POST with traces, that consumes a significant amount of time during working hours of a BIOS developer)
Shell, DXE, PEI (pre and post memory) is already available for 2 years: https://edk2.groups.io/g/devel/message/51562?p=,,,20,0,0,0::Created,,CdePkg,20,2,0,65191785
I need to implement some non-standard / Microsoft specific C functions to get that running for Andrew Fish.
That time links from https://github.com/KilianKegel are under construction and are not necessarily up-to-date. Same for https://github.com/tianocore/edk2-staging/tree/CdePkg that is not used for long …
But https://github.com/KilianKegel/CdePkg.git driver set and sample set runs instantly on the latest BIOS of a commercial vendor on a Intel IOTG TGL-H (Tiger Lake H) board using the Microsoft build environment.
@Tim: I’d really appreciate if CdePkg could hold additionally Insyde BIOS support. Regrettably I do not have access to Insyde source code.
@Maciej I can not see any “wide” functions here. https://github.com/DevSolar/pdclib from WCHAR.H or WCTYPE.H. That is a serious limitation in the UEFI environment.
To create UEFI-Shell programs for Personal Computers this link can be used. https://github.com/KilianKegel/Visual-ANSI-C-for-UEFI-Shell#visual-ansi-c-for-uefi-shell
Best regards, Kilian
From: Andrew Fish via groups.io
Sent: Thursday, August 5, 2021 05:35 AM To: edk2-devel-groups-io; Leif Lindholm Cc: Rebecca Cran; tim.lewis@...; maciej.rabeda@...; Mike Kinney Subject: Re: [edk2-devel] "StdLibPkg" branch on edk2-staging
I’d guess I’d also ask the why not NewLib? Especially since Red Hat helps out with edk2….
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Re: [edk2-platforms] [PATCH V1] PurleyOpenBoardPkg : Add ReadMe document for LinuxBoot
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-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of manickavasakam karpagavinayagam Sent: Wednesday, August 4, 2021 5:00 PM To: devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Felixp@...; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@...> Subject: [edk2-devel] [edk2-platforms] [PATCH V1] PurleyOpenBoardPkg : Add ReadMe document for LinuxBoot linux.efi/initrd.cpio.xz are dummy files. These dummy files needs to be replaced by building the Linux Kernel. 1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 2. Copy the following built files (1) initrd.cpio.xz to LinuxBoot/LinuxBinaries/initrd.cpio.xz (2) bzimage to LinuxBoot/LinuxBinaries/linux.efi Signed-off-by: Manickavasakam Karpagavinayagam <manickavasakamk@...> --- Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md new file mode 100644 index 0000000000..47e53fcb70 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md @@ -0,0 +1,9 @@ + +linux.efi/initrd.cpio.xz are dummy files. +These dummy files needs to be replaced by building the Linux Kernel. + +1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 +2. Copy the following built files +(1) initrd.cpio.xz to LinuxBoot/LinuxBinaries/initrd.cpio.xz +(2) bzimage to LinuxBoot/LinuxBinaries/linux.efi + -- 2.25.0.windows.1 Please consider the environment before printing this email. The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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Re: [edk2-platforms] [PATCH V1] PurleyOpenBoardPkg : Add ReadMe document for LinuxBoot
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
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-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of manickavasakam karpagavinayagam Sent: Wednesday, August 4, 2021 5:00 PM To: devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Felixp@...; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@...> Subject: [edk2-devel] [edk2-platforms] [PATCH V1] PurleyOpenBoardPkg : Add ReadMe document for LinuxBoot linux.efi/initrd.cpio.xz are dummy files. These dummy files needs to be replaced by building the Linux Kernel. 1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 2. Copy the following built files (1) initrd.cpio.xz to LinuxBoot/LinuxBinaries/initrd.cpio.xz (2) bzimage to LinuxBoot/LinuxBinaries/linux.efi Signed-off-by: Manickavasakam Karpagavinayagam <manickavasakamk@...> --- Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md new file mode 100644 index 0000000000..47e53fcb70 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/Readme.md @@ -0,0 +1,9 @@ + +linux.efi/initrd.cpio.xz are dummy files. +These dummy files needs to be replaced by building the Linux Kernel. + +1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 +2. Copy the following built files +(1) initrd.cpio.xz to LinuxBoot/LinuxBinaries/initrd.cpio.xz +(2) bzimage to LinuxBoot/LinuxBinaries/linux.efi + -- 2.25.0.windows.1 Please consider the environment before printing this email. The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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Re: [edk2-platforms][PATCH] IpmiFeaturePkg: IPMI Transport PPI and Protocol for BIOS/BMC communication
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-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@...> Sent: Thursday, June 10, 2021 4:44 PM To: devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Felixp@...; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@...> Subject: [edk2-platforms][PATCH] IpmiFeaturePkg: IPMI Transport PPI and Protocol for BIOS/BMC communication Enable IPMI Transport PPI and Protocol for BIOS/BMC communication Add PlatformIpmiIoRangeSet() to enable OEM specific southbridge SIO KCS I/O address range --- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c | 7 ++++++- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf | 2 ++ Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf | 5 +++-- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf | 3 ++- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf | 3 +++ Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf | 3 +++ 6 files changed, 19 insertions(+), 4 deletions(-) diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c index 31f613925d..14040c089c 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/ +++ PeiGenericIpmi.c @@ -9,7 +9,7 @@ #include <IndustryStandard/Ipmi.h> #include "PeiGenericIpmi.h" #include <Library/ReportStatusCodeLib.h>-+#include <Library/IpmiPlatformHookLib.h> /////////////////////////////////////////////////////////////////////////////// // Function Implementations@@ -48,6 +48,11 @@ PeiInitializeIpmiKcsPhysicalLayer ( // Enable OEM specific southbridge SIO KCS I/O address range 0xCA0 to 0xCAF at here // if the the I/O address range has not been enabled. //+ Status = PlatformIpmiIoRangeSet (PcdGet16 (PcdIpmiIoBaseAddress));+ DEBUG ((DEBUG_INFO, "IPMI Peim:PlatformIpmiIoRangeSet - %r!\n", Status));+ if (EFI_ERROR(Status)) {+ return Status;+ } mIpmiInstance = AllocateZeroPool (sizeof (PEI_IPMI_BMC_INSTANCE_DATA)); if (mIpmiInstance == NULL) {diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf index 0ef2c18116..883a9168e5 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/ +++ PeiGenericIpmi.inf @@ -41,7 +41,9 @@ MemoryAllocationLib DebugLib IoLib+ ReportStatusCodeLib TimerLib+ IpmiPlatformHookLib [Guids] diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf index b5b37ddd9f..cbd9453cf0 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemo +++ ry.fdf @@ -7,10 +7,11 @@ # ## - INF OutOfBandManagement/IpmiFeaturePkg/BmcAcpi/BmcAcpi.inf+ INF OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Dxe/GenericIpmi.inf+ INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/DxeIpmiInit.inf+ INF RuleOverride = DRIVER_ACPITABLE OutOfBandManagement/IpmiFeaturePkg/BmcAcpi/BmcAcpi.inf INF OutOfBandManagement/IpmiFeaturePkg/BmcElog/BmcElog.inf INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbDxe.inf INF OutOfBandManagement/IpmiFeaturePkg/IpmiFru/IpmiFru.inf- INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/DxeIpmiInit.inf INF OutOfBandManagement/IpmiFeaturePkg/OsWdt/OsWdt.inf INF OutOfBandManagement/IpmiFeaturePkg/SolStatus/SolStatus.infdiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf index 4aa2d8e9da..826490952b 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemor +++ y.fdf @@ -7,5 +7,6 @@ # ## -INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbPei.inf+INF OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/PeiIpmiInit.inf+INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbPei.infdiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf index b429d3b7b9..86df943560 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBase +++ Lib/IpmiBaseLib.inf @@ -26,3 +26,6 @@ [Protocols] gIpmiTransportProtocolGuid++[Depex]+ gIpmiTransportProtocolGuiddiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf index f89614adfb..9a2c87873f 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiB +++ aseLib/PeiIpmiBaseLib.inf @@ -28,3 +28,6 @@ [Ppis] gPeiIpmiTransportPpiGuid++[Depex]+ gPeiIpmiTransportPpiGuid-- 2.25.0.windows.1 Please consider the environment before printing this email. The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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Re: [edk2-platforms][PATCH] IpmiFeaturePkg: IPMI Transport PPI and Protocol for BIOS/BMC communication
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
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-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@...> Sent: Thursday, June 10, 2021 4:44 PM To: devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Felixp@...; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@...> Subject: [edk2-platforms][PATCH] IpmiFeaturePkg: IPMI Transport PPI and Protocol for BIOS/BMC communication Enable IPMI Transport PPI and Protocol for BIOS/BMC communication Add PlatformIpmiIoRangeSet() to enable OEM specific southbridge SIO KCS I/O address range --- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c | 7 ++++++- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf | 2 ++ Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf | 5 +++-- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf | 3 ++- Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf | 3 +++ Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf | 3 +++ 6 files changed, 19 insertions(+), 4 deletions(-) diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c index 31f613925d..14040c089c 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.c +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/ +++ PeiGenericIpmi.c @@ -9,7 +9,7 @@ #include <IndustryStandard/Ipmi.h> #include "PeiGenericIpmi.h" #include <Library/ReportStatusCodeLib.h>-+#include <Library/IpmiPlatformHookLib.h> /////////////////////////////////////////////////////////////////////////////// // Function Implementations@@ -48,6 +48,11 @@ PeiInitializeIpmiKcsPhysicalLayer ( // Enable OEM specific southbridge SIO KCS I/O address range 0xCA0 to 0xCAF at here // if the the I/O address range has not been enabled. //+ Status = PlatformIpmiIoRangeSet (PcdGet16 (PcdIpmiIoBaseAddress));+ DEBUG ((DEBUG_INFO, "IPMI Peim:PlatformIpmiIoRangeSet - %r!\n", Status));+ if (EFI_ERROR(Status)) {+ return Status;+ } mIpmiInstance = AllocateZeroPool (sizeof (PEI_IPMI_BMC_INSTANCE_DATA)); if (mIpmiInstance == NULL) {diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf index 0ef2c18116..883a9168e5 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/ +++ PeiGenericIpmi.inf @@ -41,7 +41,9 @@ MemoryAllocationLib DebugLib IoLib+ ReportStatusCodeLib TimerLib+ IpmiPlatformHookLib [Guids] diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf index b5b37ddd9f..cbd9453cf0 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemory.fdf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PostMemo +++ ry.fdf @@ -7,10 +7,11 @@ # ## - INF OutOfBandManagement/IpmiFeaturePkg/BmcAcpi/BmcAcpi.inf+ INF OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Dxe/GenericIpmi.inf+ INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/DxeIpmiInit.inf+ INF RuleOverride = DRIVER_ACPITABLE OutOfBandManagement/IpmiFeaturePkg/BmcAcpi/BmcAcpi.inf INF OutOfBandManagement/IpmiFeaturePkg/BmcElog/BmcElog.inf INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbDxe.inf INF OutOfBandManagement/IpmiFeaturePkg/IpmiFru/IpmiFru.inf- INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/DxeIpmiInit.inf INF OutOfBandManagement/IpmiFeaturePkg/OsWdt/OsWdt.inf INF OutOfBandManagement/IpmiFeaturePkg/SolStatus/SolStatus.infdiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf index 4aa2d8e9da..826490952b 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemor +++ y.fdf @@ -7,5 +7,6 @@ # ## -INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbPei.inf+INF OutOfBandManagement/IpmiFeaturePkg/GenericIpmi/Pei/PeiGenericIpmi.inf INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/PeiIpmiInit.inf+INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbPei.infdiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf index b429d3b7b9..86df943560 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBaseLib/IpmiBaseLib.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/IpmiBase +++ Lib/IpmiBaseLib.inf @@ -26,3 +26,6 @@ [Protocols] gIpmiTransportProtocolGuid++[Depex]+ gIpmiTransportProtocolGuiddiff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf index f89614adfb..9a2c87873f 100644 --- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiBaseLib/PeiIpmiBaseLib.inf +++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Library/PeiIpmiB +++ aseLib/PeiIpmiBaseLib.inf @@ -28,3 +28,6 @@ [Ppis] gPeiIpmiTransportPpiGuid++[Depex]+ gPeiIpmiTransportPpiGuid-- 2.25.0.windows.1 Please consider the environment before printing this email. The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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Re: "StdLibPkg" branch on edk2-staging
I’d guess I’d also ask the why not NewLib? Especially since Red Hat helps out with edk2….
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Thanks, Andrew Fish
On Aug 4, 2021, at 4:03 AM, Leif Lindholm <leif@...> wrote:
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Re: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot
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-----Original Message-----
From: Manickavasakam Karpagavinayagam <manickavasakamk@...> Sent: Thursday, July 29, 2021 5:35 AM To: Desimone, Nathaniel L <nathaniel.l.desimone@...>; devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Felix Polyudov <Felixp@...>; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...> Subject: RE: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot Nate : If you see in this patch, linux.efi/initrd.cpio.xz are dummy files. These dummy files needs to be replaced by building the Linux Kernel. How to build Linux Kernel is mentioned in the ReadMe document which is part of this patch. 1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 2. Copy the following built files (1) initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz (2) bzimage to LinuxBootPkg/LinuxBinaries/linux.efi Thank you -Manic -----Original Message----- From: Desimone, Nathaniel L <nathaniel.l.desimone@...> Sent: Thursday, July 29, 2021 3:17 AM To: Manickavasakam Karpagavinayagam <manickavasakamk@...>; devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Felix Polyudov <Felixp@...>; Harikrishna Doppalapudi <Harikrishnad@...>; Manish Jha <manishj@...>; Zachary Bobroff <zacharyb@...>; Manickavasakam Karpagavinayagam <manickavasakamk@...> Subject: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot **CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.** Hi Manic, Unfortunately this patch cannot be merged as is. It appears to contain a pre-built binary of the Linux kernel that has been pre-configured for Linuxboot use. While this is very convenient, the Linux kernel is licensed under the GPL and hence we cannot add it to edk2-platforms, which must be kept as BSD only. It might be possible to add this to edk2-non-osi, but even then we would require that you provide a readme file that explains how to get and compile the source code that you used to build this exact Linux image, as required by the GPL. The easiest and safest option would be to remove the Linux binary all together and provide instructions to the user for how to build their own image and add it to the tree. Thanks, Nate -----Original Message------The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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Re: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot
Hi Manic,
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That is fair. I see your new patch which add a readme.md explaining that. With that... Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
-----Original Message-----
From: Manickavasakam Karpagavinayagam <manickavasakamk@...> Sent: Thursday, July 29, 2021 5:35 AM To: Desimone, Nathaniel L <nathaniel.l.desimone@...>; devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Felix Polyudov <Felixp@...>; DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>; Jha, Manish <manishj@...>; Bobroff, Zachary <zacharyb@...> Subject: RE: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot Nate : If you see in this patch, linux.efi/initrd.cpio.xz are dummy files. These dummy files needs to be replaced by building the Linux Kernel. How to build Linux Kernel is mentioned in the ReadMe document which is part of this patch. 1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64 2. Copy the following built files (1) initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz (2) bzimage to LinuxBootPkg/LinuxBinaries/linux.efi Thank you -Manic -----Original Message----- From: Desimone, Nathaniel L <nathaniel.l.desimone@...> Sent: Thursday, July 29, 2021 3:17 AM To: Manickavasakam Karpagavinayagam <manickavasakamk@...>; devel@edk2.groups.io Cc: Oram, Isaac W <isaac.w.oram@...>; Felix Polyudov <Felixp@...>; Harikrishna Doppalapudi <Harikrishnad@...>; Manish Jha <manishj@...>; Zachary Bobroff <zacharyb@...>; Manickavasakam Karpagavinayagam <manickavasakamk@...> Subject: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot **CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.** Hi Manic, Unfortunately this patch cannot be merged as is. It appears to contain a pre-built binary of the Linux kernel that has been pre-configured for Linuxboot use. While this is very convenient, the Linux kernel is licensed under the GPL and hence we cannot add it to edk2-platforms, which must be kept as BSD only. It might be possible to add this to edk2-non-osi, but even then we would require that you provide a readme file that explains how to get and compile the source code that you used to build this exact Linux image, as required by the GPL. The easiest and safest option would be to remove the Linux binary all together and provide instructions to the user for how to build their own image and add it to the tree. Thanks, Nate -----Original Message------The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.
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