Add macros for NVIDIA 16550 UART specific debug port subtype in both
DBG2 as well as SPCR header file.

Signed-off-by: Ashish Singhal <ashishsingha@...>

---
MdePkg/Include/IndustryStandard/DebugPort2Table.h | 1 +
.../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +++++
2 files changed, 6 insertions(+)

diff --git a/MdePkg/Include/IndustryStandard/DebugPort2Table.h b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
index 3faa30b76a..6a6fd2590e 100644
--- a/MdePkg/Include/IndustryStandard/DebugPort2Table.h
+++ b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
@@ -43,6 +43,7 @@ typedef struct {
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550 0x0000
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_MS_DBGP_SPEC 0x0001
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART 0x0003
+#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA_16550_UART 0x0005
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X 0x000d
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART 0x000e
#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_DCC 0x000f
diff --git a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
index 2066c7895e..ba19567f52 100644
--- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
+++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
@@ -80,6 +80,11 @@ typedef struct {
///
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART 0x03

+///
+/// NVIDIA 16550 UART
+///
+#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NVIDIA_16550_UART 0x05
+
///
/// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated]
///
--
2.17.1

This patch adds macro for NVIDIA 16550 UART subtype for ACPI
tables as documented by Microsoft.

https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table

Ashish Singhal (1):
MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

MdePkg/Include/IndustryStandard/DebugPort2Table.h | 1 +
.../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +++++
2 files changed, 6 insertions(+)

--
2.17.1

On 05/17/21 08:50, Jianyong Wu wrote:

Cloud Hypervisor is an open source Virtual Machine Monitor (VMM) that
runs on top of KVM. Cloud Hypervisor is implemented in Rust and is based
on the rust-vmm crates. See [1] to find more.

To support UEFI, Cloud Hypervisor is introduced here.
There are three parts to be considered to do this enablements, that is:
1. memory initialization

2. specific ACPI service implementation
compared with qemu, there is no device like Fw-cfg, so we has no
elegant way to get the RSDP address. A specific ACPI implementation is
introduced here.

3. build configuration file

This enablement bases on the implentation for qemu so some code is
borrowed.

[1] https://github.com/cloud-hypervisor/cloud-hypervisor

Jianyong Wu (5):
ArmVirtPkg: Library: Memory initialization for Cloud Hypervisor
MdeMoudlePkg: introduce new PCD for Acpi/rsdp
ArmVirtPkg: enable ACPI for cloud hypervisor
ArmVirtPkg: Introduce Cloud Hypervisor to edk2 family
Maintainers: update Maintainers file as new files/folders created

MdeModulePkg/MdeModulePkg.dec | 7 +
ArmVirtPkg/ArmVirtCloudHv.dsc | 455 ++++++++++++++++++
ArmVirtPkg/ArmVirtCloudHv.fdf | 292 +++++++++++
.../CloudHvAcpiPlatformDxe.inf | 51 ++
.../CloudHvHasAcpiDtDxe.inf | 43 ++
.../CloudHvVirtMemInfoPeiLib.inf | 47 ++
.../CloudHvAcpiPlatformDxe/CloudHvAcpi.c | 73 +++
.../CloudHvHasAcpiDtDxe.c | 69 +++
.../CloudHvVirtMemInfoLib.c | 94 ++++
.../CloudHvVirtMemInfoPeiLibConstructor.c | 100 ++++
ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc | 169 +++++++
Maintainers.txt | 7 +
12 files changed, 1407 insertions(+)
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c
create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c
create mode 100644 ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc

Confirming that I got this in my review queue. I'll need some time to
get to it; please bear with me.

Thanks,
Laszlo

On 18.05.21 19:17, Laszlo Ersek wrote:

On 05/17/21 17:03, Lendacky, Thomas wrote:

On 5/16/21 11:22 PM, Laszlo Ersek wrote:

On 05/14/21 22:28, Lendacky, Thomas wrote:

BZ: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=N9MNXaBazq2tiVRHWSPVXRdlcZ97JOf24mc7p0m5Tqw%3D&amp;reserved=0

The SEV-ES stacks currently share a page with the reset code and data.
Separate the SEV-ES stacks from the reset vector code and data to avoid
possible stack overflows from overwriting the code and/or data.

When SEV-ES is enabled, invoke the GetWakeupBuffer() routine a second time
to allocate a new area, below the reset vector and data.

Both the PEI and DXE versions of GetWakeupBuffer() are changed so that
when PcdSevEsIsEnabled is true, they will track the previous reset buffer
allocation in order to ensure that the new buffer allocation is below the
previous allocation. When PcdSevEsIsEnabled is false, the original logic
is followed.

Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b

Is this really a *bugfix*?

I called what's being fixed "a gap in a generic protection mechanism",
in <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324%23c9&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=BiE2cBZRVRT3anwklHEKBHdhg8v2KjV%2FiiPwtx%2Fpon4%3D&amp;reserved=0>.

I don't know if that makes this patch a feature addition (or feature
completion -- the feature being "more extensive page protections"), or a
bugfix.

The distinction matters because of the soft feature freeze:

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FEDK-II-Release-Planning&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=1n8z7KFAlm3Vb7fPOFpYQFlZ5lQFOF%2FdLtujjqhns9s%3D&amp;reserved=0

We still have approximately 2 hours before the SFF starts. So if we can
*finish* reviewing this in 2 hours, then it can be merged during the
SFF, even if we call it a feature. But I'd like Marvin to take a look as
well, plus I'd like at least one of Eric and Ray to check.

... I'm tempted not to call it a bugfix, because the lack of this patch
does not break SEV-ES usage, as far as I understand.

Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Marvin Häuser <mhaeuser@...>
Signed-off-by: Tom Lendacky <thomas.lendacky@...>

---

Changes since v1:
- Renamed the wakeup buffer variables to be unique in the PEI and DXE
libraries and to make it obvious they are SEV-ES specific.
- Use PcdGetBool (PcdSevEsIsEnabled) to make the changes regression-free
so that the new support is only use for SEV-ES guests.
---
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 +++++++-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 49 +++++++++++++-------
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 19 +++++++-
3 files changed, 69 insertions(+), 18 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 7839c249760e..93fc63bf93e3 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -29,6 +29,11 @@ VOID *mReservedApLoopFunc = NULL;
UINTN mReservedTopOfApStack;
volatile UINT32 mNumberToFinish = 0;
+//
+// Begin wakeup buffer allocation below 0x88000
+//
+STATIC EFI_PHYSICAL_ADDRESS mSevEsDxeWakeupBuffer = 0x88000;
+
/**
Enable Debug Agent to support source debugging on AP function.
@@ -102,7 +107,14 @@ GetWakeupBuffer (
// LagacyBios driver depends on CPU Arch protocol which guarantees below
// allocation runs earlier than LegacyBios driver.
//
- StartAddress = 0x88000;
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // SEV-ES Wakeup buffer should be under 0x88000 and under any previous one
+ //
+ StartAddress = mSevEsDxeWakeupBuffer;
+ } else {
+ StartAddress = 0x88000;
+ }
Status = gBS->AllocatePages (
AllocateMaxAddress,
MemoryType,
@@ -112,6 +124,11 @@ GetWakeupBuffer (
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
StartAddress = (EFI_PHYSICAL_ADDRESS) -1;
+ } else if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Next SEV-ES wakeup buffer allocation must be below this allocation
+ //
+ mSevEsDxeWakeupBuffer = StartAddress;
}
DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index dc2a54aa31e8..b9a06747edbf 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1164,20 +1164,6 @@ GetApResetVectorSize (
AddressMap->SwitchToRealSize +
sizeof (MP_CPU_EXCHANGE_INFO);
- //
- // The AP reset stack is only used by SEV-ES guests. Do not add to the
- // allocation if SEV-ES is not enabled.
- //
- if (PcdGetBool (PcdSevEsIsEnabled)) {
- //
- // Stack location is based on APIC ID, so use the total number of
- // processors for calculating the total stack area.
- //
- Size += AP_RESET_STACK_SIZE * PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
-
- Size = ALIGN_VALUE (Size, CPU_STACK_ALIGNMENT);
- }
-
return Size;
}
@@ -1192,6 +1178,7 @@ AllocateResetVector (
)
{
UINTN ApResetVectorSize;
+ UINTN ApResetStackSize;
if (CpuMpData->WakeupBuffer == (UINTN) -1) {
ApResetVectorSize = GetApResetVectorSize (&CpuMpData->AddressMap);
@@ -1207,9 +1194,39 @@ AllocateResetVector (
CpuMpData->AddressMap.ModeTransitionOffset
);
//
- // The reset stack starts at the end of the buffer.
+ // The AP reset stack is only used by SEV-ES guests. Do not allocate it
+ // if SEV-ES is not enabled.
//
- CpuMpData->SevEsAPResetStackStart = CpuMpData->WakeupBuffer + ApResetVectorSize;
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Stack location is based on ProcessorNumber, so use the total number

sneaky documenation fix :) I vaguely remember discussing earlier that
the APIC ID reference was incorrect. OK.

Yeah, I should have made mention of that in the commit message.

+ // of processors for calculating the total stack area.
+ //
+ ApResetStackSize = (AP_RESET_STACK_SIZE *
+ PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
+
+ //
+ // Invoke GetWakeupBuffer a second time to allocate the stack area
+ // below 1MB. The returned buffer will be page aligned and sized and
+ // below the previously allocated buffer.
+ //
+ CpuMpData->SevEsAPResetStackStart = GetWakeupBuffer (ApResetStackSize);
+
+ //
+ // Check to be sure that the "allocate below" behavior hasn't changed.
+ // This will also catch a failed allocation, as "-1" is returned on
+ // failure.
+ //
+ if (CpuMpData->SevEsAPResetStackStart >= CpuMpData->WakeupBuffer) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SEV-ES AP reset stack is not below wakeup buffer\n"
+ ));
+
+ ASSERT (FALSE);
+ CpuDeadLoop ();
+ }
+ }
}
BackupAndPrepareWakeupBuffer (CpuMpData);
}
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
index 3989bd6a7a9f..90015c650c68 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
@@ -11,6 +11,8 @@
#include <Guid/S3SmmInitDone.h>
#include <Ppi/ShadowMicrocode.h>
+STATIC UINT64 mSevEsPeiWakeupBuffer = BASE_1MB;
+
/**
S3 SMM Init Done notification function.
@@ -220,7 +222,13 @@ GetWakeupBuffer (
// Need memory under 1MB to be collected here
//
WakeupBufferEnd = Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength;
- if (WakeupBufferEnd > BASE_1MB) {
+ if (PcdGetBool (PcdSevEsIsEnabled) &&
+ WakeupBufferEnd > mSevEsPeiWakeupBuffer) {
+ //
+ // SEV-ES Wakeup buffer should be under 1MB and under any previous one
+ //
+ WakeupBufferEnd = mSevEsPeiWakeupBuffer;
+ } else if (WakeupBufferEnd > BASE_1MB) {
//
// Wakeup buffer should be under 1MB
//
@@ -244,6 +252,15 @@ GetWakeupBuffer (
}
DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
WakeupBufferStart, WakeupBufferSize));
+
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Next SEV-ES wakeup buffer allocation must be below this
+ // allocation
+ //
+ mSevEsPeiWakeupBuffer = WakeupBufferStart;
+ }
+
return (UINTN)WakeupBufferStart;
}
}

The code in the patch seems sound to me, but, now that I've managed to
take a bit more careful look, I think the patch is incomplete.

Note the BackupAndPrepareWakeupBuffer() function call -- visible in the
context --, at the end of the AllocateResetVector() function! Before, we
had a single area allocated for the reset vector, which was
appropriately sized for SEV-ES stacks too, in case SEV-ES was enabled.

That was because MpInitLibInitialize() called GetApResetVectorSize()
too, and stored the result to the "BackupBufferSize" field. Thus, the
BackupAndPrepareWakeupBuffer() function, and its counterpart
RestoreWakeupBuffer(), would include the SEV-ES AP stacks area in the
backup/restore operations.

The restore is not performed for an SEV-ES guest (see FreeResetVector()),
because the memory is still needed.

I apologize for missing this. I'm not too familiar with the SEV-ES
specifics in UefiCpuPkg.

One question: given that FreeResetVector() does not call
RestoreWakeupBuffer() when SEV-ES is enabled, would it make sense for
AllocateResetVector() to not call BackupAndPrepareWakeupBuffer() either,
in case SEV-ES is enabled? Because, if we never restore, do we really
need the backup? I wonder if such a patch could be prepended to this one
(in order to form a 2-patch series).

(Well, BackupAndPrepareWakeupBuffer() performs two things, backup and
preparation -- I guess we certainly need the preparation of the wake up
buffer, but do we need to back up the original contents of the area?
Including the backup buffer allocation.)

But now, with SEV-ES enabled, we'll have a separate, discontiguous area
-- and neither BackupAndPrepareWakeupBuffer(), nor its counterpart
RestoreWakeupBuffer() take that into account.

Therefore I think, while this patch is regression-free for the SEV-ES
*disabled* case, it may corrupt memory (through not restoring the AP
stack area's original contents) with SEV-ES enabled.

This is the current behavior for SEV-ES. The wakeup buffer memory is
marked as reserved, at least in the DXE phase.

I think we need to turn "ApResetStackSize" into an explicit field. It
should have a defined value only when SEV-ES is enabled. And for that
case, we seem to need a *separate backup buffer* too.

FWIW, I'd really like to re-classify this BZ as a Feature Request (see
the Product field on BZ#3324), and I'd really like to delay the patch
until after edk2-stable202105. The patch is not necessary for using
SEV-ES, but it has a chance to break SEV-ES.

I'm ok with delaying this if you want.

Here's what I'd like to do:

- Reach an agreement with Marvin about the ASSERT(). I'm fine if we drop
it, and fine if we keep it.

As I said, it's a strong recommendation from me, but I am fine either way as well. If it ever causes any of the issues I outlined, it could be fixed later as well.

Best regards,
Marvin

- Eric or Ray to check the patch as well, because (as I said above) I
didn't follow the SEV-ES patches for UefiCpuPkg (that series was just
huge, apologies), and so now I don't have memories to reach back to.

- Figure out if we need to conditionalize the
BackupAndPrepareWakeupBuffer() call (or a part of that function anyway).

We can and should continue discussing these things during the feature
freeze; I'd like us to merge the patch after the tag.

Sorry again that I'm missing bits and pieces; I'm this close |<->| to
email bankruptcy.

Thanks
Laszlo

On 05/17/21 17:03, Lendacky, Thomas wrote:

On 5/16/21 11:22 PM, Laszlo Ersek wrote:

On 05/14/21 22:28, Lendacky, Thomas wrote:

BZ: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=N9MNXaBazq2tiVRHWSPVXRdlcZ97JOf24mc7p0m5Tqw%3D&amp;reserved=0

The SEV-ES stacks currently share a page with the reset code and data.
Separate the SEV-ES stacks from the reset vector code and data to avoid
possible stack overflows from overwriting the code and/or data.

When SEV-ES is enabled, invoke the GetWakeupBuffer() routine a second time
to allocate a new area, below the reset vector and data.

Both the PEI and DXE versions of GetWakeupBuffer() are changed so that
when PcdSevEsIsEnabled is true, they will track the previous reset buffer
allocation in order to ensure that the new buffer allocation is below the
previous allocation. When PcdSevEsIsEnabled is false, the original logic
is followed.

Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b

Is this really a *bugfix*?

I called what's being fixed "a gap in a generic protection mechanism",
in <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324%23c9&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=BiE2cBZRVRT3anwklHEKBHdhg8v2KjV%2FiiPwtx%2Fpon4%3D&amp;reserved=0>.

I don't know if that makes this patch a feature addition (or feature
completion -- the feature being "more extensive page protections"), or a
bugfix.

The distinction matters because of the soft feature freeze:

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FEDK-II-Release-Planning&;data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=1n8z7KFAlm3Vb7fPOFpYQFlZ5lQFOF%2FdLtujjqhns9s%3D&amp;reserved=0

We still have approximately 2 hours before the SFF starts. So if we can
*finish* reviewing this in 2 hours, then it can be merged during the
SFF, even if we call it a feature. But I'd like Marvin to take a look as
well, plus I'd like at least one of Eric and Ray to check.

... I'm tempted not to call it a bugfix, because the lack of this patch
does not break SEV-ES usage, as far as I understand.

Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Marvin Häuser <mhaeuser@...>
Signed-off-by: Tom Lendacky <thomas.lendacky@...>

---

Changes since v1:
- Renamed the wakeup buffer variables to be unique in the PEI and DXE
libraries and to make it obvious they are SEV-ES specific.
- Use PcdGetBool (PcdSevEsIsEnabled) to make the changes regression-free
so that the new support is only use for SEV-ES guests.
---
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 +++++++-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 49 +++++++++++++-------
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 19 +++++++-
3 files changed, 69 insertions(+), 18 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 7839c249760e..93fc63bf93e3 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -29,6 +29,11 @@ VOID *mReservedApLoopFunc = NULL;
UINTN mReservedTopOfApStack;
volatile UINT32 mNumberToFinish = 0;

+//
+// Begin wakeup buffer allocation below 0x88000
+//
+STATIC EFI_PHYSICAL_ADDRESS mSevEsDxeWakeupBuffer = 0x88000;
+
/**
Enable Debug Agent to support source debugging on AP function.

@@ -102,7 +107,14 @@ GetWakeupBuffer (
// LagacyBios driver depends on CPU Arch protocol which guarantees below
// allocation runs earlier than LegacyBios driver.
//
- StartAddress = 0x88000;
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // SEV-ES Wakeup buffer should be under 0x88000 and under any previous one
+ //
+ StartAddress = mSevEsDxeWakeupBuffer;
+ } else {
+ StartAddress = 0x88000;
+ }
Status = gBS->AllocatePages (
AllocateMaxAddress,
MemoryType,
@@ -112,6 +124,11 @@ GetWakeupBuffer (
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
StartAddress = (EFI_PHYSICAL_ADDRESS) -1;
+ } else if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Next SEV-ES wakeup buffer allocation must be below this allocation
+ //
+ mSevEsDxeWakeupBuffer = StartAddress;
}

DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index dc2a54aa31e8..b9a06747edbf 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1164,20 +1164,6 @@ GetApResetVectorSize (
AddressMap->SwitchToRealSize +
sizeof (MP_CPU_EXCHANGE_INFO);

- //
- // The AP reset stack is only used by SEV-ES guests. Do not add to the
- // allocation if SEV-ES is not enabled.
- //
- if (PcdGetBool (PcdSevEsIsEnabled)) {
- //
- // Stack location is based on APIC ID, so use the total number of
- // processors for calculating the total stack area.
- //
- Size += AP_RESET_STACK_SIZE * PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
-
- Size = ALIGN_VALUE (Size, CPU_STACK_ALIGNMENT);
- }
-
return Size;
}

@@ -1192,6 +1178,7 @@ AllocateResetVector (
)
{
UINTN ApResetVectorSize;
+ UINTN ApResetStackSize;

if (CpuMpData->WakeupBuffer == (UINTN) -1) {
ApResetVectorSize = GetApResetVectorSize (&CpuMpData->AddressMap);
@@ -1207,9 +1194,39 @@ AllocateResetVector (
CpuMpData->AddressMap.ModeTransitionOffset
);
//
- // The reset stack starts at the end of the buffer.
+ // The AP reset stack is only used by SEV-ES guests. Do not allocate it
+ // if SEV-ES is not enabled.
//
- CpuMpData->SevEsAPResetStackStart = CpuMpData->WakeupBuffer + ApResetVectorSize;
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Stack location is based on ProcessorNumber, so use the total number

sneaky documenation fix :) I vaguely remember discussing earlier that
the APIC ID reference was incorrect. OK.

Yeah, I should have made mention of that in the commit message.

+ // of processors for calculating the total stack area.
+ //
+ ApResetStackSize = (AP_RESET_STACK_SIZE *
+ PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
+
+ //
+ // Invoke GetWakeupBuffer a second time to allocate the stack area
+ // below 1MB. The returned buffer will be page aligned and sized and
+ // below the previously allocated buffer.
+ //
+ CpuMpData->SevEsAPResetStackStart = GetWakeupBuffer (ApResetStackSize);
+
+ //
+ // Check to be sure that the "allocate below" behavior hasn't changed.
+ // This will also catch a failed allocation, as "-1" is returned on
+ // failure.
+ //
+ if (CpuMpData->SevEsAPResetStackStart >= CpuMpData->WakeupBuffer) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SEV-ES AP reset stack is not below wakeup buffer\n"
+ ));
+
+ ASSERT (FALSE);
+ CpuDeadLoop ();
+ }
+ }
}
BackupAndPrepareWakeupBuffer (CpuMpData);
}
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
index 3989bd6a7a9f..90015c650c68 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
@@ -11,6 +11,8 @@
#include <Guid/S3SmmInitDone.h>
#include <Ppi/ShadowMicrocode.h>

+STATIC UINT64 mSevEsPeiWakeupBuffer = BASE_1MB;
+
/**
S3 SMM Init Done notification function.

@@ -220,7 +222,13 @@ GetWakeupBuffer (
// Need memory under 1MB to be collected here
//
WakeupBufferEnd = Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength;
- if (WakeupBufferEnd > BASE_1MB) {
+ if (PcdGetBool (PcdSevEsIsEnabled) &&
+ WakeupBufferEnd > mSevEsPeiWakeupBuffer) {
+ //
+ // SEV-ES Wakeup buffer should be under 1MB and under any previous one
+ //
+ WakeupBufferEnd = mSevEsPeiWakeupBuffer;
+ } else if (WakeupBufferEnd > BASE_1MB) {
//
// Wakeup buffer should be under 1MB
//
@@ -244,6 +252,15 @@ GetWakeupBuffer (
}
DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
WakeupBufferStart, WakeupBufferSize));
+
+ if (PcdGetBool (PcdSevEsIsEnabled)) {
+ //
+ // Next SEV-ES wakeup buffer allocation must be below this
+ // allocation
+ //
+ mSevEsPeiWakeupBuffer = WakeupBufferStart;
+ }
+
return (UINTN)WakeupBufferStart;
}
}

The code in the patch seems sound to me, but, now that I've managed to
take a bit more careful look, I think the patch is incomplete.

Note the BackupAndPrepareWakeupBuffer() function call -- visible in the
context --, at the end of the AllocateResetVector() function! Before, we
had a single area allocated for the reset vector, which was
appropriately sized for SEV-ES stacks too, in case SEV-ES was enabled.

That was because MpInitLibInitialize() called GetApResetVectorSize()
too, and stored the result to the "BackupBufferSize" field. Thus, the
BackupAndPrepareWakeupBuffer() function, and its counterpart
RestoreWakeupBuffer(), would include the SEV-ES AP stacks area in the
backup/restore operations.

The restore is not performed for an SEV-ES guest (see FreeResetVector()),
because the memory is still needed.

I apologize for missing this. I'm not too familiar with the SEV-ES
specifics in UefiCpuPkg.

One question: given that FreeResetVector() does not call
RestoreWakeupBuffer() when SEV-ES is enabled, would it make sense for
AllocateResetVector() to not call BackupAndPrepareWakeupBuffer() either,
in case SEV-ES is enabled? Because, if we never restore, do we really
need the backup? I wonder if such a patch could be prepended to this one
(in order to form a 2-patch series).

(Well, BackupAndPrepareWakeupBuffer() performs two things, backup and
preparation -- I guess we certainly need the preparation of the wake up
buffer, but do we need to back up the original contents of the area?
Including the backup buffer allocation.)

But now, with SEV-ES enabled, we'll have a separate, discontiguous area
-- and neither BackupAndPrepareWakeupBuffer(), nor its counterpart
RestoreWakeupBuffer() take that into account.

Therefore I think, while this patch is regression-free for the SEV-ES
*disabled* case, it may corrupt memory (through not restoring the AP
stack area's original contents) with SEV-ES enabled.

This is the current behavior for SEV-ES. The wakeup buffer memory is
marked as reserved, at least in the DXE phase.

I think we need to turn "ApResetStackSize" into an explicit field. It
should have a defined value only when SEV-ES is enabled. And for that
case, we seem to need a *separate backup buffer* too.

FWIW, I'd really like to re-classify this BZ as a Feature Request (see
the Product field on BZ#3324), and I'd really like to delay the patch
until after edk2-stable202105. The patch is not necessary for using
SEV-ES, but it has a chance to break SEV-ES.

I'm ok with delaying this if you want.

Here's what I'd like to do:

- Reach an agreement with Marvin about the ASSERT(). I'm fine if we drop
it, and fine if we keep it.

- Eric or Ray to check the patch as well, because (as I said above) I
didn't follow the SEV-ES patches for UefiCpuPkg (that series was just
huge, apologies), and so now I don't have memories to reach back to.

- Figure out if we need to conditionalize the
BackupAndPrepareWakeupBuffer() call (or a part of that function anyway).

We can and should continue discussing these things during the feature
freeze; I'd like us to merge the patch after the tag.

Sorry again that I'm missing bits and pieces; I'm this close |<->| to
email bankruptcy.

Thanks
Laszlo

On 05/17/21 15:43, Leif Lindholm wrote:

On Fri, May 14, 2021 at 12:49 PM Laszlo Ersek <lersek@...> wrote:

For distributing ArmVirtPkg patch review tasks better, move Sami Mujawar
from the "ArmVirtPkg: Kvmtool" section to the top-level "ArmVirtPkg"
section.

Given that "ArmVirtPkg: Kvmtool" remains without a specific "R" role,
remove "ArmVirtPkg: Kvmtool" altogether.

Cc: Andrew Fish <afish@...>
Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Julien Grall <julien@...>
Cc: Leif Lindholm <leif@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Philippe Mathieu-Daudé <philmd@...>
Cc: Sami Mujawar <sami.mujawar@...>
Signed-off-by: Laszlo Ersek <lersek@...>
---
Maintainers.txt | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index cafe6b1ab85d..1ec9185e70b9 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -143,33 +143,24 @@ M: Ard Biesheuvel <ardb+tianocore@...>
ArmVirtPkg
F: ArmVirtPkg/
W: https://github.com/tianocore/tianocore.github.io/wiki/ArmVirtPkg
M: Laszlo Ersek <lersek@...>
M: Ard Biesheuvel <ardb+tianocore@...>
R: Leif Lindholm <leif@...>
+R: Sami Mujawar <sami.mujawar@...>

ArmVirtPkg: modules used on Xen
F: ArmVirtPkg/ArmVirtXen.*
F: ArmVirtPkg/Library/XenArmGenericTimerVirtCounterLib/
F: ArmVirtPkg/Library/XenVirtMemInfoLib/
F: ArmVirtPkg/PrePi/
F: ArmVirtPkg/XenAcpiPlatformDxe/
F: ArmVirtPkg/XenPlatformHasAcpiDtDxe/
F: ArmVirtPkg/XenioFdtDxe/
R: Julien Grall <julien@...>

-ArmVirtPkg: Kvmtool emulated platform support
-F: ArmVirtPkg/ArmVirtKvmTool.*
-F: ArmVirtPkg/KvmtoolPlatformDxe/
-F: ArmVirtPkg/Library/Fdt16550SerialPortHookLib/
-F: ArmVirtPkg/Library/KvmtoolPlatformPeiLib/
-F: ArmVirtPkg/Library/KvmtoolRtcFdtClientLib/
-F: ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/
-F: ArmVirtPkg/Library/NorFlashKvmtoolLib/
-R: Sami Mujawar <sami.mujawar@...>
-
BaseTools
F: BaseTools/
W: https://github.com/tianocore/tianocore.github.io/wiki/BaseTools
M: Bob Feng <bob.c.feng@...>
M: Liming Gao <gaoliming@...>
R: Yuwei Chen <yuwei.chen@...>

Reviewed-by: Leif Lindholm <leif@...>

Thanks everybody, I consider this fully reviewed now; I intend to merge
it after the stable tag.

Thanks!
Laszlo

Add the SMBIOS type 32 table (System Boot Information) that includes
information about the System Boot Status.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h =
| 17 ++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformatio=
n.c | 84 ++++++++++++++++++++
4 files changed, 103 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index f81494114188..4258eb9deadb 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -23,6 +23,7 @@
Type16PhysicalMemoryArray.c
Type17MemoryDevice.c
Type19MemoryArrayMappedAddress.c
+ Type32SystemBootInformation.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index d4b838689a32..f8f69f0785b9 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -158,6 +158,23 @@ InstallType19MemoryArrayMappedAddress (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS system boot information
+
+ Install the SMBIOS system boot information (type 32) table for RD plat=
forms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType32SystemBootInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index bed5da77786d..29535b247b7c 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -34,6 +34,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType16PhysicalMemoryArray,
&InstallType17MemoryDevice,
&InstallType19MemoryArrayMappedAddress,
+ &InstallType32SystemBootInformation,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBo=
otInformation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32Sys=
temBootInformation.c
new file mode 100644
index 000000000000..e98e23fe8fe0
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInfor=
mation.c
@@ -0,0 +1,84 @@
+/** @file
+ SMBIOS Type 32 (System Boot Information) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 32 (System Boot Information) table for =
Arm's
+ Reference Design platforms. It includes information about the System B=
oot
+ Status.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.33
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE32_STRINGS \
+ "\0" /* Null string */
+
+/* SMBIOS Type32 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE32 Base;
+ CHAR8 Strings[sizeof (TYPE32_STRINGS)];
+} ARM_RD_SMBIOS_TYPE32;
+#pragma pack()
+
+/* System Boot Information */
+STATIC ARM_RD_SMBIOS_TYPE32 mArmRdSmbiosType32 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type 32
+ sizeof (SMBIOS_TABLE_TYPE32), // Length
+ SMBIOS_HANDLE_PI_RESERVED
+ },
+ {0}, // Reserved field
+ BootInformationStatusNoError // Boot status
+ },
+ // Text strings (unformatted area)
+ TYPE32_STRINGS
+};
+
+/**
+ Install SMBIOS system boot information
+
+ Install the SMBIOS system boot information (type 32) table for RD plat=
forms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType32SystemBootInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType32)->Han=
dle;
+
+ /* Install type 32 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType32
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type32 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 19 table (Memory Array Mapped Addr) that includes
information about the address mapping for a Physical Memory Array.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h =
| 18 ++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAdd=
ress.c | 97 ++++++++++++++++++++
4 files changed, 117 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index 9061c491d461..f81494114188 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -22,6 +22,7 @@
Type7CacheInformation.c
Type16PhysicalMemoryArray.c
Type17MemoryDevice.c
+ Type19MemoryArrayMappedAddress.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 4e663033d515..d4b838689a32 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -140,6 +140,24 @@ InstallType17MemoryDevice (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS memory array mapped address table
+
+ Install the SMBIOS memory array mapped address (type 19) table for RD
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType19MemoryArrayMappedAddress (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 4e6a6b250813..bed5da77786d 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -33,6 +33,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType7CacheInformation,
&InstallType16PhysicalMemoryArray,
&InstallType17MemoryDevice,
+ &InstallType19MemoryArrayMappedAddress,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryAr=
rayMappedAddress.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19=
MemoryArrayMappedAddress.c
new file mode 100644
index 000000000000..301208c4bc03
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMapp=
edAddress.c
@@ -0,0 +1,97 @@
+/** @file
+ SMBIOS Type 19 (Memory Array Mapped Address) table for ARM RD platform=
s.
+
+ This file installs SMBIOS Type 19 (Memory Array Mapped Address) table =
for Arm's
+ Reference Design platforms. It includes information about the address =
mapping
+ for a Physical Memory Array.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.20
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE19_STRINGS \
+ "\0" /* Null string */
+
+/* SMBIOS Type19 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE19 Base;
+ CHAR8 Strings[sizeof (TYPE19_STRINGS)];
+} ARM_RD_SMBIOS_TYPE19;
+#pragma pack()
+
+/* Memory Array Mapped Address */
+STATIC ARM_RD_SMBIOS_TYPE19 mArmRdSmbiosType19 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // Type 19
+ sizeof (SMBIOS_TABLE_TYPE19), // Length
+ SMBIOS_HANDLE_PI_RESERVED, // Assign an unused handle numbe=
r
+ },
+ 0, // Starting address
+ 0, // Ending address
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Memory array handle
+ 1 // Partition width
+ },
+ // Text strings (unformatted area)
+ TYPE19_STRINGS
+};
+
+/**
+ Install SMBIOS memory array mapped address table
+
+ Install the SMBIOS memory array mapped address (type 19) table for RD
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType19MemoryArrayMappedAddress (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType19)->Han=
dle;
+
+ mArmRdSmbiosType19.Base.StartingAddress =3D 0xFFFFFFFF;
+ mArmRdSmbiosType19.Base.EndingAddress =3D 0xFFFFFFFF;
+ mArmRdSmbiosType19.Base.ExtendedStartingAddress =3D
+ PcdGet64 (PcdSystemMemoryBase);
+ mArmRdSmbiosType19.Base.ExtendedEndingAddress =3D
+ (PcdGet64 (PcdSystemMemoryBase) +
+ PcdGet64 (PcdSystemMemorySize) +
+ SIZE_16MB // 16MB Trusted DRAM
+ ) - 1;
+
+ /* Install type 19 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType19
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type19 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 17 table (Memory Device) that includes the
specification of each installed memory device such as size of each
device, bank locator, memory device type, and other related information.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h | 2=
6 ++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c | 29=
8 ++++++++++++++++++++
4 files changed, 326 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index ebd19c1882bb..9061c491d461 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -21,6 +21,7 @@
Type4ProcessorInformation.c
Type7CacheInformation.c
Type16PhysicalMemoryArray.c
+ Type17MemoryDevice.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 95bb2c4bfc70..4e663033d515 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -122,6 +122,24 @@ InstallType16PhysicalMemoryArray (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+
+/**
+ Install SMBIOS memory device table.
+
+ Install the SMBIOS memory device (type 17) table for RD platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType17MemoryDevice (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
SMBIOS_HANDLE_CLUSTER1,
@@ -131,6 +149,14 @@ typedef enum {
SMBIOS_HANDLE_L3_CACHE,
SMBIOS_HANDLE_L4_CACHE,
SMBIOS_HANDLE_PHYSICAL_MEMORY,
+ SMBIOS_HANDLE_MEMORY_DEVICE0000, // Chip 0 Bank 0
+ SMBIOS_HANDLE_MEMORY_DEVICE0001, // Chip 0 Bank 1
+ SMBIOS_HANDLE_MEMORY_DEVICE0100, // Chip 1 Bank 0
+ SMBIOS_HANDLE_MEMORY_DEVICE0101, // Chip 1 Bank 1
+ SMBIOS_HANDLE_MEMORY_DEVICE0200, // Chip 2 Bank 0
+ SMBIOS_HANDLE_MEMORY_DEVICE0201, // Chip 2 Bank 1
+ SMBIOS_HANDLE_MEMORY_DEVICE0300, // Chip 3 Bank 0
+ SMBIOS_HANDLE_MEMORY_DEVICE0301, // Chip 3 Bank 1
} SMBIOS_REFRENCE_HANDLES;
=20
#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 4f14be165c94..4e6a6b250813 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -32,6 +32,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType4ProcessorInformation,
&InstallType7CacheInformation,
&InstallType16PhysicalMemoryArray,
+ &InstallType17MemoryDevice,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDe=
vice.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice=
.c
new file mode 100644
index 000000000000..7ed004bc7f15
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c
@@ -0,0 +1,298 @@
+/** @file
+ SMBIOS Type 17 (Memory Device) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 17 (Memory Device) table for Arm's Refe=
rence
+ Design platforms. It includes the specification of each installed memo=
ry
+ device such as size of each device, bank locator, memory device type, =
and
+ other related information.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.18
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE17_STRINGS \
+ "Chip 0 Bank 0\0" \
+ "Chip 1 Bank 0\0" \
+ "Chip 2 Bank 0\0" \
+ "Chip 3 Bank 0\0" \
+ "Chip 0 Bank 1\0" \
+ "Chip 1 Bank 1\0" \
+ "Chip 2 Bank 1\0" \
+ "Chip 3 Bank 1\0"
+
+typedef enum {
+ Chip0Bank0 =3D 1,
+ Chip1Bank0,
+ Chip2Bank0,
+ Chip3Bank0,
+ Chip0Bank1,
+ Chip1Bank1,
+ Chip2Bank1,
+ Chip3Bank1
+} TYPE17_STRING_ELEMENTS;
+
+/* SMBIOS Type17 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE17 Base;
+ CHAR8 Strings[sizeof (TYPE17_STRINGS)];
+} ARM_RD_SMBIOS_TYPE17;
+#pragma pack()
+
+/* Memory Device */
+STATIC ARM_RD_SMBIOS_TYPE17 mArmRdSmbiosType17[] =3D {
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0000
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip0Bank0, // Chip 0 Bank 0
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0001
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip0Bank1, // Chip 0 Bank 1
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0100
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip1Bank0, // Chip 1 Bank 0
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0101
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip1Bank1, // Chip 1 Bank 1
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0200
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip2Bank0, // Chip 2 Bank 0
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0201
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip2Bank1, // Chip 2 Bank 1
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0300
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip3Bank0, // Chip 3 Bank 0
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+ {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type 17
+ sizeof (SMBIOS_TABLE_TYPE17), // Length
+ SMBIOS_HANDLE_MEMORY_DEVICE0301
+ },
+ SMBIOS_HANDLE_PHYSICAL_MEMORY, // Physical memory array handle
+ 0xFFFE, // Memory error info handle
+ 0xFFFF, // Total width unknown
+ 0xFFFF, // Data width unknown
+ 0, // Size, Update dynamically
+ MemoryFormFactorOther, // Form Factor
+ 0, // Device set, not part of a set
+ 0, // Device locator
+ Chip3Bank1, // Chip 3 Bank 1
+ MemoryTypeDram, // Memory type
+ {0, 1}, // Type details others
+ },
+ // Text strings (unformatted area)
+ TYPE17_STRINGS
+ },
+};
+
+/**
+ Install SMBIOS memory device Table.
+
+ Install the SMBIOS memory device (type 17) table for RD platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType17MemoryDevice (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT8 Idx;
+
+ /* Get system memory information */
+ for (Idx =3D 0; Idx < (FixedPcdGet32 (PcdChipCount) * 2); Idx +=3D 2) =
{
+ mArmRdSmbiosType17[Idx].Base.Size =3D 0x7FFF;
+ mArmRdSmbiosType17[Idx].Base.ExtendedSize =3D
+ (PcdGet64 (PcdSystemMemorySize) + SIZE_16MB) / SIZE_1MB;
+ mArmRdSmbiosType17[Idx].Base.MemoryTechnology =3D MemoryTechnologyDr=
am;
+ mArmRdSmbiosType17[Idx].Base.MemoryOperatingModeCapability.Bits.Vola=
tileMemory =3D 1;
+
+ if (PcdGet64 (PcdDramBlock2Size) !=3D 0) {
+ mArmRdSmbiosType17[Idx + 1].Base.Size =3D 0x7FFF;
+ mArmRdSmbiosType17[Idx + 1].Base.ExtendedSize =3D
+ PcdGet64 (PcdDramBlock2Size) / SIZE_1MB;
+ mArmRdSmbiosType17[Idx + 1].Base.MemoryTechnology =3D MemoryTechno=
logyDram;
+ mArmRdSmbiosType17[Idx + 1].Base.MemoryOperatingModeCapability.Bit=
s.VolatileMemory =3D 1;
+ }
+ }
+
+ /* Install valid entries */
+ for (Idx =3D 0; Idx < ARRAY_SIZE (mArmRdSmbiosType17); Idx++) {
+ if (mArmRdSmbiosType17[Idx].Base.ExtendedSize !=3D 0) {
+ SmbiosHandle =3D
+ ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType17[Idx])->Handle;
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType17[=
Idx]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type17 SMBIOS table.\n"
+ ));
+ break;
+ }
+ }
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 16 table (Physical Memory Array) describes a
collection of memory devices that operate together to form a memory
address. It includes information about number of devices, total memory
installed, error correction mechanism used and other related information.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf =
| 4 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h =
| 19 ++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.=
c | 106 ++++++++++++++++++++
4 files changed, 130 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index ee00b773912b..ebd19c1882bb 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -20,6 +20,7 @@
Type3SystemEnclosure.c
Type4ProcessorInformation.c
Type7CacheInformation.c
+ Type16PhysicalMemoryArray.c
=20
[Packages]
ArmPkg/ArmPkg.dec
@@ -44,6 +45,9 @@
gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmSgiTokenSpaceGuid.PcdChipCount
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
=20
[Protocols]
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 43f35ea0518f..95bb2c4bfc70 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -104,6 +104,24 @@ InstallType7CacheInformation (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS physical memory array table.
+
+ Install the SMBIOS physical memory array (type 16) table for Arm's Ref=
erence
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType16PhysicalMemoryArray (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
SMBIOS_HANDLE_CLUSTER1,
@@ -112,6 +130,7 @@ typedef enum {
SMBIOS_HANDLE_L2_CACHE,
SMBIOS_HANDLE_L3_CACHE,
SMBIOS_HANDLE_L4_CACHE,
+ SMBIOS_HANDLE_PHYSICAL_MEMORY,
} SMBIOS_REFRENCE_HANDLES;
=20
#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index d3b161b77550..4f14be165c94 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -31,6 +31,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType3SystemEnclosure,
&InstallType4ProcessorInformation,
&InstallType7CacheInformation,
+ &InstallType16PhysicalMemoryArray,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16Physical=
MemoryArray.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16Physi=
calMemoryArray.c
new file mode 100644
index 000000000000..b1b41bf405a2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryA=
rray.c
@@ -0,0 +1,106 @@
+/** @file
+ SMBIOS Type 16 (Physical Memory Array) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 16 (Physical Memory Array) table for Ar=
m's
+ Reference Design platforms. It describes a collection of memory device=
s that
+ operate together to form a memory address. It includes information abo=
ut
+ number of devices, total memory installed, error correction mechanism =
used
+ and other related information.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.17
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE16_STRINGS \
+ "\0" /* Null string */
+
+/* SMBIOS Type16 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE16 Base;
+ CHAR8 Strings[sizeof (TYPE16_STRINGS)];
+} ARM_RD_SMBIOS_TYPE16;
+#pragma pack()
+
+/* Physical Memory Array */
+STATIC ARM_RD_SMBIOS_TYPE16 mArmRdSmbiosType16 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // Type 16
+ sizeof (SMBIOS_TABLE_TYPE16), // Length
+ SMBIOS_HANDLE_PHYSICAL_MEMORY
+ },
+ MemoryArrayLocationSystemBoard, // Location
+ MemoryArrayUseSystemMemory, // Used as system memory
+ MemoryErrorCorrectionUnknown, // Error correction
+ 0x80000000, // Maximum capacity in KiB, uses Extended Maximum capaci=
ty field
+ 0xFFFE, // Memory error info handle, does not provide this info
+ 0, // Num of memory devices, update dymamically
+ 0 // Extended Maximum capacity, update dymamically
+ },
+ // Text strings (unformatted area)
+ TYPE16_STRINGS
+};
+
+/**
+ Install SMBIOS physical memory array table.
+
+ Install the SMBIOS physical memory array (type 16) table for Arm's Ref=
erence
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType16PhysicalMemoryArray (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT16 NumOfMemoryDevices =3D 1;
+ UINT64 InstalledMemory;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType16)->Han=
dle;
+
+ /* Include 16MB of Trusted DRAM as well */
+ InstalledMemory =3D PcdGet64 (PcdSystemMemorySize) + SIZE_16MB;
+ if (PcdGet64 (PcdDramBlock2Size) !=3D 0) {
+ NumOfMemoryDevices++;
+ InstalledMemory +=3D PcdGet64 (PcdDramBlock2Size);
+ }
+
+ mArmRdSmbiosType16.Base.ExtendedMaximumCapacity =3D
+ InstalledMemory * FixedPcdGet32 (PcdChipCount);
+ mArmRdSmbiosType16.Base.NumberOfMemoryDevices =3D
+ NumOfMemoryDevices * FixedPcdGet32 (PcdChipCount);
+
+ /* Install type 16 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType16
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type16 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 7 table (Cache Information) that includes
information about cache levels implemented, cache configuration, ways of
associativity and other information related to cache memory installed.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h | =
19 ++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | =
342 ++++++++++++++++++++
4 files changed, 363 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index 4652a9c62b88..ee00b773912b 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -19,6 +19,7 @@
Type1SystemInformation.c
Type3SystemEnclosure.c
Type4ProcessorInformation.c
+ Type7CacheInformation.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 7c2164ae04bf..43f35ea0518f 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -85,6 +85,25 @@ InstallType4ProcessorInformation (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS Cache information Table
+
+ Install the SMBIOS Cache information (type 7) table for Arm's Referenc=
e
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType7CacheInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 7ef6f88a783d..d3b161b77550 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -30,6 +30,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType1SystemInformation,
&InstallType3SystemEnclosure,
&InstallType4ProcessorInformation,
+ &InstallType7CacheInformation,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInfo=
rmation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInfor=
mation.c
new file mode 100644
index 000000000000..6be62900bd71
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation=
.c
@@ -0,0 +1,342 @@
+/** @file
+ SMBIOS Type 7 (Cache information) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 7 (Cache information) table for Arm's
+ Reference Design platforms. It includes information about cache levels
+ implemented, cache configuration, ways of associativity and other
+ information related to cache memory installed.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.8
+**/
+
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SgiPlatform.h"
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE7_STRINGS \
+ "L1 Instruction\0" /* L1I */ \
+ "L1 Data\0" /* L1D */ \
+ "L2\0" /* L2 */ \
+ "L3\0" /* L3 */ \
+ "SLC\0" /* L4 */
+
+typedef enum {
+ L1Instruction =3D 1,
+ L1Data,
+ L2,
+ L3,
+ SLC,
+} TYPE7_STRING_ELEMENTS;
+
+/* SMBIOS Type7 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE7 Base;
+ CHAR8 Strings[sizeof (TYPE7_STRINGS)];
+} ARM_RD_SMBIOS_TYPE7;
+#pragma pack()
+
+/* Cache information */
+STATIC ARM_RD_SMBIOS_TYPE7 mArmRdSmbiosType7[] =3D {
+ { // Entry 0, L1 instruction cache
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+ sizeof (SMBIOS_TABLE_TYPE7), // Length
+ SMBIOS_HANDLE_L1I_CACHE, // Handle number
+ },
+ L1Instruction,
+ (
+ (1 << 8) | // Write-back
+ (1 << 7) | // Cache enabled
+ (1 << 3) | // Cache socketed
+ 0x0 // Cache level 1
+ ),
+ 0xFFFF, // Uses Maximum cache size 2 field
+ 0xFFFF, // Uses Installed cache size 2 field
+ {0, 1}, // Supported SRAM type unknown
+ {0, 1}, // Current SRAM type unknown
+ 0, // Cache Speed Unknown
+ 0x02, // Error correction type unknown
+ 0x03, // Instruction cache
+ 0, // Associativity, update dynamically
+ 0, // Maximum cache size 2, update dynamically
+ 0 // Installed cache size 2, update dynamically
+ },
+ // Text strings (unformatted area)
+ TYPE7_STRINGS
+ },
+ { // Entry 1, L1 data cache
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+ sizeof (SMBIOS_TABLE_TYPE7), // Length
+ SMBIOS_HANDLE_L1D_CACHE, // Handle number
+ },
+ L1Data,
+ (
+ (1 << 8) | // Write-back
+ (1 << 7) | // Cache enabled
+ (1 << 3) | // Cache socketed
+ 0x0 // Cache level 1
+ ),
+ 0xFFFF, // Uses Maximum cache size 2 field
+ 0xFFFF, // Uses Installed cache size 2 field
+ {0, 1}, // Supported SRAM type unknown
+ {0, 1}, // Current SRAM type unknown
+ 0, // Cache Speed Unknown
+ 0x02, // Error correction type unknown
+ 0x04, // Data cache
+ 0, // Associativity, update dynamically
+ 0, // Maximum cache size 2, update dynamically
+ 0 // Installed cache size 2, update dynamically
+ },
+ // Text strings (unformatted area)
+ TYPE7_STRINGS
+ },
+ { // Entry 2, L2 cache
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+ sizeof (SMBIOS_TABLE_TYPE7), // Length
+ SMBIOS_HANDLE_L2_CACHE, // Handle number
+ },
+ L2,
+ (
+ (1 << 8) | // Write-back
+ (1 << 7) | // Cache enabled
+ (1 << 3) | // Cache socketed
+ 0x1 // Cache level 2
+ ),
+ 0xFFFF, // Uses Maximum cache size 2 field
+ 0xFFFF, // Uses Installed cache size 2 field
+ {0, 1}, // Supported SRAM type unknown
+ {0, 1}, // Current SRAM type unknown
+ 0, // Cache Speed Unknown
+ 0x02, // Error correction type unknown
+ 0x05, // Unified cache
+ 0, // Associativity, update dynamically
+ 0, // Maximum cache size 2, update dynamically
+ 0 // Installed cache size 2, update dynamically
+ },
+ // Text strings (unformatted area)
+ TYPE7_STRINGS
+ },
+ { // Entry 3, L3 cache
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+ sizeof (SMBIOS_TABLE_TYPE7), // Length
+ SMBIOS_HANDLE_L3_CACHE, // Handle number
+ },
+ L3,
+ (
+ (1 << 8) | // Write-back
+ (1 << 7) | // Cache enabled
+ (1 << 3) | // Cache socketed
+ 0x2 // Cache level 3
+ ),
+ 0xFFFF, // Uses Maximum cache size 2 field
+ 0xFFFF, // Uses Installed cache size 2 field
+ {0, 1}, // Supported SRAM type unknown
+ {0, 1}, // Current SRAM type unknown
+ 0, // Cache Speed Unknown
+ 0x02, // Error correction type unknown
+ 0x05, // Unified cache
+ 0, // Associativity, update dynamically
+ 0, // Maximum cache size 2, update dynamically
+ 0 // Installed cache size 2, update dynamically
+ },
+ // Text strings (unformatted area)
+ TYPE7_STRINGS
+ },
+ { // Entry 4, SLC Cache
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+ sizeof (SMBIOS_TABLE_TYPE7), // Length
+ SMBIOS_HANDLE_L4_CACHE, // Handle number
+ },
+ SLC,
+ (
+ (1 << 8) | // Write-back
+ (1 << 7) | // Cache enabled
+ (1 << 3) | // Cache socketed
+ 0x3 // Cache level 4
+ ),
+ 0xFFFF, // Uses Maximum cache size 2 field
+ 0xFFFF, // Uses Installed cache size 2 field
+ {0, 1}, // Supported SRAM type unknown
+ {0, 1}, // Current SRAM type unknown
+ 0, // Cache Speed Unknown
+ 0x02, // Error correction type unknown
+ 0x05, // Unified cache
+ 0, // Associativity, update dynamically
+ 0, // Maximum cache size 2, update dynamically
+ 0 // Installed cache size 2, update dynamically
+ },
+ // Text strings (unformatted area)
+ TYPE7_STRINGS
+ }
+};
+
+/**
+ Install SMBIOS Cache information Table
+
+ Install the SMBIOS Cache information (type 7) table for Arm's Referenc=
e
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType7CacheInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT8 CacheIdx;
+
+ /* Update the cache attributes based on the product */
+ switch (SgiGetProductId ()) {
+ case Sgi575:
+ /* L1 instruction cache */
+ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way;
+ /* L1 data cache */
+ mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity16Way;
+ /* L2 cache */
+ mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 512; // 512KB
+ mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 512; // 512KB
+ mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity8Way;
+ /* L3 cache */
+ mArmRdSmbiosType7[3].Base.MaximumCacheSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.InstalledSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.Associativity =3D CacheAssociativity16Way;
+ break;
+ case RdN1Edge:
+ case RdN1EdgeX2:
+ /* L1 instruction cache */
+ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way;
+ /* L1 data cache */
+ mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity4Way;
+ /* L2 cache */
+ mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 512; // 512KB
+ mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 512; // 512KB
+ mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity8Way;
+ /* L3 cache */
+ mArmRdSmbiosType7[3].Base.MaximumCacheSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.InstalledSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.Associativity =3D CacheAssociativity16Way;
+ /* System level cache */
+ mArmRdSmbiosType7[4].Base.MaximumCacheSize2 =3D 8192; // 8MB SLC pe=
r chip
+ mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 8192; // 8MB SLC pe=
r chip
+ mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way;
+ break;
+ case RdE1Edge:
+ /* L1 instruction cache */
+ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 32; // 32KB
+ mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 32; // 32KB
+ mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way;
+ /* L1 data cache */
+ mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 32; // 32KB
+ mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 32; // 32KB
+ mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity4Way;
+ /* L2 cache */
+ mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 256; // 256KB
+ mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 256; // 256KB
+ mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity4Way;
+ /* L3 cache */
+ mArmRdSmbiosType7[3].Base.MaximumCacheSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.InstalledSize2 =3D 2048; // 2MB
+ mArmRdSmbiosType7[3].Base.Associativity =3D CacheAssociativity16Way;
+ /* System level cache */
+ mArmRdSmbiosType7[4].Base.MaximumCacheSize2 =3D 8192; // 8MB SLC
+ mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 8192; // 8MB SLC
+ mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way;
+ break;
+ case RdV1:
+ case RdV1Mc:
+ /* L1 instruction cache */
+ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way;
+ /* L1 data cache */
+ mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity4Way;
+ /* L2 cache */
+ mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 1024; // 1MB
+ mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 1024; // 1MB
+ mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity8Way;
+ /* System level cache */
+ mArmRdSmbiosType7[4].Base.MaximumCacheSize2 =3D 16384; // 16MB SLC p=
er chip
+ mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 16384; // 16MB SLC p=
er chip
+ mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way;
+ break;
+ case RdN2:
+ /* L1 instruction cache */
+ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way;
+ /* L1 data cache */
+ mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 64; // 64KB
+ mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity4Way;
+ /* L2 cache */
+ mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 1024; // 1MB
+ mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 1024; // 1MB
+ mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity8Way;
+ /* System level cache */
+ mArmRdSmbiosType7[4].Base.MaximumCacheSize2 =3D 32768; // 32MB SLC
+ mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 32768; // 32MB SLC
+ mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way;
+ break;
+ }
+
+ /* Install valid cache information tables */
+ for (CacheIdx =3D 0; CacheIdx < ARRAY_SIZE (mArmRdSmbiosType7); CacheI=
dx++) {
+ if (mArmRdSmbiosType7[CacheIdx].Base.MaximumCacheSize2 =3D=3D 0) {
+ continue;
+ }
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType7[Cach=
eIdx])->Handle;
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType7[Cac=
heIdx]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type7 SMBIOS table.\n"
+ ));
+ }
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 4 table (Processor Information) that includes
information about manufacture, family, processor id, maximum operating
frequency, and other information related to the processor.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf =
| 6 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h =
| 25 +++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c =
| 1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.=
c | 219 ++++++++++++++++++++
5 files changed, 252 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPk=
g/SgiPlatform.dsc.inc
index a0f217f5107c..091de0c99c74 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -56,6 +56,7 @@
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/Dx=
eCoreMemoryAllocationLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
=20
[LibraryClasses.common.DXE_DRIVER]
FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index b3c1619ddc66..4652a9c62b88 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -18,6 +18,7 @@
Type0BiosInformation.c
Type1SystemInformation.c
Type3SystemEnclosure.c
+ Type4ProcessorInformation.c
=20
[Packages]
ArmPkg/ArmPkg.dec
@@ -27,9 +28,11 @@
Platform/ARM/SgiPkg/SgiPlatform.dec
=20
[LibraryClasses]
+ ArmLib
ArmPlatformLib
DebugLib
HobLib
+ PrintLib
UefiDriverEntryPoint
=20
[Guids]
@@ -37,6 +40,9 @@
gArmSgiPlatformIdDescriptorGuid
=20
[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+ gArmSgiTokenSpaceGuid.PcdChipCount
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
=20
[Protocols]
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index fc18cfc9f369..7c2164ae04bf 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -66,8 +66,33 @@ InstallType3SystemEnclosure (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS Processor information Table
+
+ Install the SMBIOS Processor information (type 4) table for Arm's Refe=
rence
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType4ProcessorInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
typedef enum {
SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
+ SMBIOS_HANDLE_CLUSTER1,
+ SMBIOS_HANDLE_L1I_CACHE,
+ SMBIOS_HANDLE_L1D_CACHE,
+ SMBIOS_HANDLE_L2_CACHE,
+ SMBIOS_HANDLE_L3_CACHE,
+ SMBIOS_HANDLE_L4_CACHE,
} SMBIOS_REFRENCE_HANDLES;
=20
#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index ac4c6120841f..7ef6f88a783d 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -29,6 +29,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D=
{
&InstallType0BiosInformation,
&InstallType1SystemInformation,
&InstallType3SystemEnclosure,
+ &InstallType4ProcessorInformation,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4Processor=
Information.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4Proces=
sorInformation.c
new file mode 100644
index 000000000000..9ecaea3603de
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInforma=
tion.c
@@ -0,0 +1,219 @@
+/** @file
+ SMBIOS Type 4 (Processor information) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 4 (Processor information) Table for Arm=
's
+ Reference Design platforms. It includes information about manufacture,
+ family, processor id, maximum operating frequency, and other informati=
on
+ related to the processor.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.5
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PrintLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SgiPlatform.h"
+#include "SmbiosPlatformDxe.h"
+
+#define NEOVERSE_E1_THREADS_PER_CORE 2
+
+#define SOCKET_TYPE_BASE 3
+#define SOCKET_TYPE_NUM 1
+#define PROCESSOR_VERSION_BASE (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM)
+#define PROCESSOR_VERSION_NUM 8
+#define SERIAL_NUMBER_BASE (PROCESSOR_VERSION_BASE + PROCESSOR_VERS=
ION_NUM)
+#define TYPE4_STRINGS \
+ "0x000\0" /* Part Number */ \
+ "ARM LTD\0" /* manufactuer */ \
+ "Other\0" /* socket type */ \
+ "Unknown\0" /* Processor Version */ \
+ "Cortex-A75\0" \
+ "Neoverse-N1\0" \
+ "Neoverse-N1\0" \
+ "Neoverse-E1\0" \
+ "Neoverse-V1\0" \
+ "Neoverse-V1\0" \
+ "Neoverse-N2\0" \
+ "000-0\0" /* Serial number */ \
+ "783-3\0" \
+ "786-1\0" \
+ "786-1\0" \
+ "786-2\0" \
+ "78A-1\0" \
+ "78A-2\0" \
+ "7B7-1\0"
+
+typedef enum {
+ PartNumber =3D 1,
+ ManufacturerName,
+ SocketTypeBase =3D SOCKET_TYPE_BASE,
+ ProcessorVersionBase =3D PROCESSOR_VERSION_BASE,
+ SerialNumberBase =3D SERIAL_NUMBER_BASE
+} TYPE4_STRING_ELEMENTS;
+
+/* SMBIOS Type4 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE4 Base;
+ CHAR8 Strings[sizeof (TYPE4_STRINGS)];
+} ARM_RD_SMBIOS_TYPE4;
+#pragma pack()
+
+/* Processor information */
+STATIC ARM_RD_SMBIOS_TYPE4 mArmRdSmbiosType4 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // Type 4
+ sizeof (SMBIOS_TABLE_TYPE4), // Length
+ SMBIOS_HANDLE_CLUSTER1, // handle number
+ },
+ SocketTypeBase, // Socket type
+ CentralProcessor, // Processor type
+ ProcessorFamilyIndicatorFamily2,
+ // Use Processor Family 2 field
+ ManufacturerName, // Manufacturer string number
+ {{0}, {0}}, // Processor id, update dynamically
+ ProcessorVersionBase, // Processor version, update dynamically
+ {0, 0, 0, 0, 0, 1}, // Non legacy mode for processor voltage
+ 0, // External clock frequency unknown
+ 2600, // Max speed in MHz
+ 2600, // Current speed in MHz
+ ( // Status
+ (1 << 6) | // CPU Socket Populated
+ (1 << 0) // CPU Enabled
+ ),
+ ProcessorUpgradeOther, // Processor Upgrade
+ SMBIOS_HANDLE_L1I_CACHE, // L1 Cache handle
+ SMBIOS_HANDLE_L2_CACHE, // L2 Cache handle
+ SMBIOS_HANDLE_L3_CACHE, // L3 Cache handle
+ 0, // Processor serial number not set
+ 0, // Processor asset tag not set
+ PartNumber, // Part number, update dynamically
+ 0, // Core count, update dynamically
+ 0, // Enabled core count, update dynamically
+ 0, // Thread per socket count
+ ( // Processor characteristics
+ (1 << 2) | // 64-bit Capable
+ (1 << 3) | // Multi-Core
+ (1 << 5) | // Execute Protection
+ (1 << 6) | // Enhanced Virtualization
+ (1 << 7) // Power/Performance Control
+ ),
+ ProcessorFamilyARM // Processor Family 2
+ },
+ TYPE4_STRINGS
+};
+
+/**
+ Update the part-number string.
+
+ Get the part number from ProcessorId and update TYPE4_STRINGS
+
+ @param ProcessorId The processor Id read from MIDR register
+**/
+STATIC
+VOID
+UpdatePartNumber (
+ IN UINT64 ProcessorId
+ )
+{
+ CHAR8 PartNumber[6] =3D {0};
+ UINT16 PartNum;
+
+ PartNum =3D (UINT16)((ProcessorId >> 4) & 0xFFF);
+
+ /* Convert 3 digit hexadecimal partnumber to ASCII and update TYPE4_ST=
RINGS */
+ AsciiSPrint (PartNumber, sizeof (PartNumber), "0x%03x", PartNum);
+ CopyMem (&mArmRdSmbiosType4.Strings[0], PartNumber, sizeof (PartNumber=
));
+}
+
+/**
+ Install SMBIOS Processor information Table
+
+ Install the SMBIOS Processor information (type 4) table for Arm's Refe=
rence
+ Design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType4ProcessorInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT8 ProductId;
+ UINT32 CoreCount;
+ UINT64 *ProcessorId =3D (UINT64 *)&(mArmRdSmbiosType4.Base.ProcessorId=
);
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType4)->Hand=
le;
+ CoreCount =3D (FixedPcdGet32 (PcdCoreCount) * FixedPcdGet32 (PcdCluste=
rCount));
+ ProductId =3D SgiGetProductId ();
+
+ /* Set the core count and processor speed for all platforms */
+ switch (ProductId) {
+ case Sgi575:
+ case RdN1Edge:
+ case RdV1:
+ mArmRdSmbiosType4.Base.CoreCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.EnabledCoreCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.ThreadCount =3D CoreCount;
+ break;
+ case RdN2:
+ mArmRdSmbiosType4.Base.CoreCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.EnabledCoreCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.ThreadCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.MaxSpeed =3D 3200; // Frequency in MHz
+ mArmRdSmbiosType4.Base.CurrentSpeed =3D 3200; // Frequency in MHz
+ break;
+ case RdN1EdgeX2:
+ case RdV1Mc:
+ mArmRdSmbiosType4.Base.CoreCount =3D CoreCount * FixedPcdGet32 (PcdC=
hipCount);
+ mArmRdSmbiosType4.Base.EnabledCoreCount =3D CoreCount * FixedPcdGet3=
2 (PcdChipCount);
+ mArmRdSmbiosType4.Base.ThreadCount =3D CoreCount * FixedPcdGet32 (Pc=
dChipCount);
+ break;
+ case RdE1Edge:
+ mArmRdSmbiosType4.Base.CoreCount =3D CoreCount / NEOVERSE_E1_THREADS=
_PER_CORE;
+ mArmRdSmbiosType4.Base.EnabledCoreCount =3D CoreCount / NEOVERSE_E1_=
THREADS_PER_CORE;
+ mArmRdSmbiosType4.Base.ThreadCount =3D CoreCount;
+ mArmRdSmbiosType4.Base.MaxSpeed =3D 2300; // Frequency in MHz
+ mArmRdSmbiosType4.Base.CurrentSpeed =3D 2300; // Frequency in MHz
+ break;
+ }
+
+ mArmRdSmbiosType4.Base.ProcessorVersion =3D ProcessorVersionBase + Pro=
ductId;
+ mArmRdSmbiosType4.Base.SerialNumber =3D SerialNumberBase + ProductId;
+
+ /* Update processor-id and part number */
+ *ProcessorId =3D ArmReadMidr ();
+ UpdatePartNumber (*ProcessorId);
+
+ /* Install type 4 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType4
+ );
+ if (Status !=3D EFI_SUCCESS) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type4 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 3 table (System Enclosure) that includes information
about manufacturer, type, serial number and other information related to
system enclosure.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h | =
22 +++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | =
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c | 1=
03 ++++++++++++++++++++
4 files changed, 127 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index f7beb1c66c80..b3c1619ddc66 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -17,6 +17,7 @@
SmbiosPlatformDxe.c
Type0BiosInformation.c
Type1SystemInformation.c
+ Type3SystemEnclosure.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index e2437b109899..fc18cfc9f369 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -48,4 +48,26 @@ InstallType1SystemInformation (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS System Enclosure Table
+
+ Install the SMBIOS System Enclosure (type 3) table for Arm's Reference=
Design
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType3SystemEnclosure (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
+typedef enum {
+ SMBIOS_HANDLE_ENCLOSURE =3D 0x1000,
+} SMBIOS_REFRENCE_HANDLES;
+
#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index b9ce50c82b4c..ac4c6120841f 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -28,6 +28,7 @@ STATIC CONST
ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D {
&InstallType0BiosInformation,
&InstallType1SystemInformation,
+ &InstallType3SystemEnclosure,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnc=
losure.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclo=
sure.c
new file mode 100644
index 000000000000..146852eb4ae6
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.=
c
@@ -0,0 +1,103 @@
+/** @file
+ SMBIOS Type 3 (System enclosure) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 3 (System enclosure) table for Arm Refe=
rence
+ Design platforms. SMBIOS Type 3 table (System Enclosure) includes info=
rmation
+ about manufacturer, type, serial number and other information related =
to
+ system enclosure.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.4
+**/
+
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE3_STRINGS \
+ "ARM LTD\0" /* Manufacturer */ \
+ "Version not set\0" /* Version */ \
+ "Serial not set\0" /* Serial */ \
+ "Asset Tag not set\0" /* Asset Tag */
+
+typedef enum {
+ ManufacturerName =3D 1,
+ Version,
+ SerialNumber,
+ AssetTag
+} TYPE3_STRING_ELEMENTS;
+
+/* SMBIOS Type3 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE3 Base;
+ CHAR8 Strings[sizeof (TYPE3_STRINGS)];
+} ARM_RD_SMBIOS_TYPE3;
+#pragma pack()
+
+/* System information */
+STATIC ARM_RD_SMBIOS_TYPE3 mArmRdSmbiosType3 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // Type 3
+ sizeof (SMBIOS_TABLE_TYPE1), // Length
+ SMBIOS_HANDLE_ENCLOSURE, // Assign an unused handle num=
ber
+ },
+ ManufacturerName, // Manufacturer
+ 2, // Enclosure type unknown
+ Version, // Version
+ SerialNumber, // Serial
+ AssetTag, // Asset Tag
+ ChassisStateSafe, // Boot chassis state
+ ChassisStateSafe, // Power supply state
+ ChassisStateSafe, // Thermal state
+ ChassisSecurityStatusUnknown, // Security Status
+ {0}, // BIOS vendor specific Information
+ },
+ // Text strings (unformatted)
+ TYPE3_STRINGS
+};
+
+/**
+ Install SMBIOS System Enclosure Table
+
+ Install the SMBIOS System Enclosure (type 3) table for Arm's Reference=
Design
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType3SystemEnclosure (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType3)->Hand=
le;
+
+ /* Install type 3 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType3
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type3 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add the SMBIOS type 1 table (System Information) that includes
information about manufacturer, product name, version, serial number and
other information related to the system identification.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf |=
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h |=
19 +++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c |=
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c |=
142 ++++++++++++++++++++
4 files changed, 163 insertions(+)

diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
index 3568380f8404..f7beb1c66c80 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -16,6 +16,7 @@
[Sources]
SmbiosPlatformDxe.c
Type0BiosInformation.c
+ Type1SystemInformation.c
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index a09f89ebe5bc..e2437b109899 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -29,4 +29,23 @@ InstallType0BiosInformation (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
=20
+/**
+ Install SMBIOS System information Table.
+
+ Install the SMBIOS system information (type 1) table for Arm's referen=
ce
+ design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType1SystemInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 20d4dedccb82..b9ce50c82b4c 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -27,6 +27,7 @@ typedef EFI_STATUS (*ARM_RD_SMBIOS_TABLE_INSTALL_FPTR)(=
EFI_SMBIOS_PROTOCOL *);
STATIC CONST
ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D {
&InstallType0BiosInformation,
+ &InstallType1SystemInformation,
};
=20
/**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInf=
ormation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInf=
ormation.c
new file mode 100644
index 000000000000..367587c07673
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformatio=
n.c
@@ -0,0 +1,142 @@
+/** @file
+ SMBIOS Type 1 (System information) table for ARM RD platforms.
+
+ This file installs SMBIOS Type 1 (System information) table for Arm's
+ Reference Design platforms. Type 1 table defines attributes of the
+ overall system such as manufacturer, product name, UUID etc.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.2
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Protocol/Smbios.h>
+
+#include "SgiPlatform.h"
+
+#define TYPE1_STRINGS \
+ "ARM LTD\0" /* Manufacturer */ \
+ "Version not set\0" /* Version */ \
+ "Serial not set\0" /* Serial number */ \
+ "Not Applicable\0" /* SKU */ \
+ "Not Applicable\0" /* Family */ \
+ "SGI575\0" /* Product Names */ \
+ "RdN1Edge\0" \
+ "RdN1EdgeX2\0" \
+ "RdE1Edge\0" \
+ "RdV1\0" \
+ "RdV1Mc\0" \
+ "RdN2\0"
+
+typedef enum {
+ ManufacturerName =3D 1,
+ Version,
+ SerialNumber,
+ SKU,
+ Family,
+ ProductNameBase
+} TYPE1_STRING_ELEMENTS;
+
+/* SMBIOS Type1 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE1 Base;
+ CHAR8 Strings[sizeof (TYPE1_STRINGS)];
+} ARM_RD_SMBIOS_TYPE1;
+#pragma pack()
+
+STATIC GUID mSmbiosUid[] =3D {
+ /* Sgi575 */
+ {0xdd7cad0a, 0x227c, 0x4ed4, {0x9f, 0x42, 0xa9, 0x8b, 0xd6, 0xa2, 0x42=
, 0x6c}},
+ /* Rd-N1-Edge */
+ {0x80984efe, 0x404a, 0x43e0, {0xad, 0xa4, 0x63, 0xa0, 0xe0, 0xc4, 0x5e=
, 0x60}},
+ /* Rd-N1-Edge-X2 */
+ {0x2cc4f916, 0x267a, 0x4251, {0x95, 0x6e, 0xf0, 0x49, 0x82, 0xbe, 0x94=
, 0x58}},
+ /* Rd-E1-Edge */
+ {0x567f35c4, 0x104f, 0x447b, {0xa0, 0x94, 0x89, 0x2f, 0xbd, 0xb6, 0x5a=
, 0x55}},
+ /* Rd-V1 */
+ {0xc481f0b1, 0x237c, 0x42d7, {0x98, 0xb2, 0xb4, 0xb4, 0x8d, 0xb5, 0x4f=
, 0x50}},
+ /* Rd-V1Mc */
+ {0x1f3a0806, 0x18b5, 0x4eca, {0xad, 0xcd, 0xba, 0x9b, 0x07, 0xb1, 0x0a=
, 0xcf}},
+ /* Rd-N2 */
+ {0xf2cded73, 0x37f9, 0x4ec9, {0xd9, 0xf9, 0x89, 0x9b, 0x74, 0x91, 0x20=
, 0x49}}
+};
+
+/* System information */
+STATIC ARM_RD_SMBIOS_TYPE1 mArmRdSmbiosType1 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type 1
+ sizeof (SMBIOS_TABLE_TYPE1), // Length
+ SMBIOS_HANDLE_PI_RESERVED, // Assign an unused handle num=
ber
+ },
+ ManufacturerName, // Manufacturer
+ ProductNameBase, // Product Name, update dynamically
+ Version, // Version
+ SerialNumber, // Serial
+ {0}, // UUID, Update dymanically
+ 1, // Wakeup type other
+ SKU, // SKU
+ Family, // Family
+ },
+ // Text strings (unformatted)
+ TYPE1_STRINGS
+};
+
+/**
+ Install SMBIOS System information Table.
+
+ Install the SMBIOS system information (type 1) table for Arm's referen=
ce
+ design platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_NOT_FOUND Unknown product id.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType1SystemInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT8 ProductId;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType1)->Hand=
le;
+ ProductId =3D SgiGetProductId ();
+
+ /* Choose the product name from TYPE1_STRINGS based on the product ID =
*/
+ if (ProductId !=3D UnknownId) {
+ mArmRdSmbiosType1.Base.ProductName =3D
+ ProductNameBase + (ProductId - 1);
+ CopyGuid (&mArmRdSmbiosType1.Base.Uuid,
+ &mSmbiosUid[ProductId - 1]);
+ } else {
+ return EFI_NOT_FOUND;
+ }
+
+ /* Install type 1 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType1
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type1 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

SMBIOS provides basic hardware and firmware configuration information
through table-driven data structure. This patch adds SMBIOS driver
support that allows for installation of multiple SMBIOS types. Also add
SMBIOS Type0 (BIOS Information) table, that include information about
BIOS vendor name, version, SMBIOS version and other information related
to BIOS.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | =
10 ++
Platform/ARM/SgiPkg/SgiPlatform.fdf | =
8 +-
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | =
46 +++++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h | =
32 +++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | =
98 ++++++++++++++
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInformation.c | 1=
35 ++++++++++++++++++++
6 files changed, 328 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPk=
g/SgiPlatform.dsc.inc
index 42e3600d15f4..a0f217f5107c 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -109,6 +109,10 @@
# ACPI Table Version
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
=20
+ # SMBIOS entry point version
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0304
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
+
#
# PCIe
#
@@ -247,6 +251,12 @@
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
=20
+ #
+ # SMBIOS/DMI
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
#
# platform driver
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/Sg=
iPlatform.fdf
index da23804828e5..e11d943d6efc 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2021, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -102,6 +102,12 @@ READ_LOCK_STATUS =3D TRUE
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
!include $(BOARD_DXE_FV_COMPONENTS)
=20
+ #
+ # SMBIOS/DMI
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.in=
f
+
# Required by PCI
INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
=20
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.inf b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe=
.inf
new file mode 100644
index 000000000000..3568380f8404
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -0,0 +1,46 @@
+## @file
+# This driver installs SMBIOS information for RD Platforms
+#
+# Copyright (c) 2021, ARM Limited. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ INF_VERSION =3D 0x0001001A
+ BASE_NAME =3D SmbiosPlatformDxe
+ FILE_GUID =3D 86e0aa8b-4f8d-44a5-a140-1f693d529c7=
6
+ MODULE_TYPE =3D DXE_DRIVER
+ VERSION_STRING =3D 1.0
+ ENTRY_POINT =3D SmbiosTableEntryPoint
+
+[Sources]
+ SmbiosPlatformDxe.c
+ Type0BiosInformation.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[LibraryClasses]
+ ArmPlatformLib
+ DebugLib
+ HobLib
+ UefiDriverEntryPoint
+
+[Guids]
+ gEfiGlobalVariableGuid
+ gArmSgiPlatformIdDescriptorGuid
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
+
+[Protocols]
+ gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Guids]
+
+[Depex]
+ gEfiSmbiosProtocolGuid
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.h b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
new file mode 100644
index 000000000000..a09f89ebe5bc
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -0,0 +1,32 @@
+/** @file
+ Declarations required for SMBIOS DXE driver.
+
+ Functions declarations and data type declarations required for SMBIOS =
DXE
+ driver of the Arm Reference Design platforms.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef SMBIOS_PLATFORM_DXE_H_
+#define SMBIOS_PLATFORM_DXE_H_
+
+/**
+ Install SMBIOS BIOS information Table.
+
+ Install the SMBIOS BIOS information (type 0) table for Arm's reference=
design
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+EFIAPI
+InstallType0BiosInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
+#endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform=
Dxe.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
new file mode 100644
index 000000000000..20d4dedccb82
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -0,0 +1,98 @@
+/** @file
+ Install SMBIOS tables for Arm's SGI/RD platforms.
+
+ This file is the driver entry point for installing SMBIOS tables on Ar=
m's
+ Reference Design platforms. For each SMBIOS table installation handler
+ registered, the driver invokes the handler to register the respective =
table.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0
+**/
+
+#include <IndustryStandard/SmBios.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <PiDxe.h>
+#include <Protocol/Smbios.h>
+
+#include "SgiPlatform.h"
+#include "SmbiosPlatformDxe.h"
+
+typedef EFI_STATUS (*ARM_RD_SMBIOS_TABLE_INSTALL_FPTR)(EFI_SMBIOS_PROTOC=
OL *);
+
+STATIC CONST
+ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] =3D {
+ &InstallType0BiosInformation,
+};
+
+/**
+ Driver entry point. Installs SMBIOS information.
+
+ For all the available SMBIOS table installation handlers, invoke each =
of
+ those handlers and let the handlers install the SMBIOS tables. The cou=
nt
+ of handlers that fail to install the SMBIOS tables is maintained for
+ additional logging.
+
+ @param ImageHandle Module's image handle.
+ @param SystemTable Pointer of EFI_SYSTEM_TABLE.
+
+ @retval EFI_SUCCESS All SMBIOS table install handlers invoked.
+ @retval EFI_NOT_FOUND Unsupported platform.
+ @retval Others Failed to invoke SMBIOS table install handlders=
.
+**/
+EFI_STATUS
+EFIAPI
+SmbiosTableEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *Smbios =3D NULL;
+ UINT8 CountFail =3D 0;
+ UINT8 Idx;
+
+ /* Install SMBIOS table only for supported product */
+ if (SgiGetProductId () =3D=3D UnknownId) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "Failed to install SMBIOS: Unknown product\n"
+ ));
+ return EFI_NOT_FOUND;
+ }
+
+ /* Find the SMBIOS protocol */
+ Status =3D gBS->LocateProtocol (
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ (VOID **)&Smbios
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "Failed to install SMBIOS: Unable to locate protocol\n"
+ ));
+ return Status;
+ }
+
+ /* Install the tables listed in mSmbiosTableList */
+ for (Idx =3D 0; Idx < ARRAY_SIZE (mSmbiosTableList); Idx++) {
+ Status =3D (*mSmbiosTableList[Idx]) (Smbios);
+ if (EFI_ERROR (Status)) {
+ CountFail++;
+ }
+ }
+
+ DEBUG ((
+ DEBUG_INFO,
+ "Installed %d of %d available SMBIOS tables\n",
+ ARRAY_SIZE (mSmbiosTableList) - CountFail,
+ ARRAY_SIZE (mSmbiosTableList)
+ ));
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInfor=
mation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInforma=
tion.c
new file mode 100644
index 000000000000..f5c1b2366d04
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInformation.=
c
@@ -0,0 +1,135 @@
+/** @file
+ SMBIOS Type 0 (BIOS information) table for ARM RD platforms.
+
+ Install SMBIOS Type 0 (BIOS information) table for Arm's Reference Des=
ign
+ platforms.
+
+ Copyright (c) 2021, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - SMBIOS Reference Specification 3.4.0, Chapter 7.1
+**/
+
+#include <Library/DebugLib.h>
+#include <Protocol/Smbios.h>
+
+#define TYPE0_STRINGS \
+ "ARM LTD\0" /* Vendor */ \
+ "EDK II\0" /* BiosVersion */ \
+ __DATE__"\0" /* BiosReleaseDate */ \
+ "\0"
+
+typedef enum {
+ VendorName =3D 1,
+ BiosVersion,
+ BiosReleaseDate
+} TYPE0_STRING_ELEMENTS;
+
+/* SMBIOS Type0 structure */
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE0 Base;
+ CHAR8 Strings[sizeof (TYPE0_STRINGS)];
+} ARM_RD_SMBIOS_TYPE0;
+#pragma pack()
+
+/* BIOS information */
+STATIC ARM_RD_SMBIOS_TYPE0 mArmRdSmbiosType0 =3D {
+ {
+ {
+ // SMBIOS header
+ EFI_SMBIOS_TYPE_BIOS_INFORMATION, // Type 0
+ sizeof (SMBIOS_TABLE_TYPE0), // Length
+ SMBIOS_HANDLE_PI_RESERVED, // Assign an unused handle numbe=
r
+ },
+ VendorName, // String number of vendor name in TYPE0_STRINGS
+ BiosVersion, // String number of BiosVersion
+ 0, // Bios starting address segment
+ BiosReleaseDate, // String number of BiosReleaseDate
+ 0xFF, // Bios ROM size
+ { // MISC_BIOS_CHARACTERISTICS
+ 0, // Reserved
+ 0, // Unknown
+ 0, // BIOS Characteristics are not supported
+ 0, // ISA not supported
+ 0, // MCA not supported
+ 0, // EISA not supported
+ 1, // PCI supported
+ 0, // PC card (PCMCIA) not supported
+ 1, // Plug and Play is supported
+ 0, // APM not supported
+ 1, // BIOS upgradable
+ 0, // BIOS shadowing is not allowed
+ 0, // VL-VESA not supported
+ 0, // ESCD support is not available
+ 0, // Boot from CD not supported
+ 1, // selectable boot
+ },
+ { // BIOSCharacteristicsExtensionBytes
+ (
+ (1 << 0) | // ACPI Supported
+ (1 << 1) // Legacy USB supported
+ ),
+ (
+ (1 << 3) | // Content distribution enabled
+ (1 << 4) // UEFI spec supported
+ )
+ },
+ 0, // SMBIOS Major Release, updated dynamically
+ 0, // SMBIOS Minor Release, updated dynamically
+ 0xFF, // Embedded Controller Firmware Major Release
+ 0xFF, // Embedded Controller Firmware Minor Release
+ { // EXTENDED_BIOS_ROM_SIZE
+ 64, // Size
+ 0 // Unit MB
+ }
+ },
+ // Text strings (unformatted area)
+ TYPE0_STRINGS
+};
+
+/**
+ Install SMBIOS BIOS information Table.
+
+ Install the SMBIOS BIOS information (type 0) table for Arm's reference=
design
+ platforms.
+
+ @param[in] Smbios SMBIOS protocol.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added.
+ @retval EFI_ALREADY_STARTED The SmbiosHandle passed is already in us=
e.
+**/
+EFI_STATUS
+InstallType0BiosInformation (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType0)->Hand=
le;
+
+ /* Update firmware revision */
+ mArmRdSmbiosType0.Base.SystemBiosMajorRelease =3D
+ (PcdGet32 (PcdFirmwareRevision) >> 16) & 0xFF;
+ mArmRdSmbiosType0.Base.SystemBiosMinorRelease =3D
+ PcdGet32 (PcdFirmwareRevision) & 0xFF;
+
+ /* Install type 0 table */
+ Status =3D Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmRdSmbiosType0
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "SMBIOS: Failed to install Type0 SMBIOS table.\n"
+ ));
+ }
+
+ return Status;
+}
--=20
2.17.1

Add GetProductId API for SGI/RD Platform. The API returns a product id
in integer format based on the platform description data. The product id
is required for other drivers such as SMBIOS.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 30 +++++++
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 86 +++++++++++++=
++++++-
2 files changed, 115 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/Sgi=
Pkg/Include/SgiPlatform.h
index 1c5366878712..4999c9870b49 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -68,4 +68,34 @@ typedef struct {
UINTN MultiChipMode;
} SGI_PLATFORM_DESCRIPTOR;
=20
+// Arm SGI/RD Product IDs
+typedef enum {
+ UnknownId =3D 0,
+ Sgi575,
+ RdN1Edge,
+ RdN1EdgeX2,
+ RdE1Edge,
+ RdV1,
+ RdV1Mc,
+ RdN2
+} ARM_RD_PRODUCT_ID;
+
+// Arm ProductId look-up table
+typedef struct {
+ UINTN ProductId;
+ UINTN PlatformId;
+ UINTN ConfigId;
+ UINTN MultiChipMode;
+} SGI_PRODUCT_ID_LOOKUP;
+
+/**
+ Derermine the product ID.
+
+ Determine the product ID by using the data in the Platform ID Descript=
or HOB
+ to lookup for a matching product ID.
+
+ @retval Zero Failed identify platform.
+ @retval Others ARM_RD_PRODUCT_ID of the identified platform.
+**/
+UINT8 SgiGetProductId (VOID);
#endif // __SGI_PLATFORM_H__
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c b/Plat=
form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index 9731d7cccede..f27c949dbc24 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2021, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -8,9 +8,12 @@
=20
#include <Library/ArmPlatformLib.h>
#include <Library/BaseLib.h>
+#include <Library/HobLib.h>
#include <Ppi/ArmMpCoreInfo.h>
#include <Ppi/SgiPlatformId.h>
=20
+#include "SgiPlatform.h"
+
UINT64 NtFwConfigDtBlob;
STATIC SGI_NT_FW_CONFIG_INFO_PPI mNtFwConfigDtInfoPpi;
=20
@@ -21,6 +24,51 @@ STATIC ARM_CORE_INFO mCoreInfoTable[] =3D {
},
};
=20
+STATIC CONST SGI_PRODUCT_ID_LOOKUP SgiProductIdLookup[] =3D {
+ {
+ Sgi575,
+ SGI575_PART_NUM,
+ SGI575_CONF_NUM,
+ 0
+ },
+ {
+ RdN1Edge,
+ RD_N1E1_EDGE_PART_NUM,
+ RD_N1_EDGE_CONF_ID,
+ 0
+ },
+ {
+ RdN1EdgeX2,
+ RD_N1E1_EDGE_PART_NUM,
+ RD_N1_EDGE_CONF_ID,
+ 1
+ },
+ {
+ RdE1Edge,
+ RD_N1E1_EDGE_PART_NUM,
+ RD_E1_EDGE_CONF_ID,
+ 0
+ },
+ {
+ RdV1,
+ RD_V1_PART_NUM,
+ RD_V1_CONF_ID,
+ 0
+ },
+ {
+ RdV1Mc,
+ RD_V1_PART_NUM,
+ RD_V1_MC_CONF_ID,
+ 1
+ },
+ {
+ RdN2,
+ RD_N2_PART_NUM,
+ RD_N2_CONF_ID,
+ 0
+ }
+};
+
EFI_BOOT_MODE
ArmPlatformGetBootMode (
VOID
@@ -75,3 +123,39 @@ ArmPlatformGetPlatformPpiList (
*PpiListSize =3D sizeof (gPlatformPpiTable);
*PpiList =3D gPlatformPpiTable;
}
+
+/**
+ Derermine the product ID.
+
+ Determine the product ID by using the data in the Platform ID Descript=
or HOB
+ to lookup for a matching product ID.
+
+ @retval Zero Failed identify platform.
+ @retval Others ARM_RD_PRODUCT_ID of the identified platform.
+**/
+UINT8
+SgiGetProductId (
+ VOID
+ )
+{
+ VOID *SystemIdHob;
+ UINT8 Idx;
+ SGI_PLATFORM_DESCRIPTOR *HobData;
+
+ SystemIdHob =3D GetFirstGuidHob (&gArmSgiPlatformIdDescriptorGuid);
+ if (SystemIdHob =3D=3D NULL) {
+ return UnknownId;
+ }
+
+ HobData =3D (SGI_PLATFORM_DESCRIPTOR *)GET_GUID_HOB_DATA (SystemIdHob)=
;
+
+ for (Idx =3D 0; Idx < ARRAY_SIZE (SgiProductIdLookup); Idx++) {
+ if ((HobData->PlatformId =3D=3D SgiProductIdLookup[Idx].PlatformId) =
&&
+ (HobData->ConfigId =3D=3D SgiProductIdLookup[Idx].ConfigId) &&
+ (HobData->MultiChipMode =3D=3D SgiProductIdLookup[Idx].MultiChip=
Mode)) {
+ return SgiProductIdLookup[Idx].ProductId;
+ }
+ }
+
+ return UnknownId;
+}
--=20
2.17.1

Add RD-N2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.

Signed-off-by: Pranav Madhu <pranav.madhu@...>
Reviewed-by: Sami Mujawar <sami.mujawar@...>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/Sgi=
Pkg/Include/SgiPlatform.h
index 818879b5f81e..1c5366878712 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2021, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -39,6 +39,10 @@
#define RD_V1_CONF_ID 0x1
#define RD_V1_MC_CONF_ID 0x2
=20
+// RD-N2 Platform Identification values
+#define RD_N2_PART_NUM 0x7B7
+#define RD_N2_CONF_ID 0x1
+
#define SGI_CONFIG_MASK 0x0F
#define SGI_CONFIG_SHIFT 0x1C
#define SGI_PART_NUM_MASK 0xFFF
--=20
2.17.1

Changes since V2:
- Addressed comments from Sami
- Picked up Sami's reviewed-by tags.

Changes since V1:
- Rebase the patches on top of latest master branch

SMBIOS provides basic hardware and firmware configuration information
through table-driven data structure. This patch series adds SMBIOS
support for Arm's SGI/RD platforms.

The first patch in this series defines platform-id values for the
RD-N2 platform library header. The second patch add SgiGetProductId API,
which is used by the SMBIOS driver to distinguish between the platforms,
and install the right table. The third patch in this series adds SMBIOS
driver support that allows for installation of multiple SMBIOS tables.
And subsequent patches in this series add SMBIOS tables, which are
mandatory as per Arm serverready SBBR specification.

Link to github branch with the patches in this series -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/rd_smbios

Pranav Madhu (11):
Platform/Sgi: Define RD-N2 platform id values
Platform/Sgi: Add GetProductId API for SGI/RD Platforms
Platform/Sgi: Add Initial SMBIOS support
Platform/Sgi: Add SMBIOS Type1 Table
Platform/Sgi: Add SMBIOS Type3 Table
Platform/Sgi: Add SMBIOS Type4 Table
Platform/Sgi: Add SMBIOS Type7 Table
Platform/Sgi: Add SMBIOS Type16 Table
Platform/Sgi: Add SMBIOS Type17 Table
Platform/Sgi: Add SMBIOS Type19 Table
Platform/Sgi: Add SMBIOS Type32 Table

Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 11 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 8 +-
.../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 62 ++++
.../SmbiosPlatformDxe/SmbiosPlatformDxe.h | 197 ++++++++++
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 36 +-
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 106 ++++++
.../SmbiosPlatformDxe/Type0BiosInformation.c | 135 +++++++
.../Type16PhysicalMemoryArray.c | 106 ++++++
.../SmbiosPlatformDxe/Type17MemoryDevice.c | 298 +++++++++++++++
.../Type19MemoryArrayMappedAddress.c | 97 +++++
.../Type1SystemInformation.c | 142 ++++++++
.../Type32SystemBootInformation.c | 84 +++++
.../SmbiosPlatformDxe/Type3SystemEnclosure.c | 103 ++++++
.../Type4ProcessorInformation.c | 219 +++++++++++
.../SmbiosPlatformDxe/Type7CacheInformation.c | 342 ++++++++++++++++++
.../SgiPkg/Library/PlatformLib/PlatformLib.c | 86 ++++-
16 files changed, 2029 insertions(+), 3 deletions(-)
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosP=
latformDxe.inf
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosP=
latformDxe.h
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosP=
latformDxe.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0Bi=
osInformation.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16P=
hysicalMemoryArray.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17M=
emoryDevice.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19M=
emoryArrayMappedAddress.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1Sy=
stemInformation.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32S=
ystemBootInformation.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3Sy=
stemEnclosure.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4Pr=
ocessorInformation.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7Ca=
cheInformation.c

--=20
2.17.1

Greetings everyone!

I've been selected as a student coder for the audio output protocol
project with Ray Ni and Leif Lindholm as my mentors. This is my first
time doing GSoC and working on EDK II so this will be very enjoyable
and a wonderful learning opportunity for me. (It'll also give me
something to do over the summer, which is always a plus.)

Some of you have already communicated with me in the past, both about
this proposal and about UEFI accessibility in general, and I'm glad to
be working with you guys again. I'm primarily on Linux (Arch Linux to
be exact) and I've already got my development environment set up and
can fully compile OVMF. However, though I've read a bit through the
UEFI driver manual, I certainly haven't read all of it, and I'm still
quite unfamiliar with the EDK II code as a whole. So, how can I use
this community bonding period to get to grips with the development
process? What else do I need to learn?

I apologize for not having many questions to ask -- this is my first
time so I'm not really sure. :-) I can't wait to begin working with
all of you this summer!

--
Signed,
Ethin D. Probst

`Result` can be used uninitialized in both functions after following
either first or second `goto` statement.

Cc: Jiewen Yao <jiewen.yao@...>
Cc: Jian J Wang <jian.j.wang@...>
Cc: Xiaoyu Lu <xiaoyux.lu@...>
Cc: Guomin Jiang <guomin.jiang@...>
Signed-off-by: Sergei Dmitrouk <sergei@...>
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
2 files changed, 2 insertions(+)

diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
index 4009d37d5f91..0b2960f06c4c 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
@@ -82,6 +82,7 @@ RsaPssVerify (
EVP_PKEY_CTX *KeyCtx;
CONST EVP_MD *HashAlg;

+ Result = FALSE;
EvpRsaKey = NULL;
EvpVerifyCtx = NULL;
KeyCtx = NULL;
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
index b66b6f7296ad..ece765f9ae0a 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
@@ -97,6 +97,7 @@ RsaPssSign (
EVP_PKEY_CTX *KeyCtx;
CONST EVP_MD *HashAlg;

+ Result = FALSE;
EvpRsaKey = NULL;
EvpVerifyCtx = NULL;
KeyCtx = NULL;
--
2.17.6