Date   

[PATCH 1/1] ArmPkg/ProcessorSubClassDxe: Fix the format of ProcessorId

Nhi Pham
 

According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if
SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and
the second DWORD is the SoC revision value. But in the current
implementation, they are set in reverse. This patch is to correct it.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Rebecca Cran <rebecca@nuviainc.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
---
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c
index 292f10bf97eb..d644cd33d249 100644
--- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c
@@ -2,6 +2,7 @@
Functions for processor information common to ARM and AARCH64.

Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
+ Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -171,7 +172,7 @@ SmbiosGetProcessorId (

if (HasSmcArm64SocId ()) {
SmbiosGetSmcArm64SocId (&Jep106Code, &SocRevision);
- ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision;
+ ProcessorId = ((UINT64)SocRevision << 32) | Jep106Code;
} else {
ProcessorId = ArmReadMidr ();
}
--
2.17.1


Re: [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Ni, Ray
 

Extending PciBus to support such case is valid.

 

But can you check if there is other pure software way to detect whether it’s an ECiEP?

 

From: Bassa, Damian <damian.bassa@...>
Sent: Wednesday, September 15, 2021 7:54 PM
To: Wu, Hao A <hao.a.wu@...>; devel@edk2.groups.io; Ni, Ray <ray.ni@...>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

Should we consider this workaround? I’m having issues interpreting this part of PCIe spec.

My understanding of this quote is that this capability can exist in but it shouldn’t be considered.

I would assume it’s possible option that it needs to be considered? Is that wrong?

 

Damian

 

 

From: Wu, Hao A <hao.a.wu@...>
Sent: Wednesday, September 8, 2021 9:17 AM
To: Bassa, Damian <damian.bassa@...>; devel@edk2.groups.io; Ni, Ray <ray.ni@...>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

Really sorry for the late response.

 

So this is a workaround for RCiEP device that is not compliant to the PCIe spec:

|>  ARI is an optional capability. This capability must be implemented by each

|>  Function in an ARI Device. It is not applicable to a Root Port, a Switch

|>  Downstream Port, an RCiEP, or a Root Complex Event Collector.

 

If this the case, could you help to:

* Add a comment that briefly describe this workaround before the newly added code

* Also mention this workaround information in the commit log message.

* Send out a V2 version of the patch?

Thanks in advance.

 

Hello Ray, please help to raise if you have concern on this.

 

Best Regards,

Hao Wu

 

From: Bassa, Damian <damian.bassa@...>
Sent: Wednesday, September 1, 2021 1:45 AM
To: Wu, Hao A <hao.a.wu@...>; devel@edk2.groups.io; Ni, Ray <ray.ni@...>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

It refers to access to the root port device that doesn’t exist in case we are dealing with RCiEP device.

There can be specific case where RCiEP device has ARI extended capability ID (even though it’s unsupported in this case).

In such a case PciSearchDevice goes to CreatePciIoDevice through GatherDeviceInfo. And in this case parent is PCI_IO_DEVICE instance created from CreateRootBridge function, which isn’t valid PCIe device and doesn’t have specific bus, only a range of buses. In that case enumerator tries to use this instance to read operation using default 0 bus number, which isn’t correct.

 

Damian

 

From: Wu, Hao A <hao.a.wu@...>
Sent: Tuesday, August 31, 2021 6:28 AM
To: devel@edk2.groups.io; Wu, Hao A <hao.a.wu@...>; Bassa, Damian <damian.bassa@...>; Ni, Ray <ray.ni@...>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Wu, Hao A
Sent: Tuesday, August 31, 2021 12:25 PM
To: devel@edk2.groups.io; Bassa, Damian <damian.bassa@...>
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

Really sorry,

 

Could you help to provide more information on the below statement?

“undefined parent register accesses”

 

Thanks in advance.

 

Best Regards,

Hao Wu

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Bassa, Damian
Sent: Tuesday, August 24, 2021 11:15 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

 

Before trying to access parent root port to check ARI capabilities,

enumerator should see if Endpoint device is not Root Complex integrated

to avoid undefined parent register accesses in these cases.

 

Signed-off-by: Damian Bassa damian.bassa@...

 

---

.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c         | 12 +++++++++++-

1 file changed, 11 insertions(+), 1 deletion(-)

 

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

index db1b35f8ef..6451fb8af9 100644

--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

@@ -2153,6 +2153,7 @@ CreatePciIoDevice (

   PCI_IO_DEVICE        *PciIoDevice;

   EFI_PCI_IO_PROTOCOL  *PciIo;

   EFI_STATUS           Status;

+  PCI_REG_PCIE_CAPABILITY Capability;

 

   PciIoDevice = AllocateZeroPool (sizeof (PCI_IO_DEVICE));

   if (PciIoDevice == NULL) {

@@ -2229,7 +2230,16 @@ CreatePciIoDevice (

     return NULL;

   }

 

-  if (PcdGetBool (PcdAriSupport)) {

+  PciIo->Pci.Read (

+                PciIo,

+                EfiPciIoWidthUint16,

+                PciIoDevice->PciExpressCapabilityOffset + OFFSET_OF (PCI_CAPABILITY_PCIEXP, Capability),

+                1,

+                &Capability.Uint16

+                );

+

+  if (PcdGetBool (PcdAriSupport) &&

+    Capability.Bits.DevicePortType != PCIE_DEVICE_PORT_TYPE_ROOT_COMPLEX_INTEGRATED_ENDPOINT) {

     //

     // Check if the device is an ARI device.

     //

--

2.27.0.windows.1

 


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This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.

 


Re: [PATCH] OvmfPkg/BhyvePkg: add WorkAreaHeader PCD

Yao, Jiewen
 

Hi
To avoid unnecessary change in DSC/FDF, can we change default size to be 4 in DEC?

gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51

We shall also add comment on 4 == sizeof(CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER) in OvmfPkg/Include/WorkArea.h.


Thank you
Yao Jiewen

-----Original Message-----
From: Corvin Köhne <c.koehne@beckhoff.com>
Sent: Wednesday, September 15, 2021 5:27 PM
To: devel@edk2.groups.io
Cc: ardb+tianocore@kernel.org; Yao, Jiewen <jiewen.yao@intel.com>; Justen,
Jordan L <jordan.l.justen@intel.com>; kraxel@redhat.com; rebecca@bsdio.com;
grehan@freebsd.org; Köhne, Corvin <c.koehne@beckhoff.com>
Subject: [PATCH] OvmfPkg/BhyvePkg: add WorkAreaHeader PCD

SEC phase will throw an assertion in IsSevGuest if
PcdOvmfConfidentialComputingWorkAreaHeader doesn't match the
sizeof CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER.

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
---
OvmfPkg/Bhyve/BhyveDefines.fdf.inc | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
b/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
index 66e0e4d270..9f01ef797c 100644
--- a/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
+++ b/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
@@ -82,4 +82,10 @@ SET
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize =
$(BLOCK_SIZ
SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase =
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase +
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize =
$(VARS_SPARE_SIZE)

+# The OVMF WorkArea contains a fixed size header followed by the actual data.
+# The size of header is accessed through a fixed PCD in the reset vector code.
+# The value need to be kept in sync with the any changes to the Confidential
+# Computing Work Area header defined in the Include/WorkArea.h
+SET
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeade
r = 4
+
DEFINE MEMFD_BASE_ADDRESS = 0x800000
--
2.11.0

Beckhoff Automation GmbH & Co. KG | Managing Director: Dipl. Phys. Hans
Beckhoff Registered office: Verl, Germany | Register court: Guetersloh HRA
7075


回复: [PATCH] [edk2-devel] RecordAssertion function parameter issue.

Gao Jie
 

Reviewed-by: Barton Gao <gaojie@byosoft.com.cn>

Thanks
Barton

-----邮件原件-----
发件人: bounce+27952+68636+5325328+9289841@groups.io
<bounce+27952+68636+5325328+9289841@groups.io> 代表 Chen, ArvinX
发送时间: 2020年12月10日 16:01
收件人: devel@edk2.groups.io
抄送: G Edhaya Chandran <Edhaya.Chandran@arm.com>; Samer El-Haj-Mahmoud
<Samer.El-Haj-Mahmoud@arm.com>; Eric Jin <eric.jin@intel.com>; Heinrich
Schuchardt <xypron.glpk@gmx.de>
主题: [PATCH] [edk2-devel] RecordAssertion function parameter issue.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3082

Correct "RecordAssertion" argument issue to make SCT tool more stable.

Cc: G Edhaya Chandran <Edhaya.Chandran@arm.com>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Cc: Eric Jin <eric.jin@intel.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: ArvinX Chen <arvinx.chen@intel.com>
---
.../ProtocolHandlerBBTestFunction_3.c | 8 +++-----
.../EfiCompliantBBTestPlatform_uefi.c | 2 +-
.../AcpiTableProtocolBBTestFunction.c | 2 +-
.../BlackBoxTest/BlockIo2BBTestFunction.c | 3 ++-
.../BlackBoxTest/ComponentName2BBTestFunction.c | 6 +++---
.../DevicePathFromTextBBTestCoverage.c | 5 +++--
.../DevicePathUtilitiesBBTestConformance.c | 15 ++++++++++-----
.../DriverDiagnostics2BBTestFunction.c | 4 ++--
.../BlackBoxTest/EraseBlockBBTestConformance.c | 8 ++++----
.../BlackBoxTest/GraphicsOutputBBTestFunction.c | 8 +++++---
.../BlackBoxTest/HIIFontBBTestConformance.c | 3 +--
.../BlackBoxTest/HIIImageBBTestConformance.c | 4 ++--
.../BlackBoxTest/HIIStringBBTestConformance.c | 3 +--
.../BlackBoxTest/IPsecConfigBBTestConformance.c | 8 ++++----
.../PciIo/BlackBoxTest/PciIoBBTestFunction_1.c | 5 +++--
.../BlackBoxTest/PxeBaseCodeBBTestFunction.c | 2 +-
.../BlackBoxTest/SimpleFileSystemBBTestFunction.c | 2 +-
.../SimpleFileSystemExBBTestFunction_OpenEx.c | 10 +++++-----
.../BlackBoxTest/SimpleNetworkBBTestConformance.c | 2 +-
.../UFSDeviceConfigBBTestConformance.c | 6 +++---
.../VariableServicesBBTestConformance.c | 6 ++++--
.../BlackBoxTest/BlockIo2BBTestFunction.c | 3 ++-
.../BlackBoxTest/ComponentName2BBTestFunction.c | 6 +++---
.../DriverDiagnostics2BBTestFunction.c | 4 ++--
.../BlackBoxTest/GraphicsOutputBBTestFunction.c | 8 +++++---
.../BlackBoxTest/PxeBaseCodeBBTestFunction.c | 2 +-
.../BlackBoxTest/SimpleFileSystemBBTestFunction.c | 2 +-
.../SimpleFileSystemExBBTestFunction_OpenEx.c | 10 +++++-----
.../BlackBoxTest/SimpleNetworkBBTestConformance.c | 2 +-
29 files changed, 80 insertions(+), 69 deletions(-)

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/BootServices/ProtocolHandlerServices/Bla
ckBoxTest/ProtocolHandlerBBTestFunction_3.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/BootServices/ProtocolHandlerServices/Bla
ckBoxTest/ProtocolHandlerBBTestFunction_3.c
index 8ad31f7f..94288b23 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/BootServices/ProtocolHandlerServices/Bla
ckBoxTest/ProtocolHandlerBBTestFunction_3.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/BootServices/ProtocolHandlerServices/Bla
ckBoxTest/ProtocolHandlerBBTestFunction_3.c
@@ -11672,7 +11672,6 @@
BBTestOpenProtocolInformationInterfaceTestCheckPoint1 (
L"%a:%d:TPL - %d",

__FILE__,

(UINTN)__LINE__,

- EntryCount,

TplArray[Index]

);

//

@@ -11825,7 +11824,6 @@
BBTestOpenProtocolInformationInterfaceTestCheckPoint1 (
L"%a:%d:TPL - %d",

__FILE__,

(UINTN)__LINE__,

- EntryCount,

TplArray[Index]

);

//

@@ -15398,11 +15396,11 @@ BBTestConnectControllerInterfaceTestCheckPoint14 (
EFI_TEST_ASSERTION_FAILED,

gTestGenericFailureGuid,

L"GetPlatformOverrideDriverImages - build environment",

- L"%a:%d:Status - %r, NoHandles - %d",

+ L"%a:%d:Status - %r",

__FILE__,

(UINTN)__LINE__,

Status

- );

+ );

goto Done;

}



@@ -15699,7 +15697,7 @@ BBTestConnectControllerInterfaceTestCheckPoint15 (
EFI_TEST_ASSERTION_FAILED,

gTestGenericFailureGuid,

L"GetPlatformOverrideDriverImages - build environment",

- L"%a:%d:Status - %r, NoHandles - %d",

+ L"%a:%d:Status - %r",

__FILE__,

(UINTN)__LINE__,

Status

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Generic/EfiCompliant/BlackBoxTest/EfiCom
pliantBBTestPlatform_uefi.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Generic/EfiCompliant/BlackBoxTest/EfiCom
pliantBBTestPlatform_uefi.c
index 052f45b7..ffb8d8ea 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Generic/EfiCompliant/BlackBoxTest/EfiCom
pliantBBTestPlatform_uefi.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Generic/EfiCompliant/BlackBoxTest/EfiCom
pliantBBTestPlatform_uefi.c
@@ -1017,7 +1017,7 @@ CheckConsoleProtocols (
AssertionType,

gEfiCompliantBbTestPlatformAssertionGuid001,

L"UEFI Compliant - Console protocols must be implemented",

- L"%a:%d:Text Input - %s, Text Output - %s, Text InputEx",

+ L"%a:%d:Text Input - %s, Text Output - %s, Text InputEx -
%s",

__FILE__,

(UINTN)__LINE__,

ValueA ? L"Yes" : L"No",

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ACPITable/BlackBoxTest/AcpiTabl
eProtocolBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ACPITable/BlackBoxTest/AcpiTabl
eProtocolBBTestFunction.c
index e1f5ccee..51ce391d 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ACPITable/BlackBoxTest/AcpiTabl
eProtocolBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ACPITable/BlackBoxTest/AcpiTabl
eProtocolBBTestFunction.c
@@ -303,7 +303,7 @@ BBTestInstallAcpiTableFunctionTestCheckpoint1 (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



if (EFI_SUCCESS == Status) {

Status = AcpiTable->UninstallAcpiTable (

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
index 8ccbfaf2..551f4671 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
@@ -4686,7 +4686,8 @@ BBTestFushBlocksExFunctionAutoTestCheckpoint1(
__FILE__,

(UINTN)__LINE__,

4,

- EFI_SUCCESS

+ EFI_SUCCESS,

+ BlockIo2TokenBuffer[IndexI].TransactionStatus

);



Status = gtBS->SetTimer (TimerEvent, TimerCancel, 0);

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
index 9d5d9ffc..3b653498 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
@@ -766,10 +766,10 @@ BBTestGetControllerNameFuncTestCheckpoint2 (
AssertionType,

gComponentName2BBTestFunctionAssertionGuid003,

L"Please Use Native RFC3066 which is preferable in
UEFI 2.X\nCOMPONENT_NAME2_PROTOCOL.GetControllerName - GetControllerName()
returns EFI_SUCCESS support language",

- L"%a:%d: Language - %c%c%c, ControllerIndex - %d,
ChildIndex - %d, ControllerName - %s, Status - %r",

- __FILE__,

+ L"%a:%d: Language - %c%c%c%c, ControllerIndex -
%d, ChildIndex - %d, ControllerName - %s, Status - %r",

+ __FILE__,

(UINTN)__LINE__,

- Lang,

+ Lang[0],Lang[1],Lang[2],Lang[3],

Index,

ChildIndex,

(ControllerName == NULL) ? L"(NULL)" :
ControllerName,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathFromText/BlackBoxTest
/DevicePathFromTextBBTestCoverage.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathFromText/BlackBoxTest
/DevicePathFromTextBBTestCoverage.c
index 5058dc4a..9a7b908a 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathFromText/BlackBoxTest
/DevicePathFromTextBBTestCoverage.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathFromText/BlackBoxTest
/DevicePathFromTextBBTestCoverage.c
@@ -2233,7 +2233,8 @@ DevicePathFromTextConvertTextToDeviceNodeCoverageTest
(
L"EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL -
ConvertDeviceNodeToText must correctly recover the converting
ConvertTextToDeviceNode has acted on the device node string",

L"%a:%d, Convert
MemoryMapped(%d,0x123456789ABCDEF,0xFEDCBA9876543210)",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ EfiMaxMemoryType

);



//

@@ -3414,7 +3415,7 @@ DevicePathFromTextConvertTextToDeviceNodeCoverageTest
(
L"%a:%d, Convert SD(0)",

__FILE__,

(UINTN)__LINE__

- );

+ );



//

// Bluetooth(001320F5FA77)

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathUtilities/BlackBoxTes
t/DevicePathUtilitiesBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathUtilities/BlackBoxTes
t/DevicePathUtilitiesBBTestConformance.c
index d8d237a6..32122a78 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathUtilities/BlackBoxTes
t/DevicePathUtilitiesBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DevicePathUtilities/BlackBoxTes
t/DevicePathUtilitiesBBTestConformance.c
@@ -90,7 +90,8 @@ DevicePathUtilitiesCreateDeviceNodeConformanceTest (
L"EFI_DEVICE_PATH_UTILITIES_PROTOCOL - CreatDeviceNode
should not succeed with invalid NodeLength set",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);



return EFI_SUCCESS;

@@ -284,7 +285,8 @@ DevicePathUtilitiesAppendDevicePathConformanceTest (
L"EFI_DEVICE_PATH_UTILITIES_PROTOCOL - SctAppendDevicePath
should ignore Src1 when it is set NULL",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);



//

@@ -326,7 +328,8 @@ DevicePathUtilitiesAppendDevicePathConformanceTest (
L"EFI_DEVICE_PATH_UTILITIES_PROTOCOL - SctAppendDevicePath
should ignore Src2 when it is set NULL",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);



pDevicePath1 = DevicePathUtilities->AppendDevicePath (NULL, NULL);

@@ -417,7 +420,8 @@
DevicePathUtilitiesAppendDevicePathInstanceConformanceTest (
L"EFI_DEVICE_PATH_UTILITIES_PROTOCOL -
AppendDevicePathInstance should not succeed with DevicePathInstance set to
be NULL",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);



return EFI_SUCCESS;

@@ -473,7 +477,8 @@
DevicePathUtilitiesGetNextDevicePathInstanceConformanceTest (
L"EFI_DEVICE_PATH_UTILITIES_PROTOCOL -
GetNextDevicePathInstance should not succeed with DevicePathInstance set to
be NULL",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);



return EFI_SUCCESS;

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
index 94c0d85f..80b24b2c 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
@@ -685,10 +685,10 @@ BBTestRunDiagnosticsFuncTestCheckpoint2 (
AssertionType,

gFunctionAssertionGuid002,

L"Please Use Native RFC3066 which is preferable in
UEFI 2.X\nEFI_DRIVER_DIAGNOSTICS2_PROTOCOL.RunDiagnostics - RunDiagnostics()
returns EFI_SUCCESS with supported language",

- L"%a:%d: Language - %c%c%c, ControllerIndex - %d,
ChildIndex - %d, ControllerName - %s, Status - %r",

+ L"%a:%d: Language - %c%c%c%c, ControllerIndex -
%d, ChildIndex - %d, ControllerName - %s, Status - %r",

__FILE__,

(UINTN)__LINE__,

- Lang,

+ Lang[0],Lang[1],Lang[2],Lang[3],

Index,

ChildIndex,

(ControllerName == NULL) ? L"(NULL)" :
ControllerName,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/EraseBlock/BlackBoxTest/EraseBl
ockBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/EraseBlock/BlackBoxTest/EraseBl
ockBBTestConformance.c
index a6156b98..c49db682 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/EraseBlock/BlackBoxTest/EraseBl
ockBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/EraseBlock/BlackBoxTest/EraseBl
ockBBTestConformance.c
@@ -193,7 +193,7 @@ BBTestEraseBlocksConformanceTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



} else {

Status = EraseBlock->EraseBlocks(EraseBlock, MediaId + 1, 0, &Token,
EraseSize);

@@ -211,7 +211,7 @@ BBTestEraseBlocksConformanceTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = EraseBlock->EraseBlocks(EraseBlock, MediaId + 1, LastBlock +
1, &Token, EraseSize);

if (Status == EFI_MEDIA_CHANGED)

@@ -228,7 +228,7 @@ BBTestEraseBlocksConformanceTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = EraseBlock->EraseBlocks(EraseBlock, MediaId + 1, LastBlock -
10, &Token, EraseSize + 1);

if (Status == EFI_MEDIA_CHANGED)

@@ -245,7 +245,7 @@ BBTestEraseBlocksConformanceTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = EraseBlock->EraseBlocks(EraseBlock, MediaId, LastBlock + 1,
&Token, EraseSize);

if (Status == EFI_INVALID_PARAMETER)

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
index f1936755..edde3117 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
@@ -172,7 +172,7 @@ Returns:
AssertionType,


gEfiGraphicsOutputQueryModeBBTestFunctionAssertionGuid,

L"EFI_GRAPHICS_OUTPUT_PROTOCOL.QueryMode - SetMode()
then QueryMode(), compare Info structure",

- L"%a:%d: Status",

+ L"%a:%d: Status - %r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

Status

@@ -753,7 +753,8 @@ Returns:
L"%a:%d:Status:%r, Expected:%r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

- (UINTN) Status

+ (UINTN) Status,

+ EFI_SUCCESS

);

return Status;

}

@@ -1474,7 +1475,8 @@ Returns:
L"%a:%d:Status:%r, Expected:%r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

- (UINTN) Status

+ (UINTN) Status,

+ EFI_SUCCESS

);

continue;

}

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIFont/BlackBoxTest/HIIFontBBT
estConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIFont/BlackBoxTest/HIIFontBBT
estConformance.c
index 911c4a5c..e437f002 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIFont/BlackBoxTest/HIIFontBBT
estConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIFont/BlackBoxTest/HIIFontBBT
estConformance.c
@@ -602,8 +602,7 @@ BBTestStringIdToImageConformanceTestCheckpoint1 (
__FILE__,

(UINTN)__LINE__,

Status

- );

-

+ );

//

// Call StringIdToImage with StringId not in PackageList, EFI_NOT_FOUND
should be returned.

//

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIImage/BlackBoxTest/HIIImageB
BTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIImage/BlackBoxTest/HIIImageB
BTestConformance.c
index 20b24bc5..7b738c69 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIImage/BlackBoxTest/HIIImageB
BTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIImage/BlackBoxTest/HIIImageB
BTestConformance.c
@@ -2333,7 +2333,7 @@ BBTestDrawImageIdConformanceTestCheckpoint1(
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Call DrawImageId with PackageList been NULL

@@ -2362,7 +2362,7 @@ BBTestDrawImageIdConformanceTestCheckpoint1(
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Call DrawImageId with invalid ImageId

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIString/BlackBoxTest/HIIStrin
gBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIString/BlackBoxTest/HIIStrin
gBBTestConformance.c
index ca9ed0b7..07ff28e1 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIString/BlackBoxTest/HIIStrin
gBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/HIIString/BlackBoxTest/HIIStrin
gBBTestConformance.c
@@ -607,8 +607,7 @@ BBTestGetStringConformanceTestCheckpoint1 (
__FILE__,

(UINTN)__LINE__,

Status

- );

-

+ );

//

// Remove the PackageList from the HII database

//

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/IPsecConfig/BlackBoxTest/IPsecC
onfigBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/IPsecConfig/BlackBoxTest/IPsecC
onfigBBTestConformance.c
index cac04b66..da910ff2 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/IPsecConfig/BlackBoxTest/IPsecC
onfigBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/IPsecConfig/BlackBoxTest/IPsecC
onfigBBTestConformance.c
@@ -693,7 +693,7 @@ BBTestGetDataConformanceTestCheckpoint3 (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Clean Environment: Call IPsec->SetData with the same
DataType(0)/Selector.

@@ -902,7 +902,7 @@ BBTestGetDataConformanceTestCheckpoint4 (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Clean Environment: Call IPsec->SetData with the same
DataType(1)/Selector.

@@ -1066,7 +1066,7 @@ BBTestGetDataConformanceTestCheckpoint4 (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Clean Environment: Call IPsec->SetData with the same
DataType(1)/Selector.

@@ -1244,7 +1244,7 @@ BBTestGetDataConformanceTestCheckpoint5 (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



//

// Clean Environment: Call IPsec->SetData with the same
DataType(2)/Selector.

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PciIo/BlackBoxTest/PciIoBBTestF
unction_1.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PciIo/BlackBoxTest/PciIoBBTestF
unction_1.c
index d65ece24..457a9108 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PciIo/BlackBoxTest/PciIoBBTestF
unction_1.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PciIo/BlackBoxTest/PciIoBBTestF
unction_1.c
@@ -4480,7 +4480,7 @@ IoWrite_Func (
//

//then read out the data in destination address range.

//

- PciIo->Io.Read (

+ Status = PciIo->Io.Read (

PciIo,

PciIoWidth,

BarIndex,

@@ -4508,7 +4508,8 @@ IoWrite_Func (
L"EFI_PCI_IO_PROTOCOL.Io.Write - the data read must
equal with the data written",

L"%a:%d:Status - %r",

__FILE__,

- (UINTN)__LINE__

+ (UINTN)__LINE__,

+ Status

);

//

//write the data using EfiPciIoWidthFifoUintX.

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
index c1ea0d49..1f2f5305 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
@@ -1252,7 +1252,7 @@ BBTestNewStopFunctionTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );

}



//

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
index ed0d8743..f269b7be 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
@@ -1608,7 +1608,7 @@ BBTestReadOnlyTestCheckPoints (
AssertionType,

gReadOnlyFileSystemBBTestAssertionGuid005,

L"ReadOnly System: Dir SetInfo should return
EFI_WRITE_PROTECTED",

- L"%a:%d: Status - %r",

+ L"%a:%d: Status1 - %r Status2 - %r",

__FILE__,

(UINTN)__LINE__,

Status1,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
index ab791f34..526ad906 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
@@ -1155,7 +1155,7 @@ BBTestOpenExBasicTestCheckpoint1_Test1_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid027,

L"OpenEx() Basic Test - checkpoint1
----Test1----Async",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d, Status - %r, File
Name - %s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -2152,7 +2152,7 @@ BBTestOpenExBasicTestCheckpoint1_Test3_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid039,

L"OpenEx() Basic Test - checkpoint1 ---Async",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -2656,7 +2656,7 @@ BBTestOpenExBasicTestCheckpoint1_Test4_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid043,

L"OpenEx() Basic Test - checkpoint1 ---Async --
Test4----Open File",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -3302,7 +3302,7 @@ BBTestOpenExBasicTestCheckpoint1_Test5_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid047,

L"OpenEx() Basic Test - checkpoint1 ---Async --
Test5---Open File",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -10216,7 +10216,7 @@ BBTestOpenExBasicTestCheckpoint2_Test5_Sync (
FileIoEntity->StatusAsync,

FileIoEntity->OpenMode,

FileIoEntity->Name

- );

+ );

if (FileIoEntity->OpenMode == EFI_FILE_MODE_READ){

DirHandle2->Open (

DirHandle2,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
index 09b47ee6..1b4a0d34 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
@@ -1945,7 +1945,7 @@ BBTestTransmitConformanceTest (
__FILE__,

(UINTN)__LINE__,

StatusBuf[1]

- );

+ );



StandardLib->RecordAssertion (

StandardLib,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/UFSDeviceConfig/BlackBoxTest/UF
SDeviceConfigBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/UFSDeviceConfig/BlackBoxTest/UF
SDeviceConfigBBTestConformance.c
index 4c8f7c58..b50fc63b 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/UFSDeviceConfig/BlackBoxTest/UF
SDeviceConfigBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/UFSDeviceConfig/BlackBoxTest/UF
SDeviceConfigBBTestConformance.c
@@ -81,7 +81,7 @@ BBTestRwUfsDescriptorConfTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = UFSDeviceConfig->RwUfsDescriptor(UFSDeviceConfig, TRUE, 0, 0, 0,
&Descriptor, NULL);

if (Status == EFI_INVALID_PARAMETER)

@@ -159,7 +159,7 @@ BBTestRwUfsFlagConfTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = UFSDeviceConfig->RwUfsFlag(UFSDeviceConfig, TRUE, 1, NULL);

if (Status == EFI_INVALID_PARAMETER)

@@ -237,7 +237,7 @@ BBTestRwUfsAttributeConfTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );



Status = UFSDeviceConfig->RwUfsAttribute(UFSDeviceConfig, TRUE, 0, 0, 0,
&Attribute, NULL);

if (Status == EFI_INVALID_PARAMETER)

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/RuntimeServices/VariableServices/BlackBo
xTest/VariableServicesBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/RuntimeServices/VariableServices/BlackBo
xTest/VariableServicesBBTestConformance.c
index e2182c5c..fb966a87 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/EFI/RuntimeServices/VariableServices/BlackBo
xTest/VariableServicesBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/EFI/RuntimeServices/VariableServices/BlackBo
xTest/VariableServicesBBTestConformance.c
@@ -3653,8 +3653,10 @@ HardwareErrorRecordConfTest (
L"RT.SetVariable - Retrive the Hardware Error Record
variables, check the name of them",

L"%a:%d:Status - %r, Expected - %r",

__FILE__,

- (UINTN)__LINE__

- );

+ (UINTN)__LINE__,

+ Status,

+ EFI_SUCCESS

+ );





if (AssertionType == EFI_TEST_ASSERTION_FAILED)

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
index 634246fc..21cf40f9 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/BlockIo2/BlackBoxTest/BlockIo2B
BTestFunction.c
@@ -4688,7 +4688,8 @@ BBTestFushBlocksExFunctionAutoTestCheckpoint1(
__FILE__,

(UINTN)__LINE__,

4,

- EFI_SUCCESS

+ EFI_SUCCESS,

+ BlockIo2TokenBuffer[IndexI].TransactionStatus

);



Status = gtBS->SetTimer (TimerEvent, TimerCancel, 0);

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
index 7b0cc6fc..000ad8f2 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/ComponentName2/BlackBoxTest/Com
ponentName2BBTestFunction.c
@@ -718,10 +718,10 @@ BBTestGetControllerNameFuncTestCheckpoint2 (
AssertionType,

gComponentName2BBTestFunctionAssertionGuid003,

L"Please Use Native RFC3066 which is preferable in
UEFI 2.X\nCOMPONENT_NAME2_PROTOCOL.GetControllerName - GetControllerName()
returns EFI_SUCCESS support language",

- L"%a:%d: Language - %c%c%c, ControllerIndex - %d,
ChildIndex - %d, ControllerName - %s, Status - %r",

- __FILE__,

+ L"%a:%d: Language - %c%c%c%c, ControllerIndex -
%d, ChildIndex - %d, ControllerName - %s, Status - %r",

+ __FILE__,

(UINTN)__LINE__,

- Lang,

+ Lang[0],Lang[1],Lang[2],Lang[3],

Index,

ChildIndex,

(ControllerName == NULL) ? L"(NULL)" :
ControllerName,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
index 4b4988ec..3d1c6ffe 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/DriverDiagnostics2/BlackBoxTest
/DriverDiagnostics2BBTestFunction.c
@@ -660,10 +660,10 @@ BBTestRunDiagnosticsFuncTestCheckpoint2 (
AssertionType,

gFunctionAssertionGuid002,

L"Please Use Native RFC3066 which is preferable in
UEFI 2.X\nEFI_DRIVER_DIAGNOSTICS2_PROTOCOL.RunDiagnostics - RunDiagnostics()
returns EFI_SUCCESS with supported language",

- L"%a:%d: Language - %c%c%c, ControllerIndex - %d,
ChildIndex - %d, ControllerName - %s, Status - %r",

+ L"%a:%d: Language - %c%c%c%c, ControllerIndex -
%d, ChildIndex - %d, ControllerName - %s, Status - %r",

__FILE__,

(UINTN)__LINE__,

- Lang,

+ Lang[0],Lang[1],Lang[2],Lang[3],

Index,

ChildIndex,

(ControllerName == NULL) ? L"(NULL)" :
ControllerName,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
index d182ea69..9c3d2bad 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/GraphicsOutput/BlackBoxTest/Gra
phicsOutputBBTestFunction.c
@@ -171,7 +171,7 @@ Returns:
AssertionType,


gEfiGraphicsOutputQueryModeBBTestFunctionAssertionGuid,

L"EFI_GRAPHICS_OUTPUT_PROTOCOL.QueryMode - SetMode()
then QueryMode(), compare Info structure",

- L"%a:%d: Status",

+ L"%a:%d: Status - %r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

Status

@@ -752,7 +752,8 @@ Returns:
L"%a:%d:Status:%r, Expected:%r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

- (UINTN) Status

+ (UINTN) Status,

+ EFI_SUCCESS

);

return Status;

}

@@ -1473,7 +1474,8 @@ Returns:
L"%a:%d:Status:%r, Expected:%r",

(UINTN) __FILE__,

(UINTN) (UINTN)__LINE__,

- (UINTN) Status

+ (UINTN) Status,

+ EFI_SUCCESS

);

continue;

}

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
index 27994144..51ac332c 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/PxeBaseCode/BlackBoxTest/PxeBas
eCodeBBTestFunction.c
@@ -1252,7 +1252,7 @@ BBTestNewStopFunctionTest (
__FILE__,

(UINTN)__LINE__,

Status

- );

+ );

}



//

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
index ed0d8743..21629c76 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemBBTestFunction.c
@@ -1608,7 +1608,7 @@ BBTestReadOnlyTestCheckPoints (
AssertionType,

gReadOnlyFileSystemBBTestAssertionGuid005,

L"ReadOnly System: Dir SetInfo should return
EFI_WRITE_PROTECTED",

- L"%a:%d: Status - %r",

+ L"%a:%d: Status1 - %r, Status2 - %r",

__FILE__,

(UINTN)__LINE__,

Status1,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
index 9dd1c845..aaa34ef9 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleFileSystem/BlackBoxTest/S
impleFileSystemExBBTestFunction_OpenEx.c
@@ -1155,7 +1155,7 @@ BBTestOpenExBasicTestCheckpoint1_Test1_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid027,

L"OpenEx() Basic Test - checkpoint1
----Test1----Async",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d, Status - %r, File
Name - %",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -2152,7 +2152,7 @@ BBTestOpenExBasicTestCheckpoint1_Test3_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid039,

L"OpenEx() Basic Test - checkpoint1 ---Async",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -2656,7 +2656,7 @@ BBTestOpenExBasicTestCheckpoint1_Test4_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid043,

L"OpenEx() Basic Test - checkpoint1 ---Async --
Test4----Open File",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -3302,7 +3302,7 @@ BBTestOpenExBasicTestCheckpoint1_Test5_Async (
EFI_TEST_ASSERTION_FAILED,

gSimpleFileSystemExBBTestFunctionAssertionGuid047,

L"OpenEx() Basic Test - checkpoint1 ---Async --
Test5---Open File",

- L"%a:%d: Tpl - %d, Status - %r, FileName - %s",
+ L"%a:%d: FileIoEntity->Tpl - %d,Status - %r,FileName -
%s",

__FILE__,

(UINTN)__LINE__,

FileIoEntity->Tpl,

@@ -10216,7 +10216,7 @@ BBTestOpenExBasicTestCheckpoint2_Test5_Sync (
FileIoEntity->StatusAsync,

FileIoEntity->OpenMode,

FileIoEntity->Name

- );

+ );

if (FileIoEntity->OpenMode == EFI_FILE_MODE_READ){

DirHandle2->Open (

DirHandle2,

diff --git
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
index 682076ea..175fe11e 100644
---
a/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
+++
b/uefi-sct/SctPkg/TestCase/UEFI/IHV/Protocol/SimpleNetwork/BlackBoxTest/Simp
leNetworkBBTestConformance.c
@@ -1945,7 +1945,7 @@ BBTestTransmitConformanceTest (
__FILE__,

(UINTN)__LINE__,

StatusBuf[1]

- );

+ );



StandardLib->RecordAssertion (

StandardLib,

--
2.26.2.windows.1



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Re: [PATCH] UefiPayloadPkg: Fix the warning when building UefiPayloadPkg with IA32+X64

Ni, Ray
 

Reviewed-by: Ray Ni <ray.ni@intel.com>

-----Original Message-----
From: Tan, Dun <dun.tan@intel.com>
Sent: Wednesday, September 15, 2021 4:55 PM
To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@intel.com>; Ma, Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: RE: [PATCH] UefiPayloadPkg: Fix the warning when building UefiPayloadPkg with IA32+X64

Hi Ray,

There are only "UniversalPayloadEntry.inf" and "UefiPayloadEntry.inf" under [Components.IA32] in UefiPayloadPkg.dsc. The [Packages] sections in these two .inf file only contain MdePkg, MdeModulePkg, UefiCpuPkg and UefiPayloadPkg. So the PCDs in .dec files of these four pkgs used in UefiPayloadPkg.dsc will not be treated as unspecified PCDs when building with IA32. In order to avoid warnings when building under IA32, the PCDs in the dec files other than these four pkgs needs to be placed in the PCD section with the 'X64' suffix in UefiPayloadPkg.dsc.

The ' gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport' is in 'MdeModulePkg.dec '. So it won't be regarded as an unspecified PCD.

Thanks,
Dun
-----Original Message-----
From: Ni, Ray <ray.ni@intel.com>
Sent: Tuesday, September 14, 2021 3:54 PM
To: Tan, Dun <dun.tan@intel.com>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@intel.com>; Ma, Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: RE: [PATCH] UefiPayloadPkg: Fix the warning when building UefiPayloadPkg with IA32+X64

Dun,
I am curious, why ' gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport' doesn't cause build warning?
It is referenced by "MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf" under "[Components.X64]".

Thanks,
Ray

-----Original Message-----
From: Tan, Dun <dun.tan@intel.com>
Sent: Tuesday, September 14, 2021 3:39 PM
To: devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Ma,
Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [PATCH] UefiPayloadPkg: Fix the warning when building
UefiPayloadPkg with IA32+X64

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3603

Move the unspecified PCDs from .common section. to .X64 section in .dsc file.
The corresponding PCDs are not used in IA32.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>

Signed-off-by: Dun Tan <dun.tan@intel.com>
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 9912f2a20f..9d7f311343 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -327,6 +327,11 @@
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
!endif

+[PcdsPatchableInModule.X64]
+
+gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTE
+R)
+
+gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGIS
+TER)
+ gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
+
[PcdsPatchableInModule.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa,
0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7
@@ -337,8 +342,6 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
!endif

gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|$(MAX_SIZE
_NON_POPULATE_CAPSULE)
-
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTER
)
- gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGISTER)
#
# The following parameters are set by Library/PlatformHookLib
#
@@ -361,7 +364,6 @@

gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS)
gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0
- gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE


######################################################################
##########
#
--
2.31.1.windows.1


[PATCH] OvmfPkg/BhyvePkg: add WorkAreaHeader PCD

Corvin Köhne
 

SEC phase will throw an assertion in IsSevGuest if
PcdOvmfConfidentialComputingWorkAreaHeader doesn't match the
sizeof CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER.

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
---
OvmfPkg/Bhyve/BhyveDefines.fdf.inc | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/OvmfPkg/Bhyve/BhyveDefines.fdf.inc b/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
index 66e0e4d270..9f01ef797c 100644
--- a/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
+++ b/OvmfPkg/Bhyve/BhyveDefines.fdf.inc
@@ -82,4 +82,10 @@ SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = $(BLOCK_SIZ
SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase = gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = $(VARS_SPARE_SIZE)

+# The OVMF WorkArea contains a fixed size header followed by the actual data.
+# The size of header is accessed through a fixed PCD in the reset vector code.
+# The value need to be kept in sync with the any changes to the Confidential
+# Computing Work Area header defined in the Include/WorkArea.h
+SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader = 4
+
DEFINE MEMFD_BASE_ADDRESS = 0x800000
--
2.11.0

Beckhoff Automation GmbH & Co. KG | Managing Director: Dipl. Phys. Hans Beckhoff Registered office: Verl, Germany | Register court: Guetersloh HRA 7075


Re: [PATCH] UefiPayloadPkg: Fix the warning when building UefiPayloadPkg with IA32+X64

duntan
 

Hi Ray,

There are only "UniversalPayloadEntry.inf" and "UefiPayloadEntry.inf" under [Components.IA32] in UefiPayloadPkg.dsc. The [Packages] sections in these two .inf file only contain MdePkg, MdeModulePkg, UefiCpuPkg and UefiPayloadPkg. So the PCDs in .dec files of these four pkgs used in UefiPayloadPkg.dsc will not be treated as unspecified PCDs when building with IA32. In order to avoid warnings when building under IA32, the PCDs in the dec files other than these four pkgs needs to be placed in the PCD section with the 'X64' suffix in UefiPayloadPkg.dsc.

The ' gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport' is in 'MdeModulePkg.dec '. So it won't be regarded as an unspecified PCD.

Thanks,
Dun

-----Original Message-----
From: Ni, Ray <ray.ni@intel.com>
Sent: Tuesday, September 14, 2021 3:54 PM
To: Tan, Dun <dun.tan@intel.com>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@intel.com>; Ma, Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: RE: [PATCH] UefiPayloadPkg: Fix the warning when building UefiPayloadPkg with IA32+X64

Dun,
I am curious, why ' gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport' doesn't cause build warning?
It is referenced by "MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf" under "[Components.X64]".

Thanks,
Ray

-----Original Message-----
From: Tan, Dun <dun.tan@intel.com>
Sent: Tuesday, September 14, 2021 3:39 PM
To: devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Ma,
Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [PATCH] UefiPayloadPkg: Fix the warning when building
UefiPayloadPkg with IA32+X64

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3603

Move the unspecified PCDs from .common section. to .X64 section in .dsc file.
The corresponding PCDs are not used in IA32.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>

Signed-off-by: Dun Tan <dun.tan@intel.com>
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 9912f2a20f..9d7f311343 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -327,6 +327,11 @@
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
!endif

+[PcdsPatchableInModule.X64]
+
+gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTE
+R)
+
+gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGIS
+TER)
+ gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
+
[PcdsPatchableInModule.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa,
0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7
@@ -337,8 +342,6 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
!endif

gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|$(MAX_SIZE
_NON_POPULATE_CAPSULE)
-
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTER
)
- gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGISTER)
#
# The following parameters are set by Library/PlatformHookLib
#
@@ -361,7 +364,6 @@

gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS)
gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0
- gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE


######################################################################
##########
#
--
2.31.1.windows.1


[PATCH v6] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ashraf Ali S
 

[edk2-devel] [PATCH V5]
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Sahil Dureja <sahil.dureja@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
---
.../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Bin/X64/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M}/ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../{ => X64/PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../PageTable2M}/ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
UefiCpuPkg/ResetVector/Vtf0/Build.py | 101 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/1GPageTables.asm | 53 +++++++++
.../X64/{PageTables.asm => 2MPageTables.asm} | 14 +--
20 files changed, 185 insertions(+), 48 deletions(-)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.serial.raw (56%)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables.asm => 2MPageTables.asm} (74%)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..79b23c047bdc6e552d77d5c9e9aeae21ff04d91d
GIT binary patch
literal 484
zcmYk2!Alfz6vy8<IayG%i0DGXitWJ;8|{W-Y{r%pUBW$t3`U5Tfv)5HV2<-+SmEc&
z_=8U3ztCYiIbg8Am<;oh;GvDB*b)cVcTo_jh@F0e1bz?i@%TPI-^b&e^P(s~24D&R
z66-E?GS0!u3PI`&Of3)3ke}4au8p$=@|8NnwWzR1c0DH#WQRqnF+w7|76h>yHl)}V
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z*fqmG@SDEy+y0@yiw}4XxLlI&<|#6jJQ3ja=kvb)zpp~$Q5CN?9#*l}WFN2xf1}qi
ex=GS`BMWOMaSFL0+&dpq=Irw)z&XCVVDo<yIpul)

literal 0
HcmV?d00001

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
new file mode 100644
index 0000000000000000000000000000000000000000..ce7faa502b858e99908bcdb397b776258205e1d5
GIT binary patch
literal 468
zcmYk2ze^)g5XWb;8h;dS5Fr7Dh^EjYViZM*LR8di#1tYyISz|ku3q=S79u{D6wk=I
zU?u(=f(r_HvMOqGf`yTwL`89(=88k^4$0mNLGfG6cVLFkcNp8Y?F5fQ2w)Tde661v
zA>(mlgCI3pM%UYB$vrh9+XHNgTvMYh>&7q1g=xfqoHJL>v=bK_oV*Y_#xgthrX_$x
zk=?RqHTShwDriZRQ`%sb>wPA#)8er|>zVMY+pfRlzO>Lg-}j;6Ouvy1^?-J@W;Dwr
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literal 0
HcmV?d00001

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..6503a988abdac06f9aa88f0a65f2525e12233b0a
GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
deleted file mode 100644
index 2c6ff655ded2a5855ca8f4428d559a7727eb6983..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
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GIT binary patch
literal 0
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
deleted file mode 100644
index 6dfa68eabb48a44bc50a0b7fe678f80b5cdadfd5..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..47ac07798b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|IA32/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|X64/PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..75705cd344
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|IA32/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|X64/PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..279ba03b0c01f552a0d3ed8900e06b91f2555901
GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
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index 0000000000000000000000000000000000000000..9b09a80f225736a413b7146b0e7bd4aafc73abe1
GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..d9b051ff06d1d30b0dfd585e05e75c98ebd88b03
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
index 6c0bcc47ebff84830b59047790c70d96e9488296..0e53a574fab74db6973d7ea41a6a495266a4d0ae 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..3f1d5cd2c8 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#

-import glob
import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+ALL_RAW_FORMAT = '*' + FILE_FORMAT
+IA32 = 'IA32'
+X64 = 'X64'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
- #print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+# Check for all raw binaries and delete them
+for root, dirs, files in os.walk('Bin'):
+ for file in files:
+ if file.endswith(FILE_FORMAT):
+ os.remove(os.path.join(root, file))

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ if arch.lower() == X64.lower():
+ directory = os.path.join('Bin', X64, pageTable)
+ else:
+ directory = os.path.join('Bin', IA32)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.makedirs(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..2cdaa14507 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/1GPageTables.asm"
+ %else
+ %include "X64/2MPageTables.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
--
2.30.2.windows.1


[PATCH v5] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ashraf Ali S
 

[edk2-devel] [PATCH V5]
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Sahil Dureja <sahil.dureja@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
---
.../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Bin/X64/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M}/ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../{ => X64/PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../PageTable2M}/ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
UefiCpuPkg/ResetVector/Vtf0/Build.py | 101 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/1GPageTables.asm | 53 +++++++++
.../X64/{PageTables.asm => 2MPageTables.asm} | 14 +--
20 files changed, 185 insertions(+), 48 deletions(-)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.serial.raw (56%)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables.asm => 2MPageTables.asm} (74%)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..79b23c047bdc6e552d77d5c9e9aeae21ff04d91d
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
new file mode 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..6503a988abdac06f9aa88f0a65f2525e12233b0a
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
deleted file mode 100644
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GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..47ac07798b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|IA32/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|X64/PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..75705cd344
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|IA32/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|X64/PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
similarity index 56%
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
index 61c71349a8a599916f3eeae8c5dee92efb56db71..f1d6536cec924d0e167cf1ee4e9309ed5fd7ad60 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..197680addf 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#

-import glob
import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+ALL_RAW_FORMAT = '*' + FILE_FORMAT
+IA32 = 'IA32'
+X64 = 'X64'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
- #print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+# Check for all raw binaries and delete them
+for root, dirs, files in os.walk('Bin'):
+ for file in files:
+ if file.endswith(FILE_FORMAT):
+ os.remove(os.path.join(root, file))

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ if arch.lower() == X64.lower():
+ directory = os.path.join('Bin', X64, pageTable)
+ else:
+ directory = os.path.join('Bin', IA32)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.makedirs(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'c:\\nasm\\nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..2cdaa14507 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/1GPageTables.asm"
+ %else
+ %include "X64/2MPageTables.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
--
2.30.2.windows.1


Re: [PATCH 1/2] MdePkg: Introduce TdProtocol for TD-Guest firmware

Min Xu
 

Hi, Liming
TD Protocol is defined in below spec (Section 4.3.2)
https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf

This patch-set is the detailed implementation of TD Protocol. The spec is being updated. Because there are other updates besides the TD Protocol, it need more time to complete the updating.

Thanks for your understanding.

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of gaoliming
Sent: Wednesday, September 15, 2021 1:50 PM
To: devel@edk2.groups.io; Xu, Min M <min.m.xu@intel.com>
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liu, Zhiguang
<zhiguang.liu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Wang, Jian J
<jian.j.wang@intel.com>; Lu, Ken <ken.lu@intel.com>
Subject: 回复: [edk2-devel] [PATCH 1/2] MdePkg: Introduce TdProtocol for TD-
Guest firmware

Min:
Which public spec defines this new protocol?

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Min Xu
发送时间: 2021年9月14日 9:57
收件人: devel@edk2.groups.io
抄送: Min Xu <min.m.xu@intel.com>; Michael D Kinney
<michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Zhiguang Liu <zhiguang.liu@intel.com>; Jiewen Yao
<jiewen.yao@intel.com>; Jian J Wang <jian.j.wang@intel.com>; Ken Lu
<ken.lu@intel.com>
主题: [edk2-devel] [PATCH 1/2] MdePkg: Introduce TdProtocol for TD-Guest
firmware

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3625

If TD-Guest firmware supports measurement and an event is created,
TD-Guest firmware is designed to report the event log with the same
data structure in TCG-Platform-Firmware-Profile specification with
EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 format.

The TD-Guest firmware supports measurement, the TD Guest Firmware is
designed to produce EFI_TD_PROTOCOL with new GUID
EFI_TD_PROTOCOL_GUID
to report event log and provides hash capability.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ken Lu <ken.lu@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
---
MdePkg/Include/Protocol/TdProtocol.h | 305
+++++++++++++++++++++++++++
MdePkg/MdePkg.dec | 3 +
2 files changed, 308 insertions(+)
create mode 100644 MdePkg/Include/Protocol/TdProtocol.h

diff --git a/MdePkg/Include/Protocol/TdProtocol.h
b/MdePkg/Include/Protocol/TdProtocol.h
new file mode 100644
index 000000000000..5a015fca0079
--- /dev/null
+++ b/MdePkg/Include/Protocol/TdProtocol.h
@@ -0,0 +1,305 @@
+/** @file
+ If TD-Guest firmware supports measurement and an event is created,
TD-Guest
+ firmware is designed to report the event log with the same data
structure
+ in TCG-Platform-Firmware-Profile specification with
+ EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 format.
+
+ The TD-Guest firmware supports measurement, the TD Guest Firmware
+ is
designed
+ to produce EFI_TD_PROTOCOL with new GUID EFI_TD_PROTOCOL_GUID
to report
+ event log and provides hash capability.
+
+Copyright (c) 2020 - 2021, Intel Corporation. All rights
+reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef TD_PROTOCOL_H_
+#define TD_PROTOCOL_H_
+
+#include <Uefi/UefiBaseType.h>
+#include <IndustryStandard/UefiTcgPlatform.h>
+#include <IndustryStandard/Tpm20.h>
+
+
+#define EFI_TD_PROTOCOL_GUID \
+ { 0x96751a3d, 0x72f4, 0x41a6, { 0xa7, 0x94, 0xed, 0x5d, 0x0e, 0x67,
0xae,
0x6b }}
+extern EFI_GUID gEfiTdProtocolGuid;
+
+typedef struct _EFI_TD_PROTOCOL EFI_TD_PROTOCOL;
+
+typedef struct {
+ UINT8 Major;
+ UINT8 Minor;
+} EFI_TD_VERSION;
+
+typedef UINT32 EFI_TD_EVENT_LOG_BITMAP;
+typedef UINT32 EFI_TD_EVENT_LOG_FORMAT;
+typedef UINT32
EFI_TD_EVENT_ALGORITHM_BITMAP;
+typedef UINT32 EFI_TD_MR_INDEX;
+
+#define EFI_TD_EVENT_LOG_FORMAT_TCG_2 0x00000002
+#define EFI_TD_BOOT_HASH_ALG_SHA384 0x00000004
+
+//
+// This bit is shall be set when an event shall be extended but not
logged.
+//
+#define EFI_TD_FLAG_EXTEND_ONLY 0x0000000000000001
+//
+// This bit shall be set when the intent is to measure a PE/COFF image.
+//
+#define EFI_TD_FLAG_PE_COFF_IMAGE 0x0000000000000010
+
+#define MR_INDEX_MRTD 0
+#define MR_INDEX_RTMR0 1
+#define MR_INDEX_RTMR1 2
+#define MR_INDEX_RTMR2 3
+#define MR_INDEX_RTMR3 4
+
+//
+// This bit shall be set when the intent is to measure a PE/COFF image.
+//
+#define PE_COFF_IMAGE 0x0000000000000010
+
+#pragma pack (1)
+
+#define EFI_TD_EVENT_HEADER_VERSION 1
+
+typedef struct {
+ //
+ // Size of the event header itself (sizeof(EFI_TD_EVENT_HEADER)).
+ //
+ UINT32 HeaderSize;
+ //
+ // Header version. For this version of this specification, the
+value
shall be
1.
+ //
+ UINT16 HeaderVersion;
+ //
+ // Index of the MR that shall be extended.
+ //
+ EFI_TD_MR_INDEX MrIndex;
+ //
+ // Type of the event that shall be extended (and optionally logged).
+ //
+ UINT32 EventType;
+} EFI_TD_EVENT_HEADER;
+
+typedef struct {
+ //
+ // Total size of the event including the Size component, the header
+and
the
Event data.
+ //
+ UINT32 Size;
+ EFI_TD_EVENT_HEADER Header;
+ UINT8 Event[1];
+} EFI_TD_EVENT;
+
+#pragma pack()
+
+
+typedef struct {
+ //
+ // Allocated size of the structure
+ //
+ UINT8 Size;
+ //
+ // Version of the EFI_TD_BOOT_SERVICE_CAPABILITY structure itself.
+ // For this version of the protocol, the Major version shall be set
+to
1
+ // and the Minor version shall be set to 1.
+ //
+ EFI_TD_VERSION StructureVersion;
+ //
+ // Version of the EFI TD protocol.
+ // For this version of the protocol, the Major version shall be set
+ to
1
+ // and the Minor version shall be set to 1.
+ //
+ EFI_TD_VERSION ProtocolVersion;
+ //
+ // Supported hash algorithms
+ //
+ EFI_TD_EVENT_ALGORITHM_BITMAP HashAlgorithmBitmap;
+ //
+ // Bitmap of supported event log formats //
+ EFI_TD_EVENT_LOG_BITMAP SupportedEventLogs;
+
+ //
+ // False = TD not present
+ //
+ BOOLEAN TdPresentFlag;
+} EFI_TD_BOOT_SERVICE_CAPABILITY;
+
+/**
+ The EFI_TD_PROTOCOL GetCapability function call provides protocol
+ capability information and state information.
+
+ @param[in] This Indicates the calling context
+ @param[in, out] ProtocolCapability The caller allocates memory for
+ a
EFI_TD_BOOT_SERVICE_CAPABILITY
+ structure and sets the size
field to the size of the structure allocated.
+ The callee fills in the fields
with the EFI protocol capability information
+ and the current EFI TD state
information up to the number of fields which
+ fit within the size of the
structure passed in.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+ The ProtocolCapability variable will
not be populated.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect.
+ The ProtocolCapability variable will
not be populated.
+ @retval EFI_BUFFER_TOO_SMALL The ProtocolCapability variable is
too small to hold the full response.
+ It will be partially populated
(required Size field will be set).
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TD_GET_CAPABILITY) (
+ IN EFI_TD_PROTOCOL *This,
+ IN OUT EFI_TD_BOOT_SERVICE_CAPABILITY *ProtocolCapability
+ );
+
+/**
+ The EFI_TD_PROTOCOL Get Event Log function call allows a caller to
+ retrieve the address of a given event log and its last entry.
+
+ @param[in] This Indicates the calling context
+ @param[in] EventLogFormat The type of the event log for which
the information is requested.
+ @param[out] EventLogLocation A pointer to the memory address of
the event log.
+ @param[out] EventLogLastEntry If the Event Log contains more than
one entry, this is a pointer to the
+ address of the start of the last
entry in the event log in memory.
+ @param[out] EventLogTruncated If the Event Log is missing at least
+ one
entry because an event would
+ have exceeded the area allocated
for events, this value is set to TRUE.
+ Otherwise, the value will be FALSE
and the Event Log will be complete.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect
+ (e.g. asking for an event log whose
format is not supported).
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TD_GET_EVENT_LOG) (
+ IN EFI_TD_PROTOCOL *This,
+ IN EFI_TD_EVENT_LOG_FORMAT EventLogFormat,
+ OUT EFI_PHYSICAL_ADDRESS *EventLogLocation,
+ OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry,
+ OUT BOOLEAN *EventLogTruncated
+ );
+
+/**
+ The EFI_TD_PROTOCOL HashLogExtendEvent function call provides
+callers
with
+ an opportunity to extend and optionally log events without
+ requiring knowledge of actual TD commands.
+ The extend operation will occur even if this function cannot create
+ an
event
+ log entry (e.g. due to the event log being full).
+
+ @param[in] This Indicates the calling context
+ @param[in] Flags Bitmap providing additional
information.
+ @param[in] DataToHash Physical address of the start of the
data buffer to be hashed.
+ @param[in] DataToHashLen The length in bytes of the buffer
referenced by DataToHash.
+ @param[in] EfiTdEvent Pointer to data buffer containing
information about the event.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+ @retval EFI_VOLUME_FULL The extend operation occurred, but
the event could not be written to one or more event logs.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect.
+ @retval EFI_UNSUPPORTED The PE/COFF image type is not
supported.
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_TD_HASH_LOG_EXTEND_EVENT) (
+ IN EFI_TD_PROTOCOL *This,
+ IN UINT64 Flags,
+ IN EFI_PHYSICAL_ADDRESS DataToHash,
+ IN UINT64 DataToHashLen,
+ IN EFI_TD_EVENT *EfiTdEvent
+ );
+
+/**
+ The EFI_TD_PROTOCOL MapPcrToMrIndex function call provides callers
+ the info on TPM PCR<-> measurement register mapping information.
+
+ In current version, we use below mapping:
+ PCR0 -> MRTD (Index 0)
+ PCR1 -> RTMR0 (Index 1)
+ PCR2~6 -> RTMR1 (Index 2)
+ PCR7 -> RTMR0 (Index 1)
+ PCR8~15 -> RTMR2 (Index 3)
+
+ @param[in] This Indicates the calling context
+ @param[in] PcrIndex TPM PCR index.
+ @param[out] MrIndex Measurement register index.
+
+ @retval EFI_SUCCESS The MR index is returned.
+ @retval EFI_INVALID_PARAMETER The MrIndex is NULL.
+ @retval EFI_UNSUPPORTED The PcrIndex is invalid.
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_TD_MAP_PCR_TO_MR_INDEX) (
+ IN EFI_TD_PROTOCOL *This,
+ IN TCG_PCRINDEX PcrIndex,
+ OUT EFI_TD_MR_INDEX *MrIndex
+ );
+
+struct _EFI_TD_PROTOCOL {
+ EFI_TD_GET_CAPABILITY GetCapability;
+ EFI_TD_GET_EVENT_LOG GetEventLog;
+ EFI_TD_HASH_LOG_EXTEND_EVENT
HashLogExtendEvent;
+ EFI_TD_MAP_PCR_TO_MR_INDEX MapPcrToMrIndex;
+};
+
+
+//
+// TD event log
+//
+
+#pragma pack(1)
+
+//
+// Crypto Agile Log Entry Format.
+// It is similar with TCG_PCR_EVENT2 except the field of MrIndex and
PCRIndex.
+//
+typedef struct {
+ EFI_TD_MR_INDEX MrIndex;
+ UINT32 EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
+ UINT8 Event[1];
+} TD_EVENT;
+
+//
+// EFI TD Event Header
+// It is similar with TCG_PCR_EVENT2_HDR except the field of MrIndex
+and
PCRIndex
+//
+typedef struct {
+ EFI_TD_MR_INDEX MrIndex;
+ UINT32 EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
+} TD_EVENT_HDR;
+
+#pragma pack()
+
+//
+// Log entries after Get Event Log service //
+
+
+typedef struct {
+ //
+ // The version of this structure. It shall be set ot 1.
+ //
+ UINT64 Version;
+ //
+ // Number of events recorded after invocation of GetEventLog API
+ //
+ UINT64 NumberOfEvents;
+ //
+ // List of events of type TCG_TD_EVENT.
+ //
+ //TD_EVENT Event[1];
+} EFI_TD_FINAL_EVENTS_TABLE;
+
+
+#define EFI_TD_FINAL_EVENTS_TABLE_GUID \
+ {0xdd4a4648, 0x2de7, 0x4665, {0x96, 0x4d, 0x21, 0xd9, 0xef, 0x5f,
+0xb4,
0x46}}
+
+extern EFI_GUID gEfiTdFinalEventsTableGuid;
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index
a28a2daaffa8..2f48f6c40c1e 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -1008,6 +1008,9 @@
## Include/Protocol/PcdInfo.h
gGetPcdInfoProtocolGuid = { 0x5be40f57, 0xfa68, 0x4610, { 0xbb,
0xbf, 0xe9, 0xc5, 0xfc, 0xda, 0xd3, 0x65 } }

+ ## Include/Protocol/TdProtocol.h
+ gEfiTdProtocolGuid = { 0x96751a3d, 0x72f4, 0x41a6, { 0xa7,
0x94, 0xed, 0x5d, 0x0e, 0x67, 0xae, 0x6b }}
+
#
# Protocols defined in PI1.0.
#
--
2.29.2.windows.2










回复: [edk2-devel] [PATCH 1/2] MdePkg: Introduce TdProtocol for TD-Guest firmware

gaoliming
 

Min:
Which public spec defines this new protocol?

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Min Xu
发送时间: 2021年9月14日 9:57
收件人: devel@edk2.groups.io
抄送: Min Xu <min.m.xu@intel.com>; Michael D Kinney
<michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Zhiguang Liu <zhiguang.liu@intel.com>; Jiewen Yao <jiewen.yao@intel.com>;
Jian J Wang <jian.j.wang@intel.com>; Ken Lu <ken.lu@intel.com>
主题: [edk2-devel] [PATCH 1/2] MdePkg: Introduce TdProtocol for TD-Guest
firmware

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3625

If TD-Guest firmware supports measurement and an event is created,
TD-Guest firmware is designed to report the event log with the same data
structure in TCG-Platform-Firmware-Profile specification with
EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 format.

The TD-Guest firmware supports measurement, the TD Guest Firmware is
designed to produce EFI_TD_PROTOCOL with new GUID
EFI_TD_PROTOCOL_GUID
to report event log and provides hash capability.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ken Lu <ken.lu@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
---
MdePkg/Include/Protocol/TdProtocol.h | 305
+++++++++++++++++++++++++++
MdePkg/MdePkg.dec | 3 +
2 files changed, 308 insertions(+)
create mode 100644 MdePkg/Include/Protocol/TdProtocol.h

diff --git a/MdePkg/Include/Protocol/TdProtocol.h
b/MdePkg/Include/Protocol/TdProtocol.h
new file mode 100644
index 000000000000..5a015fca0079
--- /dev/null
+++ b/MdePkg/Include/Protocol/TdProtocol.h
@@ -0,0 +1,305 @@
+/** @file
+ If TD-Guest firmware supports measurement and an event is created,
TD-Guest
+ firmware is designed to report the event log with the same data
structure
+ in TCG-Platform-Firmware-Profile specification with
+ EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 format.
+
+ The TD-Guest firmware supports measurement, the TD Guest Firmware is
designed
+ to produce EFI_TD_PROTOCOL with new GUID EFI_TD_PROTOCOL_GUID
to report
+ event log and provides hash capability.
+
+Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef TD_PROTOCOL_H_
+#define TD_PROTOCOL_H_
+
+#include <Uefi/UefiBaseType.h>
+#include <IndustryStandard/UefiTcgPlatform.h>
+#include <IndustryStandard/Tpm20.h>
+
+
+#define EFI_TD_PROTOCOL_GUID \
+ { 0x96751a3d, 0x72f4, 0x41a6, { 0xa7, 0x94, 0xed, 0x5d, 0x0e, 0x67,
0xae,
0x6b }}
+extern EFI_GUID gEfiTdProtocolGuid;
+
+typedef struct _EFI_TD_PROTOCOL EFI_TD_PROTOCOL;
+
+typedef struct {
+ UINT8 Major;
+ UINT8 Minor;
+} EFI_TD_VERSION;
+
+typedef UINT32 EFI_TD_EVENT_LOG_BITMAP;
+typedef UINT32 EFI_TD_EVENT_LOG_FORMAT;
+typedef UINT32
EFI_TD_EVENT_ALGORITHM_BITMAP;
+typedef UINT32 EFI_TD_MR_INDEX;
+
+#define EFI_TD_EVENT_LOG_FORMAT_TCG_2 0x00000002
+#define EFI_TD_BOOT_HASH_ALG_SHA384 0x00000004
+
+//
+// This bit is shall be set when an event shall be extended but not
logged.
+//
+#define EFI_TD_FLAG_EXTEND_ONLY 0x0000000000000001
+//
+// This bit shall be set when the intent is to measure a PE/COFF image.
+//
+#define EFI_TD_FLAG_PE_COFF_IMAGE 0x0000000000000010
+
+#define MR_INDEX_MRTD 0
+#define MR_INDEX_RTMR0 1
+#define MR_INDEX_RTMR1 2
+#define MR_INDEX_RTMR2 3
+#define MR_INDEX_RTMR3 4
+
+//
+// This bit shall be set when the intent is to measure a PE/COFF image.
+//
+#define PE_COFF_IMAGE 0x0000000000000010
+
+#pragma pack (1)
+
+#define EFI_TD_EVENT_HEADER_VERSION 1
+
+typedef struct {
+ //
+ // Size of the event header itself (sizeof(EFI_TD_EVENT_HEADER)).
+ //
+ UINT32 HeaderSize;
+ //
+ // Header version. For this version of this specification, the value
shall be
1.
+ //
+ UINT16 HeaderVersion;
+ //
+ // Index of the MR that shall be extended.
+ //
+ EFI_TD_MR_INDEX MrIndex;
+ //
+ // Type of the event that shall be extended (and optionally logged).
+ //
+ UINT32 EventType;
+} EFI_TD_EVENT_HEADER;
+
+typedef struct {
+ //
+ // Total size of the event including the Size component, the header and
the
Event data.
+ //
+ UINT32 Size;
+ EFI_TD_EVENT_HEADER Header;
+ UINT8 Event[1];
+} EFI_TD_EVENT;
+
+#pragma pack()
+
+
+typedef struct {
+ //
+ // Allocated size of the structure
+ //
+ UINT8 Size;
+ //
+ // Version of the EFI_TD_BOOT_SERVICE_CAPABILITY structure itself.
+ // For this version of the protocol, the Major version shall be set to
1
+ // and the Minor version shall be set to 1.
+ //
+ EFI_TD_VERSION StructureVersion;
+ //
+ // Version of the EFI TD protocol.
+ // For this version of the protocol, the Major version shall be set to
1
+ // and the Minor version shall be set to 1.
+ //
+ EFI_TD_VERSION ProtocolVersion;
+ //
+ // Supported hash algorithms
+ //
+ EFI_TD_EVENT_ALGORITHM_BITMAP HashAlgorithmBitmap;
+ //
+ // Bitmap of supported event log formats
+ //
+ EFI_TD_EVENT_LOG_BITMAP SupportedEventLogs;
+
+ //
+ // False = TD not present
+ //
+ BOOLEAN TdPresentFlag;
+} EFI_TD_BOOT_SERVICE_CAPABILITY;
+
+/**
+ The EFI_TD_PROTOCOL GetCapability function call provides protocol
+ capability information and state information.
+
+ @param[in] This Indicates the calling context
+ @param[in, out] ProtocolCapability The caller allocates memory for a
EFI_TD_BOOT_SERVICE_CAPABILITY
+ structure and sets the size
field to the size of the structure allocated.
+ The callee fills in the fields
with the EFI protocol capability information
+ and the current EFI TD state
information up to the number of fields which
+ fit within the size of the
structure passed in.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+ The ProtocolCapability variable will
not be populated.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect.
+ The ProtocolCapability variable will
not be populated.
+ @retval EFI_BUFFER_TOO_SMALL The ProtocolCapability variable is
too small to hold the full response.
+ It will be partially populated
(required Size field will be set).
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TD_GET_CAPABILITY) (
+ IN EFI_TD_PROTOCOL *This,
+ IN OUT EFI_TD_BOOT_SERVICE_CAPABILITY *ProtocolCapability
+ );
+
+/**
+ The EFI_TD_PROTOCOL Get Event Log function call allows a caller to
+ retrieve the address of a given event log and its last entry.
+
+ @param[in] This Indicates the calling context
+ @param[in] EventLogFormat The type of the event log for which
the information is requested.
+ @param[out] EventLogLocation A pointer to the memory address of
the event log.
+ @param[out] EventLogLastEntry If the Event Log contains more than
one entry, this is a pointer to the
+ address of the start of the last
entry in the event log in memory.
+ @param[out] EventLogTruncated If the Event Log is missing at least one
entry because an event would
+ have exceeded the area allocated
for events, this value is set to TRUE.
+ Otherwise, the value will be FALSE
and the Event Log will be complete.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect
+ (e.g. asking for an event log whose
format is not supported).
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TD_GET_EVENT_LOG) (
+ IN EFI_TD_PROTOCOL *This,
+ IN EFI_TD_EVENT_LOG_FORMAT EventLogFormat,
+ OUT EFI_PHYSICAL_ADDRESS *EventLogLocation,
+ OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry,
+ OUT BOOLEAN *EventLogTruncated
+ );
+
+/**
+ The EFI_TD_PROTOCOL HashLogExtendEvent function call provides callers
with
+ an opportunity to extend and optionally log events without requiring
+ knowledge of actual TD commands.
+ The extend operation will occur even if this function cannot create an
event
+ log entry (e.g. due to the event log being full).
+
+ @param[in] This Indicates the calling context
+ @param[in] Flags Bitmap providing additional
information.
+ @param[in] DataToHash Physical address of the start of the
data buffer to be hashed.
+ @param[in] DataToHashLen The length in bytes of the buffer
referenced by DataToHash.
+ @param[in] EfiTdEvent Pointer to data buffer containing
information about the event.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+ @retval EFI_VOLUME_FULL The extend operation occurred, but
the event could not be written to one or more event logs.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters are
incorrect.
+ @retval EFI_UNSUPPORTED The PE/COFF image type is not
supported.
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_TD_HASH_LOG_EXTEND_EVENT) (
+ IN EFI_TD_PROTOCOL *This,
+ IN UINT64 Flags,
+ IN EFI_PHYSICAL_ADDRESS DataToHash,
+ IN UINT64 DataToHashLen,
+ IN EFI_TD_EVENT *EfiTdEvent
+ );
+
+/**
+ The EFI_TD_PROTOCOL MapPcrToMrIndex function call provides callers
+ the info on TPM PCR<-> measurement register mapping information.
+
+ In current version, we use below mapping:
+ PCR0 -> MRTD (Index 0)
+ PCR1 -> RTMR0 (Index 1)
+ PCR2~6 -> RTMR1 (Index 2)
+ PCR7 -> RTMR0 (Index 1)
+ PCR8~15 -> RTMR2 (Index 3)
+
+ @param[in] This Indicates the calling context
+ @param[in] PcrIndex TPM PCR index.
+ @param[out] MrIndex Measurement register index.
+
+ @retval EFI_SUCCESS The MR index is returned.
+ @retval EFI_INVALID_PARAMETER The MrIndex is NULL.
+ @retval EFI_UNSUPPORTED The PcrIndex is invalid.
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_TD_MAP_PCR_TO_MR_INDEX) (
+ IN EFI_TD_PROTOCOL *This,
+ IN TCG_PCRINDEX PcrIndex,
+ OUT EFI_TD_MR_INDEX *MrIndex
+ );
+
+struct _EFI_TD_PROTOCOL {
+ EFI_TD_GET_CAPABILITY GetCapability;
+ EFI_TD_GET_EVENT_LOG GetEventLog;
+ EFI_TD_HASH_LOG_EXTEND_EVENT
HashLogExtendEvent;
+ EFI_TD_MAP_PCR_TO_MR_INDEX MapPcrToMrIndex;
+};
+
+
+//
+// TD event log
+//
+
+#pragma pack(1)
+
+//
+// Crypto Agile Log Entry Format.
+// It is similar with TCG_PCR_EVENT2 except the field of MrIndex and
PCRIndex.
+//
+typedef struct {
+ EFI_TD_MR_INDEX MrIndex;
+ UINT32 EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
+ UINT8 Event[1];
+} TD_EVENT;
+
+//
+// EFI TD Event Header
+// It is similar with TCG_PCR_EVENT2_HDR except the field of MrIndex and
PCRIndex
+//
+typedef struct {
+ EFI_TD_MR_INDEX MrIndex;
+ UINT32 EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
+} TD_EVENT_HDR;
+
+#pragma pack()
+
+//
+// Log entries after Get Event Log service
+//
+
+
+typedef struct {
+ //
+ // The version of this structure. It shall be set ot 1.
+ //
+ UINT64 Version;
+ //
+ // Number of events recorded after invocation of GetEventLog API
+ //
+ UINT64 NumberOfEvents;
+ //
+ // List of events of type TCG_TD_EVENT.
+ //
+ //TD_EVENT Event[1];
+} EFI_TD_FINAL_EVENTS_TABLE;
+
+
+#define EFI_TD_FINAL_EVENTS_TABLE_GUID \
+ {0xdd4a4648, 0x2de7, 0x4665, {0x96, 0x4d, 0x21, 0xd9, 0xef, 0x5f, 0xb4,
0x46}}
+
+extern EFI_GUID gEfiTdFinalEventsTableGuid;
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index a28a2daaffa8..2f48f6c40c1e 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -1008,6 +1008,9 @@
## Include/Protocol/PcdInfo.h
gGetPcdInfoProtocolGuid = { 0x5be40f57, 0xfa68, 0x4610, { 0xbb,
0xbf, 0xe9, 0xc5, 0xfc, 0xda, 0xd3, 0x65 } }

+ ## Include/Protocol/TdProtocol.h
+ gEfiTdProtocolGuid = { 0x96751a3d, 0x72f4, 0x41a6, { 0xa7,
0x94, 0xed, 0x5d, 0x0e, 0x67, 0xae, 0x6b }}
+
#
# Protocols defined in PI1.0.
#
--
2.29.2.windows.2





Re: [PATCH V6 1/1] OvmfPkg: Enable TDX in ResetVector

Min Xu
 

Thanks Vishal and Brijesh.
Sorry I missed the limitation of smsw. MOV CRx should be used instead. I will fix it in the next version.
BTW, as Vishal mentioned in his comments in Github, we didn't have a chance to test SEV features because of the lack of AMD SEV environment. We're setting up the SEV environment now and will run a sanity test before the patch-set is sent out. But we may still need your help on the possible impact of the changes to the SEV features.
Thanks very much!

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Brijesh
Singh via groups.io
Sent: Wednesday, September 15, 2021 3:53 AM
To: Vishal Annapurve <vannapurve@google.com>; devel@edk2.groups.io; Xu,
Min M <min.m.xu@intel.com>
Cc: brijesh.singh@amd.com; Ard Biesheuvel <ardb+tianocore@kernel.org>;
Justen, Jordan L <jordan.l.justen@intel.com>; Gerd Hoffmann
<kraxel@redhat.com>; Erdem Aktas <erdemaktas@google.com>; James
Bottomley <jejb@linux.ibm.com>; Yao, Jiewen <jiewen.yao@intel.com>; Tom
Lendacky <thomas.lendacky@amd.com>
Subject: Re: [edk2-devel] [PATCH V6 1/1] OvmfPkg: Enable TDX in ResetVector

Hi Vishal,

On 9/14/21 2:00 PM, Vishal Annapurve wrote:
Hi Min, Brijesh,

Regarding:
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
...
+%ifdef ARCH_IA32
     nop
     nop
     jmp     EarlyBspInitReal16

+%else
+
+ smsw    ax
We are having intermittent VM crashes with running this code in
AMD-SEV enabled VMs. As per the AMD64 manual
<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww
w
.amd.com%2Fsystem%2Ffiles%2FTechDocs%2F24593.pdf&data=04%7C01%
7Cbrijes
h.singh%40amd.com%7C652023e953924957972a08d977b2031a%7C3dd8961
fe4884e6
08e11a82d994e183d%7C0%7C0%7C637672430875783281%7CUnknown%7CT
WFpbGZsb3d
8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
3D%7C3000&sdata=VFiIbcV6H4xx5XZd%2F0OZjerSfJwLfUjK7mPU9JHY05E%3D
&reserved=0> section 15.8.1, executing "smsw" instruction doesn't result in
bit 63 being set in EXITINFO1 and KVM ends up emulating "smsw" instruction
by trying to read encrypted guest VM memory as per the code
<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.k
ernel.org%2Fpub%2Fscm%2Fvirt%2Fkvm%2Fkvm.git%2Ftree%2Farch%2Fx86
%2Fkvm%2Fsvm%2Fsvm.c%23n2495&data=04%7C01%7Cbrijesh.singh%40am
d.com%7C652023e953924957972a08d977b2031a%7C3dd8961fe4884e608e1
1a82d994e183d%7C0%7C0%7C637672430875783281%7CUnknown%7CTWFp
bGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
I6Mn0%3D%7C3000&sdata=jSw7PLfXjhB8utM7Dxx2P%2F5M3fqvO3q3DBaF
W%2Bu03A8%3D&reserved=0>.
Since KVM tries to make sense of different random cipher texts in
different boots, it seems to intermittently result in visible issues.
The smsw does not provide decode assist, in those cases KVM reads the
guest memory and tries to decode. With encrypted guest, the memory
contains the ciphertext and hypervisor will not be able to decode the
instruction.

But it brings a question to Min, why we are using the smsw ? why cannot
use mov CRx. The smsw was meant for very old processors (286 or 8086
etc) and is used for legacy compatibility. The recommendation is to use
the mov CRx. The mov CRx will provide the decode assist to HV.

I looked at the Intel architecture manual [1] and it also recommends
using the mov CRx. The text from the Intel doc.

SMSW is only useful in operating-system software. However,
it is not a privileged instruction and can be used in
application programs if CR4.UMIP = 0. It is provided for
compatibility with the Intel 286 processor. Programs and
procedures intended to run on IA-32 and Intel 64 processors
beginning with the Intel386 processors should use the
MOV CR instruction to load the machine status word.


[1]
https://www.intel.com/content/dam/www/public/us/en/documents/manual
s/64-ia-32-architectures-software-developer-instruction-set-reference-
manual-325383.pdf


Is this expected behavior or do we miss some configuration or patches
that are recommended by AMD?
This is expected because the smsw does not provide a decode assist, and
encrypted guest will have issues with it. Lets understand the reason
behind using the smsw.

Regards,
Vishal

On Tue, Sep 14, 2021 at 4:54 PM Brijesh Singh via groups.io
<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fgrou
ps.io%2F&data=04%7C01%7Cbrijesh.singh%40amd.com%7C652023e9539249
57972a08d977b2031a%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0
%7C637672430875793279%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLj
AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdat
a=%2Br4xRTlrqoERthTLJ2YNQAPrKzYX6fid2Q9WNyKybrw%3D&reserved=0>
<brijesh.singh=amd.com@groups.io <mailto:amd.com@groups.io>> wrote:

Hi Min,

A quick question below.

On 9/14/21 3:50 AM, Min Xu wrote:
> RFC:
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzi
lla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3429&amp;data=04%7C01%7Cbr
ijesh.singh%40amd.com%7C2cca2f0a7fb44084da2b08d9775cb220%7C3dd89
61fe4884e608e11a82d994e183d%7C0%7C0%7C637672062275443867%7CUn
known%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6
Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=4zfuIDvTGDNCt%2BD3u7u
UR0n6hHDzv%2FI8NkqoUJhsx8Y%3D&amp;reserved=0
<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbug
zilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3429&data=04%7C01%7Cbrijes
h.singh%40amd.com%7C652023e953924957972a08d977b2031a%7C3dd8961
fe4884e608e11a82d994e183d%7C0%7C0%7C637672430875793279%7CUnkn
own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1
haWwiLCJXVCI6Mn0%3D%7C3000&sdata=E5bfIvEeyWTgUqnmllwKgSwxycqh
zfNnZ72O0i0UKww%3D&reserved=0>
>
> Intel's Trust Domain Extensions (Intel TDX) refers to an Intel
technology
> that extends Virtual Machines Extensions (VMX) and Multi-Key
Total Memory
> Encryption (MKTME) with a new kind of virutal machines guest called a
> Trust Domain (TD). A TD is desinged to run in a CPU mode that
protects the
> confidentiality of TD memory contents and the TD's CPU state from
other
> software, including the hosting Virtual-Machine Monitor (VMM), unless
> explicitly shared by the TD itself.
>
> Note: Intel TDX is only available on X64, so the Tdx related
changes are
> in X64 path. In IA32 path, there may be null stub to make the build
> success.
>
> This patch includes below major changes.
>
> 1. Definition of BFV & CFV
> Tdx Virtual Firmware (TDVF) includes one Firmware Volume (FV) known
> as the Boot Firmware Volume (BFV). The FV format is defined in the
> UEFI Platform Initialization (PI) spec. BFV includes all TDVF
components
> required during boot.
>
> TDVF also include a configuration firmware volume (CFV) that is
separated
> from the BFV. The reason is because the CFV is measured in RTMR,
while
> the BFV is measured in MRTD.
>
> In practice BFV is the code part of Ovmf image (OVMF_CODE.fd).
CFV is the
> vars part of Ovmf image (OVMF_VARS.fd).
>
> 2. PcdOvmfImageSizeInKb
> PcdOvmfImageSizeInKb indicates the size of Ovmf image. It is used to
> calculate the offset of TdxMetadata in ResetVectorVtf0.asm.

In SEV-SNP v7 series, I implemented the metadata support. I did not see
a need for the PcdOvmfImageSizeInKB. Why do you need it? I think your
calculation below will not work if someone is using the OVMF_CODE.fd
instead of OVMF.fd. Have you tried booting with OVMF_CODE.fd ?

thanks









Re: [PATCH v4] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ni, Ray
 

Ashraf,

Thanks for creating a common PageTable.inc. It looks great to me.

I just noticed that you generated 4 sets of binaries:
1. PageTable1G + IA32
2. PageTabel1G + X64
3. PageTable2M + IA32
4. PageTable2M + X64

But in fact for IA32 arch, page table is not needed.

So, we only need 3 sets of binaries:
1. IA32 (reset vector that calls SEC in 32bit mode)
2. X64 + PageTable2M (reset vector that calls SEC in 64bit mode)
3. X64 + PageTabel1G (reset vector that calls SEC in 64bit mode)

I can think of two approaches to put the new binaries:
1. flat mode: directly put ResetVector.x64.1g.(port80.|serial.)raw in Bin folder. Create new ResetVector.1G.inf for X64 + PageTable1G only.
2. hierarchy mode: create Ia32 and X64 folder under Bin folder. Put ResetVector.x64.1g.(port80.|serial.)raw in Bin/X64 folder.

Thanks,
Ray

-----Original Message-----
From: S, Ashraf Ali <ashraf.ali.s@intel.com>
Sent: Tuesday, September 14, 2021 7:47 PM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali <ashraf.ali.s@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar, Rahul1 <rahul1.kumar@intel.com>; De, Debkumar <debkumar.de@intel.com>; Han, Harry <harry.han@intel.com>; West, Catharine <catharine.west@intel.com>; V, Sangeetha <sangeetha.v@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Dureja, Sahil <sahil.dureja@intel.com>
Subject: [PATCH v4] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

[edk2-devel] [PATCH V4]
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Sahil Dureja <sahil.dureja@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
---
.../PageTable1G/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/PageTable1G/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../PageTable1G/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Vtf0/Bin/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/PageTable2M/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../PageTable2M/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../Bin/{ => PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
UefiCpuPkg/ResetVector/Vtf0/Build.py | 91 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/1GPageTables.asm | 53 ++++++++++
.../X64/{PageTables.asm => 2MPageTables.asm} | 14 +--
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create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable1G/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable1G/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable1G/ResetVector.x64.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable2M/ResetVector.ia32.port80.raw
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create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/PageTable2M/ResetVector.ia32.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => PageTable2M}/ResetVector.x64.serial.raw (56%)
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delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
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create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
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c|DR2GeH)mmfB<AnScn_LgbA;YKtv!U0PUT%*8l(j

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..8c4de04bbc 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|PageTable2M/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..b457f42dd9
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|PageTable1G/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..49de5a635b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -11,40 +11,73 @@ import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
#print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+for pageTable in PAGE_TABLES.keys():
+ for fileName in glob.glob(os.path.join('Bin', pageTable, FILE_FORMAT)):
+ os.remove(fileName)

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ directory = os.path.join('Bin', pageTable)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.mkdir(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..2cdaa14507 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/1GPageTables.asm"
+ %else
+ %include "X64/2MPageTables.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/1GPageTables.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/2MPageTables.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
--
2.30.2.windows.1


Re: [PATCH V6 1/1] OvmfPkg: Enable TDX in ResetVector

Min Xu
 

On September 14, 2021 7:25 PM, Brijesh Singh wrote:

Hi Min,

A quick question below.

On 9/14/21 3:50 AM, Min Xu wrote:
RFC:

1. Definition of BFV & CFV
Tdx Virtual Firmware (TDVF) includes one Firmware Volume (FV) known as
the Boot Firmware Volume (BFV). The FV format is defined in the UEFI
Platform Initialization (PI) spec. BFV includes all TDVF components
required during boot.

TDVF also include a configuration firmware volume (CFV) that is
separated from the BFV. The reason is because the CFV is measured in
RTMR, while the BFV is measured in MRTD.

In practice BFV is the code part of Ovmf image (OVMF_CODE.fd). CFV is
the vars part of Ovmf image (OVMF_VARS.fd).

2. PcdOvmfImageSizeInKb
PcdOvmfImageSizeInKb indicates the size of Ovmf image. It is used to
calculate the offset of TdxMetadata in ResetVectorVtf0.asm.
In SEV-SNP v7 series, I implemented the metadata support. I did not see a
need for the PcdOvmfImageSizeInKB. Why do you need it? I think your
calculation below will not work if someone is using the OVMF_CODE.fd
instead of OVMF.fd. Have you tried booting with OVMF_CODE.fd ?
In the original PoC, TDVF is required to be launched with OVMF.fd (OVMF_CODE.fd and OVMF_VARS.fd is not supported) because of the TDX-QEMU limitation. So PcdOvmfImageSizeInKb is used to calculate the offset of Metadata (The offset is from fourGigabytes).
But you're right. PcdOvmfImageSizeInKB is not needed. The offset should be from the TDX Metadata offset block in GUIDed chain.
TDX-QEMU team is aware of the limitation that OVMF_CODE.fd&OVMF_VARS.fd should be supported too, otherwise the SecureBoot does not work with libvirt. They are working on this limitation.

I will remove PcdOvmfImageSizeInKB and update the Metadata offset like below:
tdxMetadataOffsetStart:
DD tdxMetadataOffsetStart - TdxMetadataGuid - 16
DW tdxMetadataOffsetEnd - tdxMetadataOffsetStart
DB 0x35, 0x65, 0x7a, 0xe4, 0x4a, 0x98, 0x98, 0x47
DB 0x86, 0x5e, 0x46, 0x85, 0xa7, 0xbf, 0x8e, 0xc2
tdxMetadataOffsetEnd:

Thanks!
Min


Re: [edk2-platforms][PATCH v1 1/1] MinPlatformPkg/AcpiTables: Update structures for ACPI 6.3

Nate DeSimone
 

Hi Michael,

I attempted to merge this patch, however the contents no longer apply. There was a refactor done to AcpiPlatform.c to eliminate the MAX_CPU_NUM macro:

https://github.com/tianocore/edk2-platforms/commit/353f3ed966abc267c4e77b46a3b5ab82a0a86488#diff-ae3eb6d7a13316e69709faeb1e624bc2f87ede0dba5148dc198d109e1190e0bb

After this refactor, there are several merge conflicts in this patch. Could you please rebase to latest master branch and re-send the patch?

Thanks,
Nate

-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Friday, August 6, 2021 12:54 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>; Maddy, Daniel <danmad@microsoft.com>; Michael Kubacki <michael.kubacki@microsoft.com>
Subject: [edk2-platforms][PATCH v1 1/1] MinPlatformPkg/AcpiTables: Update structures for ACPI 6.3

From: Daniel Maddy <danmad@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3535

Updates ACPI table structures in MinPlatformPkg for ACPI 6.3.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Daniel Maddy <danmad@microsoft.com>
Co-authored-by: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 203 ++++++++++----------
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c | 11 +-
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c | 74 ++++---
3 files changed, 150 insertions(+), 138 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 2b51c34ef2fd..5e3c4c0672f9 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -2,6 +2,7 @@
ACPI Platform Driver

Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -13,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #pragma pack(1)

typedef struct {
- UINT32 AcpiProcessorId;
+ UINT32 AcpiProcessorUid;
UINT32 ApicId;
UINT32 Flags;
UINT32 SwProcApicId;
@@ -27,9 +28,9 @@ typedef struct {
// Define Union of IO APIC & Local APIC structure; // typedef union {
- EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE AcpiLocalApic;
- EFI_ACPI_4_0_IO_APIC_STRUCTURE AcpiIoApic;
- EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE AcpiLocalx2Apic;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE AcpiLocalApic;
+ EFI_ACPI_6_3_IO_APIC_STRUCTURE AcpiIoApic;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE AcpiLocalx2Apic;
struct {
UINT8 Type;
UINT8 Length;
@@ -38,9 +39,9 @@ typedef union {

#pragma pack()

-extern EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs; -extern EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt; -extern EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Hpet;
+extern EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs;
+extern EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt;
+extern EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Hpet;
extern EFI_ACPI_WSMT_TABLE Wsmt;

VOID *mLocalTable[] = {
@@ -217,7 +218,7 @@ DebugDisplayReOrderTable(
DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n"));
for (Index=0; Index<MAX_CPU_NUM; Index++) {
DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n",
- Index, mCpuApicIdOrderTable[Index].AcpiProcessorId,
+ Index,
+ mCpuApicIdOrderTable[Index].AcpiProcessorUid,
mCpuApicIdOrderTable[Index].ApicId,
mCpuApicIdOrderTable[Index].Flags,
mCpuApicIdOrderTable[Index].SwProcApicId,
@@ -232,31 +233,31 @@ AppendCpuMapTableEntry (
)
{
EFI_STATUS Status;
- EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApicPtr;
- EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE *LocalX2ApicPtr;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApicPtr;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE *LocalX2ApicPtr;
UINT8 Type;

Status = EFI_SUCCESS;
Type = ((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiApicCommon.Type;
- LocalApicPtr = (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalApic);
- LocalX2ApicPtr = (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalx2Apic);
+ LocalApicPtr = (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE
+ *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalApic);
+ LocalX2ApicPtr = (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE
+ *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalx2Apic);

- if(Type == EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC) {
+ if(Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC) {
if(!mX2ApicEnabled) {
- LocalApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
- LocalApicPtr->ApicId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId;
- LocalApicPtr->AcpiProcessorId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorId;
+ LocalApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
+ LocalApicPtr->ApicId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId;
+ LocalApicPtr->AcpiProcessorUid =
+ (UINT8)mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid;
} else {
- LocalApicPtr->Flags = 0;
- LocalApicPtr->ApicId = 0xFF;
- LocalApicPtr->AcpiProcessorId = (UINT8)0xFF;
+ LocalApicPtr->Flags = 0;
+ LocalApicPtr->ApicId = 0xFF;
+ LocalApicPtr->AcpiProcessorUid = (UINT8)0xFF;
Status = EFI_UNSUPPORTED;
}
- } else if(Type == EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC) {
+ } else if(Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC) {
if(mX2ApicEnabled) {
LocalX2ApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
LocalX2ApicPtr->X2ApicId = mCpuApicIdOrderTable[LocalApicCounter].ApicId;
- LocalX2ApicPtr->AcpiProcessorUid = mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorId;
+ LocalX2ApicPtr->AcpiProcessorUid =
+ mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid;
} else {
LocalX2ApicPtr->Flags = 0;
LocalX2ApicPtr->X2ApicId = (UINT32)-1;
@@ -311,8 +312,8 @@ SortCpuLocalApicInTable (
CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0);
CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package;
- CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;
- CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask));
+ CpuIdMapPtr->AcpiProcessorUid = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;
+ CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask));
if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous
//may not necessory!!!!!
}
@@ -321,18 +322,18 @@ SortCpuLocalApicInTable (
if (CpuIdMapPtr->Flags == 1) {

if(mForceX2ApicId) {
- CpuIdMapPtr->SocketNum &= 0x7;
- CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt
- CpuIdMapPtr->SwProcApicId &= 0xFF;
+ CpuIdMapPtr->SocketNum &= 0x7;
+ CpuIdMapPtr->AcpiProcessorUid &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt
+ CpuIdMapPtr->SwProcApicId &= 0xFF;
}
}
} else { //not enabled
- CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];
- CpuIdMapPtr->ApicId = (UINT32)-1;
- CpuIdMapPtr->Flags = 0;
- CpuIdMapPtr->AcpiProcessorId = (UINT32)-1;
- CpuIdMapPtr->SwProcApicId = (UINT32)-1;
- CpuIdMapPtr->SocketNum = (UINT32)-1;
+ CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];
+ CpuIdMapPtr->ApicId = (UINT32)-1;
+ CpuIdMapPtr->Flags = 0;
+ CpuIdMapPtr->AcpiProcessorUid = (UINT32)-1;
+ CpuIdMapPtr->SwProcApicId = (UINT32)-1;
+ CpuIdMapPtr->SocketNum = (UINT32)-1;
} //end if PROC ENABLE
} //end for CurrentProcessor

@@ -366,9 +367,9 @@ SortCpuLocalApicInTable (
mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId;
mCpuApicIdOrderTable[0].SwProcApicId = TempVal;
//swap AcpiProcId
- TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId;
- mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId;
- mCpuApicIdOrderTable[0].AcpiProcessorId = TempVal;
+ TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorUid;
+ mCpuApicIdOrderTable[Index].AcpiProcessorUid = mCpuApicIdOrderTable[0].AcpiProcessorUid;
+ mCpuApicIdOrderTable[0].AcpiProcessorUid = TempVal;

}

@@ -377,23 +378,23 @@ SortCpuLocalApicInTable (

if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) {
//make sure disabled entry has ProcId set to FFs
- mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1;
- mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1;
- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = (UINT32)-1;
+ mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1;

for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) {
if(mCpuApicIdOrderTable[Index].Flags == 1) {
//move enabled entry up
- mCpuApicIdOrderTable[CurrProcessor].Flags = 1;
- mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId;
- mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId;
- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId;
- mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum;
+ mCpuApicIdOrderTable[CurrProcessor].Flags = 1;
+ mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId;
+ mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = mCpuApicIdOrderTable[Index].AcpiProcessorUid;
+ mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId;
+ mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum;
//disable moved entry
- mCpuApicIdOrderTable[Index].Flags = 0;
- mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1;
- mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1;
- mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[Index].Flags = 0;
+ mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[Index].AcpiProcessorUid = (UINT32)-1;
+ mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1;
break;
}
}
@@ -422,17 +423,17 @@ typedef struct {
} STRUCTURE_HEADER;

STRUCTURE_HEADER mMadtStructureTable[] = {
- {EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE)},
- {EFI_ACPI_4_0_IO_APIC, sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE)},
- {EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE, sizeof (EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE)},
- {EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE, sizeof (EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE)},
- {EFI_ACPI_4_0_LOCAL_APIC_NMI, sizeof (EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE)},
- {EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE, sizeof (EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE)},
- {EFI_ACPI_4_0_IO_SAPIC, sizeof (EFI_ACPI_4_0_IO_SAPIC_STRUCTURE)},
- {EFI_ACPI_4_0_LOCAL_SAPIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE)},
- {EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES, sizeof (EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE)},
- {EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE)},
- {EFI_ACPI_4_0_LOCAL_X2APIC_NMI, sizeof (EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE)}
+ {EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE)},
+ {EFI_ACPI_6_3_IO_APIC, sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE)},
+ {EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE)},
+ {EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE, sizeof (EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE)},
+ {EFI_ACPI_6_3_LOCAL_APIC_NMI, sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE)},
+ {EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE, sizeof (EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE)},
+ {EFI_ACPI_6_3_IO_SAPIC, sizeof (EFI_ACPI_6_3_IO_SAPIC_STRUCTURE)},
+ {EFI_ACPI_6_3_LOCAL_SAPIC, sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE)},
+ {EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES, sizeof (EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE)},
+ {EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE)},
+ {EFI_ACPI_6_3_LOCAL_X2APIC_NMI, sizeof (EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE)}
};

/**
@@ -591,7 +592,7 @@ InitializeHeader (
**/
EFI_STATUS
InitializeMadtHeader (
- IN OUT EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *MadtHeader
+ IN OUT EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER
+ *MadtHeader
)
{
EFI_STATUS Status;
@@ -603,8 +604,8 @@ InitializeMadtHeader (

Status = InitializeHeader (
&MadtHeader->Header,
- EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
0
);
if (EFI_ERROR (Status)) {
@@ -612,7 +613,7 @@ InitializeMadtHeader (
}

MadtHeader->LocalApicAddress = PcdGet32(PcdLocalApicAddress);
- MadtHeader->Flags = EFI_ACPI_4_0_PCAT_COMPAT;
+ MadtHeader->Flags = EFI_ACPI_6_3_PCAT_COMPAT;

return EFI_SUCCESS;
}
@@ -649,7 +650,7 @@ CopyStructure (
//
// Initialize the number of table entries and the table based on the table header passed in.
//
- if (Header->Signature == EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
+ if (Header->Signature ==
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
TableNumEntries = sizeof (mMadtStructureTable) / sizeof (STRUCTURE_HEADER);
StructureTable = mMadtStructureTable;
} else {
@@ -759,7 +760,7 @@ BuildAcpiTable (
return EFI_INVALID_PARAMETER;
}

- if (AcpiHeader->Signature != EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
+ if (AcpiHeader->Signature !=
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
DEBUG ((
DEBUG_ERROR,
"MADT header signature is expected, actually 0x%08x\n", @@ -850,15 +851,15 @@ InstallMadtFromScratch ( {
EFI_STATUS Status;
UINTN Index;
- EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *NewMadtTable;
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *NewMadtTable;
UINTN TableHandle;
- EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER MadtTableHeader;
- EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE ProcLocalApicStruct;
- EFI_ACPI_4_0_IO_APIC_STRUCTURE IoApicStruct;
- EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE IntSrcOverrideStruct;
- EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE LocalApciNmiStruct;
- EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE ProcLocalX2ApicStruct;
- EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE LocalX2ApicNmiStruct;
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER MadtTableHeader;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE ProcLocalApicStruct;
+ EFI_ACPI_6_3_IO_APIC_STRUCTURE IoApicStruct;
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE IntSrcOverrideStruct;
+ EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE LocalApciNmiStruct;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE ProcLocalX2ApicStruct;
+ EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE LocalX2ApicNmiStruct;
STRUCTURE_HEADER **MadtStructs;
UINTN MaxMadtStructCount;
UINTN MadtStructsIndex;
@@ -915,11 +916,11 @@ InstallMadtFromScratch (
//
// Build Processor Local APIC Structures and Processor Local X2APIC Structures
//
- ProcLocalApicStruct.Type = EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC;
- ProcLocalApicStruct.Length = sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE);
+ ProcLocalApicStruct.Type = EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC;
+ ProcLocalApicStruct.Length = sizeof
+ (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE);

- ProcLocalX2ApicStruct.Type = EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC;
- ProcLocalX2ApicStruct.Length = sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE);
+ ProcLocalX2ApicStruct.Type = EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC;
+ ProcLocalX2ApicStruct.Length = sizeof
+ (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE);
ProcLocalX2ApicStruct.Reserved[0] = 0;
ProcLocalX2ApicStruct.Reserved[1] = 0;

@@ -930,9 +931,9 @@ InstallMadtFromScratch (
// use a processor local x2APIC structure.
//
if (!mX2ApicEnabled && mCpuApicIdOrderTable[Index].ApicId < MAX_UINT8) {
- ProcLocalApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags;
- ProcLocalApicStruct.ApicId = (UINT8) mCpuApicIdOrderTable[Index].ApicId;
- ProcLocalApicStruct.AcpiProcessorId = (UINT8) mCpuApicIdOrderTable[Index].AcpiProcessorId;
+ ProcLocalApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags;
+ ProcLocalApicStruct.ApicId = (UINT8) mCpuApicIdOrderTable[Index].ApicId;
+ ProcLocalApicStruct.AcpiProcessorUid = (UINT8)
+ mCpuApicIdOrderTable[Index].AcpiProcessorUid;

ASSERT (MadtStructsIndex < MaxMadtStructCount);
Status = CopyStructure (
@@ -943,7 +944,7 @@ InstallMadtFromScratch (
} else if (mCpuApicIdOrderTable[Index].ApicId != 0xFFFFFFFF) {
ProcLocalX2ApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags;
ProcLocalX2ApicStruct.X2ApicId = mCpuApicIdOrderTable[Index].ApicId;
- ProcLocalX2ApicStruct.AcpiProcessorUid = mCpuApicIdOrderTable[Index].AcpiProcessorId;
+ ProcLocalX2ApicStruct.AcpiProcessorUid =
+ mCpuApicIdOrderTable[Index].AcpiProcessorUid;

ASSERT (MadtStructsIndex < MaxMadtStructCount);
Status = CopyStructure (
@@ -961,8 +962,8 @@ InstallMadtFromScratch (
//
// Build I/O APIC Structures
//
- IoApicStruct.Type = EFI_ACPI_4_0_IO_APIC;
- IoApicStruct.Length = sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE);
+ IoApicStruct.Type = EFI_ACPI_6_3_IO_APIC; IoApicStruct.Length =
+ sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE);
IoApicStruct.Reserved = 0;

PcIoApicEnable = PcdGet32(PcdPcIoApicEnable); @@ -1008,8 +1009,8 @@ InstallMadtFromScratch (
//
// Build Interrupt Source Override Structures
//
- IntSrcOverrideStruct.Type = EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE;
- IntSrcOverrideStruct.Length = sizeof (EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE);
+ IntSrcOverrideStruct.Type = EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE;
+ IntSrcOverrideStruct.Length = sizeof
+ (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE);

//
// IRQ0=>IRQ2 Interrupt Source Override Structure @@ -1052,11 +1053,11 @@ InstallMadtFromScratch (
//
// Build Local APIC NMI Structures
//
- LocalApciNmiStruct.Type = EFI_ACPI_4_0_LOCAL_APIC_NMI;
- LocalApciNmiStruct.Length = sizeof (EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE);
- LocalApciNmiStruct.AcpiProcessorId = 0xFF; // Applies to all processors
- LocalApciNmiStruct.Flags = 0x0005; // Flags - Edge-tiggered, Active High
- LocalApciNmiStruct.LocalApicLint = 0x1;
+ LocalApciNmiStruct.Type = EFI_ACPI_6_3_LOCAL_APIC_NMI;
+ LocalApciNmiStruct.Length = sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE);
+ LocalApciNmiStruct.AcpiProcessorUid = 0xFF; // Applies to all processors
+ LocalApciNmiStruct.Flags = 0x0005; // Flags - Edge-tiggered, Active High
+ LocalApciNmiStruct.LocalApicLint = 0x1;

ASSERT (MadtStructsIndex < MaxMadtStructCount);
Status = CopyStructure (
@@ -1073,8 +1074,8 @@ InstallMadtFromScratch (
// Build Local x2APIC NMI Structure
//
if (mX2ApicEnabled) {
- LocalX2ApicNmiStruct.Type = EFI_ACPI_4_0_LOCAL_X2APIC_NMI;
- LocalX2ApicNmiStruct.Length = sizeof (EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE);
+ LocalX2ApicNmiStruct.Type = EFI_ACPI_6_3_LOCAL_X2APIC_NMI;
+ LocalX2ApicNmiStruct.Length = sizeof
+ (EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE);
LocalX2ApicNmiStruct.Flags = 0x000D; // Flags - Level-tiggered, Active High
LocalX2ApicNmiStruct.AcpiProcessorUid = 0xFFFFFFFF; // Applies to all processors
LocalX2ApicNmiStruct.LocalX2ApicLint = 0x01; @@ -1099,7 +1100,7 @@ InstallMadtFromScratch (
//
Status = BuildAcpiTable (
(EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader,
- sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER),
+ sizeof (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER),
MadtStructs,
MadtStructsIndex,
(UINT8 **)&NewMadtTable
@@ -1222,7 +1223,7 @@ PlatformUpdateTables (
EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
UINT8 *TempOemId;
UINT64 TempOemTableId;
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *FadtHeader;
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *FadtHeader;
EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER *HpetTable;
UINT32 HpetBaseAddress;
EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_BLOCK_ID HpetBlockId;
@@ -1279,12 +1280,12 @@ PlatformUpdateTables (
//
switch (Table->Signature) {

- case EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE:
+ case EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE:
ASSERT(FALSE);
break;

- case EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
- FadtHeader = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
+ case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
+ FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table;

FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
@@ -1329,7 +1330,7 @@ PlatformUpdateTables (
DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags ));
break;

- case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:
+ case EFI_ACPI_6_3_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:
HpetTable = (EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER *)Table;
HpetBaseAddress = PcdGet32 (PcdHpetBaseAddress);
HpetTable->BaseAddressLower32Bit.Address = HpetBaseAddress; @@ -1381,8 +1382,8 @@ IsHardwareChange (
UINTN HWChangeSize;
UINT32 PciId;
UINTN Handle;
- EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *FacsPtr;
- EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *pFADT;
+ EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE *FacsPtr;
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *pFADT;

HandleCount = 0;
HandleBuffer = NULL;
@@ -1428,7 +1429,7 @@ IsHardwareChange (
//
Handle = 0;
Status = LocateAcpiTableBySignature (
- EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
(EFI_ACPI_DESCRIPTION_HEADER **) &pFADT,
&Handle
);
@@ -1450,7 +1451,7 @@ IsHardwareChange (
//
// Set HardwareSignature value based on CRC value.
//
- FacsPtr = (EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)(UINTN)pFADT->FirmwareCtrl;
+ FacsPtr = (EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE
+ *)(UINTN)pFADT->FirmwareCtrl;
FacsPtr->HardwareSignature = CRC;
FreePool( HWChange );
}
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c
index cde6e478c6b9..8700c44e633d 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c
@@ -1,9 +1,10 @@
/** @file
- This file contains a structure definition for the ACPI 5.0 Firmware ACPI
+ This file contains a structure definition for the ACPI 6.3 Firmware
+ ACPI
Control Structure (FACS). The contents of this file should only be modified
for bug fixes, no porting is required.

Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -35,9 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // Please modify all values in Facs.h only.
//

-EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE,
- sizeof (EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE),
+EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
+ EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE,
+ sizeof (EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE),

//
// Hardware Signature will be updated at runtime @@ -48,7 +49,7 @@ EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
EFI_ACPI_GLOBAL_LOCK,
EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS,
EFI_ACPI_X_FIRMWARE_WAKING_VECTOR,
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION,
+ EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION,
{
EFI_ACPI_RESERVED_BYTE,
EFI_ACPI_RESERVED_BYTE,
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c
index 6efb38cda40d..38e767856de7 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c
@@ -1,9 +1,10 @@
/** @file
- This file contains a structure definition for the ACPI 5.0 Fixed ACPI
+ This file contains a structure definition for the ACPI 6.3 Fixed ACPI
Description Table (FADT). The contents of this file should only be modified
for bug fixes, no porting is required.

Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -47,6 +48,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent

#define EFI_ACPI_IAPC_BOOT_ARCH 0 // To be fixed

+//
+// ARM Boot Architecture Flags
+//
+
+#define EFI_ACPI_ARM_BOOT_ARCH 0 // To be fixed
+
//
// Fixed Feature Flags
//
@@ -55,7 +62,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // PM1A Event Register Block Generic Address Information // -#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS 0 // To be fixed
@@ -63,7 +70,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // PM1B Event Register Block Generic Address Information // -#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS 0 // To be fixed
@@ -71,7 +78,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // PM1A Control Register Block Generic Address Information // -#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS 0 // To be fixed
@@ -79,7 +86,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // PM1B Control Register Block Generic Address Information // -#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS 0 // To be fixed
@@ -87,7 +94,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // PM2 Control Register Block Generic Address Information // -#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM2_CNT_BLK_ADDRESS 0 // To be fixed
@@ -96,7 +103,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // Power Management Timer Control Register Block Generic Address // Information // -#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_PM_TMR_BLK_ADDRESS 0 // To be fixed
@@ -105,7 +112,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // General Purpose Event 0 Register Block Generic Address // Information // -#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0 // size of R_PCH_ACPI_GPE0_STS_127_96 + R_PCH_ACPI_GPE0_EN_127_96
#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
#define EFI_ACPI_GPE0_BLK_ADDRESS 0 // To be fixed
@@ -114,14 +121,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // General Purpose Event 1 Register Block Generic Address // Information // -#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x0
#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x0
#define EFI_ACPI_GPE1_BLK_ADDRESS 0 // To be fixed
//
// Reset Register Generic Address Information // -#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
#define EFI_ACPI_RESET_REG_ADDRESS 0x00000CF9
@@ -162,11 +169,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // Please modify all values in Fadt.h only.
//

-EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
{
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- sizeof (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE),
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE),
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,

//
// Checksum will be updated at runtime @@ -187,9 +194,9 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
//
// These addresses will be updated at runtime
//
- 0x00000000,
0x00000000,
-
+ 0x00000000,
+
EFI_ACPI_RESERVED_BYTE,
EFI_ACPI_PREFERRED_PM_PROFILE,
EFI_ACPI_SCI_INT,
@@ -198,7 +205,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_ACPI_DISABLE,
EFI_ACPI_S4_BIOS_REQ,
EFI_ACPI_PSTATE_CNT,
-
+
EFI_ACPI_PM1A_EVT_BLK_ADDRESS,
EFI_ACPI_PM1B_EVT_BLK_ADDRESS,
EFI_ACPI_PM1A_CNT_BLK_ADDRESS,
@@ -240,15 +247,13 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID,
EFI_ACPI_RESET_REG_BIT_WIDTH,
EFI_ACPI_RESET_REG_BIT_OFFSET,
- EFI_ACPI_5_0_BYTE,
+ EFI_ACPI_6_3_BYTE,
EFI_ACPI_RESET_REG_ADDRESS
},
EFI_ACPI_RESET_VALUE,
- {
- EFI_ACPI_RESERVED_BYTE,
- EFI_ACPI_RESERVED_BYTE,
- EFI_ACPI_RESERVED_BYTE
- },
+
+ EFI_ACPI_ARM_BOOT_ARCH,
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,

//
// These addresses will be updated at runtime @@ -263,7 +268,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH,
EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_WORD,
+ EFI_ACPI_6_3_WORD,
EFI_ACPI_PM1A_EVT_BLK_ADDRESS
},
{
@@ -273,7 +278,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH,
EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_WORD,
+ EFI_ACPI_6_3_WORD,
EFI_ACPI_PM1B_EVT_BLK_ADDRESS
},
{
@@ -283,7 +288,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH,
EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_WORD,
+ EFI_ACPI_6_3_WORD,
EFI_ACPI_PM1A_CNT_BLK_ADDRESS
},
{
@@ -293,7 +298,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH,
EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_WORD,
+ EFI_ACPI_6_3_WORD,
EFI_ACPI_PM1B_CNT_BLK_ADDRESS
},
{
@@ -303,7 +308,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH,
EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_BYTE,
+ EFI_ACPI_6_3_BYTE,
EFI_ACPI_PM2_CNT_BLK_ADDRESS
},
{
@@ -313,7 +318,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_PM_TMR_BLK_BIT_WIDTH,
EFI_ACPI_PM_TMR_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_DWORD,
+ EFI_ACPI_6_3_DWORD,
EFI_ACPI_PM_TMR_BLK_ADDRESS
},
{
@@ -323,7 +328,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_GPE0_BLK_BIT_WIDTH,
EFI_ACPI_GPE0_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_BYTE,
+ EFI_ACPI_6_3_BYTE,
EFI_ACPI_GPE0_BLK_ADDRESS
},
{
@@ -333,7 +338,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID,
EFI_ACPI_GPE1_BLK_BIT_WIDTH,
EFI_ACPI_GPE1_BLK_BIT_OFFSET,
- EFI_ACPI_5_0_BYTE,
+ EFI_ACPI_6_3_BYTE,
EFI_ACPI_GPE1_BLK_ADDRESS
},
{
@@ -355,5 +360,10 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
0,
0,
0
- }
+ },
+
+ //
+ // Hypervisor Vendor Identity
+ //
+ 0x0000000000000000,
};
--
2.28.0.windows.1


Re: [edk2-platforms][PATCH v1 0/4] MinPlatformPkg: AcpiPlatform bug fixes and improvements

Nate DeSimone
 

The series has been pushed as 2bb0314~..d281e9e

-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, August 5, 2021 9:38 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
Subject: [edk2-platforms][PATCH v1 0/4] MinPlatformPkg: AcpiPlatform bug fixes and improvements

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3532
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3533
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3534

This patch series groups together several bug fixes and improvements to AcpiPlatform.

Note that the following patch from a different series that is on the mailing list is currently required for MinPlatformPkg to
build:
https://edk2.groups.io/g/devel/message/78711

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>

Michael Kubacki (4):
MinPlatformPkg/AcpiPlatform: Use PCD for WSMT OEM revision
MinPlatformPkg/AcpiPlatform: Use CreatorId and CreatorRevision in
headers
MinPlatformPkg/AcpiPlatform: Set X_GPE1_BLK GAS structure to zeroes
MinPlatformPkg/AcpiPlatform: Remove unused BoardAcpiTableLib

Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 7 ++++---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c | 4 +---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h | 1 -
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 2 +-
4 files changed, 6 insertions(+), 8 deletions(-)

--
2.28.0.windows.1


Re: [edk2-platforms][PATCH v1 0/4] MinPlatformPkg: AcpiPlatform bug fixes and improvements

Nate DeSimone
 

For the series..

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, August 5, 2021 9:38 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
Subject: [edk2-platforms][PATCH v1 0/4] MinPlatformPkg: AcpiPlatform bug fixes and improvements

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3532
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3533
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3534

This patch series groups together several bug fixes and improvements to AcpiPlatform.

Note that the following patch from a different series that is on the mailing list is currently required for MinPlatformPkg to
build:
https://edk2.groups.io/g/devel/message/78711

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>

Michael Kubacki (4):
MinPlatformPkg/AcpiPlatform: Use PCD for WSMT OEM revision
MinPlatformPkg/AcpiPlatform: Use CreatorId and CreatorRevision in
headers
MinPlatformPkg/AcpiPlatform: Set X_GPE1_BLK GAS structure to zeroes
MinPlatformPkg/AcpiPlatform: Remove unused BoardAcpiTableLib

Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 7 ++++---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c | 4 +---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h | 1 -
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 2 +-
4 files changed, 6 insertions(+), 8 deletions(-)

--
2.28.0.windows.1


[PATCH v3 3/4] OvmfPkg: Reference new Tcg2PlatformDxe in the build system for compilation

Stefan Berger
 

From: Stefan Berger <stefanb@linux.vnet.ibm.com>

Compile the Tcg2PlatformDxe related code now.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 4 ++++
OvmfPkg/AmdSev/AmdSevX64.fdf | 1 +
OvmfPkg/OvmfPkgIa32.dsc | 4 ++++
OvmfPkg/OvmfPkgIa32.fdf | 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 4 ++++
OvmfPkg/OvmfPkgIa32X64.fdf | 1 +
OvmfPkg/OvmfPkgX64.dsc | 4 ++++
OvmfPkg/OvmfPkgX64.fdf | 1 +
8 files changed, 20 insertions(+)

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index e6cd10b759..3079f4b503 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -851,4 +851,8 @@
<LibraryClasses>=0D
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLib=
DTpm.inf=0D
}=0D
+ SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf {=0D
+ <LibraryClasses>=0D
+ TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarc=
hyLib/PeiDxeTpmPlatformHierarchyLib.inf=0D
+ }=0D
!endif=0D
diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index 0a89749700..a9f675303f 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -313,6 +313,7 @@ INF MdeModulePkg/Universal/Variable/RuntimeDxe/Variabl=
eRuntimeDxe.inf
!if $(TPM_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf=0D
INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf=0D
+INF SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf=0D
!if $(TPM_CONFIG_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf=0D
!endif=0D
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index d1d92c97ba..923a012f0c 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -1034,6 +1034,10 @@
<LibraryClasses>=0D
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLib=
DTpm.inf=0D
}=0D
+ SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf {=0D
+ <LibraryClasses>=0D
+ TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarc=
hyLib/PeiDxeTpmPlatformHierarchyLib.inf=0D
+ }=0D
!endif=0D
=0D
!if $(LOAD_X64_ON_IA32_ENABLE) =3D=3D TRUE=0D
diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf
index 04b41445ca..bb3b53626e 100644
--- a/OvmfPkg/OvmfPkgIa32.fdf
+++ b/OvmfPkg/OvmfPkgIa32.fdf
@@ -363,6 +363,7 @@ INF MdeModulePkg/Universal/Variable/RuntimeDxe/Variabl=
eRuntimeDxe.inf
!if $(TPM_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf=0D
INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf=0D
+INF SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf=0D
!if $(TPM_CONFIG_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf=0D
!endif=0D
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index a467ab7090..b907b36973 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -1049,4 +1049,8 @@
<LibraryClasses>=0D
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLib=
DTpm.inf=0D
}=0D
+ SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf {=0D
+ <LibraryClasses>=0D
+ TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarc=
hyLib/PeiDxeTpmPlatformHierarchyLib.inf=0D
+ }=0D
!endif=0D
diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
index 02fd8f0c41..030638ae78 100644
--- a/OvmfPkg/OvmfPkgIa32X64.fdf
+++ b/OvmfPkg/OvmfPkgIa32X64.fdf
@@ -370,6 +370,7 @@ INF MdeModulePkg/Universal/Variable/RuntimeDxe/Variabl=
eRuntimeDxe.inf
!if $(TPM_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf=0D
INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf=0D
+INF SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf=0D
!if $(TPM_CONFIG_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf=0D
!endif=0D
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index e56b83d95e..8aca437a9b 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -1047,4 +1047,8 @@
<LibraryClasses>=0D
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLib=
DTpm.inf=0D
}=0D
+ SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf {=0D
+ <LibraryClasses>=0D
+ TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarc=
hyLib/PeiDxeTpmPlatformHierarchyLib.inf=0D
+ }=0D
!endif=0D
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index 23936242e7..888363ff9d 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -389,6 +389,7 @@ INF MdeModulePkg/Universal/Variable/RuntimeDxe/Variabl=
eRuntimeDxe.inf
!if $(TPM_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf=0D
INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf=0D
+INF SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf=0D
!if $(TPM_CONFIG_ENABLE) =3D=3D TRUE=0D
INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf=0D
!endif=0D
--=20
2.31.1


[PATCH v3 0/4] OvmfPkg: Disable the TPM 2 platform hierarchy

Stefan Berger
 

This series of patches adds support for disabling the TPM 2 platform
hierarchy to Ovmf. To be able to do this we have to handle TPM 2
physical presence interface (PPI) opcodes before the TPM 2 platform
hierarchy is disabled otherwise TPM 2 commands that are sent due to the
PPI opcodes may fail if the platform hierarchy is already disabled.
Therefore, we need to invoke the handler function
Tcg2PhysicalPresenceLibProcessRequest from within
PlatformBootManagerBeforeConsole. Since handling of PPI opcodes may require
interaction with the user, we also move PlatformInitializeConsole
to before the handling of PPI codes so that the keyboard is available
when needed. The PPI handling code will activate the default consoles
only if it requires user interaction.

Regards,
Stefan

v3:
- Added Yao's R-b's
- Added Amd, Bhyve, and Ovmf maintainers and reviewers to Cc
=
v2:
- 1/4: Added missing link library
- 2/4: Modified other BdsPlatform.c files as well
- Added Yao's comments to 1/2 and 2/2


Stefan Berger (4):
OvmfPkg/TPM PPI: Connect default consoles for user interaction
OvmfPkg: Handle TPM 2 physical presence opcodes much earlier
OvmfPkg: Reference new Tcg2PlatformDxe in the build system for
compilation
OvmfPkg: Reference new Tcg2PlatformPei in the build system

OvmfPkg/AmdSev/AmdSevX64.dsc | 8 ++++++++
OvmfPkg/AmdSev/AmdSevX64.fdf | 2 ++
.../PlatformBootManagerLib/BdsPlatform.c | 19 +++++++++++--------
.../PlatformBootManagerLibBhyve/BdsPlatform.c | 17 ++++++++++-------
.../PlatformBootManagerLibGrub/BdsPlatform.c | 17 ++++++++++-------
.../DxeTcg2PhysicalPresenceLib.c | 5 +++++
.../DxeTcg2PhysicalPresenceLib.inf | 1 +
OvmfPkg/OvmfPkgIa32.dsc | 8 ++++++++
OvmfPkg/OvmfPkgIa32.fdf | 2 ++
OvmfPkg/OvmfPkgIa32X64.dsc | 8 ++++++++
OvmfPkg/OvmfPkgIa32X64.fdf | 2 ++
OvmfPkg/OvmfPkgX64.dsc | 8 ++++++++
OvmfPkg/OvmfPkgX64.fdf | 2 ++
13 files changed, 77 insertions(+), 22 deletions(-)

--
2.31.1


[PATCH v3 1/4] OvmfPkg/TPM PPI: Connect default consoles for user interaction

Stefan Berger
 

From: Stefan Berger <stefanb@linux.vnet.ibm.com>

Activate the default console when user interaction is required for
the processing of TPM 2 physical presence interface opcodes.

Background:
TPM 2 physical presence interface (PPI) opcodes need to be handled before
the TPM 2 platform hierarchy is disabled. Due to this requirement we will
move the function call to handle the PPI opcodes into
PlatformBootManagerBeforeConsole() which runs before the initialization
of the consoles. However, since for interaction with the user we need
the console to be available, activate it now before displaying any message
to the user.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
---
.../Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLib.c | 5 +++++
.../DxeTcg2PhysicalPresenceLib.inf | 1 +
2 files changed, 6 insertions(+)

diff --git a/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPre=
senceLib.c b/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPre=
senceLib.c
index 00d76ba2c2..33a470f6d8 100644
--- a/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLi=
b.c
+++ b/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLi=
b.c
@@ -32,6 +32,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/UefiBootServicesTableLib.h>=0D
#include <Library/UefiLib.h>=0D
#include <Library/UefiRuntimeServicesTableLib.h>=0D
+#include <Library/UefiBootManagerLib.h>=0D
=0D
#include <Library/Tcg2PhysicalPresenceLib.h>=0D
=0D
@@ -591,6 +592,10 @@ Tcg2UserConfirm (
return FALSE;=0D
}=0D
=0D
+ // Console for user interaction=0D
+ // We need to connect all trusted consoles for TCG PP. Here we treat all=
consoles in OVMF to be trusted consoles.=0D
+ EfiBootManagerConnectAllDefaultConsoles ();=0D
+=0D
if (TpmPpCommand < TCG2_PHYSICAL_PRESENCE_STORAGE_MANAGEMENT_BEGIN) {=0D
if (CautionKey) {=0D
TmpStr1 =3D Tcg2PhysicalPresenceGetStringById (STRING_TOKEN (TPM_CAU=
TION_KEY));=0D
diff --git a/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPre=
senceLib.inf b/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalP=
resenceLib.inf
index 85ce0e2b29..5b5417c321 100644
--- a/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLi=
b.inf
+++ b/OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLi=
b.inf
@@ -59,6 +59,7 @@
PrintLib=0D
QemuFwCfgLib=0D
Tpm2CommandLib=0D
+ UefiBootManagerLib=0D
UefiBootServicesTableLib=0D
UefiLib=0D
UefiRuntimeServicesTableLib=0D
--=20
2.31.1

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