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Re: [edk2-platforms][PATCH V1 1/1] Maintainters.txt: Add Isaac Oram to common Intel packages
Pushed as 499011f5c9..9a3ff0e812
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Pushed as 499011f5c9..9a3ff0e812
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By
Isaac Oram
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#90425
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Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg/GalagoPro3: Add FSP Dispatch Mode PCDs
Pushed: https://github.com/tianocore/edk2-platforms/commit/499011f
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Pushed: https://github.com/tianocore/edk2-platforms/commit/499011f
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By
Nate DeSimone
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#90424
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Re: [edk2-platforms] [PATCH V2 0/4] Enable CPU pwr mgmt in FADT for Intel client boards
The series has been pushed as ~af3727a..19d3b5d
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The series has been pushed as ~af3727a..19d3b5d
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By
Nate DeSimone
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#90423
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Re: [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
Pushed: https://github.com/tianocore/edk2-platforms/commit/f427247
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Pushed: https://github.com/tianocore/edk2-platforms/commit/f427247
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By
Nate DeSimone
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#90422
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Re: [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
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Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
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By
Nate DeSimone
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#90421
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Re: [edk2-platforms][PATCH V2 1/1] WhitleySiliconPkg/PchPolicyPpi: Fix binary structure layout
Pushed as c546cc01f1..2a236ae742
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Pushed as c546cc01f1..2a236ae742
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By
Isaac Oram
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#90420
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Re: Clarification of Memory management in PEI phase
This is basically:
(*PeiServices)->InstallPeiMemory (PeiServices, MemoryBegin, MemoryLength);
This is how you tell the PEI Core the location of the memory that will can be used in PEI.
It basically
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This is basically:
(*PeiServices)->InstallPeiMemory (PeiServices, MemoryBegin, MemoryLength);
This is how you tell the PEI Core the location of the memory that will can be used in PEI.
It basically
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By
Andrew Fish
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#90419
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[edk2-platforms][PATCH V1 7/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-N2-Cfg1
RD-N2-Cfg1 platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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RD-N2-Cfg1 platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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By
Pranav Madhu
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#90418
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[edk2-platforms][PATCH V1 6/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-N2
RD-N2 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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RD-N2 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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By
Pranav Madhu
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#90417
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[edk2-platforms][PATCH V1 5/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-V1-MC
RD-V1-MC platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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RD-V1-MC platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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By
Pranav Madhu
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#90416
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[edk2-platforms][PATCH V1 4/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-V1
RD-V1 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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RD-V1 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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By
Pranav Madhu
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#90415
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[edk2-platforms][PATCH V1 3/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-N1-Edge-X2
RD-N1-Edge-X2 platform supports only the platform co-ordinated LPI. So
fix the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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RD-N1-Edge-X2 platform supports only the platform co-ordinated LPI. So
fix the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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By
Pranav Madhu
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#90414
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[edk2-platforms][PATCH V1 2/7] Platform/Sgi: Fix ACPI Low Power Idle states for RD-N1-Edge
RD-N1-Edge platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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RD-N1-Edge platform supports only the platform co-ordinated LPI. So fix
the LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency
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By
Pranav Madhu
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#90413
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[edk2-platforms][PATCH V1 1/7] Platform/Sgi: Fix ACPI Low Power Idle states for SGI575
SGI-575 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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SGI-575 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter
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By
Pranav Madhu
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#90412
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[edk2-platforms][PATCH V1 0/7] Fix ACPI Low Power Idle states for RD platforms
The DSDT ACPI table used for Neoverse reference design platforms include
the _LPI control method for the kernel to enter idle states. This patch
series fixes bugs in the existing _LPI control method
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The DSDT ACPI table used for Neoverse reference design platforms include
the _LPI control method for the kernel to enter idle states. This patch
series fixes bugs in the existing _LPI control method
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By
Pranav Madhu
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#90411
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[PATCH v2 1/1] Tools\FitGen: Add extra parameter fixed FIT address
From: fanwang2intel <fan.wang@...>
Add "-T <FixedFitLocation>" parameter to provide fixed
FIT address on flash region. When this parameter is set
to a valid address in the input FD/FV file,
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From: fanwang2intel <fan.wang@...>
Add "-T <FixedFitLocation>" parameter to provide fixed
FIT address on flash region. When this parameter is set
to a valid address in the input FD/FV file,
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By
wenyijia <wenyi.jiang@...>
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#90410
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Clarification of Memory management in PEI phase
Hello everyone,
Can anyone help me with understanding dynamic memory management in PEI
phase? In the UEFI Platform Integration Specification, version 1.7
Errata A, Section 4.6, PEI Memory services
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Hello everyone,
Can anyone help me with understanding dynamic memory management in PEI
phase? In the UEFI Platform Integration Specification, version 1.7
Errata A, Section 4.6, PEI Memory services
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By
Ayush Singh
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#90409
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[edk2-platforms][PATCH V3 9/9] Platform/Sgi: Update ACPI version to v6.4 for RD-N2-Cfg1 platform
Update the RD-N2-Cfg1 platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache
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Update the RD-N2-Cfg1 platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache
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By
Pranav Madhu
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#90408
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[edk2-platforms][PATCH V3 8/9] Platform/Sgi: Update ACPI version to v6.4 for RD-N2 platform
Update the RD-N2 platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache ID
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Update the RD-N2 platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache ID
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By
Pranav Madhu
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#90407
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[edk2-platforms][PATCH V3 7/9] Platform/Sgi: Update ACPI version to v6.4 for RD-V1-MC platform
Update the RD-V1-MC platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache
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Update the RD-V1-MC platform specific ACPI tables to ACPI version
v6.4. Significant changes introduced are to add SPE overflow interrupt
number field to GICC structure of MADT table and adding cache
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By
Pranav Madhu
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#90406
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