BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3711 OvmfPkg.dec is removed from [Packages] because it doesn't depend on OvmfPkg. LocalApicTimerDxe is moved to UefiCpuPkg. Cc: Gerd Hoffmann

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3711 Discussion in https://bugzilla.tianocore.org/show_bug.cgi?id=1496 shows that 8254TimerDxe was not written for OVMF. It was moved over

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3711 Per SDM, changing the mode of APIC timer (from one-shot to periodic or vice versa) by writing to the timer LVT entry does not start the

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3711 XenTimerDxe is a local Apic timer driver and it has nothing to do with Xen. So rename it to LocalApicTimerDxe. Cc: Jordan Justen

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 The IOMMU protocol driver provides capabilities to set a DMA access attribute and methods to allocate, free, map and unmap the DMA memory for

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In the previous QemuFwCfgDxe only SEV is supported. This commit introduce TDX support in QemuFwCfgDxe. Cc: Jordan Justen

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Add Intel Tdx helper library. The library provides the routines to: - set or clear Shared bit for a given memory region. - query whether TDX

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TdxDxe driver is dispatched early in DXE, due to being list in APRIORI. This module is responsible for below features: - Sets max logical

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In TDX the guest firmware is designed to publish a multiprocessor-wakeup structure to let the guest-bootstrap processor wake up

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Intel TDX has its own requirement in InitializePlatform (PlatformPei). 1. Publish the ram region Host VMM pass the memory region to TDVF in

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 MMIO region in Tdx guest is set with PcdTdxSharedBitMask in TdxDxe's entry point. In SEV guest the page table entries is set

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Guest Physical Address (GPA) space in Td guest is divided into private and shared sub-spaces, determined by the SHARED bit of GPA. This

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In TDX IA32_ERER is RO to host VMM. It could not be changed. PcdIa32EferChangeAllowed is added in MdeModulePkg.dec and it is to be set to

RFC： https://bugzilla.tianocore.org/show_bug.cgi?id=3429 If TDX is enabled then we do not support DMA operation in PEI phase. This is mainly because DMA in TDX guest requires using bounce

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 There are below major changes in this commit. 1. SecEntry.nasm In TDX BSP and APs goes to the same entry point in SecEntry.nasm. BSP

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 EFI_RESOURCE_ATTRIBUTE_ENCRYPTED is Physical memory encrypted attribute. It indicates the memory uses platform encrpytion capabilities

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In Tdx BSP may issues commands to APs for some task, for example, to accept pages paralelly. BSP also need to wait until all the APs have done

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 IntelTdx.h defines the defitions used by TDX in OvmfPkg: - Mailbox related defitions,such as the data structure, command code, AP

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In TDVF BSP and APs are simplified. BSP is the vCPU-0, while the others are treated as APs. So MP intialization is rather simple. The

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Add macros CC_GUEST_IS_SEV / CC_GUEST_IS_TDX to check SEV / TDX guest. Cc: Ray Ni <ray.ni@...> Cc: Eric Dong <eric.dong@...> Cc: