Hi Chandni, I would suggest adding a brief introduction about the Morello SoC platform in the commit message. Otherwise, this patch looks good to me. With the commit message updated. Reviewed-by:

Hi Chandni, Since you have the CPU information in MADT.GICC and the PPTT table, it should be possible to use the SSDT CPU generator to create the AML description for the CPUs. This patch series can

Hi Brijesh, A Tianocore wiki article is being prepared but the background and instructions for what to do were sent in this mail regarding the hard freeze being lifted -

Hi Chandni, Please find my feedback inline marked [SAMI]. With that fixed, Reviewed-by: Sami Mujawar <sami.mujawar@...> Regards, Sami Mujawar [SAMI] One print format specifier appears to be

Hi Chandni, Thank you for this patch. Please find my feedback inline marked [SAMI]. With that updated, Reviewed-by: Sami Mujawar <sami.mujawar@...> Regards, Sami Mujawar [SAMI] I think the

Hi Chandni, Thank you for this patch. I think the following change from "[edk2-platforms][PATCH V1 05/11] Platform/ARM/Morello: Add initial support for Morello SoC" should be part of this patch.

I will send a patch for the Tianocore Wiki shortly. Thanks, Michael

Hi All, I am rebasing the SNP series and encountering the error like below from the CI. I am not sure what I am missing. For testing purpose, I just tried one commit and CI Windows build complains

Manic, Please move UBA Junction City specific content into JunctionCity folder. We should do the same for the different RVP boards as well. The MinPlatform design goal is to have the shared code

Mike, How is this documented outside of this patch set? Is there a Tianocore Wiki page on configuring uncrustify? Does that Readme.rst link to that? Thanks, Andrew Fish

Hello, Thank you to everyone for their patience and for everyone who helped with the development and review of this important update to the edk2 repository. The last 2 PR series have completed

Isaac : Thank you for your review comments. Please see the inline response and provide your comments if there is any.

Added IntelDieInfo header into IntelSiliconPkg tree. The purpose is to have generic and unified interface for getting information about dies installed in the system. It will be implemented by silicon

This commit will add a protocol/PPI definition which will provide a generic and unified way to get information about dies installed in the system(PCH, SoC, CPU). It will be implemented per generation

Hi Mike, Thanks a lot for these changes. Reviewed-by: Sami Mujawar <sami.mujawar@...> Regards, Sami Mujawar On 06/12/2021, 01:18, "devel@edk2.groups.io on behalf of Michael D Kinney via

Update VTd register structs accroding to VTd spec ver 3.3 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3765 Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Cc: Jenny Huang

VTdInfoNotify may be called manay times, PEI DMA buffer should be generated only once. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3667 Cc: Rangasai V Chaganty

It is DRHD(DMA Remapping Hardware Unit Definition). REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3622 Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Cc: Jenny Huang

If VTd ECAP_REG.ADMS bit is set, abort DMA mode is supported. When VTd Abort DMA Mode is enabled, hardware will abort all DMA operations without the need to set up a root-table with each entry

[PATCH 1/4] IntelSiliconPkg/VTd: Fix typos [PATCH 2/4] IntelSiliconPkg/VTd: Update VTd register structs [PATCH 3/4] IntelSiliconPkg/VTd: Support VTd Abort DMA Mode [PATCH 4/4] IntelSiliconPkg/VTd: