Hello Everyone, I am Ayush Singh, a 2nd-year university student from the Indian Institute of Technology (Indian School of Mines), Dhanbad, India. In Google Summer of Code 2022, I will be working on

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

Today InitializeCpuExceptionHandlersEx is called from three modules: 1. DxeCore (links to DxeCpuExceptionHandlerLib) DxeCore expects it initializes the IDT entries as well as assigning

InitializeCpuExceptionHandlers() expects caller allocates IDT while InitializeCpuInterruptHandlers() allocates 256 IDT entries itself. InitializeCpuExceptionHandlers() fills max 32 IDT entries

Signed-off-by: Ray Ni <ray.ni@...> Cc: Eric Dong <eric.dong@...> --- .../CpuExceptionHandlerLib/DxeException.c | 24 ++++--------------- 1 file changed, 5 insertions(+), 19

Additionally removed two useless global variables: "SPIN_LOCK mDisplayMessageSpinLock" from SMM instance. "UINTN mEnabledInterruptNum" from DXE instance. Signed-off-by: Ray Ni <ray.ni@...> Cc:

Today the DXE instance allocates code page and then copies the IDT vectors to the allocated code page. Then it fixes up the vector number in the IDT vector. But if we update the NASM file to generate

Ray Ni (5): CpuException: Avoid allocating code pages for DXE instance CpuException: Init global variables in-place CpuException: Avoid allocating page but using global variables CpuException:

Cc: Ray Ni <ray.ni@...> Cc: Jian J Wang <jian.j.wang@...> Signed-off-by: cbduggap <chinni.b.duggapu@...> --- MdeModulePkg/Core/DxeIplPeim/DxeLoad.c | 1 + 1 file changed, 1

Merged as #2910 Thanks all,

Ray, Could we add one API (like InitializeApicTimerEx) to intialize CPU local APCI with additional parameter to indicate if interrupt is to be enabled or not? Just like HPE's solution.

Tom: This patch fixes the regression issue. So, I am OK to merge it for this stable tag. Thanks Liming

Thanks Liming. Merged https://github.com/tianocore/edk2/pull/2909

Reviewed-by: Liming Gao <gaoliming@...>

Explicitly adding Liming to the To: line for visibility. Thanks, Tom

Hi all, We (Hewlett Packard Enterprise) are also running into a race condition due to how InitializeApicTimer initializes the APIC timers, we figured this might be a good place to report our

Hi, we discovered that qemu-ovmf-x86_64 doesn't start when compiled using gcc-12. Originally reported as: https://bugzilla.suse.com/show_bug.cgi?id=1199597 I run qemu as: qemu-kvm -drive

Hi Ray, Sorry I missed your reply somehow. I'll send a v3 that splits the series in 4 patches: 1/4 MdePkg: introduce SnpSecretPageDef.h 2/4 MdePkg: introduce

Most commonly this has been because of a microcode mismatch with the populated processor. Update edk2-non-osi/Silicon/Intel/WhitleySiliconBinPkg/IcxMicrocode with microcode matching a successfully

Ray, Any update on this? Thanks Ashish