Date   

[edk2-platforms][PATCH V2 0/7] Fix ACPI Low Power Idle states for RD platforms

Pranav Madhu
 

Changes since V1:
- Rebased on top of latest master branch.

The DSDT ACPI table used for Neoverse reference design platforms include
the _LPI control method for the kernel to enter idle states. This patch
series fixes bugs in the existing _LPI control method due to which
certain high level OS failed to boot on the supported Neoverse reference
design platforms. For each platform, the fixes include - clearing level
ID value as the platform supports only platform co-ordinated _LPI and
removing residency counter frequency as the platform does not implement
residency counter.

In addition to this, the RD-N2 and RD-N2-Cfg1 platforms are direct
connect platforms and so the _LPI control method for cluster is removed.

Link to github branch with the patches in this series -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/lpi_fix_for_rd=
_platforms

Reviewed-by: Pierre Gondois <pierre.gondois@...>
Reviewed-by: Thomas Abraham <thomas.abraham@...>

Pranav Madhu (7):
Platform/Sgi: Fix ACPI Low Power Idle states for SGI575
Platform/Sgi: Fix ACPI Low Power Idle states for RD-N1-Edge
Platform/Sgi: Fix ACPI Low Power Idle states for RD-N1-Edge-X2
Platform/Sgi: Fix ACPI Low Power Idle states for RD-V1
Platform/Sgi: Fix ACPI Low Power Idle states for RD-V1-MC
Platform/Sgi: Fix ACPI Low Power Idle states for RD-N2
Platform/Sgi: Fix ACPI Low Power Idle states for RD-N2-Cfg1

Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl | 8 +-
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl | 8 +-
Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl | 78 +---------------=
----
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl | 54 +-------------
Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl | 8 +-
Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl | 8 +-
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl | 8 +-
7 files changed, 28 insertions(+), 144 deletions(-)

--=20
2.25.1


Re: [edk2-platforms][PATCH v1 1/1] Silicon/Qemu: Provide _STA ACPI method

Ard Biesheuvel
 

On Tue, 28 Jun 2022 at 18:26, Dimitrije Pavlov <Dimitrije.Pavlov@...> wrote:

SBBR requires platforms to provide the _STA ACPI method for each
defined device. This patch implements a stub method that always
indicates devices are present and functional.

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Leif Lindholm <quic_llindhol@...>
Cc: Graeme Gregory <graeme@...>
Cc: Radoslaw Biernacki <rad@...>
Cc: Jeff Booher-Kaeding <Jeff.Booher-Kaeding@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Sunny Wang <Sunny.Wang@...>
Cc: Jeremy Linton <Jeremy.Linton@...>

Signed-off-by: Dimitrije Pavlov <Dimitrije.Pavlov@...>
For the record, I will mention again that I think it is a stupid idea
to *require* that every object has a _STA method that behaves exactly
the same as having no _STA at all. Oh well ...

Pushed as f653a22385f5..8e067b431294


[edk2-platforms][PATCH v1 1/1] Silicon/Qemu: Provide _STA ACPI method

Dimitrije Pavlov
 

SBBR requires platforms to provide the _STA ACPI method for each
defined device. This patch implements a stub method that always
indicates devices are present and functional.

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Leif Lindholm <quic_llindhol@...>
Cc: Graeme Gregory <graeme@...>
Cc: Radoslaw Biernacki <rad@...>
Cc: Jeff Booher-Kaeding <Jeff.Booher-Kaeding@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Sunny Wang <Sunny.Wang@...>
Cc: Jeremy Linton <Jeremy.Linton@...>

Signed-off-by: Dimitrije Pavlov <Dimitrije.Pavlov@...>
---
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 38 +++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 1bf9fbb99e75..3357916571fe 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -16,6 +16,9 @@
Name (_PRS, ResourceTemplate() { \
Interrupt (ResourceProducer, Level, ActiveHigh, Exclusive) { Irq } \
}) \
+ Method (_STA) { \
+ Return (0xF) \
+ } \
Method (_CRS, 0) { Return (_PRS) } \
Method (_SRS, 1) { } \
Method (_DIS) { } \
@@ -40,6 +43,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x00001000)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 33 }
})
+ Method (_STA) {
+ Return (0xF)
+ }
}

// AHCI Host Controller
@@ -57,13 +63,18 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
FixedPcdGet32 (PcdPlatformAhciSize))
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 42 }
})
+ Method (_STA) {
+ Return (0xF)
+ }
}

// USB EHCI Host Controller
Device (USB0) {
Name (_HID, "LNRO0D20")
Name (_CID, "PNP0D20")
-
+ Method (_STA) {
+ Return (0xF)
+ }
Method (_CRS, 0x0, Serialized) {
Name (RBUF, ResourceTemplate() {
Memory32Fixed (ReadWrite,
@@ -77,6 +88,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
// Root Hub
Device (RHUB) {
Name (_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec
+ Method (_STA) {
+ Return (0xF)
+ }

// Ports connected to Root Hub
Device (HUB1) {
@@ -87,6 +101,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x00000000, // Reserved 0 must be zero
0x00000000 // Reserved 1 must be zero
})
+ Method (_STA) {
+ Return (0xF)
+ }

Device (PRT1) {
Name (_ADR, 0x00000001)
@@ -102,6 +119,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
})
+ Method (_STA) {
+ Return (0xF)
+ }
} // USB0_RHUB_HUB1_PRT1
Device (PRT2) {
Name (_ADR, 0x00000002)
@@ -117,6 +137,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
})
+ Method (_STA) {
+ Return (0xF)
+ }
} // USB0_RHUB_HUB1_PRT2

Device (PRT3) {
@@ -133,6 +156,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
})
+ Method (_STA) {
+ Return (0xF)
+ }
} // USB0_RHUB_HUB1_PRT3

Device (PRT4) {
@@ -149,6 +175,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
})
+ Method (_STA) {
+ Return (0xF)
+ }
} // USB0_RHUB_HUB1_PRT4
} // USB0_RHUB_HUB1
} // USB0_RHUB
@@ -164,6 +193,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_UID, "PCI0")
Name (_CCA, One) // Initially mark the PCI coherent (for JunoR1)

+ Method (_STA) {
+ Return (0xF)
+ }
+
Method (_CBA, 0, NotSerialized) {
return (FixedPcdGet32 (PcdPciExpressBaseAddress))
}
@@ -402,6 +435,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
FixedPcdGet64 (PcdPciExpressBarSize), // Length
,, , AddressRangeMemory, TypeStatic)
})
+ Method (_STA) {
+ Return (0xF)
+ }
}

// OS Control Handoff
--
2.34.1


[PATCH] UefiPayloadPkg: Add macro to support selective driver in UPL

Lu, James
 

From: James Lu <james.lu@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3967

Add macros to decide modules built into UPL.elf.

Macro list:
- GENERIC_MEMORY_TEST_ENABLE: GenericMemoryTestDxe
- NULL_MEMORY_TEST_ENABLE: NullMemoryTestDxe
- ATA_ENABLE: SataControllerDxe, AtaBusDxe, AtaAtapiPassThruDxe
- SD_ENABLE: SdMmcPciDxe, EmmcDxe, SdDxe
- PS2_MOUSE_ENABLE: Ps2MouseDxe

Cc: Guo Dong <guo.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Gua Guo <gua.guo@...>
Signed-off-by: James Lu <james.lu@...>
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 18 ++++++++++++++++++
UefiPayloadPkg/UefiPayloadPkg.fdf | 15 ++++++++++++++-
2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload=
Pkg.dsc
index cfcf38578d..9e94a40d72 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -36,6 +36,11 @@
DEFINE PLATFORM_BOOT_TIMEOUT =3D 3=0D
DEFINE ABOVE_4G_MEMORY =3D TRUE=0D
DEFINE BOOT_MANAGER_ESCAPE =3D FALSE=0D
+ DEFINE GENERIC_MEMORY_TEST_ENABLE =3D FALSE=0D
+ DEFINE NULL_MEMORY_TEST_ENABLE =3D TRUE=0D
+ DEFINE ATA_ENABLE =3D TRUE=0D
+ DEFINE SD_ENABLE =3D TRUE=0D
+ DEFINE PS2_MOUSE_ENABLE =3D TRUE=0D
DEFINE SD_MMC_TIMEOUT =3D 1000000=0D
#=0D
# SBL: UEFI payload for Slim Bootloader=0D
@@ -596,7 +601,12 @@
MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRun=
timeDxe.inf=0D
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf=0D
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf=0D
+!if $(GENERIC_MEMORY_TEST_ENABLE) =3D=3D TRUE=0D
+ MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/GenericMemoryTest=
Dxe.inf=0D
+!endif=0D
+!if $(NULL_MEMORY_TEST_ENABLE) =3D=3D TRUE=0D
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.in=
f=0D
+!endif=0D
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf=0D
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf=0D
@@ -631,9 +641,11 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf=0D
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf=0D
FatPkg/EnhancedFatDxe/Fat.inf=0D
+!if $(ATA_ENABLE) =3D=3D TRUE=0D
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf=0D
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf=0D
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf=0D
+!endif=0D
MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf=0D
MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf=0D
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf=0D
@@ -644,9 +656,11 @@
#=0D
# SD/eMMC Support=0D
#=0D
+!if $(SD_ENABLE) =3D=3D TRUE=0D
MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf=0D
MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf=0D
MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf=0D
+!endif=0D
=0D
#=0D
# Usb Support=0D
@@ -671,7 +685,9 @@
!if $(PS2_KEYBOARD_ENABLE) =3D=3D TRUE=0D
MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf=0D
!endif=0D
+!if $(PS2_MOUSE_ENABLE) =3D=3D TRUE=0D
MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf=0D
+!endif=0D
=0D
#=0D
# Console Support=0D
@@ -742,12 +758,14 @@
# This should be FALSE for compiling the dynamic command.=0D
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE=0D
}=0D
+!if $(PERFORMANCE_MEASUREMENT_ENABLE) =3D=3D TRUE=0D
ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf {=0D
<PcdsFixedAtBuild>=0D
## This flag is used to control initialization of the shell library=
=0D
# This should be FALSE for compiling the dynamic command.=0D
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE=0D
}=0D
+!endif=0D
ShellPkg/Application/Shell/Shell.inf {=0D
<PcdsFixedAtBuild>=0D
## This flag is used to control initialization of the shell library=
=0D
diff --git a/UefiPayloadPkg/UefiPayloadPkg.fdf b/UefiPayloadPkg/UefiPayload=
Pkg.fdf
index c7b04978ad..5aa228e828 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.fdf
+++ b/UefiPayloadPkg/UefiPayloadPkg.fdf
@@ -149,7 +149,12 @@ INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRea=
lTimeClockRuntimeDxe.inf
=0D
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf=0D
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf=0D
-INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.=
inf=0D
+!if $(GENERIC_MEMORY_TEST_ENABLE) =3D=3D TRUE=0D
+INF MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/GenericMemoryT=
estDxe.inf=0D
+!endif=0D
+!if $(NULL_MEMORY_TEST_ENABLE) =3D=3D TRUE=0D
+INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe=
.inf=0D
+!endif=0D
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf=0D
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf=0D
@@ -176,7 +181,9 @@ INF OvmfPkg/SioBusDxe/SioBusDxe.inf
!if $(PS2_KEYBOARD_ENABLE) =3D=3D TRUE=0D
INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf=0D
!endif=0D
+!if $(PS2_MOUSE_ENABLE) =3D=3D TRUE=0D
INF MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf=0D
+!endif=0D
=0D
#=0D
# Console Support=0D
@@ -195,9 +202,11 @@ INF UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutputDxe=
.inf
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf=0D
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf=0D
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf=
=0D
+!if $(ATA_ENABLE) =3D=3D TRUE=0D
INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf=0D
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf=0D
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf=0D
+!endif=0D
INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf=0D
INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf=0D
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf=0D
@@ -209,9 +218,11 @@ INF FatPkg/EnhancedFatDxe/Fat.inf
#=0D
# SD/eMMC Support=0D
#=0D
+!if $(SD_ENABLE) =3D=3D TRUE=0D
INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf=0D
INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf=0D
INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf=0D
+!endif=0D
=0D
#=0D
# Usb Support=0D
@@ -241,7 +252,9 @@ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTable=
Dxe.inf
#=0D
!if $(SHELL_TYPE) =3D=3D BUILD_SHELL=0D
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf=0D
+!if $(PERFORMANCE_MEASUREMENT_ENABLE) =3D=3D TRUE=0D
INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf=0D
+!endif=0D
INF ShellPkg/Application/Shell/Shell.inf=0D
!endif=0D
=0D
--=20
2.26.2.windows.1


[PATCH] ArmVirtPkg: do not enable iSCSI driver by default

Ard Biesheuvel
 

The iSCSI driver slows down the boot on a pristine variable store flash
image, as it creates a couple of large EFI non-volatile variables to
preserve state between boots.

Since iSCSI boot for VMs is kind of niche anyway, let's default to
disabled. If someone needs it in their build, they can use the -D build
command option to re-enable it on the fly.

Signed-off-by: Ard Biesheuvel <ardb@...>
---
ArmVirtPkg/ArmVirtQemu.dsc | 1 -
ArmVirtPkg/ArmVirtQemuKernel.dsc | 1 -
2 files changed, 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 9369a88858fd..45c4a8fc84e0 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -40,7 +40,6 @@ [Defines]
DEFINE NETWORK_SNP_ENABLE =3D FALSE=0D
DEFINE NETWORK_TLS_ENABLE =3D FALSE=0D
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS =3D TRUE=0D
- DEFINE NETWORK_ISCSI_ENABLE =3D TRUE=0D
=0D
!if $(NETWORK_SNP_ENABLE) =3D=3D TRUE=0D
!error "NETWORK_SNP_ENABLE is IA32/X64/EBC only"=0D
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKerne=
l.dsc
index 7f7d15d6eee3..66039f07f41b 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -38,7 +38,6 @@ [Defines]
DEFINE NETWORK_SNP_ENABLE =3D FALSE=0D
DEFINE NETWORK_TLS_ENABLE =3D FALSE=0D
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS =3D TRUE=0D
- DEFINE NETWORK_ISCSI_ENABLE =3D TRUE=0D
=0D
!if $(NETWORK_SNP_ENABLE) =3D=3D TRUE=0D
!error "NETWORK_SNP_ENABLE is IA32/X64/EBC only"=0D
--=20
2.35.1


Re: [PATCH v1] UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support

Ni, Ray
 

- //
- // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
- //
- if ((RegEdx & BIT12) != 0) {
- //
- // Check MTRR_CAP MSR bit 11 for SMRR support
- //
- if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0)
{
- mSmrrSupported = TRUE;
1. can we keep the logic but just replace the above line as "ASSERT (FeaturePcdGet (PcdSmrrEnable));"?

if ((FeatureControl & BIT3) == 0) {
- if ((FeatureControl & BIT0) == 0) {
+ if (((FeatureControl & BIT0) == 0) && (FeaturePcdGet (PcdSmrrEnable)))
{
AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL,
FeatureControl | BIT3);
} else {
- mSmrrSupported = FALSE;
+ ASSERT (!FeaturePcdGet (PcdSmrrEnable));
2. If PcdSmrrEnable is TRUE but the FeatureControl MSR is locked (BIT0 is set),
above assertion will be hit. We may need to reconsider the code logic.

- {
- //
- // Check to see if the CPU supports the SMM Code Access Check feature
- // Do not access this MSR unless the CPU supports the
SmmRegFeatureControl
- //
- if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) &
SMM_CODE_ACCESS_CHK_BIT) != 0) {
- mSmmFeatureControlSupported = TRUE;
3. can we keep the logic but just replace the above line as "ASSERT (FeaturePcdGet (PcdSmmFeatureControlEnable))"?


[PATCH v1] UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support

Wu, Jiaxin
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3962

Two SMM variables (mSmrrSupported & mSmmFeatureControlSupported) are global
variables, they control whether the SMRR and SMM Feature Control MSR will
be restored respectively.
To avoid the TOCTOU, add PCD to control SMRR & SmmFeatureControl enable.

Change-Id: I6835e4b0e12c5e6f52effb60fd9224e3eb97fc0d
Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Signed-off-by: Jiaxin Wu <jiaxin.wu@...>
---
.../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 ++
.../SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c | 84 ++++------------------
.../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 4 ++
.../StandaloneMmCpuFeaturesLib.inf | 4 ++
UefiCpuPkg/UefiCpuPkg.dec | 12 ++++
UefiCpuPkg/UefiCpuPkg.uni | 12 ++++
6 files changed, 48 insertions(+), 72 deletions(-)

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
index 35292dac31..7b5cef9700 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
@@ -33,5 +33,9 @@
MemoryAllocationLib
DebugLib

[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
+
+[FeaturePcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
index 78de7f8407..b88cdece2a 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
@@ -35,20 +35,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// MSRs required for configuration of SMM Code Access Check
//
#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
#define SMM_CODE_ACCESS_CHK_BIT BIT58

-//
-// Set default value to assume SMRR is not supported
-//
-BOOLEAN mSmrrSupported = FALSE;
-
-//
-// Set default value to assume MSR_SMM_FEATURE_CONTROL is not supported
-//
-BOOLEAN mSmmFeatureControlSupported = FALSE;
-
//
// Set default value to assume IA-32 Architectural MSRs are used
//
UINT32 mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;
UINT32 mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;
@@ -81,39 +71,27 @@ CpuFeaturesLibInitialization (
UINTN ModelId;

//
// Retrieve CPU Family and Model
//
- AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
+ AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);
FamilyId = (RegEax >> 8) & 0xf;
ModelId = (RegEax >> 4) & 0xf;
if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
ModelId = ModelId | ((RegEax >> 12) & 0xf0);
}

- //
- // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
- //
- if ((RegEdx & BIT12) != 0) {
- //
- // Check MTRR_CAP MSR bit 11 for SMRR support
- //
- if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {
- mSmrrSupported = TRUE;
- }
- }
-
//
// Intel(R) 64 and IA-32 Architectures Software Developer's Manual
// Volume 3C, Section 35.3 MSRs in the Intel(R) Atom(TM) Processor Family
//
// If CPU Family/Model is 06_1CH, 06_26H, 06_27H, 06_35H or 06_36H, then
// SMRR Physical Base and SMM Physical Mask MSRs are not available.
//
if (FamilyId == 0x06) {
if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) || (ModelId == 0x35) || (ModelId == 0x36)) {
- mSmrrSupported = FALSE;
+ ASSERT (!FeaturePcdGet (PcdSmrrEnable));
}
}

//
// Intel(R) 64 and IA-32 Architectures Software Developer's Manual
@@ -194,14 +172,10 @@ SmmCpuFeaturesInitializeProcessor (
IN CPU_HOT_PLUG_DATA *CpuHotPlugData
)
{
SMRAM_SAVE_STATE_MAP *CpuState;
UINT64 FeatureControl;
- UINT32 RegEax;
- UINT32 RegEdx;
- UINTN FamilyId;
- UINTN ModelId;

//
// Configure SMBASE.
//
CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
@@ -214,17 +188,17 @@ SmmCpuFeaturesInitializeProcessor (
// If Intel(R) Core(TM) Core(TM) 2 Processor Family MSRs are being used, then
// make sure SMRR Enable(BIT3) of MSR_FEATURE_CONTROL MSR(0x3A) is set before
// accessing SMRR base/mask MSRs. If Lock(BIT0) of MSR_FEATURE_CONTROL MSR(0x3A)
// is set, then the MSR is locked and can not be modified.
//
- if (mSmrrSupported && (mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE)) {
+ if (mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE) {
FeatureControl = AsmReadMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL);
if ((FeatureControl & BIT3) == 0) {
- if ((FeatureControl & BIT0) == 0) {
+ if (((FeatureControl & BIT0) == 0) && (FeaturePcdGet (PcdSmrrEnable))) {
AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL, FeatureControl | BIT3);
} else {
- mSmrrSupported = FALSE;
+ ASSERT (!FeaturePcdGet (PcdSmrrEnable));
}
}
}

//
@@ -232,11 +206,11 @@ SmmCpuFeaturesInitializeProcessor (
// The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.
// The code that initializes SMM environment is running in normal mode
// from SMRAM region. If SMRR is enabled here, then the SMRAM region
// is protected and the normal mode code execution will fail.
//
- if (mSmrrSupported) {
+ if (FeaturePcdGet (PcdSmrrEnable)) {
//
// SMRR size cannot be less than 4-KBytes
// SMRR size must be of length 2^n
// SMRR base alignment cannot be less than SMRR length
//
@@ -256,44 +230,10 @@ SmmCpuFeaturesInitializeProcessor (
AsmWriteMsr64 (mSmrrPhysMaskMsr, (~(CpuHotPlugData->SmrrSize - 1) & EFI_MSR_SMRR_MASK));
mSmrrEnabled[CpuIndex] = FALSE;
}
}

- //
- // Retrieve CPU Family and Model
- //
- AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
- FamilyId = (RegEax >> 8) & 0xf;
- ModelId = (RegEax >> 4) & 0xf;
- if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
- ModelId = ModelId | ((RegEax >> 12) & 0xf0);
- }
-
- //
- // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
- // Volume 3C, Section 35.10.1 MSRs in 4th Generation Intel(R) Core(TM)
- // Processor Family.
- //
- // If CPU Family/Model is 06_3C, 06_45, or 06_46 then use 4th Generation
- // Intel(R) Core(TM) Processor Family MSRs.
- //
- if (FamilyId == 0x06) {
- if ((ModelId == 0x3C) || (ModelId == 0x45) || (ModelId == 0x46) ||
- (ModelId == 0x3D) || (ModelId == 0x47) || (ModelId == 0x4E) || (ModelId == 0x4F) ||
- (ModelId == 0x3F) || (ModelId == 0x56) || (ModelId == 0x57) || (ModelId == 0x5C) ||
- (ModelId == 0x8C))
- {
- //
- // Check to see if the CPU supports the SMM Code Access Check feature
- // Do not access this MSR unless the CPU supports the SmmRegFeatureControl
- //
- if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) != 0) {
- mSmmFeatureControlSupported = TRUE;
- }
- }
- }
-
//
// Call internal worker function that completes the CPU initialization
//
FinishSmmCpuFeaturesInitializeProcessor ();
}
@@ -381,11 +321,11 @@ VOID
EFIAPI
SmmCpuFeaturesDisableSmrr (
VOID
)
{
- if (mSmrrSupported && mNeedConfigureMtrrs) {
+ if (FeaturePcdGet (PcdSmrrEnable) && mNeedConfigureMtrrs) {
AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
}
}

/**
@@ -396,11 +336,11 @@ VOID
EFIAPI
SmmCpuFeaturesReenableSmrr (
VOID
)
{
- if (mSmrrSupported && mNeedConfigureMtrrs) {
+ if (FeaturePcdGet (PcdSmrrEnable) && mNeedConfigureMtrrs) {
AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
}
}

/**
@@ -417,11 +357,11 @@ SmmCpuFeaturesRendezvousEntry (
)
{
//
// If SMRR is supported and this is the first normal SMI, then enable SMRR
//
- if (mSmrrSupported && !mSmrrEnabled[CpuIndex]) {
+ if (FeaturePcdGet (PcdSmrrEnable) && !mSmrrEnabled[CpuIndex]) {
AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
mSmrrEnabled[CpuIndex] = TRUE;
}
}

@@ -458,11 +398,11 @@ EFIAPI
SmmCpuFeaturesIsSmmRegisterSupported (
IN UINTN CpuIndex,
IN SMM_REG_NAME RegName
)
{
- if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
+ if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
return TRUE;
}

return FALSE;
}
@@ -484,11 +424,11 @@ EFIAPI
SmmCpuFeaturesGetSmmRegister (
IN UINTN CpuIndex,
IN SMM_REG_NAME RegName
)
{
- if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
+ if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
return AsmReadMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL);
}

return 0;
}
@@ -510,11 +450,11 @@ SmmCpuFeaturesSetSmmRegister (
IN UINTN CpuIndex,
IN SMM_REG_NAME RegName,
IN UINT64 Value
)
{
- if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
+ if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);
}
}

/**
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
index 022351f593..85214ee31c 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
@@ -68,7 +68,11 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES

+[FeaturePcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
+
[Depex]
gEfiMpServiceProtocolGuid
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
index ec97041d8b..3eacab48db 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
@@ -34,5 +34,9 @@
MemoryAllocationLib
PcdLib

[FixedPcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
+
+[FeaturePcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 1951eb294c..55cbe7605f 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -153,10 +153,22 @@
# TRUE - SMM Feature Control MSR will be locked.<BR>
# FALSE - SMM Feature Control MSR will not be locked.<BR>
# @Prompt Lock SMM Feature Control MSR.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B

+ ## Indicates if SMRR will be enabled.<BR><BR>
+ # TRUE - SMRR will be enabled.<BR>
+ # FALSE - SMRR will not be enabled.<BR>
+ # @Prompt Enable SMRR.
+ gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|TRUE|BOOLEAN|0x3213210D
+
+ ## Indicates if SmmFeatureControl will be enabled.<BR><BR>
+ # TRUE - SmmFeatureControl will be enabled.<BR>
+ # FALSE - SmmFeatureControl will not be enabled.<BR>
+ # @Prompt Support SmmFeatureControl.
+ gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|TRUE|BOOLEAN|0x32132110
+
[PcdsFixedAtBuild]
## List of exception vectors which need switching stack.
# This PCD will only take into effect if PcdCpuStackGuard is enabled.
# By default exception #DD(8), #PF(14) are supported.
# @Prompt Specify exception vectors which need switching stack.
diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni
index 219c1963bf..d17bcfd10c 100644
--- a/UefiCpuPkg/UefiCpuPkg.uni
+++ b/UefiCpuPkg/UefiCpuPkg.uni
@@ -98,10 +98,22 @@

#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmFeatureControlMsrLock_HELP #language en-US "Lock SMM Feature Control MSR?<BR><BR>\n"
"TRUE - locked.<BR>\n"
"FALSE - unlocked.<BR>"

+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmrrEnable_PROMPT #language en-US "Indicates if SMRR will be enabled."
+
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmrrEnable_HELP #language en-US "Indicates if SMRR will be enabled.<BR><BR>\n"
+ "TRUE - SMRR will be enabled.<BR>\n"
+ "FALSE - SMRR will not be enabled.<BR>"
+
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmmFeatureControlEnable_PROMPT #language en-US "Indicates if SmmFeatureControl will be enabled."
+
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmmFeatureControlEnable_HELP #language en-US "Indicates if SmmFeatureControl will be enabled.<BR><BR>\n"
+ "TRUE - SmmFeatureControl will be enabled.<BR>\n"
+ "FALSE - SmmFeatureControl will not be enabled.<BR>"
+
#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_PROMPT #language en-US "Stack size in the temporary RAM"

#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_HELP #language en-US "Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize."

#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmProfileSize_PROMPT #language en-US "SMM profile data buffer size"
--
2.16.2.windows.1


Re: [edk2-platforms][PATCH V1 0/5] Platform/Sgi: Add initial support for RD-N2-Cfg2 platform

Ard Biesheuvel
 

On Mon, 27 Jun 2022 at 08:40, Pranav Madhu <pranav.madhu@...> wrote:

RD-N2-Cfg2 platform is the multichip variant of the RD-N2 platform. The
platform is based on 4xMP1 Neoverse N2 CPUs per chip, CMN-700
interconnect 6x6 mesh, multiple AXI expansion ports for I/O Coherent
PCIe, Ethernet, offload and Arm Cortex-M7 for System Control Processor
(SCP) and Manageability Control Processor (MCP).

The first patch in this series defines the addressable bit per chip. The
second patch add the product ID unique for this platform. The third
patch adds ACPI tables, the fourth patch add Edk2 build system files.
The last patch in this series adds SMBIOS support.

This patch series should be applied on top of the patch series:
https://edk2.groups.io/g/devel/message/90765

Link to github branch with the patches in this series -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/rdn2cfg2-initial-support


Pranav Madhu (1):
Platform/Sgi: Extend SMBIOS support for RD-N2-Cfg2

Vijayenthiran Subramaniam (4):
Platform/Sgi: Add a new PCD for defining addressable bits per chip
Platform/Sgi: Add ProductId lookup values for RD-N2-Cfg2 Platform
Platform/Sgi: Add ACPI tables for RD-N2-Cfg2 platform
Platform/Sgi: Add support for RD-N2-Cfg2 Platform
Pushed as 750f6807879b..f653a22385f5

Thanks,


Re: [edk2-platforms][PATCH V4 0/9] Upadate the ACPI tables for RD platforms

Ard Biesheuvel
 

On Mon, 27 Jun 2022 at 08:05, Pranav Madhu <pranav.madhu@...> wrote:

Changes since V3:
- Addressed comments from Pierre Gondois
- Rebased on top of latest master branch

Changes since V2:
- Rebased on top of latest master branch
- Update PPTT table with unique cache ID across the system for different
levels of cache.

Changes since V1:
- Rebased on top of latest master branch.
- Rebased on top of patch to remove SLC cache entries from PPTT (link
for the same in edk2.groups.io is provided below)

Arm infrastructure reference design platforms uses ACPI tables to
provide the hardware information to the operating system. Currently the
ACPI tables are aligned with ACPI v6.2 and v6.3 specification. This
patch series update the tables to ACPI v6.4 specificaion. Features like
MPAM relies on cache ID field of PPTT tables to distinguish between
different physical caches, which is introduced in PPTT table in ACPI
v6.4. Also ServerReady (SBBR compliaance) strictly recomments all the
tables in the system should allign with same version of ACPI. Hence
upgrade all ACPI tables mentioned in ACPI specification to v6.4.


The first patch in this series update the generic tables which are
common for all platfoms. The subsequent patches in this series update
platform specific ACPI tables to v6.4 for the respective platform.

This patch series also update the headers in the .aslc files to match
the coding style as per edk2 coding guidelines.

Link to github branch with the patches in this series -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/acpi64_for_rd_platforms

Reviewed-by: Pierre Gondois <pierre.gondois@...>
Reviewed-by: Thomas Abraham <thomas.abraham@...>

Pranav Madhu (9):
Platform/Sgi: Update ACPI version to v6.4
Platform/Sgi: Update ACPI version to v6.4 for SGI575 platform
Platform/Sgi: Update ACPI version to v6.4 for RD-N1-Edge platform
Platform/Sgi: Update ACPI version to v6.4 for RD-N1-Edge-X2 platform
Platform/Sgi: Update ACPI version to v6.4 for RD-E1-Edge platform
Platform/Sgi: Update ACPI version to v6.4 for RD-V1 platform
Platform/Sgi: Update ACPI version to v6.4 for RD-V1-MC platform
Platform/Sgi: Update ACPI version to v6.4 for RD-N2 platform
Platform/Sgi: Update ACPI version to v6.4 for RD-N2-Cfg1 platform
Merged as 433b5b1b0f7f..750f6807879b

Thanks all,


Re: [edk2 Patch 1/1] Windows-systems.mediawiki: replaced p2.7 reference with py3.7

Jayaprakash, N
 

Could you please review and merge this change?

This is a simple documentation fix only.

Regards,
JP

-----Original Message-----
From: Jayaprakash, N
Sent: 17 June 2022 14:24
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@...>; Gao, Liming <gaoliming@...>
Subject: RE: [edk2 Patch 1/1] Windows-systems.mediawiki: replaced p2.7 reference with py3.7

This is a simple documentation fix. Could some one from the group review and merge these changes?

Regards,
JP

-----Original Message-----
From: Jayaprakash, N <n.jayaprakash@...>
Sent: 10 June 2022 09:19
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@...>; Gao, Liming <gaoliming@...>; Jayaprakash, N <n.jayaprakash@...>
Subject: [edk2 Patch 1/1] Windows-systems.mediawiki: replaced p2.7 reference with py3.7

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3788

Removed an outdated reference to py2.7 in the Windows systems wiki page and replaced it with the py3.7 to align with the updated build instructions

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Signed-off-by: Jayaprakash N <n.jayaprakash@...>
---
Windows-systems.mediawiki | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Windows-systems.mediawiki b/Windows-systems.mediawiki index 0b69b56..cca2b73 100644
--- a/Windows-systems.mediawiki
+++ b/Windows-systems.mediawiki
@@ -88,7 +88,7 @@ Example:
Example:
*Open Command prompt and CD C:\edk2:
<pre>
- C:\edk2> set PYTHON_HOME=C:\Python27
+ C:\edk2> set PYTHON_HOME=C:\Python37
C:\edk2> edksetup.bat Rebuild
</pre>

--
2.33.0.windows.1


Re: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

Guo, Gua <gua.guo@...>
 

@Ni, Ray

Below url is pull request link.  May I get your help to add push label ? Have any concern, please also share for me.

URL: https://github.com/tianocore/edk2/pull/3015

Thanks,
Gua

 

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Monday, June 27, 2022 2:53 PM
To: Guo, Gua <gua.guo@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>
Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

 

Reviewed-by: Ray Ni <ray.ni@...>

 

> -----Original Message-----

> From: Guo, Gua <gua.guo@...>

> Sent: Monday, June 27, 2022 1:03 PM

> To: Ni, Ray <ray.ni@...>; devel@edk2.groups.io

> Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>

> Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL

> spec

>

> Yes, #2 is chosen in by the python interpreter.

>

> -----Original Message-----

> From: Guo, Gua

> Sent: Monday, June 27, 2022 12:07 PM

> To: Ni, Ray <ray.ni@...>; devel@edk2.groups.io

> Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>

> Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL

> spec

>

> The python logic will like for below

>

> > upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0

> =========>

> > if BuildTarget == "DEBUG":

> >   upld_info_hdr.Attribute |= 1

> > else:

> >   upld_info_hdr.Attribute |= 0

>

> Thanks,

> Gua

>

> -----Original Message-----

> From: Ni, Ray <ray.ni@...>

> Sent: Monday, June 27, 2022 11:44 AM

> To: Guo, Gua <gua.guo@...>; devel@edk2.groups.io

> Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>

> Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL

> spec

>

> > +    upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0

>

>

> I am not python expert. Above statement might be interpreted as:

> 1. (upld_info.hdr.Attribute |= 1) if BuildTarget == "DEBUG" else 0 2.

> upld_info_hdr.Attribute |= (1 if BuildTarget == "DEBUG" else 0)

>

> Are we sure that the #2 is chosen in by the python interpreter?


Re: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

Guo, Gua <gua.guo@...>
 

Yes, #2 is chosen in by the python interpreter.

-----Original Message-----
From: Guo, Gua
Sent: Monday, June 27, 2022 12:07 PM
To: Ni, Ray <ray.ni@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>
Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

The python logic will like for below

upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0
=========>
if BuildTarget == "DEBUG":
upld_info_hdr.Attribute |= 1
else:
upld_info_hdr.Attribute |= 0
Thanks,
Gua

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Monday, June 27, 2022 11:44 AM
To: Guo, Gua <gua.guo@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>
Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

+ upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0

I am not python expert. Above statement might be interpreted as:
1. (upld_info.hdr.Attribute |= 1) if BuildTarget == "DEBUG" else 0 2. upld_info_hdr.Attribute |= (1 if BuildTarget == "DEBUG" else 0)

Are we sure that the #2 is chosen in by the python interpreter?


Re: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

Guo, Gua <gua.guo@...>
 

The python logic will like for below

upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0
=========>
if BuildTarget == "DEBUG":
upld_info_hdr.Attribute |= 1
else:
upld_info_hdr.Attribute |= 0
Thanks,
Gua

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Monday, June 27, 2022 11:44 AM
To: Guo, Gua <gua.guo@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>
Subject: RE: [PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

+ upld_info_hdr.Attribute |= 1 if BuildTarget == "DEBUG" else 0

I am not python expert. Above statement might be interpreted as:
1. (upld_info.hdr.Attribute |= 1) if BuildTarget == "DEBUG" else 0 2. upld_info_hdr.Attribute |= (1 if BuildTarget == "DEBUG" else 0)

Are we sure that the #2 is chosen in by the python interpreter?


[PATCH] UefiPayloadPkg: Align Attribute value with UPL spec

gua.guo@...
 

From: Gua Guo <gua.guo@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3963

Based on UPL spec 2.12.2. Universal Payload Information Section,
it defines item "Attribute" on UPLD_INFO_HEADER for Debug build
should be "1", and Release build should be "0".

Currently, The value of item "Attribute" is always "0"

Cc: Guo Dong <guo.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: James Lu <james.lu@...>
Signed-off-by: Gua Guo <gua.guo@...>
---
UefiPayloadPkg/UniversalPayloadBuild.py | 1 +
1 file changed, 1 insertion(+)

diff --git a/UefiPayloadPkg/UniversalPayloadBuild.py b/UefiPayloadPkg/Unive=
rsalPayloadBuild.py
index ab4c977ba5..6003de36d1 100644
--- a/UefiPayloadPkg/UniversalPayloadBuild.py
+++ b/UefiPayloadPkg/UniversalPayloadBuild.py
@@ -111,6 +111,7 @@ def BuildUniversalPayload(Args, MacroList):
#=0D
upld_info_hdr =3D UPLD_INFO_HEADER()=0D
upld_info_hdr.ImageId =3D Args.ImageId.encode()[:16]=0D
+ upld_info_hdr.Attribute |=3D 1 if BuildTarget =3D=3D "DEBUG" else 0=0D
fp =3D open(UpldInfoFile, 'wb')=0D
fp.write(bytearray(upld_info_hdr))=0D
fp.close()=0D
--=20
2.31.1.windows.1


Re: [PATCH v2] UefiPayloadPkg: Backward support with python 3.6

Liu, KasimX <kasimx.liu@...>
 

@Ni, Ray

Thanks for the reply and reviewed-by.

I've created the PR, could you help me add push label when you're available. I think we're better to check in the solution.
https://github.com/tianocore/edk2/pull/3008

Thanks
Kasim

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Friday, June 24, 2022 5:30 PM
To: Liu, KasimX <kasimx.liu@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>; Guo, Gua <gua.guo@...>
Subject: RE: [PATCH v2] UefiPayloadPkg: Backward support with python 3.6

Offline discussed with patch owner and got to know that it's a change to enable UefiPayloadPkg build in Ubuntu16 build servers.
I am ok with this patch.

Reviewed-by: Ray Ni <ray.ni@...>

-----Original Message-----
From: Ni, Ray
Sent: Friday, June 24, 2022 12:41 PM
To: Liu, KasimX <kasimx.liu@...>; devel@edk2.groups.io
Cc: Dong, Guo <guo.dong@...>; Lu, James <james.lu@...>;
Guo, Gua <gua.guo@...>
Subject: RE: [PATCH v2] UefiPayloadPkg: Backward support with python
3.6

Why use PY 3.6?
Even PY 3.8 is about to be deprecated by Python community.

-----Original Message-----
From: Liu, KasimX <kasimx.liu@...>
Sent: Friday, June 24, 2022 11:48 AM
To: devel@edk2.groups.io
Cc: Liu, KasimX <kasimx.liu@...>; Dong, Guo
<guo.dong@...>; Ni, Ray <ray.ni@...>; Lu, James
<james.lu@...>; Guo, Gua <gua.guo@...>
Subject: [PATCH v2] UefiPayloadPkg: Backward support with python 3.6

From: KasimX Liu <kasimx.liu@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3960

Currently, UniversalPayloadBuild.py don't have support python3.6, we
use python3.6 will encounter f"" failure use the change to fix it to
support python3.6/3.7/3.8.

Cc: Guo Dong <guo.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: James Lu <james.lu@...>
Reviewed-by: Gua Guo <gua.guo@...>
Signed-off-by: KasimX Liu <kasimx.liu@...>
---
UefiPayloadPkg/UniversalPayloadBuild.py | 33 +++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/UefiPayloadPkg/UniversalPayloadBuild.py
b/UefiPayloadPkg/UniversalPayloadBuild.py
index c71526e0a6..ab4c977ba5 100644
--- a/UefiPayloadPkg/UniversalPayloadBuild.py
+++ b/UefiPayloadPkg/UniversalPayloadBuild.py
@@ -59,15 +59,15 @@ def BuildUniversalPayload(Args, MacroList):
if Args.Arch == 'X64':

BuildArch = "X64"

ObjCopyFlag = "elf64-x86-64"

- EntryOutputDir = os.path.join(BuildDir, f"{BuildTarget}_{ElfToolChain}",
os.path.normpath("X64/UefiPayloadPkg/UefiPayloadEntry/UniversalPaylo
adEntry/DEBUG/UniversalPayloadEntry.dll"))

+ EntryOutputDir = os.path.join(BuildDir, "{}_{}".format
+ (BuildTarget, ElfToolChain),
os.path.normpath("X64/UefiPayloadPkg/UefiPayloadEntry/UniversalPaylo
adEntry/DEBUG/UniversalPayloadEntry.dll"))

else:

BuildArch = "IA32 -a X64"

ObjCopyFlag = "elf32-i386"

- EntryOutputDir = os.path.join(BuildDir, f"{BuildTarget}_{ElfToolChain}",
os.path.normpath("IA32/UefiPayloadPkg/UefiPayloadEntry/UniversalPayl
oadEntry/DEBUG/UniversalPayloadEntry.dll"))

+ EntryOutputDir = os.path.join(BuildDir, "{}_{}".format
+ (BuildTarget, ElfToolChain),
os.path.normpath("IA32/UefiPayloadPkg/UefiPayloadEntry/UniversalPayl
oadEntry/DEBUG/UniversalPayloadEntry.dll"))



EntryModuleInf =
os.path.normpath("UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEn
try.inf")

DscPath = os.path.normpath("UefiPayloadPkg/UefiPayloadPkg.dsc")

- FvOutputDir = os.path.join(BuildDir, f"{BuildTarget}_{ToolChain}", os.path.normpath("FV/DXEFV.Fv"))

+ FvOutputDir = os.path.join(BuildDir, "{}_{}".format
+ (BuildTarget, ToolChain), os.path.normpath("FV/DXEFV.Fv"))

PayloadReportPath = os.path.join(BuildDir,
"UefiUniversalPayload.txt")

ModuleReportPath = os.path.join(BuildDir,
"UefiUniversalPayloadEntry.txt")

UpldInfoFile = os.path.join(BuildDir,
"UniversalPayloadInfo.bin")

@@ -94,14 +94,14 @@ def BuildUniversalPayload(Args, MacroList):
#

# Building DXE core and DXE drivers as DXEFV.

#

- BuildPayload = f"build -p {DscPath} -b {BuildTarget} -a X64 -t {ToolChain} -y {PayloadReportPath} {Quiet}"

+ BuildPayload = "build -p {} -b {} -a X64 -t {} -y {} {}".format
+ (DscPath, BuildTarget, ToolChain, PayloadReportPath,
Quiet)

BuildPayload += Pcds

BuildPayload += Defines

RunCommand(BuildPayload)

#

# Building Universal Payload entry.

#

- BuildModule = f"build -p {DscPath} -b {BuildTarget} -a {BuildArch} -m {EntryModuleInf} -t {ElfToolChain} -y
{ModuleReportPath} {Quiet}"

+ BuildModule = "build -p {} -b {} -a {} -m {} -t {} -y {}
+ {}".format (DscPath, BuildTarget, BuildArch, EntryModuleInf,
ElfToolChain, ModuleReportPath, Quiet)

BuildModule += Pcds

BuildModule += Defines

RunCommand(BuildModule)

@@ -118,9 +118,26 @@ def BuildUniversalPayload(Args, MacroList):
#

# Copy the DXEFV as a section in elf format Universal Payload entry.

#

- remove_section = f'"{LlvmObjcopyPath}" -I {ObjCopyFlag} -O {ObjCopyFlag} --remove-section .upld_info --remove-
section .upld.uefi_fv {EntryOutputDir}'

- add_section = f'"{LlvmObjcopyPath}" -I {ObjCopyFlag} -O {ObjCopyFlag} --add-section .upld_info={UpldInfoFile} --
add-
section .upld.uefi_fv={FvOutputDir} {EntryOutputDir}'

- set_section = f'"{LlvmObjcopyPath}" -I {ObjCopyFlag} -O {ObjCopyFlag} --set-section-alignment .upld.upld_info=16
--
set-section-alignment .upld.uefi_fv=16 {EntryOutputDir}'

+ remove_section = '"{}" -I {} -O {} --remove-section .upld_info
+ --remove-section .upld.uefi_fv {}'.format (

+ LlvmObjcopyPath,

+ ObjCopyFlag,

+ ObjCopyFlag,

+ EntryOutputDir

+ )

+ add_section = '"{}" -I {} -O {} --add-section .upld_info={} --add-section .upld.uefi_fv={} {}'.format (

+ LlvmObjcopyPath,

+ ObjCopyFlag,

+ ObjCopyFlag,

+ UpldInfoFile,

+ FvOutputDir,

+ EntryOutputDir

+ )

+ set_section = '"{}" -I {} -O {} --set-section-alignment .upld.upld_info=16 --set-section-alignment .upld.uefi_fv=16
{}'.format (

+ LlvmObjcopyPath,

+ ObjCopyFlag,

+ ObjCopyFlag,

+ EntryOutputDir

+ )

RunCommand(remove_section)

RunCommand(add_section)

RunCommand(set_section)

--
2.32.0.windows.2


Re: [edk2-libc Patch 1/1] edk2-libc/StdLib : Changes to Std LibC to facilitate 32 bit GCC builds

Michael D Kinney
 

pushed 02a77dd71c22c7c5b74e30b30a5e5b97f330f8f7

Mike

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Monday, June 27, 2022 10:01 PM
To: devel@edk2.groups.io; Jayaprakash, N <n.jayaprakash@...>; Kinney, Michael D <michael.d.kinney@...>
Cc: Rebecca Cran <rebecca@...>
Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc/StdLib : Changes to Std LibC to facilitate 32 bit GCC builds

Reviewed-by: Michael D Kinney <michael.d.kinney@...>


-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jayaprakash, N
Sent: Friday, June 17, 2022 1:42 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@...>; Rebecca Cran <rebecca@...>; Jayaprakash, N
<n.jayaprakash@...>
Subject: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc/StdLib : Changes to Std LibC to facilitate 32 bit GCC builds

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3779

This comit fixes the Python interpreter build issues with GCC 32 bit
compiler tool chain. The changes are needed in StdLibC as given below

* Add __divmoddi4 to Gcc.c produced by newer GCC compilers
* Add -fno-lto to IA32 GCC builds of LibC.inf to support use of
GCC intrinsics from Gcc.c.
* Moved Main/Ia32/ftol2.obj in LibC.inf from binaries section to
Sources.IA32 required only for MSFT IA32 compiler tool chain

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Rebecca Cran <rebecca@...>
Signed-off-by: Jayaprakash N <n.jayaprakash@...>
---
StdLib/LibC/CRT/Gcc.c | 7 +++++++
StdLib/LibC/LibC.inf | 7 +++----
2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/StdLib/LibC/CRT/Gcc.c b/StdLib/LibC/CRT/Gcc.c
index cbf4ec2..bc1a4b2 100644
--- a/StdLib/LibC/CRT/Gcc.c
+++ b/StdLib/LibC/CRT/Gcc.c
@@ -193,3 +193,10 @@ unsigned long long __umodti3(unsigned long long Dividend, unsigned long long Div

return (unsigned long long) Remainder;
}
+
+INT64 __divmoddi4 (INT64 num, INT64 den, INT64 *rem_p)
+{
+ DEBUG((DEBUG_INFO, "%a:\n", __func__));
+ return DivS64x64Remainder (num, den, rem_p);
+}
+
diff --git a/StdLib/LibC/LibC.inf b/StdLib/LibC/LibC.inf
index 5bb2053..4771204 100644
--- a/StdLib/LibC/LibC.inf
+++ b/StdLib/LibC/LibC.inf
@@ -46,7 +46,8 @@
Main/Ia32/fpu_rmode.S | GCC
Main/Ia32/isinfl.c
Main/Ia32/isnanl.c
-
+ Main/Ia32/ftol2.obj | MSFT
+
# Compiler helper (C RunTime) functions
CRT/Ia32/llmul.c | MSFT # __allmul
CRT/Ia32/llshl.c | MSFT # __allshl
@@ -88,9 +89,6 @@
[Sources.AARCH64]
Main/Arm/flt_rounds.c

-[Binaries.IA32]
- LIB|Main/Ia32/ftol2.obj|*|MSFT
-
[Packages]
StdLib/StdLib.dec
StdLibPrivateInternalFiles/DoNotUse.dec
@@ -116,4 +114,5 @@
#
[BuildOptions]
MSFT:*_*_IA32_CC_FLAGS = /GL-
+ GCC:*_*_IA32_CC_FLAGS = -fno-lto
GCC:*_*_ARM_CC_FLAGS = -fno-lto
--
2.33.0.windows.1





Re: [edk2-libc Patch 1/1] edk2-libc/StdLib : Changes to Std LibC to facilitate 32 bit GCC builds

Michael D Kinney
 

Reviewed-by: Michael D Kinney <michael.d.kinney@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jayaprakash, N
Sent: Friday, June 17, 2022 1:42 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@...>; Rebecca Cran <rebecca@...>; Jayaprakash, N <n.jayaprakash@...>
Subject: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc/StdLib : Changes to Std LibC to facilitate 32 bit GCC builds

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3779

This comit fixes the Python interpreter build issues with GCC 32 bit
compiler tool chain. The changes are needed in StdLibC as given below

* Add __divmoddi4 to Gcc.c produced by newer GCC compilers
* Add -fno-lto to IA32 GCC builds of LibC.inf to support use of
GCC intrinsics from Gcc.c.
* Moved Main/Ia32/ftol2.obj in LibC.inf from binaries section to
Sources.IA32 required only for MSFT IA32 compiler tool chain

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Rebecca Cran <rebecca@...>
Signed-off-by: Jayaprakash N <n.jayaprakash@...>
---
StdLib/LibC/CRT/Gcc.c | 7 +++++++
StdLib/LibC/LibC.inf | 7 +++----
2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/StdLib/LibC/CRT/Gcc.c b/StdLib/LibC/CRT/Gcc.c
index cbf4ec2..bc1a4b2 100644
--- a/StdLib/LibC/CRT/Gcc.c
+++ b/StdLib/LibC/CRT/Gcc.c
@@ -193,3 +193,10 @@ unsigned long long __umodti3(unsigned long long Dividend, unsigned long long Div

return (unsigned long long) Remainder;
}
+
+INT64 __divmoddi4 (INT64 num, INT64 den, INT64 *rem_p)
+{
+ DEBUG((DEBUG_INFO, "%a:\n", __func__));
+ return DivS64x64Remainder (num, den, rem_p);
+}
+
diff --git a/StdLib/LibC/LibC.inf b/StdLib/LibC/LibC.inf
index 5bb2053..4771204 100644
--- a/StdLib/LibC/LibC.inf
+++ b/StdLib/LibC/LibC.inf
@@ -46,7 +46,8 @@
Main/Ia32/fpu_rmode.S | GCC
Main/Ia32/isinfl.c
Main/Ia32/isnanl.c
-
+ Main/Ia32/ftol2.obj | MSFT
+
# Compiler helper (C RunTime) functions
CRT/Ia32/llmul.c | MSFT # __allmul
CRT/Ia32/llshl.c | MSFT # __allshl
@@ -88,9 +89,6 @@
[Sources.AARCH64]
Main/Arm/flt_rounds.c

-[Binaries.IA32]
- LIB|Main/Ia32/ftol2.obj|*|MSFT
-
[Packages]
StdLib/StdLib.dec
StdLibPrivateInternalFiles/DoNotUse.dec
@@ -116,4 +114,5 @@
#
[BuildOptions]
MSFT:*_*_IA32_CC_FLAGS = /GL-
+ GCC:*_*_IA32_CC_FLAGS = -fno-lto
GCC:*_*_ARM_CC_FLAGS = -fno-lto
--
2.33.0.windows.1





Re: Dealing with CRLF in Rust printing

Michael D Kinney
 

Hi Ayush,

Your proposal looks right to me.

If \r is printed from Rust, it should not be modified. Only if
a \n is printed from Rust should it be expanded to \r\n.

So your example of '\r\r\n' from Rust would be expanded to '\r\r\r\n'.

Mike

-----Original Message-----
From: Ayush Singh <ayushdevel1325@...>
Sent: Monday, June 27, 2022 12:17 PM
To: edk2-devel-groups-io <devel@edk2.groups.io>
Cc: Michael Kubacki <mikuback@...>; Kinney, Michael D <michael.d.kinney@...>; Gaibusab, Jabeena B
<jabeena.b.gaibusab@...>; Yao, Jiewen <jiewen.yao@...>
Subject: Dealing with CRLF in Rust printing

Hello everyone, I have been somewhat successful in implementing Rust
stdio for UEFI.

This means it is now possible to do things like this:
```rust
let s = 10;
println!("ConOut: {}", s);
eprintl!("StdErr: {}", s);
```

However, Rust uses LF on all platforms currently, which means that the
`println!`, `eprintln!` and other macros only output LF at the end.

After discussion in zulipchat [1], it seems that rather than changing
the macro, it would be better to change what is printed as output.
This means changing: `\n` to `\r\n`, when we go for printing to
screen.

Note: This means that the LF will be changed to CRLF only when using
stdio and not when writing to say an external file.

Firstly, I wanted to ask other people's opinions about doing this.
Secondly, I wanted to ask if `\r\r\n` is the same as `\r\n` or if the
extra CR should be trimmed.

Ayush Singh

[1]: https://rust-lang.zulipchat.com/#narrow/stream/182449-t-compiler.2Fhelp/topic/.60println!.60.20for.20CRLF.20console


Event: TianoCore Bug Triage - APAC / NAMO - 06/28/2022 #cal-reminder

Group Notification <noreply@...>
 

Reminder: TianoCore Bug Triage - APAC / NAMO

When:
06/28/2022
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%226e4ce4c4-1242-431b-9a51-92cd01a5df3c%22%7d

Organizer: Liming Gao gaoliming@...

View Event

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

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Now: Tools, CI, Code base construction meeting series - 06/27/2022 #cal-notice

Group Notification <noreply@...>
 

Tools, CI, Code base construction meeting series

When:
06/27/2022
4:30pm to 5:30pm
(UTC-07:00) America/Los Angeles

Where:
https://github.com/tianocore/edk2/discussions/2614

View Event

Description:

TianoCore community,

Microsoft and Intel will be hosting a series of open meetings to discuss build, CI, tools, and other related topics. If you are interested, have ideas/opinions please join us. These meetings will be Monday 4:30pm Pacific Time on Microsoft Teams.

MS Teams Link in following discussion: * https://github.com/tianocore/edk2/discussions/2614

Anyone is welcome to join.

MS Teams Browser Clients * https://docs.microsoft.com/en-us/microsoftteams/get-clients?tabs=Windows#browser-client

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