Date   

Re: [PATCH v4 2/8] MdeModulePkg/VariableFlashInfoLib: Add initial library

Sami Mujawar
 

Hi Michael,

I have a minor suggestion marked inline as [SAMI].

Otherwise this patch looks good to me.

Reviewed-by: Sami Mujawar <sami.mujawar@...>

Regards,

Sami Mujawar

On 12/04/2022 05:29 pm, Michael Kubacki via groups.io wrote:
From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3479

Adds a new library class VariableFlashInfoLib that abstracts access
to variable flash information. The instance provided first attempts
to retrieve information from the Variable Flash Info HOB. If that
HOB is not present, it falls back to the PCDs defined in
MdeModulePkg.

This fall back behavior provides backward compatibility for platforms
that only provide PCDs but also allows platforms that need to
dynamically provide the information using the Variable Flash Info HOB
to do so at runtime.

Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Liming Gao <gaoliming@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.c | 178 ++++++++++++++++++++
MdeModulePkg/Include/Library/VariableFlashInfoLib.h | 68 ++++++++
MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf | 48 ++++++
MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.uni | 12 ++
MdeModulePkg/MdeModulePkg.dec | 4 +
MdeModulePkg/MdeModulePkg.dsc | 2 +
6 files changed, 312 insertions(+)

diff --git a/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.c b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.c
new file mode 100644
index 000000000000..a1db97bdf218
--- /dev/null
+++ b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.c
@@ -0,0 +1,178 @@
+/** @file
+ Variable Flash Information Library
+
+ Copyright (c) Microsoft Corporation<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Pi/PiMultiPhase.h>
+#include <Guid/VariableFlashInfo.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/VariableFlashInfoLib.h>
+
+/**
+ Get the HOB that contains variable flash information.
+
+ @param[out] VariableFlashInfo Pointer to a pointer to set to the variable flash information structure.
+
+ @retval EFI_SUCCESS Variable flash information was found successfully.
+ @retval EFI_INVALID_PARAMETER The VariableFlashInfo pointer given is NULL.
+ @retval EFI_NOT_FOUND Variable flash information could not be found.
+
+**/
+EFI_STATUS
+GetVariableFlashInfoFromHob (
+ OUT VARIABLE_FLASH_INFO **VariableFlashInfo
+ )
[SAMI] Can this function be made STATIC, please?
+{
+ EFI_HOB_GUID_TYPE *GuidHob;
+
+ if (VariableFlashInfo == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ GuidHob = GetFirstGuidHob (&gVariableFlashInfoHobGuid);
+ if (GuidHob == NULL) {
+ return EFI_NOT_FOUND;
+ }
+
+ *VariableFlashInfo = GET_GUID_HOB_DATA (GuidHob);
+
+ //
+ // Assert if more than one variable flash information HOB is present.
+ //
+ DEBUG_CODE (
+ if ((GetNextGuidHob (&gVariableFlashInfoHobGuid, GET_NEXT_HOB (GuidHob)) != NULL)) {
+ DEBUG ((DEBUG_ERROR, "ERROR: Found two variable flash information HOBs\n"));
+ ASSERT (FALSE);
+ }
+
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Get the base address and size for the NV storage area used for UEFI variable storage.
+
+ @param[out] BaseAddress The NV storage base address.
+ @param[out] Length The NV storage length in bytes.
+
+ @retval EFI_SUCCESS NV storage information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashNvStorageInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ )
+{
+ EFI_STATUS Status;
+ VARIABLE_FLASH_INFO *VariableFlashInfo;
+
+ if ((BaseAddress == NULL) || (Length == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = GetVariableFlashInfoFromHob (&VariableFlashInfo);
+ if (!EFI_ERROR (Status)) {
+ *BaseAddress = VariableFlashInfo->NvVariableBaseAddress;
+ *Length = VariableFlashInfo->NvVariableLength;
+ } else {
+ *BaseAddress = (EFI_PHYSICAL_ADDRESS)(PcdGet64 (PcdFlashNvStorageVariableBase64) != 0 ?
+ PcdGet64 (PcdFlashNvStorageVariableBase64) :
+ PcdGet32 (PcdFlashNvStorageVariableBase)
+ );
+ *Length = (UINT64)PcdGet32 (PcdFlashNvStorageVariableSize);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Get the base address and size for the fault tolerant write (FTW) spare
+ area used for UEFI variable storage.
+
+ @param[out] BaseAddress The FTW spare base address.
+ @param[out] Length The FTW spare length in bytes.
+
+ @retval EFI_SUCCESS FTW spare information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+ @retval EFI_NOT_FOUND FTW spare information could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashFtwSpareInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ )
+{
+ EFI_STATUS Status;
+ VARIABLE_FLASH_INFO *VariableFlashInfo;
+
+ if ((BaseAddress == NULL) || (Length == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = GetVariableFlashInfoFromHob (&VariableFlashInfo);
+ if (!EFI_ERROR (Status)) {
+ *BaseAddress = VariableFlashInfo->FtwSpareBaseAddress;
+ *Length = VariableFlashInfo->FtwSpareLength;
+ } else {
+ *BaseAddress = (EFI_PHYSICAL_ADDRESS)(PcdGet64 (PcdFlashNvStorageFtwSpareBase64) != 0 ?
+ PcdGet64 (PcdFlashNvStorageFtwSpareBase64) :
+ PcdGet32 (PcdFlashNvStorageFtwSpareBase)
+ );
+ *Length = (UINT64)PcdGet32 (PcdFlashNvStorageFtwSpareSize);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Get the base address and size for the fault tolerant write (FTW) working
+ area used for UEFI variable storage.
+
+ @param[out] BaseAddress The FTW working area base address.
+ @param[out] Length The FTW working area length in bytes.
+
+ @retval EFI_SUCCESS FTW working information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+ @retval EFI_NOT_FOUND FTW working information could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashFtwWorkingInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ )
+{
+ EFI_STATUS Status;
+ VARIABLE_FLASH_INFO *VariableFlashInfo;
+
+ if ((BaseAddress == NULL) || (Length == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = GetVariableFlashInfoFromHob (&VariableFlashInfo);
+ if (!EFI_ERROR (Status)) {
+ *BaseAddress = VariableFlashInfo->FtwWorkingBaseAddress;
+ *Length = VariableFlashInfo->FtwWorkingLength;
+ } else {
+ *BaseAddress = (EFI_PHYSICAL_ADDRESS)(PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) != 0 ?
+ PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) :
+ PcdGet32 (PcdFlashNvStorageFtwWorkingBase)
+ );
+ *Length = (UINT64)PcdGet32 (PcdFlashNvStorageFtwWorkingSize);
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/MdeModulePkg/Include/Library/VariableFlashInfoLib.h b/MdeModulePkg/Include/Library/VariableFlashInfoLib.h
new file mode 100644
index 000000000000..1367be9376ea
--- /dev/null
+++ b/MdeModulePkg/Include/Library/VariableFlashInfoLib.h
@@ -0,0 +1,68 @@
+/** @file
+ Variable Flash Information Library
+
+Copyright (c) Microsoft Corporation<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef VARIABLE_FLASH_INFO_LIB_H_
+#define VARIABLE_FLASH_INFO_LIB_H_
+
+/**
+ Get the base address and size for the NV storage area used for UEFI variable storage.
+
+ @param[out] BaseAddress The NV storage base address.
+ @param[out] Length The NV storage length in bytes.
+
+ @retval EFI_SUCCESS NV storage information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+ @retval EFI_NOT_FOUND NV storage information could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashNvStorageInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ );
+
+/**
+ Get the base address and size for the fault tolerant write (FTW) spare
+ area used for UEFI variable storage.
+
+ @param[out] BaseAddress The FTW spare base address.
+ @param[out] Length The FTW spare length in bytes.
+
+ @retval EFI_SUCCESS FTW spare information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+ @retval EFI_NOT_FOUND FTW spare information could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashFtwSpareInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ );
+
+/**
+ Get the base address and size for the fault tolerant write (FTW) working
+ area used for UEFI variable storage.
+
+ @param[out] BaseAddress The FTW working area base address.
+ @param[out] Length The FTW working area length in bytes.
+
+ @retval EFI_SUCCESS FTW working information was found successfully.
+ @retval EFI_INVALID_PARAMETER A required pointer parameter is NULL.
+ @retval EFI_NOT_FOUND FTW working information could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+GetVariableFlashFtwWorkingInfo (
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ OUT UINT64 *Length
+ );
+
+#endif
diff --git a/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
new file mode 100644
index 000000000000..70175e75f9b1
--- /dev/null
+++ b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
@@ -0,0 +1,48 @@
+## @file
+# Variable Flash Information Library
+#
+# Provides services to access UEFI variable flash information.
+#
+# Copyright (c) Microsoft Corporation<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseVariableFlashInfoLib
+ MODULE_UNI_FILE = BaseVariableFlashInfoLib.uni
+ FILE_GUID = DEC426C9-C92E-4BAD-8E93-3F61C261118B
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = VariableFlashInfoLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ANY
+#
+
+[Sources]
+ BaseVariableFlashInfoLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ HobLib
+
+[Guids]
+ gVariableFlashInfoHobGuid ## CONSUMES ## HOB
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 ## SOMETIMES_CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.uni b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.uni
new file mode 100644
index 000000000000..9a5348fa02a0
--- /dev/null
+++ b/MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.uni
@@ -0,0 +1,12 @@
+// /** @file
+// Variable Flash Information Library
+//
+// Copyright (c) Microsoft Corporation<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_MODULE_ABSTRACT #language en-US "UEFI variable flash information library"
+
+#string STR_MODULE_DESCRIPTION #language en-US "Provides services to access UEFI variable flash information."
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 4e82f5836096..2bcb9f9453af 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -154,6 +154,10 @@ [LibraryClasses]
#
VariablePolicyHelperLib|Include/Library/VariablePolicyHelperLib.h
+ ## @libraryclass Provides services to access UEFI variable flash information.
+ #
+ VariableFlashInfoLib|Include/Library/VariableFlashInfoLib.h
+
[Guids]
## MdeModule package token space guid
# Include/Guid/MdeModulePkgTokenSpace.h
diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index b1d83461865e..90a0a7ec4a7c 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -103,6 +103,7 @@ [LibraryClasses]
DisplayUpdateProgressLib|MdeModulePkg/Library/DisplayUpdateProgressLibGraphics/DisplayUpdateProgressLibGraphics.inf
VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
+ VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
[LibraryClasses.EBC.PEIM]
IoLib|MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.inf
@@ -440,6 +441,7 @@ [Components]
MdeModulePkg/Library/FmpAuthenticationLibNull/FmpAuthenticationLibNull.inf
MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
+ MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
[Components.IA32, Components.X64, Components.AARCH64]
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf


Re: [PATCH 3/4] CryptoPkg: Make EC source file config-able

PierreGondois
 

Hello Yi1, Jiewen, and Bob,

As you mentioned in the cover letter, this patch relies on the following patch
bf9230a9f3dd ("BaseTools: Add the FeatureFlagExpression usage to the Source Section")
https://github.com/tianocore/edk2/commit/bf9230a9f3dde065c3c8b4175ccd32e44e8f0362

I just wanted to signal that this patch is currently not in
https://github.com/tianocore/edk2-basetools
It is thus not in any edk2basetools python module: the latest version of the edk2-basetools python module won't support the new build feature (cf pip-requirements.txt).
Thus someone who:
-relies on the edk2basetools python module
-tries to build an edk2 module relying on OpenSSL
will have a build break.

For instance, I get the following error when building:
build -a AARCH64 -t GCC5 -p SecurityPkg/SecurityPkg.dsc
...
"[some_path]/edk2/BaseTools/Bin/gcc_aarch64_linux_extdep/bin/aarch64-none-linux-gnu-gcc" @[some_path]/Build/SbsaQemu/DEBUG_GCC5/AARCH64/CryptoPkg/Library/OpensslLib/OpensslLib/OUTPUT/cc_resp.txt -c -o [some_path]/Build/SbsaQemu/DEBUG_GCC5/AARCH64/CryptoPkg/Library/OpensslLib/OpensslLib/OUTPUT/openssl/crypto/ec/curve25519.obj [some_path]/edk2/CryptoPkg/Library/OpensslLib/openssl/crypto/ec/curve25519.c
In file included from [some_path]/edk2/CryptoPkg/Library/OpensslLib/openssl/crypto/ec/curve25519.c:11:
[some_path]/edk2/CryptoPkg/Library/OpensslLib/openssl/crypto/ec/ec_local.h:48:24: error: unknown type name ‘EC_GROUP’
48 | int (*group_init) (EC_GROUP *);

This is due to the build system trying to build a file in $(OPENSSL_PATH)/crypto/ec/* even though gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled is set to FALSE by default. The new Pcd feature to build files conditionally on a Pcd value is not handled yet.
The edk2 CI doesn't seem to build modules relying on OpenSSL due to the CONTINUOUS_INTEGRATION flag, explaining why the patch passed the CI I think.

I added Bob as I think he knows more about BaseTools.

Regards,
Pierre

On 4/18/22 15:03, yi1 li via groups.io wrote:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3679
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3828
Use PCD gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled to config-able
source files list in OpensslLib.inf and OpensslLibCrypto.inf.
If PcdEcEnabled equals to FALSE, this file will not be compiled.
Signed-off-by: yi1 li <yi1.li@...>
---
CryptoPkg/CryptoPkg.dec | 4 +
.../Library/Include/openssl/opensslconf.h | 7 +-
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 95 ++++++++++---------
.../Library/OpensslLib/OpensslLibCrypto.inf | 95 ++++++++++---------
4 files changed, 108 insertions(+), 93 deletions(-)
diff --git a/CryptoPkg/CryptoPkg.dec b/CryptoPkg/CryptoPkg.dec
index 5888941bab4c..ebec64050b71 100644
--- a/CryptoPkg/CryptoPkg.dec
+++ b/CryptoPkg/CryptoPkg.dec
@@ -81,5 +81,9 @@
# @ValidList 0x80000001 | 0x00000001, 0x00000002, 0x00000004, 0x00000008, 0x00000010
gEfiCryptoPkgTokenSpaceGuid.PcdHashApiLibPolicy|0x00000002|UINT32|0x00000001
+ ## Enable/Disable the ECC feature in openssl library. The default is disabled.
+ # If ECC feature is disabled, all related source files will not be compiled.
+ gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled|FALSE|BOOLEAN|0x0000003
+
[UserExtensions.TianoCore."ExtraFiles"]
CryptoPkgExtra.uni
diff --git a/CryptoPkg/Library/Include/openssl/opensslconf.h b/CryptoPkg/Library/Include/openssl/opensslconf.h
index 7ea976b2252e..1485b8c9f108 100644
--- a/CryptoPkg/Library/Include/openssl/opensslconf.h
+++ b/CryptoPkg/Library/Include/openssl/opensslconf.h
@@ -9,7 +9,7 @@
* in the file LICENSE in the source distribution or at
* https://www.openssl.org/source/license.html
*/
-
+#include <Library/PcdLib.h>
#include <openssl/opensslv.h>
#ifdef __cplusplus
@@ -55,6 +55,11 @@ extern "C" {
#ifndef OPENSSL_NO_DSA
#define OPENSSL_NO_DSA
#endif
+#if !FixedPcdGetBool (PcdEcEnabled)
+ #ifndef OPENSSL_NO_EC
+#define OPENSSL_NO_EC
+ #endif
+#endif
#ifndef OPENSSL_NO_IDEA
#define OPENSSL_NO_IDEA
#endif
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 1d67ed55e1b1..459ac4864a4e 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -199,43 +199,43 @@
$(OPENSSL_PATH)/crypto/dso/dso_vms.c
$(OPENSSL_PATH)/crypto/dso/dso_win32.c
$(OPENSSL_PATH)/crypto/ebcdic.c
- $(OPENSSL_PATH)/crypto/ec/curve25519.c
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c
- $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c
- $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c
- $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c
- $(OPENSSL_PATH)/crypto/ec/ec2_oct.c
- $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c
- $(OPENSSL_PATH)/crypto/ec/ec_ameth.c
- $(OPENSSL_PATH)/crypto/ec/ec_asn1.c
- $(OPENSSL_PATH)/crypto/ec/ec_check.c
- $(OPENSSL_PATH)/crypto/ec/ec_curve.c
- $(OPENSSL_PATH)/crypto/ec/ec_cvt.c
- $(OPENSSL_PATH)/crypto/ec/ec_err.c
- $(OPENSSL_PATH)/crypto/ec/ec_key.c
- $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c
- $(OPENSSL_PATH)/crypto/ec/ec_lib.c
- $(OPENSSL_PATH)/crypto/ec/ec_mult.c
- $(OPENSSL_PATH)/crypto/ec/ec_oct.c
- $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c
- $(OPENSSL_PATH)/crypto/ec/ec_print.c
- $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c
- $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c
- $(OPENSSL_PATH)/crypto/ec/eck_prn.c
- $(OPENSSL_PATH)/crypto/ec/ecp_mont.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nist.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c
- $(OPENSSL_PATH)/crypto/ec/ecp_oct.c
- $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c
- $(OPENSSL_PATH)/crypto/ec/ecx_meth.c
+ $(OPENSSL_PATH)/crypto/ec/curve25519.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec2_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_ameth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_asn1.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_check.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_curve.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_cvt.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_err.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_key.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_lib.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_mult.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_print.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/eck_prn.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_mont.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nist.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecx_meth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
$(OPENSSL_PATH)/crypto/err/err.c
$(OPENSSL_PATH)/crypto/err/err_prn.c
$(OPENSSL_PATH)/crypto/evp/bio_b64.c
@@ -533,15 +533,15 @@
$(OPENSSL_PATH)/crypto/conf/conf_local.h
$(OPENSSL_PATH)/crypto/dh/dh_local.h
$(OPENSSL_PATH)/crypto/dso/dso_local.h
- $(OPENSSL_PATH)/crypto/ec/ec_local.h
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h
- $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h
- $(OPENSSL_PATH)/crypto/ec/curve448/field.h
- $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h
- $(OPENSSL_PATH)/crypto/ec/curve448/word.h
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h
+ $(OPENSSL_PATH)/crypto/ec/ec_local.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/field.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/word.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
$(OPENSSL_PATH)/crypto/evp/evp_local.h
$(OPENSSL_PATH)/crypto/hmac/hmac_local.h
$(OPENSSL_PATH)/crypto/lhash/lhash_local.h
@@ -633,6 +633,9 @@
[LibraryClasses.ARM]
ArmSoftFloatLib
+[Pcd]
+ gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled ## CONSUMES
+
[BuildOptions]
#
# Disables the following Visual Studio compiler warnings brought by openssl source,
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index 66ca5b1250c1..c9d69a368e3c 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -199,43 +199,43 @@
$(OPENSSL_PATH)/crypto/dso/dso_vms.c
$(OPENSSL_PATH)/crypto/dso/dso_win32.c
$(OPENSSL_PATH)/crypto/ebcdic.c
- $(OPENSSL_PATH)/crypto/ec/curve25519.c
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c
- $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c
- $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c
- $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c
- $(OPENSSL_PATH)/crypto/ec/ec2_oct.c
- $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c
- $(OPENSSL_PATH)/crypto/ec/ec_ameth.c
- $(OPENSSL_PATH)/crypto/ec/ec_asn1.c
- $(OPENSSL_PATH)/crypto/ec/ec_check.c
- $(OPENSSL_PATH)/crypto/ec/ec_curve.c
- $(OPENSSL_PATH)/crypto/ec/ec_cvt.c
- $(OPENSSL_PATH)/crypto/ec/ec_err.c
- $(OPENSSL_PATH)/crypto/ec/ec_key.c
- $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c
- $(OPENSSL_PATH)/crypto/ec/ec_lib.c
- $(OPENSSL_PATH)/crypto/ec/ec_mult.c
- $(OPENSSL_PATH)/crypto/ec/ec_oct.c
- $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c
- $(OPENSSL_PATH)/crypto/ec/ec_print.c
- $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c
- $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c
- $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c
- $(OPENSSL_PATH)/crypto/ec/eck_prn.c
- $(OPENSSL_PATH)/crypto/ec/ecp_mont.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nist.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c
- $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c
- $(OPENSSL_PATH)/crypto/ec/ecp_oct.c
- $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c
- $(OPENSSL_PATH)/crypto/ec/ecx_meth.c
+ $(OPENSSL_PATH)/crypto/ec/curve25519.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec2_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_ameth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_asn1.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_check.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_curve.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_cvt.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_err.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_key.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_lib.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_mult.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ec_print.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/eck_prn.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_mont.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nist.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_oct.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/ecx_meth.c |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
$(OPENSSL_PATH)/crypto/err/err.c
$(OPENSSL_PATH)/crypto/err/err_prn.c
$(OPENSSL_PATH)/crypto/evp/bio_b64.c
@@ -533,15 +533,15 @@
$(OPENSSL_PATH)/crypto/conf/conf_local.h
$(OPENSSL_PATH)/crypto/dh/dh_local.h
$(OPENSSL_PATH)/crypto/dso/dso_local.h
- $(OPENSSL_PATH)/crypto/ec/ec_local.h
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h
- $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h
- $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h
- $(OPENSSL_PATH)/crypto/ec/curve448/field.h
- $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h
- $(OPENSSL_PATH)/crypto/ec/curve448/word.h
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h
- $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h
+ $(OPENSSL_PATH)/crypto/ec/ec_local.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/field.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/word.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h |*|*|*|gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled
$(OPENSSL_PATH)/crypto/evp/evp_local.h
$(OPENSSL_PATH)/crypto/hmac/hmac_local.h
$(OPENSSL_PATH)/crypto/lhash/lhash_local.h
@@ -582,6 +582,9 @@
[LibraryClasses.ARM]
ArmSoftFloatLib
+[Pcd]
+ gEfiCryptoPkgTokenSpaceGuid.PcdEcEnabled ## CONSUMES
+
[BuildOptions]
#
# Disables the following Visual Studio compiler warnings brought by openssl source,


Re: 回复: [edk2-devel] [PATCH] MdeModulePkg\CoreDxe: Allow DXE Drivers to use untested memory

Howell, Stacy <stacy.howell@...>
 

Hi all,
Are there any other comments or concerns regarding this patch?

Thanks,
Stacy

-----Original Message-----
From: Howell, Stacy
Sent: Friday, January 14, 2022 4:13 PM
To: Kinney, Michael D <michael.d.kinney@...>; devel@edk2.groups.io; spbrogan@...; Gao, Liming <gaoliming@...>
Cc: Bi, Dandan <dandan.bi@...>; Howell, Stacy <stacy.howell@...>
Subject: RE: 回复: [edk2-devel] [PATCH] MdeModulePkg\CoreDxe: Allow DXE Drivers to use untested memory

Hi Sean,
Setting all memory as tested in PEI is a workaround for the issue that this patch addresses. However, promoting all memory in PEI is not a workable solution for BIOSes that incorporate full memory testing functionality, as this relies on the tested flag to determine which memory regions to test.

This patch addresses a discrepancy in EDK2 core regarding how untested memory is treated for allocation by DXE drivers. In the case where a DXE driver does not request a specific memory region DXE Core will promote untested memory if necessary to provide memory to the driver. In the case where a DXE driver requests a specific memory range of untested memory, DXE Core will currently return an error instead of promoting untested memory to make the region available for the driver.

Thanks,
Stacy

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Tuesday, January 11, 2022 10:57 AM
To: devel@edk2.groups.io; spbrogan@...; Gao, Liming <gaoliming@...>; Howell, Stacy <stacy.howell@...>; Kinney, Michael D <michael.d.kinney@...>
Cc: Bi, Dandan <dandan.bi@...>
Subject: RE: 回复: [edk2-devel] [PATCH] MdeModulePkg\CoreDxe: Allow DXE Drivers to use untested memory

Hi Sean,

The auto promotion of memory was only intended as a dev/debug feature to maximize platform boot without having to tune what memory is tested in PEI phase.

In my opinion, a production platform should never trigger any auto promotions of untested to tested memory, and part of production validation should make sure this event never occurs in any production boot scenarios.

The specific bug being fix here is that auto promotion was not symmetric across all memory allocation types. It simply aligns this dev/debug feature.

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Sean
Sent: Monday, January 10, 2022 6:47 PM
To: devel@edk2.groups.io; Gao, Liming <gaoliming@...>;
Howell, Stacy <stacy.howell@...>
Cc: Bi, Dandan <dandan.bi@...>
Subject: Re: 回复: [edk2-devel] [PATCH] MdeModulePkg\CoreDxe: Allow DXE
Drivers to use untested memory

if this is auto promotion is happening in the core then what is the
value of memory testing and tracking that state. Is memory testing
state a necessary feature of the Dxe Core?


I think it makes more sense that if you platform wants to use a given
range your platform should either test it and/or mark it as tested.

OR

The dxe core should do away with the memory testing tracking.


On most platforms i have seen in the past few years all memory is
marked as tested without doing any testing. The only value in the
flag is keep the initial memory allocations in a given low range (below 4gb).




On 1/10/2022 5:59 PM, gaoliming wrote:
Stacy:
This fix covers the case with AllocateAddress allocation type. I
agree this fix. Reviewed-by: Liming Gao <gaoliming@...>

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Stacy Howell
发送时间: 2022年1月8日 3:36
收件人: devel@edk2.groups.io
抄送: Stacy Howell <stacy.howell@...>; Dandan Bi
<dandan.bi@...>; Liming Gao <gaoliming@...>
主题: [edk2-devel] [PATCH] MdeModulePkg\CoreDxe: Allow DXE Drivers to
use untested memory

REF: https://https://bugzilla.tianocore.org/show_bug.cgi?id=3795
CC: Dandan Bi <dandan.bi@...>
CC: Liming Gao <gaoliming@...>

Updated CoreInternalAllocatePages() to call PromoteMemoryResource()
and re-attempt the allocation if unable to convert the specified
memory range

Signed-off-by: Stacy Howell <stacy.howell@...>
---
MdeModulePkg/Core/Dxe/Mem/Page.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c
b/MdeModulePkg/Core/Dxe/Mem/Page.c
index 47d4c5d92e..cc0b90ac0d 100644
--- a/MdeModulePkg/Core/Dxe/Mem/Page.c
+++ b/MdeModulePkg/Core/Dxe/Mem/Page.c
@@ -1417,6 +1417,20 @@ CoreInternalAllocatePages (
Status = CoreConvertPages (Start, NumberOfPages, MemoryType);
}

+ if (EFI_ERROR (Status)) {
+ //
+ // If requested memory region is unavailable it may be
+ untested
memory
+ // Attempt to promote memory resources, then re-attempt the
allocation
+ //
+ if (PromoteMemoryResource ()) {
+ if (NeedGuard) {
+ Status = CoreConvertPagesWithGuard (Start, NumberOfPages,
MemoryType);
+ } else {
+ Status = CoreConvertPages (Start, NumberOfPages, MemoryType);
+ }
+ }
+ }
+
Done:
CoreReleaseMemoryLock ();

--
2.32.0.windows.2













Re: [edk2-platforms PATCH v1 0/1] BoardModulePkg: Copy device path

Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@...>
 

[Public]

Hi,
Please review the patch.
Thanks
AbduL

-----Original Message-----
From: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@...>
Sent: 05 April 2022 11:25
To: devel@edk2.groups.io; Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@...>; Eric Dong <eric.dong@...>; Liming Gao <gaoliming@...>
Subject: RE: [edk2-devel] [edk2-platforms PATCH v1 0/1] BoardModulePkg: Copy device path

[Public]

Hi,
Could you please review the patch?
Thanks
AbduL

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abdul Lateef Attar via groups.io
Sent: 15 March 2022 10:16
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@...>; Liming Gao <gaoliming@...>
Subject: [edk2-devel] [edk2-platforms PATCH v1 0/1] BoardModulePkg: Copy device path

[CAUTION: External Email]

(Resending patch with [edk2-platforms] prefix with correct emailid).
GCC compiler puts the DevicePath PCDs to the read-only section. During boot if try to process the device path after PtrGetPtr it throws a page fault exception.

Hence making a local copy using DuplicateDevicePath() to avoid the page fault exception.

REF : https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fabdattar%2Fedk2-platforms%2Ftree%2FBoardModulePkg&;data=04%7C01%7CAbdulLateef.Attar%40amd.com%7Cdd04fc2187754979081008da063ebd5d%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637829164332474465%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=MX%2FlzKO2jVyPHaaURb7b8kMyNWFAlMPZ%2B0gK%2Ffrh5xo%3D&amp;reserved=0

Cc: Eric Dong <eric.dong@...>
Cc: Liming Gao <gaoliming@...>

Abdul Lateef Attar (1):
BoardModulePkg: Copy device path before processing

Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)

--
2.25.1


[PATCH v2] MdeModulePkg/XhciDxe: Add access xHCI Extended Capabilities Pointer

ian.chiu@...
 

From: Ian Chiu <Ian.chiu@...>

Add support process Port Speed field value of PORTSC according to Supported=
Protocol Capability
(new design in xHCI spec 1.2 2019)

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3914

The value of Port Speed field in PORTSC bit[10:13] (xHCI spec 1.2 2019 sect=
ion 5.4.8)
should be change to use this value to query thru Protocol Speed ID (PSI)
(xHCI spec 1.2 2019 section 7.2.1) in xHCI Supported Protocol Capability and
return the value according the Protocol Speed ID (PSIV) Dword.

Cc: Jenny Huang <jenny.huang@...>
Cc: More Shih <more.shih@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Ray Ni <ray.ni@...>
Signed-off-by: Ian Chiu <Ian.chiu@...>
---
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 41 ++++--
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 2 +
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 147 ++++++++++++++++++++
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 87 ++++++++++++
4 files changed, 262 insertions(+), 15 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/Xhc=
iDxe/Xhci.c
index b79499e225..f5b99210c9 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -398,25 +398,32 @@ XhcGetRootHubPortStatus (
State =3D XhcReadOpReg (Xhc, Offset);=0D
=0D
//=0D
- // According to XHCI 1.1 spec November 2017,=0D
- // bit 10~13 of the root port status register identifies the speed of th=
e attached device.=0D
+ // According to XHCI 1.2 spec November 2019,=0D
+ // Section 7.2 xHCI Support Protocol Capability=0D
//=0D
- switch ((State & XHC_PORTSC_PS) >> 10) {=0D
- case 2:=0D
- PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED;=0D
- break;=0D
+ PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & =
XHC_PORTSC_PS) >> 10));=0D
+ if (PortStatus->PortStatus =3D=3D 0) {=0D
+ //=0D
+ // According to XHCI 1.1 spec November 2017,=0D
+ // bit 10~13 of the root port status register identifies the speed of =
the attached device.=0D
+ //=0D
+ switch ((State & XHC_PORTSC_PS) >> 10) {=0D
+ case 2:=0D
+ PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED;=0D
+ break;=0D
=0D
- case 3:=0D
- PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED;=0D
- break;=0D
+ case 3:=0D
+ PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED;=0D
+ break;=0D
=0D
- case 4:=0D
- case 5:=0D
- PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED;=0D
- break;=0D
+ case 4:=0D
+ case 5:=0D
+ PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED;=0D
+ break;=0D
=0D
- default:=0D
- break;=0D
+ default:=0D
+ break;=0D
+ }=0D
}=0D
=0D
//=0D
@@ -1820,6 +1827,8 @@ XhcCreateUsbHc (
Xhc->ExtCapRegBase =3D ExtCapReg << 2;=0D
Xhc->UsbLegSupOffset =3D XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY=
);=0D
Xhc->DebugCapSupOffset =3D XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG)=
;=0D
+ Xhc->Usb2SupOffset =3D XhcGetUsbSupportedCapabilityAddr (Xhc, USB_SUPPOR=
T_PROTOCOL_USB2_MAJOR_VER);=0D
+ Xhc->UsbSsSupOffset =3D XhcGetUsbSupportedCapabilityAddr (Xhc, USB_SUPPO=
RT_PROTOCOL_USB3_MAJOR_VER);=0D
=0D
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->Ca=
pLength));=0D
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams=
1));=0D
@@ -1829,6 +1838,8 @@ XhcCreateUsbHc (
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));=0D
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbL=
egSupOffset));=0D
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->De=
bugCapSupOffset));=0D
+ DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb2SupOffset 0x%x\n", Xhc->Usb2Su=
pOffset));=0D
+ DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbSsSupOffset 0x%x\n", Xhc->UsbSs=
SupOffset));=0D
=0D
//=0D
// Create AsyncRequest Polling Timer=0D
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/Xhc=
iDxe/Xhci.h
index 5054d796b1..7eed7bd15e 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -227,6 +227,8 @@ struct _USB_XHCI_INSTANCE {
UINT32 ExtCapRegBase;=0D
UINT32 UsbLegSupOffset;=0D
UINT32 DebugCapSupOffset;=0D
+ UINT32 Usb2SupOffset;=0D
+ UINT32 UsbSsSupOffset;=0D
UINT64 *DCBAA;=0D
VOID *DCBAAMap;=0D
UINT32 MaxSlotsEn;=0D
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/=
XhciDxe/XhciReg.c
index 80be3311d4..5bff698edb 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -564,7 +564,57 @@ XhcGetCapabilityAddr (
if ((Data & 0xFF) =3D=3D CapId) {=0D
return ExtCapOffset;=0D
}=0D
+ //=0D
+ // If not, then traverse all of the ext capability registers till find=
ing out it.=0D
+ //=0D
+ NextExtCapReg =3D (UINT8)((Data >> 8) & 0xFF);=0D
+ ExtCapOffset +=3D (NextExtCapReg << 2);=0D
+ } while (NextExtCapReg !=3D 0);=0D
+=0D
+ return 0xFFFFFFFF;=0D
+}=0D
=0D
+/**=0D
+ Calculate the offset of the xHCI Supported Protocol Capability.=0D
+=0D
+ @param Xhc The XHCI Instance.=0D
+ @param MajorVersion The USB Major Version in xHCI Support Protocol Cap=
ability Field=0D
+=0D
+ @return The offset of xHCI Supported Protocol capability register.=0D
+=0D
+**/=0D
+UINT32=0D
+XhcGetUsbSupportedCapabilityAddr (=0D
+ IN USB_XHCI_INSTANCE *Xhc,=0D
+ IN UINT8 MajorVersion=0D
+ )=0D
+{=0D
+ UINT32 ExtCapOffset;=0D
+ UINT8 NextExtCapReg;=0D
+ UINT32 Data;=0D
+ UINT32 NameString;=0D
+ XHC_SUPPORTED_PROTOCOL_DW0 UsbSupportDw0;=0D
+=0D
+ if (Xhc =3D=3D NULL) {=0D
+ return 0;=0D
+ }=0D
+=0D
+ ExtCapOffset =3D 0;=0D
+=0D
+ do {=0D
+ //=0D
+ // Check if the extended capability register's capability id is USB Le=
gacy Support.=0D
+ //=0D
+ Data =3D XhcReadExtCapReg (Xhc, ExtCapOffset);=0D
+ UsbSupportDw0.Dword =3D Data;=0D
+ if ((Data & 0xFF) =3D=3D XHC_CAP_USB_SUPPORTED) {=0D
+ if (UsbSupportDw0.Data.RevMajor =3D=3D MajorVersion) {=0D
+ NameString =3D XhcReadExtCapReg (Xhc, ExtCapOffset + USB_SUPPORTED=
_NAME_STRING_OFFSET);=0D
+ if (NameString =3D=3D USB_SUPPORTED_PROTOCOL_NAME_STRING) {=0D
+ return ExtCapOffset;=0D
+ }=0D
+ }=0D
+ }=0D
//=0D
// If not, then traverse all of the ext capability registers till find=
ing out it.=0D
//=0D
@@ -575,6 +625,103 @@ XhcGetCapabilityAddr (
return 0xFFFFFFFF;=0D
}=0D
=0D
+/**=0D
+ Find SpeedField value match with Port Speed ID value.=0D
+=0D
+ @param Xhc The XHCI Instance.=0D
+ @param ExtCapOffset The USB Major Version in xHCI Support Protocol Cap=
ability Field=0D
+ @param SpeedField The Port Speed filed in USB PortSc register=0D
+=0D
+ @return The Protocol Speed ID xHCI Supported Protocol capability registe=
r.=0D
+=0D
+**/=0D
+UINT32=0D
+XhciPsivGetPsid (=0D
+ IN USB_XHCI_INSTANCE *Xhc,=0D
+ IN UINT32 ExtCapOffset,=0D
+ IN UINT8 SpeedField=0D
+ )=0D
+{=0D
+ XHC_SUPPORTED_PROTOCOL_DW2 PortId;=0D
+ XHC_SUPPORTED_PROTOCOL_FIELD Reg;=0D
+ UINT32 Count;=0D
+=0D
+ if ((Xhc =3D=3D NULL) || (ExtCapOffset =3D=3D 0xFFFFFFFF)) {=0D
+ return 0;=0D
+ }=0D
+=0D
+ //=0D
+ // According to XHCI 1.2 spec November 2019,=0D
+ // Section 7.2 xHCI Supported Protocol Capability=0D
+ // 1. Get the PSIC(Protocol Speed ID Count) Value.=0D
+ // 2. The PSID register boundary should be Base address + PSIC * 0x04=0D
+ //=0D
+ PortId.Dword =3D XhcReadExtCapReg (Xhc, ExtCapOffset + USB_SUPPORTED_PO=
RT_ID_OFFSET);=0D
+=0D
+ for (Count =3D 0; Count < PortId.Data.Psic; Count++) {=0D
+ Reg.Dword =3D XhcReadExtCapReg (Xhc, ExtCapOffset + USB_SUPPORT_SPEED_=
ID_OFFSET + (Count << 2));=0D
+ if (Reg.Data.Psiv =3D=3D SpeedField) {=0D
+ return Reg.Dword;=0D
+ }=0D
+ }=0D
+ return 0;=0D
+}=0D
+=0D
+/**=0D
+ Find SpeedField value match with Port Speed ID value.=0D
+=0D
+ @param Xhc The XHCI Instance.=0D
+ @param Speed The Port Speed filed in USB PortSc register=0D
+=0D
+ @return The USB Port Speed.=0D
+=0D
+**/=0D
+UINT16=0D
+XhcCheckUsbPortSpeedUsedPsic (=0D
+ IN USB_XHCI_INSTANCE *Xhc,=0D
+ IN UINT8 Speed=0D
+ )=0D
+{=0D
+ XHC_SUPPORTED_PROTOCOL_FIELD SpField;=0D
+ UINT16 ReturnSpeed;=0D
+=0D
+ if (Xhc =3D=3D NULL) {=0D
+ return 0;=0D
+ }=0D
+=0D
+ SpField.Dword =3D 0;=0D
+ ReturnSpeed =3D 0;=0D
+ //=0D
+ // Check USB3 Protocol Speed ID if ReturnSpeed didn't get match speed.=0D
+ //=0D
+ if ((ReturnSpeed =3D=3D 0) && (Xhc->UsbSsSupOffset !=3D 0xFFFFFFFF)) {=0D
+ SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->UsbSsSupOffset, Speed);=0D
+ if (SpField.Dword !=3D 0) {=0D
+ // Super Speed=0D
+ ReturnSpeed =3D USB_PORT_STAT_SUPER_SPEED;=0D
+ }=0D
+ }=0D
+=0D
+ //=0D
+ // Check USB2 Protocol Speed ID if ReturnSpeed didn't get match speed.=0D
+ //=0D
+ if ((ReturnSpeed =3D=3D 0) && (Xhc->Usb2SupOffset !=3D 0xFFFFFFFF)) {=0D
+ SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, Speed);=0D
+ if (SpField.Dword !=3D 0) {=0D
+ if (SpField.Data.Psie =3D=3D 2) {=0D
+ if (SpField.Data.Mantissa =3D=3D USB_SUPPORT_PROTOCOL_USB2_HIGH_SP=
EED_PSIM) {=0D
+ // High Speed=0D
+ ReturnSpeed =3D USB_PORT_STAT_HIGH_SPEED;=0D
+ }=0D
+ } else if (SpField.Data.Psie =3D=3D 1) {=0D
+ // Low speed=0D
+ ReturnSpeed =3D USB_PORT_STAT_LOW_SPEED;=0D
+ }=0D
+ }=0D
+ }=0D
+ return ReturnSpeed;=0D
+}=0D
+=0D
/**=0D
Whether the XHCI host controller is halted.=0D
=0D
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/=
XhciDxe/XhciReg.h
index 4950eed272..4f83b49027 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
@@ -27,6 +27,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
=0D
#define XHC_CAP_USB_LEGACY 0x01=0D
#define XHC_CAP_USB_DEBUG 0x0A=0D
+#define XHC_CAP_USB_SUPPORTED 0x02=0D
=0D
// =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D//=0D
// XHCI register offset //=0D
@@ -74,6 +75,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USBLEGSP_BIOS_SEMAPHORE BIT16 // HC BIOS Owned Semaphor=
e=0D
#define USBLEGSP_OS_SEMAPHORE BIT24 // HC OS Owned Semaphore=
=0D
=0D
+//=0D
+// xHCI Supported Protocol Capability=0D
+//=0D
+#define USB_SUPPORTED_PROTOCOL_NAME_STRING 0x20425355=0D
+#define USB_SUPPORTED_NAME_STRING_OFFSET 0x04=0D
+#define USB_SUPPORTED_PORT_ID_OFFSET 0x08=0D
+#define USB_SUPPORT_SPEED_ID_OFFSET 0x10=0D
+#define USB_SUPPORT_PROTOCOL_USB2_MAJOR_VER 0x02=0D
+#define USB_SUPPORT_PROTOCOL_USB3_MAJOR_VER 0x03=0D
+#define USB_SUPPORT_PROTOCOL_USB2_HIGH_SPEED_PSIM 480=0D
+=0D
#pragma pack (1)=0D
typedef struct {=0D
UINT8 MaxSlots; // Number of Device Slots=0D
@@ -130,6 +142,52 @@ typedef union {
HCCPARAMS Data;=0D
} XHC_HCCPARAMS;=0D
=0D
+//=0D
+// xHCI Supported Protocol Cabability=0D
+//=0D
+typedef struct {=0D
+ UINT8 CapId;=0D
+ UINT8 NextExtCapReg;=0D
+ UINT8 RevMinor;=0D
+ UINT8 RevMajor;=0D
+} SUPP_PROTOCOL_DW0;=0D
+=0D
+typedef union {=0D
+ UINT32 Dword;=0D
+ SUPP_PROTOCOL_DW0 Data;=0D
+} XHC_SUPPORTED_PROTOCOL_DW0;=0D
+=0D
+typedef struct {=0D
+ UINT32 NameString;=0D
+} XHC_SUPPORTED_PROTOCOL_DW1;=0D
+=0D
+typedef struct {=0D
+ UINT8 CompPortOffset : 8;=0D
+ UINT8 CompPortCount : 8;=0D
+ UINT16 ProtocolDef :12;=0D
+ UINT16 Psic : 4;=0D
+} SUPP_PROTOCOL_DW2;=0D
+=0D
+typedef union {=0D
+ UINT32 Dword;=0D
+ SUPP_PROTOCOL_DW2 Data;=0D
+} XHC_SUPPORTED_PROTOCOL_DW2;=0D
+=0D
+typedef struct {=0D
+ UINT16 Psiv : 4;=0D
+ UINT16 Psie : 2;=0D
+ UINT16 Plt : 2;=0D
+ UINT16 Pfd : 1;=0D
+ UINT16 RsvdP : 5;=0D
+ UINT16 Lp : 2;=0D
+ UINT16 Mantissa :16;=0D
+} XHCI_PROTOCOL_FIELD;=0D
+=0D
+typedef union {=0D
+ UINT32 Dword;=0D
+ XHCI_PROTOCOL_FIELD Data;=0D
+} XHC_SUPPORTED_PROTOCOL_FIELD;=0D
+=0D
#pragma pack ()=0D
=0D
//=0D
@@ -546,4 +604,33 @@ XhcGetCapabilityAddr (
IN UINT8 CapId=0D
);=0D
=0D
+/**=0D
+ Calculate the offset of the xHCI Supported Protocol Capability.=0D
+=0D
+ @param Xhc The XHCI Instance.=0D
+ @param MajorVersion The USB Major Version in xHCI Support Protocol Cap=
ability Field=0D
+=0D
+ @return The offset of xHCI Supported Protocol capability register.=0D
+=0D
+**/=0D
+UINT32=0D
+XhcGetUsbSupportedCapabilityAddr (=0D
+ IN USB_XHCI_INSTANCE *Xhc,=0D
+ IN UINT8 MajorVersion=0D
+ );=0D
+=0D
+/**=0D
+ Find SpeedField value match with Port Speed ID value.=0D
+=0D
+ @param Xhc The XHCI Instance.=0D
+ @param Speed The Port Speed filed in USB PortSc register=0D
+=0D
+ @return The USB Port Speed.=0D
+=0D
+**/=0D
+UINT16=0D
+XhcCheckUsbPortSpeedUsedPsic (=0D
+ IN USB_XHCI_INSTANCE *Xhc,=0D
+ IN UINT8 Speed=0D
+ );=0D
#endif=0D
--=20
2.26.2.windows.1


Re: [PATCH] BaseTools: Fix dependency issue in PcdValueInit

Jake Garver
 

Hello maintainers,

Any interest in accepting this and the "BaseTools/Conf: Fix Dynamic-Library-File template" patch?

Thanks,
Jake


Re: [PATCH v4] OvmfPkg/BhyveBhfPkg: add support for QemuFwCfg

Corvin Köhne <c.koehne@...>
 

Hi,

does it require more review to get merged?


Best regards
Corvin

Beckhoff Automation GmbH & Co. KG | Managing Director: Dipl. Phys. Hans Beckhoff
Registered office: Verl, Germany | Register court: Guetersloh HRA 7075

-----Original Message-----
From: Corvin Köhne <C.Koehne@...>
Sent: Friday, April 8, 2022 10:15 AM
Cc: Corvin Köhne <C.Koehne@...>; Corvin Köhne <C.Koehne@...>; Ard Biesheuvel <ardb+tianocore@...>; Jordan Justen <jordan.l.justen@...>; devel@edk2.groups.io; FreeBSD Virtualization <freebsd-virtualization@...>; Jiewen Yao <jiewen.yao@...>; Gerd Hoffmann <kraxel@...>; Rebecca Cran <rebecca@...>; Peter Grehan <grehan@...>
Subject: [PATCH v4] OvmfPkg/BhyveBhfPkg: add support for QemuFwCfg

From: Corvin Köhne <CorvinK@...>

QemuFwCfg is much more powerful than BhyveFwCtl. Sadly, BhyveFwCtl
decided to use the same IO ports as QemuFwCfg. It's not possible to use
both interfaces simultaneously. So, prefer QemuFwCfg over BhyveFwCtl.

Signed-off-by: Corvin Köhne <c.koehne@...>
Acked-by: Gerd Hoffmann <kraxel@...>
Acked-by: Rebecca Cran <rebecca@...>
Acked-by: Peter Grehan <grehan@...>
Acked-by: Jiewen Yao <jiewen.yao@...>
CC: Ard Biesheuvel <ardb+tianocore@...>
CC: Jordan Justen <jordan.l.justen@...>
CC: devel@edk2.groups.io
CC: FreeBSD Virtualization <freebsd-virtualization@...>
---
OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatformDxe.inf | 1 +
OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c | 41 ++++++++++++++++++++---
OvmfPkg/Bhyve/BhyveX64.dsc | 4 +--
3 files changed, 40 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatformDxe.inf b/OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatformDxe.inf
index 595fd055f9..94c65f32dc 100644
--- a/OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -43,6 +43,7 @@
MemoryAllocationLib
OrderedCollectionLib
PcdLib
+ QemuFwCfgLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiLib
diff --git a/OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c b/OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c
index 8e80aa33e1..e216a21bfa 100644
--- a/OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c
+++ b/OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c
@@ -11,6 +11,41 @@
#include <Library/BaseMemoryLib.h>
#include <Library/BhyveFwCtlLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <Library/QemuFwCfgLib.h> // QemuFwCfgFindFile()
+
+STATIC
+EFI_STATUS
+EFIAPI
+BhyveGetCpuCount (
+ OUT UINT32 *CpuCount
+ )
+{
+ FIRMWARE_CONFIG_ITEM Item;
+ UINTN Size;
+
+ if (QemuFwCfgIsAvailable ()) {
+ if (EFI_ERROR (QemuFwCfgFindFile ("opt/bhyve/hw.ncpu", &Item, &Size))) {
+ return EFI_NOT_FOUND;
+ } else if (Size != sizeof (*CpuCount)) {
+ return EFI_BAD_BUFFER_SIZE;
+ }
+
+ QemuFwCfgSelectItem (Item);
+ QemuFwCfgReadBytes (Size, CpuCount);
+
+ return EFI_SUCCESS;
+ }
+
+ //
+ // QemuFwCfg not available, try BhyveFwCtl.
+ //
+ Size = sizeof (*CpuCount);
+ if (BhyveFwCtlGet ("hw.ncpu", CpuCount, &Size) == RETURN_SUCCESS) {
+ return EFI_SUCCESS;
+ }
+
+ return EFI_UNSUPPORTED;
+}

STATIC
EFI_STATUS
@@ -23,7 +58,6 @@ BhyveInstallAcpiMadtTable (
)
{
UINT32 CpuCount;
- UINTN cSize;
UINTN NewBufferSize;
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApic;
@@ -36,9 +70,8 @@ BhyveInstallAcpiMadtTable (
ASSERT (AcpiTableBufferSize >= sizeof (EFI_ACPI_DESCRIPTION_HEADER));

// Query the host for the number of vCPUs
- CpuCount = 0;
- cSize = sizeof (CpuCount);
- if (BhyveFwCtlGet ("hw.ncpu", &CpuCount, &cSize) == RETURN_SUCCESS) {
+ Status = BhyveGetCpuCount (&CpuCount);
+ if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "Retrieved CpuCount %d\n", CpuCount));
ASSERT (CpuCount >= 1);
} else {
diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 5fa08bebd7..14070fd6dd 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -163,8 +163,7 @@
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
SerializeVariablesLib|OvmfPkg/Library/SerializeVariablesLib/SerializeVariablesLib.inf
- QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibNull.inf
- QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
+ QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgDxeLib.inf
BhyveFwCtlLib|OvmfPkg/Library/BhyveFwCtlLib/BhyveFwCtlLib.inf
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
@@ -355,6 +354,7 @@
!endif
PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
MpInitLib|UefiCpuPkg/Library/MpInitLibUp/MpInitLibUp.inf
+ QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf

[LibraryClasses.common.UEFI_APPLICATION]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
--
2.11.0

Beckhoff Automation GmbH & Co. KG | Managing Director: Dipl. Phys. Hans Beckhoff
Registered office: Verl, Germany | Register court: Guetersloh HRA 7075


Re: [PATCH v6 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory

Abner Chang
 

Thanks.

Reviewed-by: Abner Chang <abner.chang@...>

-----Original Message-----
From: Gerd Hoffmann <kraxel@...>
Sent: Monday, April 25, 2022 6:35 PM
To: devel@edk2.groups.io
Cc: Jiewen Yao <jiewen.yao@...>; Oliver Steffen
<osteffen@...>; Leif Lindholm <quic_llindhol@...>; Pawel
Polawski <ppolawsk@...>; Hao A Wu <hao.a.wu@...>;
Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>; Liming
Gao <gaoliming@...>; Ray Ni <ray.ni@...>; Jordan Justen
<jordan.l.justen@...>; Jian J Wang <jian.j.wang@...>; Ard
Biesheuvel <ardb+tianocore@...>; Gerd Hoffmann
<kraxel@...>
Subject: [PATCH v6 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not
mandatory

io range is not mandatory according to pcie spec,
so allow host bridges without io address space.

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
.../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++++++++++---------
1 file changed, 23 insertions(+), 22 deletions(-)

diff --git a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
index 98828e0b262b..14b41a533e96 100644
--- a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
+++ b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
@@ -292,13 +292,8 @@ ProcessPciHost (
}
}

- if ((*IoSize == 0) || (*Mmio32Size == 0)) {
- DEBUG ((
- DEBUG_ERROR,
- "%a: %a space empty\n",
- __FUNCTION__,
- (*IoSize == 0) ? "IO" : "MMIO32"
- ));
+ if (*Mmio32Size == 0) {
+ DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n",
__FUNCTION__));
return EFI_PROTOCOL_ERROR;
}

@@ -333,13 +328,15 @@ ProcessPciHost (
return Status;
}

- //
- // Map the MMIO window that provides I/O access - the PCI host bridge
code
- // is not aware of this translation and so it will only map the I/O view
- // in the GCD I/O map.
- //
- Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
- ASSERT_EFI_ERROR (Status);
+ if (*IoSize != 0) {
+ //
+ // Map the MMIO window that provides I/O access - the PCI host bridge
code
+ // is not aware of this translation and so it will only map the I/O view
+ // in the GCD I/O map.
+ //
+ Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
+ ASSERT_EFI_ERROR (Status);
+ }

return Status;
}
@@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (

AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;

- Io.Base = IoBase;
- Io.Limit = IoBase + IoSize - 1;
+ if (IoSize != 0) {
+ Io.Base = IoBase;
+ Io.Limit = IoBase + IoSize - 1;
+ } else {
+ Io.Base = MAX_UINT64;
+ Io.Limit = 0;
+ }
+
Mem.Base = Mmio32Base;
Mem.Limit = Mmio32Base + Mmio32Size - 1;

- if (sizeof (UINTN) == sizeof (UINT64)) {
- MemAbove4G.Base = Mmio64Base;
- MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
- if (Mmio64Size > 0) {
- AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
- }
+ if ((sizeof (UINTN) == sizeof (UINT64)) && (Mmio64Size != 0)) {
+ MemAbove4G.Base = Mmio64Base;
+ MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
+ AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
} else {
//
// UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
--
2.35.1


Re: [PATCH v3 0/6] OvmfPkg/VirtioGpuDxe: use host display resolution

Ard Biesheuvel
 

On Mon, 25 Apr 2022 at 12:36, Gerd Hoffmann <kraxel@...> wrote:

On Fri, Apr 08, 2022 at 10:23:27AM +0200, Gerd Hoffmann wrote:
QemuVideoDxe recently got support for picking up
display resolution configuration from the host.
This series does the same for VirtioGpuDxe.

v3:
- rebase to latest master.
Ping. Anything blocking the merge id this series?
No, I'll pick these up today.


Re: [PATCH v6 0/6] OvmfPkg/Microvm/pcie: add pcie support

Ard Biesheuvel
 

On Mon, 25 Apr 2022 at 12:34, Gerd Hoffmann <kraxel@...> wrote:

Needs two little tweaks in PCI code because microvm supports mmio only.
Other than that just wire up the existing code (the PCIe host adapter
used by microvm is the same (virtual) hardware used by the arm/aarch64
virtual machines).

v6:
- codestyle fix (Abner Chang).

v5:
- codestyle (uncrustify) fix.

v4:
- update PciHostBridge check (Abner Chang).

v3:
- rebase to latest master, adapt to PlatformInitLib.
- rework PhysMemAddressWidth handling for microvm.

v2:
- rebase to latest master
- pick up review tags

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3777

Gerd Hoffmann (6):
MdeModulePkg/PciHostBridge: io range is not mandatory
OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
OvmfPkg/Platform: unfix PcdPciExpressBaseAddress
OvmfPkg/Microvm/pcie: no vbeshim please
OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak
OvmfPkg/Microvm/pcie: add pcie support
Thanks Gerd. I'm happy to take these, but not without an ack from the
MdeModulePkg maintainers.



OvmfPkg/Microvm/MicrovmX64.dsc | 40 ++++++++++-------
.../PlatformInitLib/PlatformInitLib.inf | 4 +-
OvmfPkg/PlatformPei/PlatformPei.inf | 2 +-
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 ++
.../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++++++++++---------
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 45 ++++++++++++++++++-
OvmfPkg/Library/PlatformInitLib/Platform.c | 4 +-
OvmfPkg/PlatformPei/Platform.c | 2 +-
OvmfPkg/QemuVideoDxe/VbeShim.c | 2 +
OvmfPkg/Microvm/README | 2 +-
10 files changed, 104 insertions(+), 45 deletions(-)

--
2.35.1


Re: [PATCH v3 0/6] OvmfPkg/VirtioGpuDxe: use host display resolution

Gerd Hoffmann
 

On Fri, Apr 08, 2022 at 10:23:27AM +0200, Gerd Hoffmann wrote:
QemuVideoDxe recently got support for picking up
display resolution configuration from the host.
This series does the same for VirtioGpuDxe.

v3:
- rebase to latest master.
Ping. Anything blocking the merge id this series?

thanks,
Gerd


[PATCH v6 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory

Gerd Hoffmann
 

io range is not mandatory according to pcie spec,
so allow host bridges without io address space.

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
.../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++++++++++---------
1 file changed, 23 insertions(+), 22 deletions(-)

diff --git a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
index 98828e0b262b..14b41a533e96 100644
--- a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
+++ b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
@@ -292,13 +292,8 @@ ProcessPciHost (
}
}

- if ((*IoSize == 0) || (*Mmio32Size == 0)) {
- DEBUG ((
- DEBUG_ERROR,
- "%a: %a space empty\n",
- __FUNCTION__,
- (*IoSize == 0) ? "IO" : "MMIO32"
- ));
+ if (*Mmio32Size == 0) {
+ DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}

@@ -333,13 +328,15 @@ ProcessPciHost (
return Status;
}

- //
- // Map the MMIO window that provides I/O access - the PCI host bridge code
- // is not aware of this translation and so it will only map the I/O view
- // in the GCD I/O map.
- //
- Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
- ASSERT_EFI_ERROR (Status);
+ if (*IoSize != 0) {
+ //
+ // Map the MMIO window that provides I/O access - the PCI host bridge code
+ // is not aware of this translation and so it will only map the I/O view
+ // in the GCD I/O map.
+ //
+ Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
+ ASSERT_EFI_ERROR (Status);
+ }

return Status;
}
@@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (

AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;

- Io.Base = IoBase;
- Io.Limit = IoBase + IoSize - 1;
+ if (IoSize != 0) {
+ Io.Base = IoBase;
+ Io.Limit = IoBase + IoSize - 1;
+ } else {
+ Io.Base = MAX_UINT64;
+ Io.Limit = 0;
+ }
+
Mem.Base = Mmio32Base;
Mem.Limit = Mmio32Base + Mmio32Size - 1;

- if (sizeof (UINTN) == sizeof (UINT64)) {
- MemAbove4G.Base = Mmio64Base;
- MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
- if (Mmio64Size > 0) {
- AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
- }
+ if ((sizeof (UINTN) == sizeof (UINT64)) && (Mmio64Size != 0)) {
+ MemAbove4G.Base = Mmio64Base;
+ MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
+ AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
} else {
//
// UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
--
2.35.1


[PATCH v6 6/6] OvmfPkg/Microvm/pcie: add pcie support

Gerd Hoffmann
 

Link in pcie and host bridge bits. Enables support for PCIe in microvm
(qemu-system-x86_64 -M microvm,pcie=on).

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3777
Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 40 +++++++++++++++++++++-------------
OvmfPkg/Microvm/README | 2 +-
2 files changed, 26 insertions(+), 16 deletions(-)

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index c9c843e116a9..82e3f2195aff 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -336,7 +336,9 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
!endif
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+# PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+# PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+# PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf

@@ -353,7 +355,9 @@ [LibraryClasses.common.UEFI_DRIVER]
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf

[LibraryClasses.common.DXE_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -375,7 +379,9 @@ [LibraryClasses.common.DXE_DRIVER]
!if $(SOURCE_DEBUG_ENABLE) == TRUE
DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
@@ -391,7 +397,9 @@ [LibraryClasses.common.UEFI_APPLICATION]
!else
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf

[LibraryClasses.common.DXE_SMM_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -412,7 +420,9 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SmmDebugAgentLib.inf
!endif
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf

[LibraryClasses.common.SMM_CORE]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -428,7 +438,9 @@ [LibraryClasses.common.SMM_CORE]
!else
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf

################################################################################
#
@@ -503,14 +515,6 @@ [PcdsFixedAtBuild]
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
!endif

- # This PCD is used to set the base address of the PCI express hierarchy. It
- # is only consulted when OVMF runs on Q35. In that case it is programmed into
- # the PCIEXBAR register.
- #
- # On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
-
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
!endif
@@ -576,6 +580,12 @@ [PcdsDynamicDefault]
gEfiMdePkgTokenSpaceGuid.PcdFSBClock|1000000000
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0

+ # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this
+ # PCD and PcdPciDisableBusEnumeration below have not been assigned yet
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF
+ gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
+
# Set video resolution for text setup.
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
@@ -676,7 +686,7 @@ [Components]
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
<LibraryClasses>
- PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
+ PciHostBridgeLib|OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf
PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
NULL|OvmfPkg/Library/PlatformHasIoMmuLib/PlatformHasIoMmuLib.inf
}
diff --git a/OvmfPkg/Microvm/README b/OvmfPkg/Microvm/README
index 540d39f2ec21..813920d92a60 100644
--- a/OvmfPkg/Microvm/README
+++ b/OvmfPkg/Microvm/README
@@ -29,7 +29,7 @@ features
[working] serial console
[working] direct kernel boot
[working] virtio-mmio support
- [in progress] pcie support
+ [working] pcie support

known limitations
-----------------
--
2.35.1


[PATCH v6 5/6] OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak

Gerd Hoffmann
 

microvm places the 64bit mmio space at the end of the physical address
space. So mPhysMemAddressWidth must be correct, otherwise the pci host
bridge setup throws an error because it thinks the 64bit mmio window is
not addressable.

On microvm we can simply use standard cpuid to figure the address width
because the host-phys-bits option (-cpu ${name},host-phys-bits=on) is
forced to be enabled. Side note: For 'pc' and 'q35' this is not the
case for backward compatibility reasons.

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 41 +++++++++++++++++++++
OvmfPkg/PlatformPei/Platform.c | 2 +-
2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 83a7b6726bb7..c28d7601f87e 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -491,6 +491,42 @@ PlatformGetFirstNonAddress (
return FirstNonAddress;
}

+/*
+ * Use CPUID to figure physical address width. Does *not* work
+ * reliable on qemu. For historical reasons qemu returns phys-bits=40
+ * even in case the host machine supports less than that.
+ *
+ * qemu has a cpu property (host-phys-bits={on,off}) to change that
+ * and make sure guest phys-bits are not larger than host phys-bits.,
+ * but it is off by default. Exception: microvm machine type
+ * hard-wires that property to on.
+ */
+VOID
+EFIAPI
+PlatformAddressWidthFromCpuid (
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ UINT32 RegEax;
+
+ AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+ if (RegEax >= 0x80000008) {
+ AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
+ PlatformInfoHob->PhysMemAddressWidth = (UINT8)RegEax;
+ } else {
+ PlatformInfoHob->PhysMemAddressWidth = 36;
+ }
+
+ PlatformInfoHob->FirstNonAddress = LShiftU64 (1, PlatformInfoHob->PhysMemAddressWidth);
+
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: cpuid: phys-bits is %d\n",
+ __FUNCTION__,
+ PlatformInfoHob->PhysMemAddressWidth
+ ));
+}
+
/**
Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.
**/
@@ -503,6 +539,11 @@ PlatformAddressWidthInitialization (
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;

+ if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
+ PlatformAddressWidthFromCpuid (PlatformInfoHob);
+ return;
+ }
+
//
// As guest-physical memory size grows, the permanent PEI RAM requirements
// are dominated by the identity-mapping page tables built by the DXE IPL.
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index f006755d5fdb..009db67ee60a 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -357,12 +357,12 @@ InitializePlatform (

S3Verification ();
BootModeInitialization (&mPlatformInfoHob);
- AddressWidthInitialization (&mPlatformInfoHob);

//
// Query Host Bridge DID
//
mPlatformInfoHob.HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
+ AddressWidthInitialization (&mPlatformInfoHob);

MaxCpuCountInitialization (&mPlatformInfoHob);

--
2.35.1


[PATCH v6 4/6] OvmfPkg/Microvm/pcie: no vbeshim please

Gerd Hoffmann
 

Those old windows versions which need the vbeshim hack
will not run on microvm anyway.

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/QemuVideoDxe/VbeShim.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/OvmfPkg/QemuVideoDxe/VbeShim.c b/OvmfPkg/QemuVideoDxe/VbeShim.c
index 8faa146b6cce..2a048211a823 100644
--- a/OvmfPkg/QemuVideoDxe/VbeShim.c
+++ b/OvmfPkg/QemuVideoDxe/VbeShim.c
@@ -156,6 +156,8 @@ InstallVbeShim (
case INTEL_Q35_MCH_DEVICE_ID:
Pam1Address = DRAMC_REGISTER_Q35 (MCH_PAM1);
break;
+ case MICROVM_PSEUDO_DEVICE_ID:
+ return;
default:
DEBUG ((
DEBUG_ERROR,
--
2.35.1


[PATCH v6 3/6] OvmfPkg/Platform: unfix PcdPciExpressBaseAddress

Gerd Hoffmann
 

Will be set by FdtPciHostBridgeLib, so it can't be an fixed when we
want use that library.

Signed-off-by: Gerd Hoffmann <kraxel@...>
---
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf | 4 +++-
OvmfPkg/PlatformPei/PlatformPei.inf | 2 +-
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 4 ++--
OvmfPkg/Library/PlatformInitLib/Platform.c | 4 ++--
4 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
index d0fab5cc1f4f..d2a0bec43452 100644
--- a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
+++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
@@ -54,8 +54,10 @@ [LibraryClasses]
[LibraryClasses.X64]
TdxLib

-[FixedPcd]
+[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+
+[FixedPcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 00372fa0ebb5..3cd83e6ec3e5 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -95,6 +95,7 @@ [Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr
gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
@@ -118,7 +119,6 @@ [Pcd]
[FixedPcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 4c1dedf863c3..83a7b6726bb7 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -61,8 +61,8 @@ PlatformQemuUc32BaseInitialization (
// [PcdPciExpressBaseAddress, 4GB) range require a very small number of
// variable MTRRs (preferably 1 or 2).
//
- ASSERT (FixedPcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
- PlatformInfoHob->Uc32Base = (UINT32)FixedPcdGet64 (PcdPciExpressBaseAddress);
+ ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
+ PlatformInfoHob->Uc32Base = (UINT32)PcdGet64 (PcdPciExpressBaseAddress);
return;
}

diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index 101074f6100d..60a30a01f3b5 100644
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -154,7 +154,7 @@ PlatformMemMapInitialization (
// The MMCONFIG area is expected to fall between the top of low RAM and
// the base of the 32-bit PCI host aperture.
//
- PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
+ PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
ASSERT (TopOfLowRam <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
@@ -278,7 +278,7 @@ PciExBarInitialization (
// determined in AddressWidthInitialization(), i.e., 36 bits, will suffice
// for DXE's page tables to cover the MMCONFIG area.
//
- PciExBarBase.Uint64 = FixedPcdGet64 (PcdPciExpressBaseAddress);
+ PciExBarBase.Uint64 = PcdGet64 (PcdPciExpressBaseAddress);
ASSERT ((PciExBarBase.Uint32[1] & MCH_PCIEXBAR_HIGHMASK) == 0);
ASSERT ((PciExBarBase.Uint32[0] & MCH_PCIEXBAR_LOWMASK) == 0);

--
2.35.1


[PATCH v6 0/6] OvmfPkg/Microvm/pcie: add pcie support

Gerd Hoffmann
 

Needs two little tweaks in PCI code because microvm supports mmio only.
Other than that just wire up the existing code (the PCIe host adapter
used by microvm is the same (virtual) hardware used by the arm/aarch64
virtual machines).

v6:
- codestyle fix (Abner Chang).

v5:
- codestyle (uncrustify) fix.

v4:
- update PciHostBridge check (Abner Chang).

v3:
- rebase to latest master, adapt to PlatformInitLib.
- rework PhysMemAddressWidth handling for microvm.

v2:
- rebase to latest master
- pick up review tags

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3777

Gerd Hoffmann (6):
MdeModulePkg/PciHostBridge: io range is not mandatory
OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
OvmfPkg/Platform: unfix PcdPciExpressBaseAddress
OvmfPkg/Microvm/pcie: no vbeshim please
OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak
OvmfPkg/Microvm/pcie: add pcie support

OvmfPkg/Microvm/MicrovmX64.dsc | 40 ++++++++++-------
.../PlatformInitLib/PlatformInitLib.inf | 4 +-
OvmfPkg/PlatformPei/PlatformPei.inf | 2 +-
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 ++
.../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++++++++++---------
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 45 ++++++++++++++++++-
OvmfPkg/Library/PlatformInitLib/Platform.c | 4 +-
OvmfPkg/PlatformPei/Platform.c | 2 +-
OvmfPkg/QemuVideoDxe/VbeShim.c | 2 +
OvmfPkg/Microvm/README | 2 +-
10 files changed, 104 insertions(+), 45 deletions(-)

--
2.35.1


[PATCH v6 1/6] MdeModulePkg/PciHostBridge: io range is not mandatory

Gerd Hoffmann
 

io range is not mandatory according to pcie spec,
so allow bridge configurations without io address
space assigned.

Signed-off-by: Gerd Hoffmann <kraxel@...>
Reviewed-by: Ard Biesheuvel <ardb@...>
---
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
index b20bcd310ad5..712662707931 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
@@ -1085,6 +1085,9 @@ NotifyPhase (
RootBridge->ResAllocNode[Index].Base = BaseAddress;
RootBridge->ResAllocNode[Index].Status = ResAllocated;
DEBUG ((DEBUG_INFO, "Success\n"));
+ } else if ((Index == TypeIo) && (RootBridge->Io.Base == MAX_UINT64)) {
+ /* optional on PCIe */
+ DEBUG ((DEBUG_INFO, "PCI Root Bridge does not provide IO Resources.\n"));
} else {
ReturnStatus = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "Out Of Resource!\n"));
--
2.35.1


[PATCH v2 1/1] MdePkg: add SmmCpuRendezvousLib.h and SmmCpuRendezvousLibNull implement.

Li, Zhihao
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3912

UefiCpuPkg define a new Protocol with the new services
SmmWaitForAllProcessor(), which can be used by SMI handler
to optionally wait for other APs to complete SMM rendezvous in
relaxed AP mode.

VariableSmm and VariableStandaloneMM driver in MdeModulePkg need
to use this services but MdeModulePkg can't depend on UefiCpuPkg.

Thus, the solution is moving SmmCpuRendezvouslib.h from UefiCpuPkg
to MdePkg and creating SmmCpuRendezvousLib NullLib version
implementation in MdePkg as dependency for the pkg that can't
depend on UefiCpuPkg.

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Michael Kubacki <mikuback@...>
Cc: Siyuan Fu <siyuan.fu@...>

Signed-off-by: Zhihao Li <zhihao.li@...>
---
MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.c | 29 ++++++++++++++++++++
{UefiCpuPkg => MdePkg}/Include/Library/SmmCpuRendezvousLib.h | 0
MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf | 26 ++++++++++++++++++
MdePkg/MdeLibs.dsc.inc | 3 +-
MdePkg/MdePkg.dec | 5 +++-
MdePkg/MdePkg.dsc | 3 +-
UefiCpuPkg/UefiCpuPkg.dec | 3 --
7 files changed, 63 insertions(+), 6 deletions(-)

diff --git a/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.c b/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.c
new file mode 100644
index 000000000000..474195bbb374
--- /dev/null
+++ b/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.c
@@ -0,0 +1,29 @@
+/** @file
+ SMM CPU Rendezvous sevice implement.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/SmmCpuRendezvousLib.h>
+
+/**
+ This routine wait for all AP processors to arrive in SMM.
+
+ @param[in] BlockingMode Blocking mode or non-blocking mode.
+
+ @retval EFI_SUCCESS All avaiable APs arrived.
+ @retval EFI_TIMEOUT Wait for all APs until timeout.
+ @retval OTHER Fail to register SMM CPU Rendezvous service Protocol.
+**/
+EFI_STATUS
+EFIAPI
+SmmWaitForAllProcessor (
+ IN BOOLEAN BlockingMode
+ )
+{
+ ASSERT (FALSE);
+ return EFI_SUCCESS;
+}
diff --git a/UefiCpuPkg/Include/Library/SmmCpuRendezvousLib.h b/MdePkg/Include/Library/SmmCpuRendezvousLib.h
similarity index 100%
rename from UefiCpuPkg/Include/Library/SmmCpuRendezvousLib.h
rename to MdePkg/Include/Library/SmmCpuRendezvousLib.h
diff --git a/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf b/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf
new file mode 100644
index 000000000000..7c9bac9af2ff
--- /dev/null
+++ b/MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf
@@ -0,0 +1,26 @@
+## @file
+# SMM CPU Rendezvous service lib.
+#
+# This is SMM CPU rendezvous service lib that wait for all
+# APs to enter SMM mode.
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SmmCpuRendezvousLibNull
+ FILE_GUID = 1e5790ea-d013-4d7b-9047-b4342a762027
+ MODULE_TYPE = DXE_SMM_DRIVER
+ LIBRARY_CLASS = SmmCpuRendezvousLib|MM_STANDALONE DXE_SMM_DRIVER
+
+[Sources]
+ SmmCpuRendezvousLibNull.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
diff --git a/MdePkg/MdeLibs.dsc.inc b/MdePkg/MdeLibs.dsc.inc
index 3c70daf87a0c..9d7b234b8565 100644
--- a/MdePkg/MdeLibs.dsc.inc
+++ b/MdePkg/MdeLibs.dsc.inc
@@ -5,7 +5,7 @@
# by using "!include MdePkg/MdeLibs.dsc.inc" to specify the library instances
# of some EDKII basic/common library classes.
#
-# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2021 - 2022, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,3 +13,4 @@

[LibraryClasses]
RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
+ SmmCpuRendezvousLib|MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index faeb28c80cbd..f1ebf9e251c1 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -4,7 +4,7 @@
# It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of
# EFI1.10/UEFI2.7/PI1.7 and some Industry Standards.
#
-# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP<BR>
#
@@ -272,6 +272,9 @@
#
CcProbeLib|Include/Library/CcProbeLib.h

+ ## @libraryclass Provides function for SMM CPU Rendezvous Library.
+ SmmCpuRendezvousLib|Include/Library/SmmCpuRendezvousLib.h
+
[LibraryClasses.IA32, LibraryClasses.X64, LibraryClasses.AARCH64]
## @libraryclass Provides services to generate random number.
#
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index c8d282882ec1..3d8874e64782 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -1,7 +1,7 @@
## @file
# EFI/PI MdePkg Package
#
-# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
#
@@ -131,6 +131,7 @@

MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
MdePkg/Library/CcProbeLibNull/CcProbeLibNull.inf
+ MdePkg/Library/SmmCpuRendezvousLibNull/SmmCpuRendezvousLibNull.inf

[Components.IA32, Components.X64, Components.ARM, Components.AARCH64]
#
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 525cde463435..1951eb294c6c 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -62,9 +62,6 @@
## @libraryclass Provides function for loading microcode.
MicrocodeLib|Include/Library/MicrocodeLib.h

- ## @libraryclass Provides function for SMM CPU Rendezvous Library.
- SmmCpuRendezvousLib|Include/Library/SmmCpuRendezvousLib.h
-
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
--
2.26.2.windows.1


Re: [PATCH 1/1] OvmfPkg: Add README for TDVF

Gerd Hoffmann
 

+Usage
+-----
+
+Assuming TDX-QEMU/TDX-KVM are already built, one can start a TD virtual
+machine as follows:
Not working (yet) with upstream qemu. This needs a clarification which
qemu repository you are talking about (and once tdx patches landed
upstream this should be replaced with the minimum qemu version
required).

take care,
Gerd

7361 - 7380 of 96543