Date   

Re: The arm virtual machine displays problems in QXL during the UEFI phase

Lange Tang
 

Hi Gerd:
Thanks for your reply. In fact, I have no choice, only QXL in my work.
1. I wonder why the device display be normal when it hung on bus=pci.8,addr=0x0, but it is abnormal when bus=pci.9,addr=0x1 or bus=pci.7,addr=0x0.
2. Why cache properties are going to cause QXL display abnormal on ARM. Are there any links or materials? Thanks.


take care
Lange



At 2021-11-02 21:35:06, "Gerd Hoffmann" <kraxel@...> wrote: >On Tue, Nov 02, 2021 at 08:55:39PM +0800, Lange Tang wrote: >> Hi everyone: >> >> >> In order to support QXL display during the UEFI phase of the arm64 virtual machine, > >Not going to fly. Use virtio-gpu instead. > >Anything with a virtual pci memory bar is going to have cache attribute >problems on arm. > >take care, > Gerd > > > > >


 


Event: TianoCore Bug Triage - APAC / NAMO - 11/02/2021 #cal-reminder

devel@edk2.groups.io Calendar <noreply@...>
 

Reminder: TianoCore Bug Triage - APAC / NAMO

When:
11/02/2021
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTUyZTg2NjgtNDhlNS00ODVlLTllYTUtYzg1OTNjNjdiZjFh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%22b286b53a-1218-4db3-bfc9-3d4c5aa7669e%22%7d

Organizer: Liming Gao gaoliming@...

View Event

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

Microsoft Teams meeting

Join on your computer or mobile app

Click here to join the meeting

Join with a video conferencing device

teams@...

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回复:回复: [edk2-devel] About how to submit a new architecture called LoongArch

Chao Li
 

Liming:
    Yes, I will keep going to do this work, we will conduct an internal review before submitting, and then merge it into my personal or our group repo in GitHub, if I am finish, I will let you know.


Thanks,

Chao Li

------------------------------------------------------------------

Chao:
Can you follow Mike's suggestion to share the your code change in your personal GitHub repo as the first step?

Thanks
Liming
> -----邮件原件-----
> 发件人: devel@edk2.groups.io 代表 Michael D
> Kinney
> 发送时间: 2021年10月29日 13:19
> 收件人: devel@edk2.groups.io; kilaterlee@...; Kinney, Michael D
>
> 主题: Re: [edk2-devel] About how to submit a new architecture called
> LoongArch
>
> LI Chao,
>
> The best way to share your source code changes with the TianoCore
> community
> with a fork of the edk2 repository in your personal GitHub. Create a branch
> with the proposed changes and send an email with the link to the branch for
> the community to review.
>
> The edk2-staging repository would be a good second step if the new
> architecture is approved for the EDK II project.
>
> Best regards,
>
> Mike
>

> > -----Original Message-----
> > From: Kinney, Michael D
> > Sent: Thursday, October 28, 2021 10:13 PM
> > To: devel@edk2.groups.io; kilaterlee@...; Kinney, Michael D
>
> > Subject: RE: [edk2-devel] About how to submit a new architecture called
> LoongArch
> >
> > Hi LI Chao,
> >
> > Can you provide a brief description of LoongArch and perhaps provide links
> to
> > documentation and overview materials?
> >
> > Thanks,
> >
> > Mike
> >
> >
> ==============================================================
> ==================
> >
> > From: devel@edk2.groups.io On Behalf Of
> kilaterlee@...
> > Sent: Wednesday, October 27, 2021 2:41 AM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] About how to submit a new architecture called
> LoongArch
> >
> > Dear All:
> > I want to submit a new architecture called LoongArch on EDK2 and
> the USWG recommands us do "code first" because the
> > UEFI specifitcation will easily accpet our arch.
> > What can we do? Do I submit the part 1 code for new architecture on
> the "staging" branch? Hop you reply. :)
> > ________________________________________
> > Thanks,
> > LI Chao
> >
>
>
>
>



Re: [PATCH 1/2] Reconfigure OpensslLib to add elliptic curve chipher algorithms

Yao, Jiewen
 

Hello Vineel
May I know if you have send out v2?

-----Original Message-----
From: Vineel Kovvuri <vineelko@...>
Sent: Tuesday, October 19, 2021 4:06 AM
To: Yao, Jiewen <jiewen.yao@...>; Vineel Kovvuri
<vineel.kovvuri@...>; devel@edk2.groups.io; Sean Brogan
<sean.brogan@...>; Bret Barkelew
<Bret.Barkelew@...>; Mike Turner
<Michael.Turner@...>
Cc: Jancarlo Perez <jpere@...>
Subject: RE: [PATCH 1/2] Reconfigure OpensslLib to add elliptic curve chipher
algorithms

Hi Jiewen,

Sorry for the build break. I will fix this locally and send you the patch.

Thanks,
Vineel

-----Original Message-----
From: Yao, Jiewen <jiewen.yao@...>
Sent: Saturday, October 16, 2021 7:49 PM
To: Vineel Kovvuri <vineel.kovvuri@...>; devel@edk2.groups.io; Sean
Brogan <sean.brogan@...>; Bret Barkelew
<Bret.Barkelew@...>; Mike Turner
<Michael.Turner@...>
Cc: Vineel Kovvuri <vineelko@...>
Subject: [EXTERNAL] RE: [PATCH 1/2] Reconfigure OpensslLib to add elliptic
curve chipher algorithms

Hi
This patch fails in the P-R -
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.c
om%2Ftianocore%2Fedk2%2Fpull%2F2073&amp;data=04%7C01%7Cvineelko%4
0microsoft.com%7C5d3643d0f0ec4bb48ba608d99118b6e7%7C72f988bf86f141
af91ab2d7cd011db47%7C1%7C0%7C637700357621360496%7CUnknown%7CT
WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
CI6Mn0%3D%7C1000&amp;sdata=NbiiW6sHXAfHEkkL7aBbnGlZoYXbAzmkgzeqb
biuJ6Q%3D&amp;reserved=0. Please double check.

You are encourage to try P-R by yourself before submit the patch.

Thank you
Yao Jiewen

-----Original Message-----
From: Vineel Kovvuri <vineel.kovvuri@...>
Sent: Tuesday, October 12, 2021 1:38 PM
To: devel@edk2.groups.io; Yao, Jiewen <jiewen.yao@...>;
sean.brogan@...; bret.barkelew@...;
Michael.Turner@...
Cc: Vineel Kovvuri <vineelko@...>
Subject: [PATCH 1/2] Reconfigure OpensslLib to add elliptic curve
chipher algorithms

This commit is a cherry pick of project mu's commit
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgith
ub.com%2Fmicrosoft%2Fmu_tiano_plus%2Fcommit%2F1f3b135ddc821718a78c
3&am
p;data=04%7C01%7Cvineelko%40microsoft.com%7C5d3643d0f0ec4bb48ba608
d991
18b6e7%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637700357621
360496
%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLC
JBTiI6I
k1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=OFSVeefYJN%2Bq1BgGMKAJ0
H%2B2wfX
%2Bbn%2B4rmppat62i1o%3D&amp;reserved=0
52316197889c5d3e0c2

Reconfigure OpensslLib to add elliptic curve chipher algorithms.
The only file manually changed is process_files.pl.
Running the script changes the other three files.

BugZilla:
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D3679&amp;data=04%7C01%7Cvin
ee
lko%40microsoft.com%7C5d3643d0f0ec4bb48ba608d99118b6e7%7C72f988bf8
6f14
1af91ab2d7cd011db47%7C1%7C0%7C637700357621360496%7CUnknown%7CT
WFpbGZsb
3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
3D%
7C1000&amp;sdata=hUoZ%2F%2BTHW4aIvzk2N%2BCgtSqQ9igntGGt2vtlOgPTE
KY%3D&
amp;reserved=0

Signed-off-by: Vineel Kovvuri <vineelko@...>
---
.../Library/Include/openssl/opensslconf.h | 25 ++--------
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 50 +++++++++++++++++++
.../Library/OpensslLib/OpensslLibCrypto.inf | 50 +++++++++++++++++++
CryptoPkg/Library/OpensslLib/process_files.pl | 1 -
4 files changed, 105 insertions(+), 21 deletions(-)

diff --git a/CryptoPkg/Library/Include/openssl/opensslconf.h
b/CryptoPkg/Library/Include/openssl/opensslconf.h
index b8d59aebe8..09a6641ffc 100644
--- a/CryptoPkg/Library/Include/openssl/opensslconf.h
+++ b/CryptoPkg/Library/Include/openssl/opensslconf.h
@@ -55,9 +55,6 @@ extern "C" {
#ifndef OPENSSL_NO_DSA
# define OPENSSL_NO_DSA
#endif
-#ifndef OPENSSL_NO_EC
-# define OPENSSL_NO_EC
-#endif
#ifndef OPENSSL_NO_IDEA
# define OPENSSL_NO_IDEA
#endif
@@ -88,9 +85,6 @@ extern "C" {
#ifndef OPENSSL_NO_SEED
# define OPENSSL_NO_SEED
#endif
-#ifndef OPENSSL_NO_SM2
-# define OPENSSL_NO_SM2
-#endif
#ifndef OPENSSL_NO_SRP
# define OPENSSL_NO_SRP
#endif
@@ -154,12 +148,6 @@ extern "C" {
#ifndef OPENSSL_NO_EC_NISTP_64_GCC_128 # define
OPENSSL_NO_EC_NISTP_64_GCC_128 #endif -#ifndef OPENSSL_NO_ECDH -#
define OPENSSL_NO_ECDH -#endif -#ifndef OPENSSL_NO_ECDSA -# define
OPENSSL_NO_ECDSA -#endif #ifndef OPENSSL_NO_EGD # define
OPENSSL_NO_EGD #endif @@ -226,9 +214,6 @@ extern "C" { #ifndef
OPENSSL_NO_TESTS # define OPENSSL_NO_TESTS #endif -#ifndef
OPENSSL_NO_TLS1_3 -# define OPENSSL_NO_TLS1_3 -#endif #ifndef
OPENSSL_NO_UBSAN # define OPENSSL_NO_UBSAN #endif @@ -265,11
+250,11
@@ extern "C" {
# undef DECLARE_DEPRECATED
# define DECLARE_DEPRECATED(f) f __attribute__ ((deprecated));
# endif
-#elif defined(__SUNPRO_C)
-#if (__SUNPRO_C >= 0x5130)
-#undef DECLARE_DEPRECATED
-#define DECLARE_DEPRECATED(f) f __attribute__ ((deprecated));
-#endif
+# elif defined(__SUNPRO_C)
+# if (__SUNPRO_C >= 0x5130)
+# undef DECLARE_DEPRECATED
+# define DECLARE_DEPRECATED(f) f __attribute__ ((deprecated));
+# endif
# endif
#endif

diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index d84bde056a..bd3d9cc90f 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -199,6 +199,43 @@
$(OPENSSL_PATH)/crypto/dso/dso_vms.c
$(OPENSSL_PATH)/crypto/dso/dso_win32.c
$(OPENSSL_PATH)/crypto/ebcdic.c
+ $(OPENSSL_PATH)/crypto/ec/curve25519.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c
+ $(OPENSSL_PATH)/crypto/ec/ec2_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c
+ $(OPENSSL_PATH)/crypto/ec/ec_ameth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_asn1.c
+ $(OPENSSL_PATH)/crypto/ec/ec_check.c
+ $(OPENSSL_PATH)/crypto/ec/ec_curve.c
+ $(OPENSSL_PATH)/crypto/ec/ec_cvt.c
+ $(OPENSSL_PATH)/crypto/ec/ec_err.c
+ $(OPENSSL_PATH)/crypto/ec/ec_key.c
+ $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_lib.c
+ $(OPENSSL_PATH)/crypto/ec/ec_mult.c
+ $(OPENSSL_PATH)/crypto/ec/ec_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_print.c
+ $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c
+ $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c
+ $(OPENSSL_PATH)/crypto/ec/eck_prn.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_mont.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nist.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c
+ $(OPENSSL_PATH)/crypto/ec/ecx_meth.c
$(OPENSSL_PATH)/crypto/err/err.c
$(OPENSSL_PATH)/crypto/err/err_prn.c
$(OPENSSL_PATH)/crypto/evp/bio_b64.c
@@ -384,6 +421,10 @@
$(OPENSSL_PATH)/crypto/siphash/siphash.c
$(OPENSSL_PATH)/crypto/siphash/siphash_ameth.c
$(OPENSSL_PATH)/crypto/siphash/siphash_pmeth.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_crypt.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_err.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_pmeth.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_sign.c
$(OPENSSL_PATH)/crypto/sm3/m_sm3.c
$(OPENSSL_PATH)/crypto/sm3/sm3.c
$(OPENSSL_PATH)/crypto/sm4/sm4.c
@@ -496,6 +537,15 @@
$(OPENSSL_PATH)/crypto/conf/conf_local.h
$(OPENSSL_PATH)/crypto/dh/dh_local.h
$(OPENSSL_PATH)/crypto/dso/dso_local.h
+ $(OPENSSL_PATH)/crypto/ec/ec_local.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/field.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/word.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h
$(OPENSSL_PATH)/crypto/evp/evp_local.h
$(OPENSSL_PATH)/crypto/hmac/hmac_local.h
$(OPENSSL_PATH)/crypto/lhash/lhash_local.h
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index cdeed0d073..38ccf1a5b6 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -199,6 +199,43 @@
$(OPENSSL_PATH)/crypto/dso/dso_vms.c
$(OPENSSL_PATH)/crypto/dso/dso_win32.c
$(OPENSSL_PATH)/crypto/ebcdic.c
+ $(OPENSSL_PATH)/crypto/ec/curve25519.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_tables.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/eddsa.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/f_generic.c
+ $(OPENSSL_PATH)/crypto/ec/curve448/scalar.c
+ $(OPENSSL_PATH)/crypto/ec/ec2_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ec2_smpl.c
+ $(OPENSSL_PATH)/crypto/ec/ec_ameth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_asn1.c
+ $(OPENSSL_PATH)/crypto/ec/ec_check.c
+ $(OPENSSL_PATH)/crypto/ec/ec_curve.c
+ $(OPENSSL_PATH)/crypto/ec/ec_cvt.c
+ $(OPENSSL_PATH)/crypto/ec/ec_err.c
+ $(OPENSSL_PATH)/crypto/ec/ec_key.c
+ $(OPENSSL_PATH)/crypto/ec/ec_kmeth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_lib.c
+ $(OPENSSL_PATH)/crypto/ec/ec_mult.c
+ $(OPENSSL_PATH)/crypto/ec/ec_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ec_pmeth.c
+ $(OPENSSL_PATH)/crypto/ec/ec_print.c
+ $(OPENSSL_PATH)/crypto/ec/ecdh_kdf.c
+ $(OPENSSL_PATH)/crypto/ec/ecdh_ossl.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_ossl.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_sign.c
+ $(OPENSSL_PATH)/crypto/ec/ecdsa_vrf.c
+ $(OPENSSL_PATH)/crypto/ec/eck_prn.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_mont.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nist.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp224.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp256.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistp521.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_nistputil.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_oct.c
+ $(OPENSSL_PATH)/crypto/ec/ecp_smpl.c
+ $(OPENSSL_PATH)/crypto/ec/ecx_meth.c
$(OPENSSL_PATH)/crypto/err/err.c
$(OPENSSL_PATH)/crypto/err/err_prn.c
$(OPENSSL_PATH)/crypto/evp/bio_b64.c
@@ -384,6 +421,10 @@
$(OPENSSL_PATH)/crypto/siphash/siphash.c
$(OPENSSL_PATH)/crypto/siphash/siphash_ameth.c
$(OPENSSL_PATH)/crypto/siphash/siphash_pmeth.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_crypt.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_err.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_pmeth.c
+ $(OPENSSL_PATH)/crypto/sm2/sm2_sign.c
$(OPENSSL_PATH)/crypto/sm3/m_sm3.c
$(OPENSSL_PATH)/crypto/sm3/sm3.c
$(OPENSSL_PATH)/crypto/sm4/sm4.c
@@ -496,6 +537,15 @@
$(OPENSSL_PATH)/crypto/conf/conf_local.h
$(OPENSSL_PATH)/crypto/dh/dh_local.h
$(OPENSSL_PATH)/crypto/dso/dso_local.h
+ $(OPENSSL_PATH)/crypto/ec/ec_local.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448_local.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/curve448utils.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/ed448.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/field.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/point_448.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/word.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/arch_intrinsics.h
+ $(OPENSSL_PATH)/crypto/ec/curve448/arch_32/f_impl.h
$(OPENSSL_PATH)/crypto/evp/evp_local.h
$(OPENSSL_PATH)/crypto/hmac/hmac_local.h
$(OPENSSL_PATH)/crypto/lhash/lhash_local.h
diff --git a/CryptoPkg/Library/OpensslLib/process_files.pl
b/CryptoPkg/Library/OpensslLib/process_files.pl
index 42bff05fa6..2ebfbbbca0 100755
--- a/CryptoPkg/Library/OpensslLib/process_files.pl
+++ b/CryptoPkg/Library/OpensslLib/process_files.pl
@@ -169,7 +169,6 @@ BEGIN {
"no-dgram",
"no-dsa",
"no-dynamic-engine",
- "no-ec",
"no-ec2m",
"no-engine",
"no-err",
--
2.17.1


Re: [PATCH v6 00/52] Consolidate SpiFlashCommonLib instances

Nate DeSimone
 

The series has been pushed as 04bfa22~..bae4725

Thank you for all the excellent work on this Michael!

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 1:43 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@...>; Chiu, Chasel <chasel.chiu@...>; Kethi Reddy, Deepika <deepika.kethi.reddy@...>; Dong, Eric <eric.dong@...>; Luo, Heng <heng.luo@...>; Jeremy Soller <jeremy@...>; Esakkithevar, Kathappan <kathappan.esakkithevar@...>; Liming Gao <gaoliming@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Benjamin Doron <benjamin.doron00@...>
Subject: [PATCH v6 00/52] Consolidate SpiFlashCommonLib instances

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFlashCommonLib is duplicated in multiple places across the MinPlatform design in edk2-platforms. I'm planning to build some additional functionality on top of SpiFlashCommonLib and, ideally, this duplication will be consolidated into a single instance usable across all current library consumers.

This patch series focuses on consolidating the various SpiFlashCommonLib instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.

Read the BZ for more general background around this series.

I only have an UpXtreme board on hand so maintainers/reviewers of other board packages should test these changes on those boards.

V6 changes:
- Changed the name of the new SPI PPI and SPI Protocol to
"PCH_SPI2_PPI" and "PCH_SPI2_PROTOCOL" to differentiate the
interfaces from prior definitions. The previous PPI and
Protocol interfaces are available in IntelSiliconPkg.
- Corresponding PPI and Protocol GUIDs are updated.
- Included changes for the "AspireVn7Dash572G" that was added after
the V5 patch series was sent.
- Rebased the patch series for changes that have happened since the
V5 patch series to resolve merge conflicts.

V5 changes:
- Added build support for PurleyOpenBoardPkg and WhitleyOpenBoardPkg
(added to edk2-platforms during the lifetime of this patch series).
- Updated KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash to
use the new SPI PPI interface that identifies SPI flash regions
by GUID.
- Added new Reviewed-by replies that came in to existing patches
during v4.

V4 changes:
- Assigned new GUID values to the PCH SPI PPI and Protocols to
differentiate from previous instances. This was done because
the interface changed to identify SPI flash regions by GUID.

V3 changes:
- Added support to IntelSiliconPkg to identify flash regions by GUID as
requested in v2 review feedback.

V2 changes:
- Rebased patch series on current edk2-platforms master (32183bdaa91)

Note: Previous patch series only received a couple review comments after being on the mailing list for over 2 months. Please be respectful of contributors time and efforts and review in a timely manner.

Cc: Agyeman Prince <prince.agyeman@...>
Cc: Chasel Chiu <chasel.chiu@...>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@...>
Cc: Eric Dong <eric.dong@...>
Cc: Heng Luo <heng.luo@...>
Cc: Jeremy Soller <jeremy@...>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@...>
Cc: Liming Gao <gaoliming@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Benjamin Doron <benjamin.doron00@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>

Michael Kubacki (52):
CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
IntelSiliconPkg: Add BIOS area base address and size PCDs
IntelSiliconPkg: Add microcode FV PCDs
IntelSiliconPkg: Add PCH SPI PPI
IntelSiliconPkg: Add PCH SPI Protocol
IntelSiliconPkg: Add SpiFlashCommonLib
IntelSiliconPkg: Add SmmSpiFlashCommonLib
IntelSiliconPkg: Add MM SPI FVB services
CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
PurleyOpenBoardPkg: Use IntelSiliconPkg SpiFvbServiceSmm
WhitleyOpenBoardPkg: UseIntelSiliconPkg SpiFvbServiceSmm
MinPlatformPkg: Remove SpiFvbService modules
CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
MinPlatformPkg: Remove SpiFlashCommonLibNull
PurleyOpenBoardPkg: Add SpiFlashCommonLib.h
KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
IntelSiliconPkg: Add flash region GUIDs
IntelSiliconPkg: Identify flash regions by GUID
CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by
GUID
CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol
CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference
KabylakeSiliconPkg: Identify flash regions by GUID
KabylakeSiliconPkg: Update for SPI2 PPI and Protocol
KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI
API
KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to
build
SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID
SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol
TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by
GUID
TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol
WhiskeylakeOpenBoardPkg: Update for SPI2 PPI

Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c | 46 +--
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c | 10 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c | 192 +++++++++----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 10 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c | 4 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c | 8 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 0
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c | 16 +-
{Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 33 ++-
{Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c | 12 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c | 108 ++++++-
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 10 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 188 +++++++++----
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 8 +-
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 194 -------------
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 189 +++++++++----
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 8 +-
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c | 224 +++++++++++----
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c | 10 +-
Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 38 +--
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 3 +-
Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc | 7 +-
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.fdf | 40 +--
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 40 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 9 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 40 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 4 +-
Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h | 98 -------
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 2 -
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 6 -
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc | 2 +-
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf | 2 +-
Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc | 4 +-
Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf | 5 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 6 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 +-
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 8 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 40 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 3 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 7 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | 38 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 7 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 38 +--
{Silicon/Intel/SimicsIch10Pkg => Platform/Intel/WhitleyOpenBoardPkg}/Include/Library/SpiFlashCommonLib.h | 2 +-
Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc | 2 +-
Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf | 5 +-
Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h | 60 ++--
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 3 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 13 +
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 51 ----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 3 +-
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 8 -
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 6 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 6 +-
Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h | 45 +++
Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h | 2 +-
Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h | 4 +-
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h | 31 ++
Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h | 0
Silicon/Intel/{SimicsIch10Pkg/Include/Protocol/Spi.h => IntelSiliconPkg/Include/Protocol/Spi2.h} | 106 ++++---
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 45 +++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 17 ++
{Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 26 +-
{Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 12 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h | 98 -------
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26 --
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293 -------------------
Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h | 68 ++---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 53 ----
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 +
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 13 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 11 -
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 68 ++---
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 50 ----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 16 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 3 +-
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h | 60 ++--
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 19 +-
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 3 +-
Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 8 -
118 files changed, 1450 insertions(+), 2476 deletions(-) delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c (96%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c (94%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c (100%) rename Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c (75%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c (84%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c (83%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
delete mode 100644 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
rename {Silicon/Intel/SimicsIch10Pkg => Platform/Intel/WhitleyOpenBoardPkg}/Include/Library/SpiFlashCommonLib.h (96%) delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf (88%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf (88%) create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h
rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h (96%) rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h (85%) create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h
rename Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h (100%) rename Silicon/Intel/{SimicsIch10Pkg/Include/Protocol/Spi.h => IntelSiliconPkg/Include/Protocol/Spi2.h} (76%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf (65%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf (91%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf

--
2.28.0.windows.1


Re: [EXTERNAL] [edk2-devel] [PATCH v1 06/16] ArmPkg and BaseTools: Move the GccLto binaries from ArmPkg to BaseTools

Andrew Fish
 



On Nov 2, 2021, at 12:45 PM, Bret Barkelew via groups.io <bret.barkelew@...> wrote:

Good call. Maintainers, your opinion?
 
- Bret
 
From: Leif Lindholm via groups.io
Sent: Tuesday, November 2, 2021 2:55 AM
To: brbarkel@...
Cc: devel@edk2.groups.io; Ard Biesheuvel; Feng, Bob C; Liming Gao; Chen, Yuwei; Sean Brogan
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH v1 06/16] ArmPkg and BaseTools: Move the GccLto binaries from ArmPkg to BaseTools
 

On Mon, Nov 01, 2021 at 12:56:38 -0700, brbarkel@... wrote:
> From: Bret Barkelew <brbarkel@...>
> 
> This aligns better with Mu's philosophy around dependency structuring
> and is one of the steps to enable Basecore to have zero CI dependencies
> on other Mu repos.
> 
> REF: https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3650&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7Cc9129586336447a44c3908d99de6e1d1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637714437251132216%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=ijjQG1L4fScVxSn5nIBQGrFHLVtNbuTfd0YYLGdw8sg%3D&amp;reserved=0
> 
> Cc: Leif Lindholm <leif@...>
> Cc: Ard Biesheuvel <ardb+tianocore@...>
> Cc: Bob Feng <bob.c.feng@...>
> Cc: Liming Gao <gaoliming@...>
> Cc: Yuwei Chen <yuwei.chen@...>
> Cc: Sean Brogan <sean.brogan@...>
> Signed-off-by: Bret Barkelew <bret.barkelew@...>

No objections to this for any of my use-cases, but I'd like for one of
the BaseTools maintainers to comment on whether this breaks anything
with regards to EDK_TOOLS_PATH, or if we can finally get rid of that
and replace it with $WORKSPACE/BaseTools globally.

Our internal repo uses EDK_TOOLS_PATH. In our case it is $(WORKSPACE)/edk2/BaseTools. We have a PACKAGES_PATH set to $(WORKSPACE)/edk2 and magic happens. 

So I’m thinking maybe:
  $(EDK_TOOLS_PATH)/Bin/GccLto
Vs:
  $(WORKSPACE)/BaseTools/Bin/GccLto

If EDK_TOOLS_PATH gets ripped out, it should be one atomic remove, but let us not stick that on Bret. 

Thanks,

Andrew Fish

/
    Leif

> ---
>  {ArmPkg/Library => BaseTools/Bin}/GccLto/liblto-aarch64.a | Bin
>  {ArmPkg/Library => BaseTools/Bin}/GccLto/liblto-aarch64.s |   0
>  {ArmPkg/Library => BaseTools/Bin}/GccLto/liblto-arm.a     | Bin
>  {ArmPkg/Library => BaseTools/Bin}/GccLto/liblto-arm.s     |   0
>  BaseTools/Conf/tools_def.template                         |  19 ++++++++++---------
>  5 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.a b/BaseTools/Bin/GccLto/liblto-aarch64.a
> similarity index 100%
> rename from ArmPkg/Library/GccLto/liblto-aarch64.a
> rename to BaseTools/Bin/GccLto/liblto-aarch64.a
> diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.s b/BaseTools/Bin/GccLto/liblto-aarch64.s
> similarity index 100%
> rename from ArmPkg/Library/GccLto/liblto-aarch64.s
> rename to BaseTools/Bin/GccLto/liblto-aarch64.s
> diff --git a/ArmPkg/Library/GccLto/liblto-arm.a b/BaseTools/Bin/GccLto/liblto-arm.a
> similarity index 100%
> rename from ArmPkg/Library/GccLto/liblto-arm.a
> rename to BaseTools/Bin/GccLto/liblto-arm.a
> diff --git a/ArmPkg/Library/GccLto/liblto-arm.s b/BaseTools/Bin/GccLto/liblto-arm.s
> similarity index 100%
> rename from ArmPkg/Library/GccLto/liblto-arm.s
> rename to BaseTools/Bin/GccLto/liblto-arm.s
> diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
> index 2e6b382ab623..cd8899d24d4a 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -15,7 +15,8 @@
>  # 2.00 - Initial version with changes for CI
>  #      - Change RC path to use plugin
>  #
> -#!VERSION=2.00
> +# 2.10 - Move GccLto files to a tools path to be more repository layout agnostic
> +#!VERSION=2.10
 
>  IDENTIFIER = Default TOOL_CHAIN_CONF
 
> @@ -2386,10 +2387,10 @@ RELEASE_GCC5_X64_DLINK_FLAGS     = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
>  *_GCC5_ARM_CC_XIPFLAGS           = DEF(GCC5_ARM_CC_XIPFLAGS)
 
>    DEBUG_GCC5_ARM_CC_FLAGS        = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> -  DEBUG_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
> +  DEBUG_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
 
>  RELEASE_GCC5_ARM_CC_FLAGS        = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> -RELEASE_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
> +RELEASE_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
 
>    NOOPT_GCC5_ARM_CC_FLAGS        = DEF(GCC5_ARM_CC_FLAGS) -O0
>    NOOPT_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -O0
> @@ -2420,11 +2421,11 @@ RELEASE_GCC5_ARM_DLINK_FLAGS     = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKS
>  *_GCC5_AARCH64_CC_XIPFLAGS       = DEF(GCC5_AARCH64_CC_XIPFLAGS)
 
>    DEBUG_GCC5_AARCH64_CC_FLAGS    = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> -  DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
> +  DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
>    DEBUG_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
 
>  RELEASE_GCC5_AARCH64_CC_FLAGS    = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> -RELEASE_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
> +RELEASE_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
>  RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
 
>    NOOPT_GCC5_AARCH64_CC_FLAGS    = DEF(GCC5_AARCH64_CC_FLAGS) -O0
> @@ -2681,11 +2682,11 @@ DEFINE CLANG38_ARM_DLINK_FLAGS   = DEF(CLANG38_ARM_TARGET) DEF(GCC_ARM_DLINK_FLA
>  *_CLANG38_ARM_CC_XIPFLAGS        = DEF(GCC_ARM_CC_XIPFLAGS)
 
>    DEBUG_CLANG38_ARM_CC_FLAGS     = DEF(CLANG38_ARM_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
> -  DEBUG_CLANG38_ARM_DLINK_FLAGS  = DEF(CLANG38_ARM_DLINK_FLAGS) -flto -Wl,-O1 -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
> +  DEBUG_CLANG38_ARM_DLINK_FLAGS  = DEF(CLANG38_ARM_DLINK_FLAGS) -flto -Wl,-O1 -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
>    NOOPT_CLANG38_ARM_CC_FLAGS     = DEF(CLANG38_ARM_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -O0
>    NOOPT_CLANG38_ARM_DLINK_FLAGS  = DEF(CLANG38_ARM_DLINK_FLAGS)
>  RELEASE_CLANG38_ARM_CC_FLAGS     = DEF(CLANG38_ARM_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
> -RELEASE_CLANG38_ARM_DLINK_FLAGS  = DEF(CLANG38_ARM_DLINK_FLAGS) -flto -Wl,-O3 -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
> +RELEASE_CLANG38_ARM_DLINK_FLAGS  = DEF(CLANG38_ARM_DLINK_FLAGS) -flto -Wl,-O3 -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
 
>  ##################
>  # CLANG38 AARCH64 definitions
> @@ -2727,11 +2728,11 @@ DEFINE CLANG38_AARCH64_DLINK_FLAGS  = DEF(CLANG38_AARCH64_TARGET) DEF(GCC_AARCH6
>  *_CLANG38_AARCH64_CC_XIPFLAGS    = DEF(GCC_AARCH64_CC_XIPFLAGS)
 
>    DEBUG_CLANG38_AARCH64_CC_FLAGS    = DEF(CLANG38_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
> -  DEBUG_CLANG38_AARCH64_DLINK_FLAGS = DEF(CLANG38_AARCH64_DLINK_FLAGS) -flto -Wl,-O1 -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64
> +  DEBUG_CLANG38_AARCH64_DLINK_FLAGS = DEF(CLANG38_AARCH64_DLINK_FLAGS) -flto -Wl,-O1 -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64
>    NOOPT_CLANG38_AARCH64_CC_FLAGS    = DEF(CLANG38_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -O0
>    NOOPT_CLANG38_AARCH64_DLINK_FLAGS = DEF(CLANG38_AARCH64_DLINK_FLAGS)
>  RELEASE_CLANG38_AARCH64_CC_FLAGS    = DEF(CLANG38_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
> -RELEASE_CLANG38_AARCH64_DLINK_FLAGS = DEF(CLANG38_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64
> +RELEASE_CLANG38_AARCH64_DLINK_FLAGS = DEF(CLANG38_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64
 
>  ####################################################################################
>  #
> -- 
> 2.31.1.windows.1
> 




 


Re: [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Makes changes needed to use SPI2 PPI instead of the previous SPI PPI.

M: Chasel Chiu <chasel.chiu@...>
M: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index b36dc2b4097c..e44cf5f02ac7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpd
+++ ateLib/PeiPolicyUpdateLib.inf
@@ -266,7 +266,7 @@ [Sources]

[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
+ gPchSpi2PpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1



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Re: [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Luo, Heng <heng.luo@...>
Subject: [edk2-devel] [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates references to the "PCH_SPI_PROTOCOL" to instead refer to "PCH_SPI2_PROTOCOL".

Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Heng Luo <heng.luo@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c | 10 +++++-----
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
index 419eddaff38d..a55cb37c4faa 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
@@ -13,7 +13,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <Library/PciSegmentLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Library/SpiCommonLib.h>
#include <PchReservedResources.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .

- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.

- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
index f64b84880b31..40feab02d3ef 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
@@ -39,7 +39,7 @@ [Sources]


[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES


--
2.28.0.windows.1



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Re: [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates references to the "PCH_SPI_PROTOCOL" to instead refer to "PCH_SPI2_PROTOCOL".

Cc: Agyeman Prince <prince.agyeman@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index e4a81f91316c..19f1cb92c921 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -29,8 +29,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .

- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.

- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -92,11 +92,11 @@ InstallPchSpi (
return Status;
}
//
- // Install the SMM PCH_SPI_PROTOCOL interface
+ // Install the SMM PCH_SPI2_PROTOCOL interface
//
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
index 6ada9b121d92..68388319da17 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <PchAccess.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>

#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
index 35655ed5b5aa..12a21dc57a9b 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
@@ -37,7 +37,7 @@ [Sources]


[Protocols]
- gPchSmmSpiProtocolGuid # PRODUCES
+ gPchSmmSpi2ProtocolGuid # PRODUCES


[Depex]
--
2.28.0.windows.1


Re: [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the library to identify flash regions by GUID and internally map the GUID entries to values specific to SimicsIch10Pkg.

Cc: Agyeman Prince <prince.agyeman@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 187 +++++++++++++++-----
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
3 files changed, 185 insertions(+), 81 deletions(-)

diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index fc2a8be76b6a..22eb57cdec03 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Sp
+++ iCommon.c
@@ -2,20 +2,106 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.

Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent **/

#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <IndustryStandard/Pci30.h>
#include <PchAccess.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>
#include <Register/X58Ich10.h>

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.

@@ -144,8 +230,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -158,8 +244,8 @@ PchPmTimerStallRuntimeSafe ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -172,7 +258,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -184,8 +270,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -197,8 +283,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -211,7 +297,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -223,8 +309,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -235,8 +321,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -248,7 +334,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -260,7 +346,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -274,7 +360,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -303,7 +389,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -315,7 +401,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -328,7 +414,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -356,7 +442,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -368,7 +454,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -379,7 +465,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -391,7 +477,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -403,7 +489,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -414,7 +500,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -426,7 +512,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -438,8 +524,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -450,18 +536,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;

SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);

+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -496,7 +589,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -510,7 +603,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -542,7 +635,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -554,7 +647,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -568,7 +661,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -600,7 +693,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -612,8 +705,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -626,8 +719,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -682,7 +775,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}

- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -897,7 +990,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
index 2c8162ac8170..00586e9c9aef 100644
--- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLi
+++ b.h
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT16 ReadPermission;
@@ -134,8 +134,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -148,8 +148,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -158,8 +158,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -171,8 +171,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -181,8 +181,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -193,8 +193,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -202,7 +202,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -216,7 +216,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -226,7 +226,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -248,7 +248,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -267,7 +267,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -286,8 +286,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -298,8 +298,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -307,7 +307,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -330,7 +330,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -353,8 +353,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -367,8 +367,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -388,7 +388,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index b5aa13c1c56d..3a64005b5690 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Ba
+++ sePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -30,3 +31,13 @@ [LibraryClasses] [Pcd]
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1


Re: [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Benjamin Doron <benjamin.doron00@...>
Subject: [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

This library is part of KabylakeOpenBoardPkg but is currently not built anywhere. This change adds the library to the KabylakeRvp3 build to ensure it can always build properly if not linked elsewhere.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
Reviewed-by: Chasel Chiu <chasel.chiu@...>
Tested-by: Benjamin Doron <benjamin.doron00@...>
---
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 2 ++
1 file changed, 2 insertions(+)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index f7819d294036..a46d36b05635 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -394,6 +394,8 @@ [Components.IA32]
!endif
$(PLATFORM_BOARD_PACKAGE)/BiosInfo/BiosInfo.inf

+
+ $(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPo
+ rtLibSpiFlash.inf
+
#######################################
# DXE Components
#######################################
--
2.28.0.windows.1


Re: [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Benjamin Doron <benjamin.doron00@...>
Subject: [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates usage of gPchSpiPpiGuid to use the new interface that identifies SPI flash regions by GUID.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
Reviewed-by: Chasel Chiu <chasel.chiu@...>
Tested-by: Benjamin Doron <benjamin.doron00@...>
---
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c | 46 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 3 +-
2 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
index fc48bdc6fccb..17fa328add1c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
+++ sh/PeiSerialPortLibSpiFlash.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/

#include <Base.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
@@ -24,29 +24,29 @@ typedef struct {
/**
Returns a pointer to the PCH SPI PPI.

- @return Pointer to PCH_SPI_PPI If an instance of the PCH SPI PPI is found
+ @return Pointer to PCH_SPI2_PPI If an instance of the PCH SPI PPI is found
@return NULL If an instance of the PCH SPI PPI is not found

**/
-PCH_SPI_PPI *
+PCH_SPI2_PPI *
GetSpiPpi (
VOID
)
{
EFI_STATUS Status;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;

Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &PchSpiPpi
+ (VOID **) &PchSpi2Ppi
);
if (EFI_ERROR (Status)) {
return NULL;
}

- return PchSpiPpi;
+ return PchSpi2Ppi;
}

/**
@@ -67,7 +67,7 @@ SerialPortWrite (
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
SPI_FLASH_DEBUG_CONTEXT *Context;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;
UINT32 BytesWritten;
UINT32 SourceBufferOffset;
UINT32 NvMessageAreaSize;
@@ -89,19 +89,19 @@ SerialPortWrite (
if (Context == NULL || Context->CurrentWriteOffset >= NvMessageAreaSize) {
return 0;
}
- PchSpiPpi = GetSpiPpi ();
- if (PchSpiPpi == NULL) {
+ PchSpi2Ppi = GetSpiPpi ();
+ if (PchSpi2Ppi == NULL) {
return 0;
}

if ((Context->CurrentWriteOffset + NumberOfBytes) / NvMessageAreaSize > 0) {
LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress));
- Status = PchSpiPpi->FlashErase (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- NvMessageAreaSize
- );
+ Status = PchSpi2Ppi->FlashErase (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ NvMessageAreaSize
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset = 0;
} else {
@@ -116,13 +116,13 @@ SerialPortWrite (

LinearOffset = (FixedPcdGet32 (PcdFlashNvDebugMessageBase) + Context->CurrentWriteOffset) - FixedPcdGet32 (PcdFlashAreaBaseAddress);

- Status = PchSpiPpi->FlashWrite (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- BytesWritten,
- (UINT8 *) &Buffer[SourceBufferOffset]
- );
+ Status = PchSpi2Ppi->FlashWrite (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ BytesWritten,
+ (UINT8 *) &Buffer[SourceBufferOffset]
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset += BytesWritten;
return BytesWritten;
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index b959cd1f4612..651bf93faf62 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
+++ sh/PeiSerialPortLibSpiFlash.inf
@@ -40,9 +40,10 @@ [Sources]
PeiSerialPortLibSpiFlash.c

[Ppis]
- gPchSpiPpiGuid
+ gPchSpi2PpiGuid

[Guids]
+ gFlashRegionBiosGuid
gSpiFlashDebugHobGuid

[Pcd]
--
2.28.0.windows.1


Re: [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [edk2-devel] [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 10 +++++-----
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
5 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index c34c378de2eb..d8388f10a0d6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent

#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Register/PchRegsLpc.h>
#include <Register/PchRegsSpi.h>
#include <Library/DebugLib.h>
@@ -65,16 +65,16 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;
UINT16 AcpiBase;

AcpiBase = 0;

Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &SpiPpi
+ (VOID **) &Spi2Ppi
);

if (Status != EFI_SUCCESS) {
@@ -102,7 +102,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);

PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);

Status = PeiServicesInstallPpi (&PeiSpiInstance->PpiDescriptor); diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 1d84d0613454..60a3ffe8ecc6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -28,8 +28,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .

- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.

- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -91,11 +91,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index c6bc1ad406c8..ba57c44e1e12 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i
+++ nf
@@ -42,4 +42,4 @@ [Pcd]
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES

[Ppis]
- gPchSpiPpiGuid ## PRODUCES
+ gPchSpi2PpiGuid ## PRODUCES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
index 43e158b60425..46e2d35c0ee0 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/SmmServicesTableLib.h> #include <Library/MmPciLib.h> #include <PchAccess.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>
#include <Library/CpuCommonLib.h>

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 819dc2439f30..85eb7b91fa3c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -41,7 +41,7 @@ [Sources]


[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES


[Depex]
--
2.28.0.windows.1



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Re: [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [edk2-devel] [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the code to identify flash regions by GUID and internally map the GUID entries to values specific to KabylakeSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
Reviewed-by: Chasel Chiu <chasel.chiu@...>
---
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c | 108 ++++++++++-
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 188 +++++++++++++++-----
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 9 +
Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
6 files changed, 297 insertions(+), 89 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
index a3c9bbebeaa9..705004853122 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfigura
+++ tion.c
@@ -2,11 +2,14 @@
This file contains the tests for the SecureMemoryMapConfiguration bit

Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#include "HstiSiliconDxe.h"
+#include <Guid/FlashRegion.h>

typedef struct {
UINT64 Base;
@@ -100,6 +103,90 @@ MEMORY_RANGE mNonLockableMemoryRange[NonLockableMemoryRangeMax] = { // 14. SPI_BAR0 (BDF 0:31:5 + 0x10) };

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Check for overlaps in single range array

@@ -224,7 +311,7 @@ AcquireSpiBar0 (
{
UINT32 SpiBar0;
UINTN PchSpiBase;
-
+
//
// Init PCH spi reserved MMIO address.
//
@@ -269,8 +356,8 @@ ReleaseSpiBar0 (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -281,13 +368,20 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
GetRegionAddress (
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
+
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }

if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
@@ -484,7 +578,7 @@ CheckSecureMemoryMapConfiguration (
//
// Locate BIOS region size to update High bios base address
//
- GetRegionAddress (FlashRegionBios, &BaseAddress, &RegionSize);
+ GetRegionAddress (&gFlashRegionBiosGuid, &BaseAddress,
+ &RegionSize);
DEBUG ((DEBUG_INFO, "Bios Region Size %x:\n", RegionSize));
mLockableMemoryRange[LockableMemoryRangeHighBios].Base = SIZE_4GB - RegionSize;
mLockableMemoryRange[LockableMemoryRangeLowDram].End = (MmioRead32 (MmPciBase (0,SA_MC_DEV,SA_MC_FUN) + R_SA_TOLUD) & B_SA_TOLUD_TOLUD_MASK) - 1; diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index 58757a8cba39..6fc8141b4681 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/SpiCommon.c
@@ -2,10 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.

Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
@@ -13,9 +16,93 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <PchAccess.h> #include <Library/PchCycleDecodingLib.h> #include <Library/MmPciLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.

@@ -248,8 +335,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -262,8 +349,8 @@ PchPmTimerStallRuntimeSafe ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -276,7 +363,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -288,8 +375,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -301,8 +388,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -315,7 +402,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -327,8 +414,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -339,8 +426,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -352,7 +439,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -364,7 +451,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -378,7 +465,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -407,7 +494,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -419,7 +506,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -432,7 +519,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -460,7 +547,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -472,7 +559,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -483,7 +570,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -495,7 +582,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -507,7 +594,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -518,7 +605,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -530,7 +617,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -542,8 +629,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -554,18 +641,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;

SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);

+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -600,7 +694,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -614,7 +708,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -646,7 +740,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -658,7 +752,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -672,7 +766,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -704,7 +798,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -716,8 +810,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -730,8 +824,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -795,7 +889,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}

- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -1016,7 +1110,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
index 08094dbbc145..f0a341b0214c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
@@ -26,7 +26,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Protocol/AdapterInformation.h> #include <Library/HstiLib.h> #include <HstiFeatureBit.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchCycleDecodingLib.h> #include <Library/HobLib.h> #include <Library/PchPcrLib.h> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index bd12fa691d40..09826cdfdf39 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -2,6 +2,7 @@
# Component description file for Hsti Silicon Driver # # Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -86,6 +87,14 @@ [LibraryClasses] [Guids]
gEfiEndOfDxeEventGroupGuid
gSiMemoryPlatformDataGuid ## CONSUMES
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid

[Protocols]
gEfiDxeSmmReadyToLockProtocolGuid ## CONSUMES diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
index d408289ea253..0341cc546465 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpi
+++ CommonLib.h
@@ -47,7 +47,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT8 ReadPermission;
@@ -133,8 +133,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -147,8 +147,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -157,8 +157,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -170,8 +170,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -180,8 +180,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -192,8 +192,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -201,7 +201,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -215,7 +215,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -225,7 +225,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -238,7 +238,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -247,7 +247,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -258,7 +258,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -266,7 +266,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -277,7 +277,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -285,8 +285,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -297,8 +297,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -306,7 +306,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -329,7 +329,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -352,8 +352,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -366,8 +366,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -387,7 +387,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index 51e2d25a7f8b..67176c879de5 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -28,3 +29,13 @@ [LibraryClasses]
IoLib
DebugLib
PchCycleDecodingLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1



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Re: [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Kethi Reddy, Deepika <deepika.kethi.reddy@...>; Esakkithevar, Kathappan <kathappan.esakkithevar@...>
Subject: [edk2-devel] [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The GUID is included in PeiPolicyUpdateLib.inf but not actually used.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@...>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
1 file changed, 1 deletion(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 5213253f7313..7ebaba1e6f11 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -262,7 +262,6 @@ [Sources]

[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1



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Re: [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
index 1a5db7f24a49..543e42973ae9 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
@@ -11,7 +11,7 @@
#include <Library/MemoryAllocationLib.h> #include <Library/PeiServicesLib.h> #include <Library/PciSegmentLib.h> -#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
@@ -62,13 +62,13 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;

Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **)&SpiPpi
+ (VOID **)&Spi2Ppi
);

if (Status != EFI_SUCCESS) {
@@ -90,7 +90,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);

PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);

///
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 458d137e4fa2..a5518a606db7 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -14,7 +14,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <Library/PciSegmentLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Private/Library/SmmPchPrivateLib.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .

- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.

- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index 4e4b456574f0..46f10368d19e 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib
+++ .inf
@@ -39,5 +39,5 @@ [Sources]


[Ppis]
-gPchSpiPpiGuid ## PRODUCES
+gPchSpi2PpiGuid ## PRODUCES

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 231929151222..0fc8ea7b376a 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -38,7 +38,7 @@ [Sources]


[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES

[Depex]
--
2.28.0.windows.1


Re: [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [edk2-devel] [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the library to identify flash regions by GUID and internally map the GUID entries to values specific to CoffeelakeSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
Reviewed-by: Chasel Chiu <chasel.chiu@...>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c | 192 +++++++++++++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h | 60 +++---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 12 ++
3 files changed, 187 insertions(+), 77 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
index bc84a4f27f1a..df9c55f2cbb1 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiC
+++ ommonLib/SpiCommon.c
@@ -2,11 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.

Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent **/

#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
@@ -14,12 +16,101 @@
#include <IndustryStandard/Pci30.h>
#include <Library/PmcLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Register/PchRegs.h>
#include <Register/PchRegsSpi.h>
#include <Register/PchRegsPmc.h>

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionEc = 8,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionEcGuid,
+ FlashRegionEc
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.

@@ -265,7 +356,7 @@ PchPmTimerStallRuntimeSafe ( STATIC BOOLEAN WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
@@ -302,8 +393,8 @@ WaitForSpiCycleComplete (
/**
This function sends the programmed SPI command to the slave device.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -317,8 +408,8 @@ WaitForSpiCycleComplete ( STATIC EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -404,7 +495,7 @@ SendSpiCmd (
}
}

- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -615,8 +706,8 @@ SendSpiCmd (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -629,8 +720,8 @@ SendSpiCmd (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -643,7 +734,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -655,8 +746,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -668,8 +759,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -682,7 +773,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -694,8 +785,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -706,8 +797,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -719,7 +810,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -731,7 +822,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -745,7 +836,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -774,7 +865,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -786,7 +877,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -799,7 +890,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -827,7 +918,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -839,7 +930,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -850,7 +941,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -862,7 +953,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -874,7 +965,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -885,7 +976,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -897,7 +988,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -909,8 +1000,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -921,18 +1012,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;

SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);

+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -967,7 +1065,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -981,7 +1079,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1013,7 +1111,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -1025,7 +1123,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -1039,7 +1137,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1071,7 +1169,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
index 0a973a77a381..3b1720c69434 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/Pch
+++ SpiCommonLib.h
@@ -9,7 +9,7 @@
#ifndef _PCH_SPI_COMMON_LIB_H_
#define _PCH_SPI_COMMON_LIB_H_

-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>

//
// Maximum time allowed while waiting the SPI cycle to complete @@ -50,7 +50,7 @@ typedef enum { typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINT64 PchSpiBase;
UINT8 ReadPermission;
@@ -147,8 +147,8 @@ IsSpiFlashWriteGranted (
/**
Read data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -161,8 +161,8 @@ IsSpiFlashWriteGranted ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -171,8 +171,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -184,8 +184,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -194,8 +194,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.

@@ -206,8 +206,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -215,7 +215,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -229,7 +229,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -252,7 +252,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -261,7 +261,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing

@@ -272,7 +272,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -280,7 +280,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.

@@ -291,7 +291,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -299,8 +299,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'

@@ -311,8 +311,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -334,7 +334,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values

- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -357,7 +357,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index f5dc4ee0bfef..b152d2278839 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiC
+++ ommonLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -27,3 +28,14 @@ [LibraryClasses]
IoLib
DebugLib
PmcLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionEcGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1



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Re: [PATCH v6 33/52] PurleyOpenBoardPkg: Add SpiFlashCommonLib.h

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

I will correct the commit message during the upstreaming process.

Thanks,
Nate

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 1:43 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Chiu, Chasel <chasel.chiu@...>
Subject: [PATCH v6 33/52] PurleyOpenBoardPkg: Add SpiFlashCommonLib.h

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds the header file to PurleyOpenBoardPkg since it was removed from MinPlatformPkg.

Cc: Isaac Oram <isaac.w.oram@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Chasel Chiu <chasel.chiu@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Platform/Intel/WhitleyOpenBoardPkg/Include/Library/SpiFlashCommonLib.h | 98 ++++++++++++++++++++
1 file changed, 98 insertions(+)

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/SpiFlashCommonLib.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/SpiFlashCommonLib.h
new file mode 100644
index 000000000000..ef62ba238d71
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/SpiFlashCommonL
+++ ib.h
@@ -0,0 +1,98 @@
+/** @file
+ The header file includes the common header files, defines
+ internal structure and functions used by SpiFlashCommonLib.
+
+ Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SPI_FLASH_COMMON_LIB_H__
+#define __SPI_FLASH_COMMON_LIB_H__
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h> #include
+<Library/UefiDriverEntryPoint.h> #include
+<Library/UefiBootServicesTableLib.h>
+
+#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ );
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the read.
+ @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the write.
+ @param[in,out] NumBytes On input, the number of bytes to write. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block to be erased.
+ This library assume that caller garantee that the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
+ On output, the actual number of bytes erased.
+
+ @retval EFI_SUCCESS. Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ );
+
+#endif
--
2.28.0.windows.1


Re: [PATCH v6 26/52] WhitleyOpenBoardPkg: UseIntelSiliconPkg SpiFvbServiceSmm

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 1:43 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>; Chiu, Chasel <chasel.chiu@...>
Subject: [PATCH v6 26/52] WhitleyOpenBoardPkg: UseIntelSiliconPkg SpiFvbServiceSmm

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the boards in the package to use SpiFvbServicesSmm from IntelSiliconPkg since the MinPlatformPkg driver was moved there.

Cc: Isaac Oram <isaac.w.oram@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Chasel Chiu <chasel.chiu@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc | 2 +- Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc b/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc
index 9855e5fefdb6..63cb4dd5598b 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc
+++ b/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc
@@ -739,7 +739,7 @@ [Components.X64]
UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf

$(RP_PKG)/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
- $(PLATFORM_PKG)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf

$(RP_PKG)/Features/Pci/Dxe/PciPlatform/PciPlatform.inf

diff --git a/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf b/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf
index 41d33f3f1872..14d7502b59c1 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf
+++ b/Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf
@@ -360,7 +360,8 @@ [FD.Binary]
#
SET gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase = gCpPlatFlashTokenSpaceGuid.PcdFlashFvBinaryBase + gCpPlatFlashTokenSpaceGuid.PcdFlashFvAcmRegionSize + gCpPlatFlashTokenSpaceGuid.PcdFlashFvOpromSize
SET gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize = gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize
-
+ SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
+ gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase
+ SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
+ gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize
################################################################################
#
# FD FPGA
@@ -649,7 +650,7 @@ [FV.FvOsBootUncompressed]
INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf

- INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf

INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
--
2.28.0.windows.1


Re: [PATCH v6 25/52] PurleyOpenBoardPkg: Use IntelSiliconPkg SpiFvbServiceSmm

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Thursday, October 28, 2021 1:43 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@...>; Chiu, Chasel <chasel.chiu@...>
Subject: [PATCH v6 25/52] PurleyOpenBoardPkg: Use IntelSiliconPkg SpiFvbServiceSmm

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the boards in the package to use SpiFvbServicesSmm from IntelSiliconPkg since the MinPlatformPkg driver was moved there.

Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Chasel Chiu <chasel.chiu@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc | 2 +- Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf | 2 +- Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc | 4 ++-- Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf | 5 ++++-
4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc
index 98e02f35e7db..39c5cf78abc9 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc
@@ -184,7 +184,7 @@ [Components.X64]
GCC:*_*_*_ASLCC_FLAGS = -D PURLEY_FLAG -D PCH_SPT
}

- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
<LibraryClasses>
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf
index 7a3ffff7ff08..413d98a07065 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf
@@ -343,7 +343,7 @@ [FV.FvOsBootUncompact]

!include $(PLATFORM_PACKAGE)/Include/Fdf/CoreOsBootInclude.fdf

-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf

diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
index f2a028d18310..3bac6d394e4c 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
@@ -89,7 +89,7 @@ [DefaultStores]
[Components.$(DXE_ARCH)]
#TiogaPass Override START : Added Board Specific changes in core drivers #!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc
-!include CoreDxeInclude.dsc
+!include CoreDxeInclude.dsc
#TiogaPass Override END

#######################################
@@ -210,7 +210,7 @@ [Components.X64]
GCC:*_*_*_ASLCC_FLAGS = -D PURLEY_FLAG -D PCH_SPT
}

- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
<LibraryClasses>
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
index 3c05b744141b..b162483c44cc 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
@@ -167,6 +167,9 @@ [FD.Platform]
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress + gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize

+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize
+
SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress + gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase + 0x60
SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = gCpuUncoreTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize - 0x60

@@ -395,7 +398,7 @@ [FV.FvOsBootUncompact]

!include $(PLATFORM_PACKAGE)/Include/Fdf/CoreOsBootInclude.fdf

-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf

--
2.28.0.windows.1

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