Date   

Re: Update NASM to stable release 2.15.05

Ni, Ray
 

Mike,
It‘s very good! It allows further NASM cleanup removing DB instructions.

Thanks,
Ray

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Michael D Kinney
Sent: Thursday, October 21, 2021 12:52 AM
To: devel@edk2.groups.io; Kinney, Michael D <michael.d.kinney@...>; rfc@edk2.groups.io
Subject: [edk2-rfc] Update NASM to stable release 2.15.05

Hello,

I would like to propose that we update to a newer version of NASM.

https://www.nasm.us/

The most recent stable version is 2.15.05.

https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/

NASM 2.15.05 Documentation:

https://nasm.us/xdoc/2.15.05/html/
https://nasm.us/xdoc/2.15.05/nasmdoc.pdf


The reason to update is to use a version of NASM that supports newer instructions that will allow the .nasm files with DB statements for instructions to be updated to use instruction names. This improves the readability/maintenance of the .nasm source files:

https://nasm.us/xdoc/2.15.05/html/nasmdocb.html#section-B.1.41

Also, the work on tools such as uncrustify to format source files require tests to make sure the source format changes do not cause any functional changes. Compilers support flags for reproducible builds. NASM 2.15.05 added the --reproducible flag that provides the same feature for OBJ files produces by NASM.

https://nasm.us/xdoc/2.15.05/html/nasmdoc2.html#section-2.1.34


2.1.34 The --reproducible Option

If this option is given, NASM will not emit information that is
inherently dependent on the NASM version or different from run to
run (such as timestamps) into the output file.

Please let me know if there are any concerns with doing this tool update.
If there are no concerns, I will work on patches required to update EDK II CI to use NASM 2.15.05 and to update the developer documentation to require NASM 2.15.05 as the new minimum version.

Thanks,

Mike


回复: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime FmpDxe driver

gaoliming
 

Bob:
Sorry for the late response. I have no comments for the code change.

But, I am not sure whether it is valid to use UEFI FirmwareManagement Protocol in runtime phase, because I don't find such description for this protocol in UEFI spec.

Mike, Guomin, Xuwei:
Have you any comments for this patch set?

Thanks
Liming

-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Bob Morgan
via groups.io
发送时间: 2021年10月21日 3:41
收件人: devel@edk2.groups.io; Bob Morgan <bobm@...>;
gaoliming@...
抄送: michael.d.kinney@...; guomin.jiang@...;
wei6.xu@...
主题: Re: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime
FmpDxe driver

Hi, Any feedback on this?

Thanks,

-bob

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Bob
Morgan via groups.io
Sent: Thursday, September 23, 2021 8:19 PM
To: devel@edk2.groups.io; gaoliming@...
Cc: michael.d.kinney@...; guomin.jiang@...;
wei6.xu@...
Subject: Re: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for
runtime FmpDxe driver

External email: Use caution opening links or attachments


Hi Liming,

Yes, this adds a new runtime variation of the FmpDxe driver that can process
the FMP payload of a capsule at runtime if the capsule flags do not request
PERSIST_ACROSS_RESET and INITIATE_RESET.

There are also changes required to DxeCapsuleLibFmp to enable this runtime
FMP processing that I will submit separately.

Thanks,

-bob

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of gaoliming
via groups.io
Sent: Thursday, September 23, 2021 6:57 PM
To: devel@edk2.groups.io; Bob Morgan <bobm@...>
Cc: michael.d.kinney@...; guomin.jiang@...;
wei6.xu@...
Subject: 回复: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for
runtime FmpDxe driver

External email: Use caution opening links or attachments


Bob:
Dose this change make FirmwareManagementProtocol to be used in
runtime phase?

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Bob
Morgan via
groups.io
发送时间: 2021年9月23日 8:00
收件人: devel@edk2.groups.io
抄送: gaoliming@...; michael.d.kinney@...;
guomin.jiang@...; wei6.xu@...; Bob Morgan
<bobm@...>
主题: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime
FmpDxe driver

Adds a runtime version of FmpDxe driver to allow firmware updates
after ExitBootServices() is called and enables DXE_RUNTIME_DRIVER
module type for associated FMP libraries.

Bob Morgan (5):
FmpDevicePkg/FmpDeviceLibNull: Add DXE_RUNTIME_DRIVER support
FmpDevicePkg/FmpPayloadHeaderLibV1: Add DXE_RUNTIME_DRIVER
support
FmpDevicePkg/FmpDependencyCheckLibNull: Add
DXE_RUNTIME_DRIVER
support
FmpDevicePkg/FmpDependencyDeviceLibNull: Add
DXE_RUNTIME_DRIVER
support
FmpDevicePkg/FmpDxe: Add runtime FmpDxe driver

FmpDevicePkg/FmpDevicePkg.dsc | 29 +++
FmpDevicePkg/FmpDxe/FmpDxe.c | 34 +++-
FmpDevicePkg/FmpDxe/FmpRuntimeDxe.c | 185
++++++++++++++++++
FmpDevicePkg/FmpDxe/FmpRuntimeDxe.inf | 87 ++++++++
FmpDevicePkg/FmpDxe/VariableSupport.c | 7 +
.../FmpDependencyCheckLibNull.inf | 2 +-
.../FmpDependencyDeviceLibNull.inf | 2 +-
.../FmpDeviceLibNull/FmpDeviceLibNull.inf | 2 +-
.../FmpPayloadHeaderLibV1.inf | 2 +-
9 files changed, 336 insertions(+), 14 deletions(-) create mode
100644 FmpDevicePkg/FmpDxe/FmpRuntimeDxe.c
create mode 100644 FmpDevicePkg/FmpDxe/FmpRuntimeDxe.inf

--
2.17.1




















Re: [PATCH V10 0/4] Add Intel TDX support in OvmfPkg/ResetVector

Yao, Jiewen
 

Thank you Min

Series: Reviewed-by: Jiewen Yao <Jiewen.yao@...>

-----Original Message-----
From: Xu, Min M <min.m.xu@...>
Sent: Thursday, October 21, 2021 8:18 AM
To: devel@edk2.groups.io
Cc: Xu, Min M <min.m.xu@...>; Ard Biesheuvel
<ardb+tianocore@...>; Gerd Hoffmann <kraxel@...>; Justen,
Jordan L <jordan.l.justen@...>; Brijesh Singh <brijesh.singh@...>;
Erdem Aktas <erdemaktas@...>; James Bottomley
<jejb@...>; Yao, Jiewen <jiewen.yao@...>; Tom Lendacky
<thomas.lendacky@...>
Subject: [PATCH V10 0/4] Add Intel TDX support in OvmfPkg/ResetVector

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Intel's Trust Domain Extensions (Intel TDX) refers to an Intel technology
that extends Virtual Machines Extensions (VMX) and Multi-Key Total Memory
Encryption (MKTME) with a new kind of virutal machines guest called a
Trust Domain (TD). A TD is desinged to run in a CPU mode that protects the
confidentiality of TD memory contents and the TD's CPU state from other
software, including the hosting Virtual-Machine Monitor (VMM), unless
explicitly shared by the TD itself.

The patch-sets to support Intel TDX in OvmfPkg is split into several
waves. This is wave-1 which adds Intel TDX support in OvmfPkg/ResetVector.
Note: TDX only works in X64.

Patch #1: Ovmf uses its own Main.asm to reduce the complexity of Main.asm
in UefiCpuPkg. This Main.asm is an unmodified copy from
UefiCpuPkg/ReseteVector/Vtf0 (so no functional change) and the actual
changes for tdx come as incremental patches.

Patch #2: WORK_AREA_GUEST_TYPE is cleared in Main.asm instead of in
WORK_AREA_GUEST_TYPE.

Patch #3: Introduce IntelTdxMetadata.asm which describes the information
about the image for VMM use.

Patch #4: Enable TDX in OvmfPkg/ResetVector for ARCH_X64.

[TDX]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-whitepaper-final9-17.pdf

[TDVF]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-virtual-firmware-design-guide-rev-1.pdf

Code is at https://github.com/mxu9/edk2/tree/tdvf_wave1.v10

v10 changes:
- Clear the OVMF_WORK_AREA in both ARCH_IA32 and ARCH_X64.
- Update the ReloadFlat32 based on the review comments.
- Other minor changes and update some comments.

v9 changes:
- Introduce IntelTdxMetadata.asm in a separate commit.
- Use absolute offset for the start of TdxMetadata so that VMM can
easily reach to the start of the metadata.

v8 changes:
- Create a separate commit for Main.asm.
- Create a separate commit for the clearance of WORK_AREA_GUEST_TYPE.
- Fix some inaccurate comments.

v7 changes:
- Refine the offset of TdxMetadata and remove the definition of
PcdOvmfImageSizeInKB
- Use MOV CR* instead of smsw in ResetVector
- Remove the new field (SubType) in
CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER.

v6 changes:
- Remove the 5-level paging support. 5-level paging enabling is *NOT*
super critical for TDX enabling at this moment. It will be enabled
later in a separate patch.
- Add a new field (SubType) in
CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER
to record the VM Guest SubType.
- In Main16 entry point, after TransitionFromReal16To32BitFlat,
WORK_AREA_GUEST_TYPE is cleared to 0. WORK_AREA_GUEST_TYPE was
previously cleared in SetCr3ForPageTables64 (see commit ab77b60).
This doesn't work after TDX is introduced in Ovmf. It is because all
TDX CPUs (BSP and APs) start to run from 0xfffffff0. In previous code
WORK_AREA_GUEST_TYPE will be cleared multi-times in TDX guest. So for
SEV and Legacy guest it is moved to Main16 entry point (after
TransitionFromReal16To32BitFlat). For TDX guest WORK_AREA_GUEST_TYPE
is cleared and set in InitTdxWorkarea.
- Make the return result of IsTdx be consistent with IsTdxEnabled.
- Fix some typo in the code comments.

v5 changes:
- Remove the changes of OVMF_WORK_AREA because Commit ab77b60 covers
those changes.
- Refine the TDX related changes in PageTables64.asm and
Flat32ToFlat64.asm.
- Add CheckTdxFeaturesBeforeBuildPagetables to check Non-Tdx, Tdx-BSP or
Tdx-APs. This routine is called before building page tables.

v4 changes:
- Refine the PageTables64.asm and Flat32ToFlat64.asm to enable TDX.
- Refine SEV_ES_WORK_AREA so that SEV/TDX/Legach guest all can use this
memory region. https://edk2.groups.io/g/devel/message/78345 is the
discussion.
- AmdSev.asm is removed because Brijesh Singh has done it in
https://edk2.groups.io/g/devel/message/78241.

v3 changes:
- Refine PageTables64.asm and Flat32ToFlat64.asm based on the review
comments in [ReviewComment-1] and [ReviewComment-2].
- SEV codes are in AmdSev.asm
- TDX codes are in IntelTdx.asm
- Main.asm is created in OvmfPkg/ResetVector. The one in
UefiCpuPkg/ResetVector/Vtf0 is not used.
- Init32.asm/ReloadFlat32.asm in UefiCpuPkg/ResetVector/Vtf0/Ia32 are
deleted. They're moved to OvmfPkg/ResetVector/Ia32.
- InitTdx.asm is renamed to InteTdx.asm

v2 changes:
- Move InitTdx.asm and ReloadFlat32.asm from UefiCpuPkg/ResetVector/Vtf0
to OvmfPkg/ResetVector. Init32.asm is created which is a null stub of
32-bit initialization. In Main32 just simply call Init32. It makes
the Main.asm in UefiCpuPkg/ResetVector clean and clear.
- Init32.asm/InitTdx.asm/ReloadFlat32.asm are created under
OvmfPkg/ResetVector/Ia32.
- Update some descriptions of the patch-sets.
- Update the REF link in cover letter.
- Add Ard Biesheuvel in Cc list.

v1: https://edk2.groups.io/g/devel/message/77675

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Signed-off-by: Min Xu <min.m.xu@...>

Min Xu (4):
OvmfPkg: Copy Main.asm from UefiCpuPkg to OvmfPkg's ResetVector
OvmfPkg: Clear WORK_AREA_GUEST_TYPE in Main.asm
OvmfPkg: Add IntelTdxMetadata.asm
OvmfPkg: Enable TDX in ResetVector

OvmfPkg/OvmfPkg.dec | 9 +
OvmfPkg/OvmfPkgDefines.fdf.inc | 9 +
OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 39 ++++
OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm | 11 +
OvmfPkg/ResetVector/Ia32/IntelTdx.asm | 222 +++++++++++++++++++
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 22 +-
OvmfPkg/ResetVector/Main.asm | 121 ++++++++++
OvmfPkg/ResetVector/ResetVector.inf | 9 +
OvmfPkg/ResetVector/ResetVector.nasmb | 28 +++
OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm | 115 ++++++++++
10 files changed, 581 insertions(+), 4 deletions(-)
create mode 100644 OvmfPkg/ResetVector/Ia32/IntelTdx.asm
create mode 100644 OvmfPkg/ResetVector/Main.asm
create mode 100644 OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm

--
2.29.2.windows.2


[PATCH V10 4/4] OvmfPkg: Enable TDX in ResetVector

Min Xu
 

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Intel's Trust Domain Extensions (Intel TDX) refers to an Intel technology
that extends Virtual Machines Extensions (VMX) and Multi-Key Total Memory
Encryption (MKTME) with a new kind of virutal machines guest called a
Trust Domain (TD). A TD is desinged to run in a CPU mode that protects the
confidentiality of TD memory contents and the TD's CPU state from other
software, including the hosting Virtual-Machine Monitor (VMM), unless
explicitly shared by the TD itself.

Note: Intel TDX is only available on X64, so the Tdx related changes are
in X64 path. In IA32 path, there may be null stub to make the build
success.

This patch includes below major changes.

1. Ia32/IntelTdx.asm
IntelTdx.asm includes below routines used in ResetVector
- IsTdx
Check if the running system is Tdx guest.

- InitTdxWorkarea
It initialize the TDX_WORK_AREA. Because it is called by both BSP and
APs and to avoid the race condition, only BSP can initialize the
WORK_AREA. AP will wait until the field of TDX_WORK_AREA_PGTBL_READY
is set.

- ReloadFlat32
After reset all CPUs in TDX are initialized to 32-bit protected mode.
But GDT register is not set. So this routine loads the GDT then jump
to Flat 32 protected mode again.

- InitTdx
This routine wrap above 3 routines together to do Tdx initialization
in ResetVector phase.

- IsTdxEnabled
It is a OneTimeCall to probe if TDX is enabled by checking the
CC_WORK_AREA.

- CheckTdxFeaturesBeforeBuildPagetables
This routine is called to check if it is Non-TDX guest, TDX-Bsp or
TDX-APs. Because in TDX guest all the initialization is done by BSP
(including the page tables). APs should not build the tables.

- TdxPostBuildPageTables
It is called after Page Tables are built by BSP.
byte[TDX_WORK_AREA_PGTBL_READY] is set by BSP to indicate APs can
leave spin and go.

2. Ia32/PageTables64.asm
As described above only the TDX BSP build the page tables. So
PageTables64.asm is updated to make sure only TDX BSP build the
PageTables. TDX APs will skip the page table building and set Cr3
directly.

3. Ia16/ResetVectorVtf0.asm
In Tdx all CPUs "reset" to run on 32-bit protected mode with flat
descriptor (paging disabled). But in Non-Td guest the initial state of
CPUs is 16-bit real mode. To resolve this conflict, BITS 16/32 is used
in the ResetVectorVtf0.asm. It checks the 32-bit protected mode or 16-bit
real mode, then jump to the corresponding entry point.

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 20 ++
OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm | 11 +
OvmfPkg/ResetVector/Ia32/IntelTdx.asm | 222 +++++++++++++++++++
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 18 ++
OvmfPkg/ResetVector/Main.asm | 14 ++
OvmfPkg/ResetVector/ResetVector.nasmb | 1 +
6 files changed, 286 insertions(+)
create mode 100644 OvmfPkg/ResetVector/Ia32/IntelTdx.asm

diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
index 7be43fb44a69..dee2e3f9de31 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -177,10 +177,30 @@ resetVector:
;
; This is where the processor will begin execution
;
+; In IA32 we follow the standard reset vector flow. While in X64, Td guest
+; may be supported. Td guest requires the startup mode to be 32-bit
+; protected mode but the legacy VM startup mode is 16-bit real mode.
+; To make NASM generate such shared entry code that behaves correctly in
+; both 16-bit and 32-bit mode, more BITS directives are added.
+;
+%ifdef ARCH_IA32
nop
nop
jmp EarlyBspInitReal16

+%else
+
+ mov eax, cr0
+ test al, 1
+ jz .Real
+BITS 32
+ jmp Main32
+BITS 16
+.Real:
+ jmp EarlyBspInitReal16
+
+%endif
+
ALIGN 16

fourGigabytes:
diff --git a/OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm b/OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm
index c6d0d898bcd1..eb3546668ef8 100644
--- a/OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm
+++ b/OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm
@@ -21,6 +21,17 @@ Transition32FlatTo64Flat:
bts eax, 5 ; enable PAE
mov cr4, eax

+ ;
+ ; In TDX LME has already been set. So we're done and jump to enable
+ ; paging directly if Tdx is enabled.
+ ; EBX is cleared because in the later it will be used to check if
+ ; the second step of the SEV-ES mitigation is to be performed.
+ ;
+ xor ebx, ebx
+ OneTimeCall IsTdxEnabled
+ test eax, eax
+ jnz EnablePaging
+
mov ecx, 0xc0000080
rdmsr
bts eax, 8 ; set LME
diff --git a/OvmfPkg/ResetVector/Ia32/IntelTdx.asm b/OvmfPkg/ResetVector/Ia32/IntelTdx.asm
new file mode 100644
index 000000000000..06794baef81d
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia32/IntelTdx.asm
@@ -0,0 +1,222 @@
+;------------------------------------------------------------------------------
+; @file
+; Intel TDX routines
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define VM_GUEST_TDX 2
+
+BITS 32
+
+;
+; Check if it is Intel Tdx
+;
+; Modified: EAX, EBX, ECX, EDX
+;
+; If it is Intel Tdx, EAX is 1
+; If it is not Intel Tdx, EAX is 0
+;
+IsTdx:
+ ;
+ ; CPUID (0)
+ ;
+ mov eax, 0
+ cpuid
+ cmp ebx, 0x756e6547 ; "Genu"
+ jne IsNotTdx
+ cmp edx, 0x49656e69 ; "ineI"
+ jne IsNotTdx
+ cmp ecx, 0x6c65746e ; "ntel"
+ jne IsNotTdx
+
+ ;
+ ; CPUID (1)
+ ;
+ mov eax, 1
+ cpuid
+ test ecx, 0x80000000
+ jz IsNotTdx
+
+ ;
+ ; CPUID[0].EAX >= 0x21?
+ ;
+ mov eax, 0
+ cpuid
+ cmp eax, 0x21
+ jl IsNotTdx
+
+ ;
+ ; CPUID (0x21,0)
+ ;
+ mov eax, 0x21
+ mov ecx, 0
+ cpuid
+
+ cmp ebx, 0x65746E49 ; "Inte"
+ jne IsNotTdx
+ cmp edx, 0x5844546C ; "lTDX"
+ jne IsNotTdx
+ cmp ecx, 0x20202020 ; " "
+ jne IsNotTdx
+
+ mov eax, 1
+ jmp ExitIsTdx
+
+IsNotTdx:
+ xor eax, eax
+
+ExitIsTdx:
+
+ OneTimeCallRet IsTdx
+
+;
+; Initialize work area if it is Tdx guest. Detailed definition is in
+; OvmfPkg/Include/WorkArea.h.
+; BSP and APs all go here. Only BSP initialize this work area.
+;
+; Param[in] EBX[5:0] CPU Supported GPAW (48 or 52)
+; Param[in] ESI[31:0] vCPU ID (BSP is 0, others are AP)
+;
+; Modified: EBX
+;
+InitTdxWorkarea:
+
+ ;
+ ; First check if it is Tdx
+ ;
+ OneTimeCall IsTdx
+
+ test eax, eax
+ jz ExitInitTdxWorkarea
+
+ cmp esi, 0
+ je TdxBspEntry
+
+ ;
+ ; In Td guest, BSP/AP shares the same entry point
+ ; BSP builds up the page table, while APs shouldn't do the same task.
+ ; Instead, APs just leverage the page table which is built by BSP.
+ ; APs will wait until the page table is ready.
+ ;
+TdxApWait:
+ cmp byte[TDX_WORK_AREA_PGTBL_READY], 0
+ je TdxApWait
+ jmp ExitInitTdxWorkarea
+
+TdxBspEntry:
+ ;
+ ; Set Type of WORK_AREA_GUEST_TYPE so that the following code can use
+ ; these information.
+ ;
+ mov byte[WORK_AREA_GUEST_TYPE], VM_GUEST_TDX
+
+ ;
+ ; EBX[5:0] CPU supported GPA width
+ ;
+ and ebx, 0x3f
+ mov DWORD[TDX_WORK_AREA_GPAW], ebx
+
+ExitInitTdxWorkarea:
+ OneTimeCallRet InitTdxWorkarea
+
+;
+; Load the GDT and set the CS/DS/ES/FS/GS/SS.
+;
+; Modified: EAX, DS, ES, FS, GS, SS, CS
+;
+ReloadFlat32:
+
+ cli
+ mov eax, ADDR_OF(gdtr)
+ lgdt [eax]
+
+ jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpToFlat32BitAndLandHere)
+
+jumpToFlat32BitAndLandHere:
+
+ debugShowPostCode POSTCODE_32BIT_MODE
+
+ mov ax, LINEAR_SEL
+ mov ds, ax
+ mov es, ax
+ mov fs, ax
+ mov gs, ax
+ mov ss, ax
+
+ OneTimeCallRet ReloadFlat32
+
+;
+; Tdx initialization after entering into ResetVector
+;
+; Modified: EAX, EBX, ECX, EDX, EBP, EDI, ESP
+;
+InitTdx:
+ ;
+ ; First load the GDT and jump to Flat32 mode
+ ;
+ OneTimeCall ReloadFlat32
+
+ ;
+ ; Initialization of Tdx work area
+ ;
+ OneTimeCall InitTdxWorkarea
+
+ OneTimeCallRet InitTdx
+
+;
+; Check TDX features, TDX or TDX-BSP or TDX-APs?
+;
+; By design TDX BSP is reponsible for initializing the PageTables.
+; After PageTables are ready, byte[TDX_WORK_AREA_PGTBL_READY] is set to 1.
+; APs will spin when byte[TDX_WORK_AREA_PGTBL_READY] is 0 until it is set to 1.
+;
+; When this routine is run on TDX BSP, byte[TDX_WORK_AREA_PGTBL_READY] should be 0.
+; When this routine is run on TDX APs, byte[TDX_WORK_AREA_PGTBL_READY] should be 1.
+;
+;
+; Modified: EAX, EDX
+;
+; 0-NonTdx, 1-TdxBsp, 2-TdxAps
+;
+CheckTdxFeaturesBeforeBuildPagetables:
+ xor eax, eax
+ cmp byte[WORK_AREA_GUEST_TYPE], VM_GUEST_TDX
+ jne NotTdx
+
+ xor edx, edx
+ mov al, byte[TDX_WORK_AREA_PGTBL_READY]
+ inc eax
+
+NotTdx:
+ OneTimeCallRet CheckTdxFeaturesBeforeBuildPagetables
+
+;
+; Set byte[TDX_WORK_AREA_PGTBL_READY] to 1
+;
+TdxPostBuildPageTables:
+ cmp byte[WORK_AREA_GUEST_TYPE], VM_GUEST_TDX
+ jne ExitTdxPostBuildPageTables
+ mov byte[TDX_WORK_AREA_PGTBL_READY], 1
+
+ExitTdxPostBuildPageTables:
+ OneTimeCallRet TdxPostBuildPageTables
+
+;
+; Check if TDX is enabled
+;
+; Modified: EAX
+;
+; If TDX is enabled then EAX will be 1
+; If TDX is disabled then EAX will be 0.
+;
+IsTdxEnabled:
+ xor eax, eax
+ cmp byte[WORK_AREA_GUEST_TYPE], VM_GUEST_TDX
+ jne TdxNotEnabled
+ mov eax, 1
+
+TdxNotEnabled:
+ OneTimeCallRet IsTdxEnabled
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index 02528221e560..317cad430f29 100644
--- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
+++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
@@ -37,10 +37,23 @@ BITS 32
PAGE_READ_WRITE + \
PAGE_PRESENT)

+%define TDX_BSP 1
+%define TDX_AP 2
+
;
; Modified: EAX, EBX, ECX, EDX
;
SetCr3ForPageTables64:
+ ; Check the TDX features.
+ ; If it is TDX APs, then jump to SetCr3 directly.
+ ; In TD guest the initialization is done by BSP, including building
+ ; the page tables. APs will spin on until byte[TDX_WORK_AREA_PGTBL_READY]
+ ; is set.
+ OneTimeCall CheckTdxFeaturesBeforeBuildPagetables
+ cmp eax, TDX_BSP
+ je ClearOvmfPageTables
+ cmp eax, TDX_AP
+ je SetCr3

; Check whether the SEV is active and populate the SevEsWorkArea
OneTimeCall CheckSevFeatures
@@ -50,6 +63,7 @@ SetCr3ForPageTables64:
; the page table build below.
OneTimeCall GetSevCBitMaskAbove31

+ClearOvmfPageTables:
;
; For OVMF, build some initial page tables at
; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).
@@ -101,6 +115,10 @@ pageTableEntriesLoop:
; Clear the C-bit from the GHCB page if the SEV-ES is enabled.
OneTimeCall SevClearPageEncMaskForGhcbPage

+ ; TDX will do some PostBuildPages task, such as setting
+ ; byte[TDX_WORK_AREA_PGTBL_READY].
+ OneTimeCall TdxPostBuildPageTables
+
SetCr3:
;
; Set CR3 now that the paging structures are available
diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm
index bbfeac1c88bc..5cfc0b5c72b1 100644
--- a/OvmfPkg/ResetVector/Main.asm
+++ b/OvmfPkg/ResetVector/Main.asm
@@ -40,6 +40,20 @@ BITS 32
; work area when detected.
mov byte[WORK_AREA_GUEST_TYPE], 0

+%ifdef ARCH_X64
+
+ jmp SearchBfv
+
+;
+; Entry point of Main32
+;
+Main32:
+ OneTimeCall InitTdx
+
+SearchBfv:
+
+%endif
+
;
; Search for the Boot Firmware Volume (BFV)
;
diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
index eb9733e40256..87effedb9c60 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -108,6 +108,7 @@
%include "Ia32/Flat32ToFlat64.asm"
%include "Ia32/AmdSev.asm"
%include "Ia32/PageTables64.asm"
+%include "Ia32/IntelTdx.asm"
%endif

%include "Ia16/Real16ToFlat32.asm"
--
2.29.2.windows.2


[PATCH V10 3/4] OvmfPkg: Add IntelTdxMetadata.asm

Min Xu
 

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

In TDX when host VMM creates a new guest TD, some initial set of
TD-private pages are added using the TDH.MEM.PAGE.ADD function. These
pages typically contain Virtual BIOS code and data along with some clear
pages for stacks and heap. In the meanwhile, some configuration data
need be measured by host VMM. Tdx Metadata is designed for this purpose
to indicate host VMM how to do the above tasks.

More detailed information of Metadata is in [TDVF] Section 11.

Tdx Metadata describes the information about the image for VMM use.
For example, the base address and length of the TdHob, Bfv, Cfv, etc.
The offset of the Metadata is stored in a GUID-ed structure which is
appended in the GUID-ed chain from a fixed GPA (0xffffffd0).

In this commit there are 2 new definitions of BFV & CFV.
Tdx Virtual Firmware (TDVF) includes one Firmware Volume (FV) known
as the Boot Firmware Volume (BFV). The FV format is defined in the
UEFI Platform Initialization (PI) spec. BFV includes all TDVF
components required during boot.

TDVF also include a configuration firmware volume (CFV) that is
separated from the BFV. The reason is because the CFV is measured in
RTMR, while the BFV is measured in MRTD.

In practice BFV is the code part of Ovmf image (OVMF_CODE.fd). CFV is
the vars part of Ovmf image (OVMF_VARS.fd).

Since AMD SEV has already defined some SEV specific memory region in
MEMFD. TDX re-uses some of the memory regions defined by SEV.
- MailBox : PcdOvmfSecGhcbBackupBase|PcdOvmfSecGhcbBackupSize
- TdHob : PcdOvmfSecGhcbBase|PcdOvmfSecGhcbSize

[TDVF] https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-virtual-firmware-design-guide-rev-1.pdf

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Acked-by: Gerd Hoffmann <kraxel@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
OvmfPkg/OvmfPkg.dec | 9 ++
OvmfPkg/OvmfPkgDefines.fdf.inc | 9 ++
OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 19 +++
OvmfPkg/ResetVector/ResetVector.inf | 9 ++
OvmfPkg/ResetVector/ResetVector.nasmb | 27 +++++
OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm | 115 +++++++++++++++++++
6 files changed, 188 insertions(+)
create mode 100644 OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 1be8d5dccbc7..340d83f794d0 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -340,6 +340,15 @@
# header definition.
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51

+ ## The base address and size of the TDX Cfv base and size.
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase|0|UINT32|0x52
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset|0|UINT32|0x53
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize|0|UINT32|0x54
+
+ ## The base address and size of the TDX Bfv base and size.
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase|0|UINT32|0x55
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset|0|UINT32|0x56
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize|0|UINT32|0x57

[PcdsDynamic, PcdsDynamicEx]
gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
diff --git a/OvmfPkg/OvmfPkgDefines.fdf.inc b/OvmfPkg/OvmfPkgDefines.fdf.inc
index 3b5e45253916..6170c5993ce5 100644
--- a/OvmfPkg/OvmfPkgDefines.fdf.inc
+++ b/OvmfPkg/OvmfPkgDefines.fdf.inc
@@ -9,6 +9,7 @@
##

DEFINE BLOCK_SIZE = 0x1000
+DEFINE VARS_OFFSET = 0

#
# A firmware binary built with FD_SIZE_IN_KB=1024, and a firmware binary built
@@ -88,6 +89,14 @@ SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = $(VARS_SPARE_
# Computing Work Area header defined in the Include/WorkArea.h
SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader = 4

+SET gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase = $(FW_BASE_ADDRESS)
+SET gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset = $(VARS_OFFSET)
+SET gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize = $(VARS_SIZE)
+
+SET gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase = $(CODE_BASE_ADDRESS)
+SET gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset = $(VARS_SIZE)
+SET gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize = $(CODE_SIZE)
+
!if $(SMM_REQUIRE) == TRUE
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 = gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase = gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
index 7ec3c6e980c3..7be43fb44a69 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -47,6 +47,25 @@ TIMES (15 - ((guidedStructureEnd - guidedStructureStart + 15) % 16)) DB 0
;
guidedStructureStart:

+%ifdef ARCH_X64
+;
+; TDX Metadata offset block
+;
+; TdxMetadata.asm is included in ARCH_X64 because Inte TDX is only
+; available in ARCH_X64. Below block describes the offset of
+; TdxMetadata block in Ovmf image
+;
+; GUID : e47a6535-984a-4798-865e-4685a7bf8ec2
+;
+tdxMetadataOffsetStart:
+ DD fourGigabytes - TdxMetadataGuid - 16
+ DW tdxMetadataOffsetEnd - tdxMetadataOffsetStart
+ DB 0x35, 0x65, 0x7a, 0xe4, 0x4a, 0x98, 0x98, 0x47
+ DB 0x86, 0x5e, 0x46, 0x85, 0xa7, 0xbf, 0x8e, 0xc2
+tdxMetadataOffsetEnd:
+
+%endif
+
; SEV Hash Table Block
;
; This describes the guest ram area where the hypervisor should
diff --git a/OvmfPkg/ResetVector/ResetVector.inf b/OvmfPkg/ResetVector/ResetVector.inf
index a2520dde5508..320e5f2c6527 100644
--- a/OvmfPkg/ResetVector/ResetVector.inf
+++ b/OvmfPkg/ResetVector/ResetVector.inf
@@ -44,6 +44,15 @@
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize

[FixedPcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase
diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
index 21b5fd82b830..eb9733e40256 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -69,6 +69,31 @@
%error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"
%endif

+ %define TDX_BFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdBfvRawDataOffset)
+ %define TDX_BFV_RAW_DATA_SIZE FixedPcdGet32 (PcdBfvRawDataSize)
+ %define TDX_BFV_MEMORY_BASE FixedPcdGet32 (PcdBfvBase)
+ %define TDX_BFV_MEMORY_SIZE FixedPcdGet32 (PcdBfvRawDataSize)
+
+ %define TDX_CFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdCfvRawDataOffset)
+ %define TDX_CFV_RAW_DATA_SIZE FixedPcdGet32 (PcdCfvRawDataSize)
+ %define TDX_CFV_MEMORY_BASE FixedPcdGet32 (PcdCfvBase),
+ %define TDX_CFV_MEMORY_SIZE FixedPcdGet32 (PcdCfvRawDataSize),
+
+ %define TDX_HEAP_STACK_BASE FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)
+ %define TDX_HEAP_STACK_SIZE FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)
+
+ %define TDX_HOB_MEMORY_BASE FixedPcdGet32 (PcdOvmfSecGhcbBase)
+ %define TDX_HOB_MEMORY_SIZE FixedPcdGet32 (PcdOvmfSecGhcbSize)
+
+ %define TDX_INIT_MEMORY_BASE FixedPcdGet32 (PcdOvmfWorkAreaBase)
+ %define TDX_INIT_MEMORY_SIZE (FixedPcdGet32 (PcdOvmfWorkAreaSize) + FixedPcdGet32 (PcdOvmfSecGhcbBackupSize))
+
+ %define OVMF_PAGE_TABLE_BASE FixedPcdGet32 (PcdOvmfSecPageTablesBase)
+ %define OVMF_PAGE_TABLE_SIZE FixedPcdGet32 (PcdOvmfSecPageTablesSize)
+
+ %define TDX_WORK_AREA_PGTBL_READY (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 4)
+ %define TDX_WORK_AREA_GPAW (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 8)
+
%define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))

%define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))
@@ -78,6 +103,8 @@
%define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)
%define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)
%define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
+
+%include "X64/IntelTdxMetadata.asm"
%include "Ia32/Flat32ToFlat64.asm"
%include "Ia32/AmdSev.asm"
%include "Ia32/PageTables64.asm"
diff --git a/OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm b/OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm
new file mode 100644
index 000000000000..07f89ef4931f
--- /dev/null
+++ b/OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm
@@ -0,0 +1,115 @@
+;------------------------------------------------------------------------------
+; @file
+; Tdx Virtual Firmware metadata
+;
+; When host VMM creates a new guest TD, some initial set of TD-private pages
+; are added using the TDH.MEM.PAGE.ADD function. These pages typically contain
+; Virtual BIOS code and data along with some clear pages for stacks and heap.
+; In the meanwhile, some configuration data need be measured by host VMM.
+; Tdx Metadata is designed for this purpose to indicate host VMM how to do the
+; above tasks.
+;
+; Tdx Metadata consists of a DESCRIPTOR as the header followed by several
+; SECTIONs. Host VMM sets up the memory for TDVF according to these sections.
+;
+; _Bfv is the example (Bfv refers to the Virtual BIOS code).
+; - By DataOffset/RawDataSize host VMM knows about the position of the code
+; in the binary image.
+; - MemoryAddress/MemoryDataSize indicates the guest physical address/size of
+; the Bfv to be loaded.
+; - Type field means this section is of BFV. This field is designed for the
+; purpose that in some case host VMM may do some additional processing based
+; upon the section type. TdHob section is an example. Host VMM pass the
+; physical memory information to the guest firmware by writing the data in
+; the memory region designated by TdHob section.
+; - By design code part of the binary image (Bfv) should be measured by host
+; VMM. This is indicated by the Attributes field.
+;
+; So put all these information together, when a new guest is being created,
+; the initial TD-private pages for BFV is added by TDH.MEM.PAGE.ADD function,
+; and Bfv is loaded at the guest physical address indicated by MemoryAddress.
+; Since the Attributes is TDX_METADATA_ATTRIBUTES_EXTENDMR, Bfv is measured by
+; host VMM.
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define TDX_METADATA_SECTION_TYPE_BFV 0
+%define TDX_METADATA_SECTION_TYPE_CFV 1
+%define TDX_METADATA_SECTION_TYPE_TD_HOB 2
+%define TDX_METADATA_SECTION_TYPE_TEMP_MEM 3
+%define TDX_METADATA_VERSION 1
+%define TDX_METADATA_ATTRIBUTES_EXTENDMR 0x00000001
+
+ALIGN 16
+TIMES (15 - ((TdxGuidedStructureEnd - TdxGuidedStructureStart + 15) % 16)) DB 0
+
+TdxGuidedStructureStart:
+
+;
+; TDVF meta data
+;
+TdxMetadataGuid:
+ DB 0xf3, 0xf9, 0xea, 0xe9, 0x8e, 0x16, 0xd5, 0x44
+ DB 0xa8, 0xeb, 0x7f, 0x4d, 0x87, 0x38, 0xf6, 0xae
+
+_Descriptor:
+ DB 'T','D','V','F' ; Signature
+ DD TdxGuidedStructureEnd - _Descriptor ; Length
+ DD TDX_METADATA_VERSION ; Version
+ DD (TdxGuidedStructureEnd - _Descriptor - 16)/32 ; Number of sections
+
+_Bfv:
+ DD TDX_BFV_RAW_DATA_OFFSET
+ DD TDX_BFV_RAW_DATA_SIZE
+ DQ TDX_BFV_MEMORY_BASE
+ DQ TDX_BFV_MEMORY_SIZE
+ DD TDX_METADATA_SECTION_TYPE_BFV
+ DD TDX_METADATA_ATTRIBUTES_EXTENDMR
+
+_Cfv:
+ DD TDX_CFV_RAW_DATA_OFFSET
+ DD TDX_CFV_RAW_DATA_SIZE
+ DQ TDX_CFV_MEMORY_BASE
+ DQ TDX_CFV_MEMORY_SIZE
+ DD TDX_METADATA_SECTION_TYPE_CFV
+ DD 0
+
+_TdxHeapStack:
+ DD 0
+ DD 0
+ DQ TDX_HEAP_STACK_BASE
+ DQ TDX_HEAP_STACK_SIZE
+ DD TDX_METADATA_SECTION_TYPE_TEMP_MEM
+ DD 0
+
+_TdxInitMem:
+ DD 0
+ DD 0
+ DQ TDX_INIT_MEMORY_BASE
+ DQ TDX_INIT_MEMORY_SIZE
+ DD TDX_METADATA_SECTION_TYPE_TEMP_MEM
+ DD 0
+
+_TdHob:
+ DD 0
+ DD 0
+ DQ TDX_HOB_MEMORY_BASE
+ DQ TDX_HOB_MEMORY_SIZE
+ DD TDX_METADATA_SECTION_TYPE_TD_HOB
+ DD 0
+
+_OvmfPageTable:
+ DD 0
+ DD 0
+ DQ OVMF_PAGE_TABLE_BASE
+ DQ OVMF_PAGE_TABLE_SIZE
+ DD TDX_METADATA_SECTION_TYPE_TEMP_MEM
+ DD 0
+
+TdxGuidedStructureEnd:
+ALIGN 16
--
2.29.2.windows.2


[PATCH V10 2/4] OvmfPkg: Clear WORK_AREA_GUEST_TYPE in Main.asm

Min Xu
 

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Previously WORK_AREA_GUEST_TYPE was cleared in SetCr3ForPageTables64.
This is workable for Legacy guest and SEV guest. But it doesn't work
after Intel TDX is introduced. It is because all TDX CPUs (BSP and APs)
start to run from 0xfffffff0, thus WORK_AREA_GUEST_TYPE will be cleared
multi-times if it is TDX guest. So the clearance of WORK_AREA_GUEST_TYPE
is moved to Main16 entry point in Main.asm.
Note: WORK_AREA_GUEST_TYPE is only defined for ARCH_X64.

For Intel TDX, its corresponding entry point is Main32 (which will be
introduced in next commit in this patch-set). WORK_AREA_GUEST_TYPE will
be cleared there.

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 4 ----
OvmfPkg/ResetVector/Main.asm | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index 07b6ca070909..02528221e560 100644
--- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
+++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
@@ -42,10 +42,6 @@ BITS 32
;
SetCr3ForPageTables64:

- ; Clear the WorkArea header. The SEV probe routines will populate the
- ; work area when detected.
- mov byte[WORK_AREA_GUEST_TYPE], 0
-
; Check whether the SEV is active and populate the SevEsWorkArea
OneTimeCall CheckSevFeatures

diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm
index ae90a148fce7..bbfeac1c88bc 100644
--- a/OvmfPkg/ResetVector/Main.asm
+++ b/OvmfPkg/ResetVector/Main.asm
@@ -36,6 +36,10 @@ Main16:

BITS 32

+ ; Clear the WorkArea header. The SEV probe routines will populate the
+ ; work area when detected.
+ mov byte[WORK_AREA_GUEST_TYPE], 0
+
;
; Search for the Boot Firmware Volume (BFV)
;
--
2.29.2.windows.2


[PATCH V10 1/4] OvmfPkg: Copy Main.asm from UefiCpuPkg to OvmfPkg's ResetVector

Min Xu
 

RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Previously OvmfPkg/ResetVector uses the Main.asm in
UefiCpuPkg/ReseteVector/Vtf0. In this Main.asm there is only Main16
entry point.

This patch-set is to introduce Intel TDX into Ovmf. Main32 entry point
is needed in Main.asm by Intel TDX. To reduce the complexity of Main.asm
in UefiCpuPkg, OvmfPkg create its own Main.asm to meet the requirement
of Intel TDX. This Main.asm is an unmodified copy (so no functional
change) and the actual changes for tdx come as incremental patches.

UefiCpuPkg/ResetVector/Vtf0/main.asm -> OvmfPkg/ResetVector/Main.asm

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Acked-by: Gerd Hoffmann <kraxel@...>
Signed-off-by: Min Xu <min.m.xu@...>
---
OvmfPkg/ResetVector/Main.asm | 103 +++++++++++++++++++++++++++++++++++
1 file changed, 103 insertions(+)
create mode 100644 OvmfPkg/ResetVector/Main.asm

diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm
new file mode 100644
index 000000000000..ae90a148fce7
--- /dev/null
+++ b/OvmfPkg/ResetVector/Main.asm
@@ -0,0 +1,103 @@
+;------------------------------------------------------------------------------
+; @file
+; Main routine of the pre-SEC code up through the jump into SEC
+;
+; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+
+BITS 16
+
+;
+; Modified: EBX, ECX, EDX, EBP
+;
+; @param[in,out] RAX/EAX Initial value of the EAX register
+; (BIST: Built-in Self Test)
+; @param[in,out] DI 'BP': boot-strap processor, or
+; 'AP': application processor
+; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)
+; @param[out] DS Selector allowing flat access to all addresses
+; @param[out] ES Selector allowing flat access to all addresses
+; @param[out] FS Selector allowing flat access to all addresses
+; @param[out] GS Selector allowing flat access to all addresses
+; @param[out] SS Selector allowing flat access to all addresses
+;
+; @return None This routine jumps to SEC and does not return
+;
+Main16:
+ OneTimeCall EarlyInit16
+
+ ;
+ ; Transition the processor from 16-bit real mode to 32-bit flat mode
+ ;
+ OneTimeCall TransitionFromReal16To32BitFlat
+
+BITS 32
+
+ ;
+ ; Search for the Boot Firmware Volume (BFV)
+ ;
+ OneTimeCall Flat32SearchForBfvBase
+
+ ;
+ ; EBP - Start of BFV
+ ;
+
+ ;
+ ; Search for the SEC entry point
+ ;
+ OneTimeCall Flat32SearchForSecEntryPoint
+
+ ;
+ ; ESI - SEC Core entry point
+ ; EBP - Start of BFV
+ ;
+
+%ifdef ARCH_IA32
+
+ ;
+ ; Restore initial EAX value into the EAX register
+ ;
+ mov eax, esp
+
+ ;
+ ; Jump to the 32-bit SEC entry point
+ ;
+ jmp esi
+
+%else
+
+ ;
+ ; Transition the processor from 32-bit flat mode to 64-bit flat mode
+ ;
+ OneTimeCall Transition32FlatTo64Flat
+
+BITS 64
+
+ ;
+ ; Some values were calculated in 32-bit mode. Make sure the upper
+ ; 32-bits of 64-bit registers are zero for these values.
+ ;
+ mov rax, 0x00000000ffffffff
+ and rsi, rax
+ and rbp, rax
+ and rsp, rax
+
+ ;
+ ; RSI - SEC Core entry point
+ ; RBP - Start of BFV
+ ;
+
+ ;
+ ; Restore initial EAX value into the RAX register
+ ;
+ mov rax, rsp
+
+ ;
+ ; Jump to the 64-bit SEC entry point
+ ;
+ jmp rsi
+
+%endif
--
2.29.2.windows.2


[PATCH V10 0/4] Add Intel TDX support in OvmfPkg/ResetVector

Min Xu
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Intel's Trust Domain Extensions (Intel TDX) refers to an Intel technology
that extends Virtual Machines Extensions (VMX) and Multi-Key Total Memory
Encryption (MKTME) with a new kind of virutal machines guest called a
Trust Domain (TD). A TD is desinged to run in a CPU mode that protects the
confidentiality of TD memory contents and the TD's CPU state from other
software, including the hosting Virtual-Machine Monitor (VMM), unless
explicitly shared by the TD itself.

The patch-sets to support Intel TDX in OvmfPkg is split into several
waves. This is wave-1 which adds Intel TDX support in OvmfPkg/ResetVector.
Note: TDX only works in X64.

Patch #1: Ovmf uses its own Main.asm to reduce the complexity of Main.asm
in UefiCpuPkg. This Main.asm is an unmodified copy from
UefiCpuPkg/ReseteVector/Vtf0 (so no functional change) and the actual
changes for tdx come as incremental patches.

Patch #2: WORK_AREA_GUEST_TYPE is cleared in Main.asm instead of in
WORK_AREA_GUEST_TYPE.

Patch #3: Introduce IntelTdxMetadata.asm which describes the information
about the image for VMM use.

Patch #4: Enable TDX in OvmfPkg/ResetVector for ARCH_X64.

[TDX]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-whitepaper-final9-17.pdf

[TDVF]: https://software.intel.com/content/dam/develop/external/us/en/
documents/tdx-virtual-firmware-design-guide-rev-1.pdf

Code is at https://github.com/mxu9/edk2/tree/tdvf_wave1.v10

v10 changes:
- Clear the OVMF_WORK_AREA in both ARCH_IA32 and ARCH_X64.
- Update the ReloadFlat32 based on the review comments.
- Other minor changes and update some comments.

v9 changes:
- Introduce IntelTdxMetadata.asm in a separate commit.
- Use absolute offset for the start of TdxMetadata so that VMM can
easily reach to the start of the metadata.

v8 changes:
- Create a separate commit for Main.asm.
- Create a separate commit for the clearance of WORK_AREA_GUEST_TYPE.
- Fix some inaccurate comments.

v7 changes:
- Refine the offset of TdxMetadata and remove the definition of
PcdOvmfImageSizeInKB
- Use MOV CR* instead of smsw in ResetVector
- Remove the new field (SubType) in
CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER.

v6 changes:
- Remove the 5-level paging support. 5-level paging enabling is *NOT*
super critical for TDX enabling at this moment. It will be enabled
later in a separate patch.
- Add a new field (SubType) in CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER
to record the VM Guest SubType.
- In Main16 entry point, after TransitionFromReal16To32BitFlat,
WORK_AREA_GUEST_TYPE is cleared to 0. WORK_AREA_GUEST_TYPE was
previously cleared in SetCr3ForPageTables64 (see commit ab77b60).
This doesn't work after TDX is introduced in Ovmf. It is because all
TDX CPUs (BSP and APs) start to run from 0xfffffff0. In previous code
WORK_AREA_GUEST_TYPE will be cleared multi-times in TDX guest. So for
SEV and Legacy guest it is moved to Main16 entry point (after
TransitionFromReal16To32BitFlat). For TDX guest WORK_AREA_GUEST_TYPE
is cleared and set in InitTdxWorkarea.
- Make the return result of IsTdx be consistent with IsTdxEnabled.
- Fix some typo in the code comments.

v5 changes:
- Remove the changes of OVMF_WORK_AREA because Commit ab77b60 covers
those changes.
- Refine the TDX related changes in PageTables64.asm and
Flat32ToFlat64.asm.
- Add CheckTdxFeaturesBeforeBuildPagetables to check Non-Tdx, Tdx-BSP or
Tdx-APs. This routine is called before building page tables.

v4 changes:
- Refine the PageTables64.asm and Flat32ToFlat64.asm to enable TDX.
- Refine SEV_ES_WORK_AREA so that SEV/TDX/Legach guest all can use this
memory region. https://edk2.groups.io/g/devel/message/78345 is the
discussion.
- AmdSev.asm is removed because Brijesh Singh has done it in
https://edk2.groups.io/g/devel/message/78241.

v3 changes:
- Refine PageTables64.asm and Flat32ToFlat64.asm based on the review
comments in [ReviewComment-1] and [ReviewComment-2].
- SEV codes are in AmdSev.asm
- TDX codes are in IntelTdx.asm
- Main.asm is created in OvmfPkg/ResetVector. The one in
UefiCpuPkg/ResetVector/Vtf0 is not used.
- Init32.asm/ReloadFlat32.asm in UefiCpuPkg/ResetVector/Vtf0/Ia32 are
deleted. They're moved to OvmfPkg/ResetVector/Ia32.
- InitTdx.asm is renamed to InteTdx.asm

v2 changes:
- Move InitTdx.asm and ReloadFlat32.asm from UefiCpuPkg/ResetVector/Vtf0
to OvmfPkg/ResetVector. Init32.asm is created which is a null stub of
32-bit initialization. In Main32 just simply call Init32. It makes
the Main.asm in UefiCpuPkg/ResetVector clean and clear.
- Init32.asm/InitTdx.asm/ReloadFlat32.asm are created under
OvmfPkg/ResetVector/Ia32.
- Update some descriptions of the patch-sets.
- Update the REF link in cover letter.
- Add Ard Biesheuvel in Cc list.

v1: https://edk2.groups.io/g/devel/message/77675

Cc: Ard Biesheuvel <ardb+tianocore@...>
Cc: Gerd Hoffmann <kraxel@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Brijesh Singh <brijesh.singh@...>
Cc: Erdem Aktas <erdemaktas@...>
Cc: James Bottomley <jejb@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Signed-off-by: Min Xu <min.m.xu@...>

Min Xu (4):
OvmfPkg: Copy Main.asm from UefiCpuPkg to OvmfPkg's ResetVector
OvmfPkg: Clear WORK_AREA_GUEST_TYPE in Main.asm
OvmfPkg: Add IntelTdxMetadata.asm
OvmfPkg: Enable TDX in ResetVector

OvmfPkg/OvmfPkg.dec | 9 +
OvmfPkg/OvmfPkgDefines.fdf.inc | 9 +
OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 39 ++++
OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm | 11 +
OvmfPkg/ResetVector/Ia32/IntelTdx.asm | 222 +++++++++++++++++++
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 22 +-
OvmfPkg/ResetVector/Main.asm | 121 ++++++++++
OvmfPkg/ResetVector/ResetVector.inf | 9 +
OvmfPkg/ResetVector/ResetVector.nasmb | 28 +++
OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm | 115 ++++++++++
10 files changed, 581 insertions(+), 4 deletions(-)
create mode 100644 OvmfPkg/ResetVector/Ia32/IntelTdx.asm
create mode 100644 OvmfPkg/ResetVector/Main.asm
create mode 100644 OvmfPkg/ResetVector/X64/IntelTdxMetadata.asm

--
2.29.2.windows.2


Re: [PATCH 0/5] FmpDevicePkg: Add support for runtime FmpDxe driver

Bob Morgan
 

Hi, Any feedback on this?

Thanks,

-bob

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Bob Morgan via groups.io
Sent: Thursday, September 23, 2021 8:19 PM
To: devel@edk2.groups.io; gaoliming@...
Cc: michael.d.kinney@...; guomin.jiang@...; wei6.xu@...
Subject: Re: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime FmpDxe driver

External email: Use caution opening links or attachments


Hi Liming,

Yes, this adds a new runtime variation of the FmpDxe driver that can process the FMP payload of a capsule at runtime if the capsule flags do not request PERSIST_ACROSS_RESET and INITIATE_RESET.

There are also changes required to DxeCapsuleLibFmp to enable this runtime FMP processing that I will submit separately.

Thanks,

-bob

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of gaoliming via groups.io
Sent: Thursday, September 23, 2021 6:57 PM
To: devel@edk2.groups.io; Bob Morgan <bobm@...>
Cc: michael.d.kinney@...; guomin.jiang@...; wei6.xu@...
Subject: 回复: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime FmpDxe driver

External email: Use caution opening links or attachments


Bob:
Dose this change make FirmwareManagementProtocol to be used in runtime phase?

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Bob Morgan via
groups.io
发送时间: 2021年9月23日 8:00
收件人: devel@edk2.groups.io
抄送: gaoliming@...; michael.d.kinney@...;
guomin.jiang@...; wei6.xu@...; Bob Morgan
<bobm@...>
主题: [edk2-devel] [PATCH 0/5] FmpDevicePkg: Add support for runtime
FmpDxe driver

Adds a runtime version of FmpDxe driver to allow firmware updates
after ExitBootServices() is called and enables DXE_RUNTIME_DRIVER
module type for associated FMP libraries.

Bob Morgan (5):
FmpDevicePkg/FmpDeviceLibNull: Add DXE_RUNTIME_DRIVER support
FmpDevicePkg/FmpPayloadHeaderLibV1: Add DXE_RUNTIME_DRIVER support
FmpDevicePkg/FmpDependencyCheckLibNull: Add DXE_RUNTIME_DRIVER
support
FmpDevicePkg/FmpDependencyDeviceLibNull: Add DXE_RUNTIME_DRIVER
support
FmpDevicePkg/FmpDxe: Add runtime FmpDxe driver

FmpDevicePkg/FmpDevicePkg.dsc | 29 +++
FmpDevicePkg/FmpDxe/FmpDxe.c | 34 +++-
FmpDevicePkg/FmpDxe/FmpRuntimeDxe.c | 185
++++++++++++++++++
FmpDevicePkg/FmpDxe/FmpRuntimeDxe.inf | 87 ++++++++
FmpDevicePkg/FmpDxe/VariableSupport.c | 7 +
.../FmpDependencyCheckLibNull.inf | 2 +-
.../FmpDependencyDeviceLibNull.inf | 2 +-
.../FmpDeviceLibNull/FmpDeviceLibNull.inf | 2 +-
.../FmpPayloadHeaderLibV1.inf | 2 +-
9 files changed, 336 insertions(+), 14 deletions(-) create mode
100644 FmpDevicePkg/FmpDxe/FmpRuntimeDxe.c
create mode 100644 FmpDevicePkg/FmpDxe/FmpRuntimeDxe.inf

--
2.17.1





Re: Update NASM to stable release 2.15.05

Andrew Fish
 

Mike,

Sounds like a good plan.

Thanks,

Andrew Fish

On Oct 20, 2021, at 9:51 AM, Michael D Kinney <michael.d.kinney@...> wrote:

Hello,

I would like to propose that we update to a newer version of NASM.

https://www.nasm.us/

The most recent stable version is 2.15.05.

https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/

NASM 2.15.05 Documentation:

https://nasm.us/xdoc/2.15.05/html/
https://nasm.us/xdoc/2.15.05/nasmdoc.pdf


The reason to update is to use a version of NASM that supports
newer instructions that will allow the .nasm files with
DB statements for instructions to be updated to use
instruction names. This improves the readability/maintenance
of the .nasm source files:

https://nasm.us/xdoc/2.15.05/html/nasmdocb.html#section-B.1.41

Also, the work on tools such as uncrustify to format source files
require tests to make sure the source format changes do not cause
any functional changes. Compilers support flags for reproducible
builds. NASM 2.15.05 added the --reproducible flag that provides
the same feature for OBJ files produces by NASM.

https://nasm.us/xdoc/2.15.05/html/nasmdoc2.html#section-2.1.34


2.1.34 The --reproducible Option

If this option is given, NASM will not emit information that is
inherently dependent on the NASM version or different from run to
run (such as timestamps) into the output file.

Please let me know if there are any concerns with doing this tool update.
If there are no concerns, I will work on patches required to update
EDK II CI to use NASM 2.15.05 and to update the developer documentation
to require NASM 2.15.05 as the new minimum version.

Thanks,

Mike






Re: [edk2-libc Patch 1/1] AppPkg/Applications/Python: Remove py2.7.2 support from edk2-libc

Jayaprakash, N
 

Hi Mike,

Thanks for the review comments.

The PythonReadMe.txt available @ https://github.com/tianocore/edk2-libc/blob/master/AppPkg/Applications/Python/PythonReadMe.txt
is the readme file for Py2.7.2 and we don't need to retain this file. So I have deleted this file as part of the patch sent for review.

Py 2.7.10 and Py 3.6.8 have their respective readme files as
Py2710ReadMe.txt @ https://github.com/jpshivakavi/edk2-libc/tree/master/AppPkg/Applications/Python/Python-2.7.10
Py368ReadMe.txt @ https://github.com/jpshivakavi/edk2-libc/tree/master/AppPkg/Applications/Python/Python-3.6.8


Besides this, I have taken care of all the other documentation changes required as given below

Updated the readme.md file from this location and removed the reference to Py2.7.2 license
https://github.com/tianocore/edk2-libc/blob/master/Readme.md

AppPkg/Applications/Python/Python-2.7.2/Tools/pybench
AppPkg/Applications/Python/Python-2.7.2

Updated the readme.txt from the below location to remove references to 2.7.2 and replace it with 3.6.8 references.
https://github.com/tianocore/edk2-libc/blob/master/AppPkg/ReadMe.txt
Also updated the version of this readme file along with the date
Version 1.03
18 Oct. 2021


Besides documentation changes following changes have been done to delete py 2.7.2 support from edk2-libc
Updated the AppPkg.dsc file to remove the Python 2.7.2 inf references.
https://github.com/jpshivakavi/edk2-libc/blob/remove_py272_support/AppPkg/AppPkg.dsc


Removed all files and folders corresponding to Py2.7.2 support from
https://github.com/jpshivakavi/edk2-libc/tree/master/AppPkg/Applications/Python
Efi\
Ia32\
PyMod-2.7.2\
Python-2.7.2\
X64\
PythonCore.inf // Inf file for py 2.7.2
PythonReadme.txt // Readme file for Py 2.7.2


Let me know if there is anything else needed.

Regards,
JP

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: 20 October 2021 21:35
To: devel@edk2.groups.io; Jayaprakash, N <n.jayaprakash@...>; Kinney, Michael D <michael.d.kinney@...>
Cc: Rebecca Cran <rebecca@...>
Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] AppPkg/Applications/Python: Remove py2.7.2 support from edk2-libc

Hi JP,

Can you also update the documentation to remove references to Python 2.x or update for Python 3.x?

For example, the following file has Python 2.x references.

https://github.com/tianocore/edk2-libc/blob/master/AppPkg/Applications/Python/PythonReadMe.txt

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
Jayaprakash, N
Sent: Tuesday, October 19, 2021 8:43 PM
To: devel@edk2.groups.io
Cc: Rebecca Cran <rebecca@...>; Kinney, Michael D
<michael.d.kinney@...>; Jayaprakash, N <n.jayaprakash@...>
Subject: [edk2-devel] [edk2-libc Patch 1/1]
AppPkg/Applications/Python: Remove py2.7.2 support from edk2-libc





Re: [PATCH v2 4/7] Platform/ARM/N1Sdp: Enable N1Sdp platform specific configurations

Khasim Mohammed
 

Hi Pierre,

On Wed, Oct 13, 2021 at 02:44 AM, PierreGondois wrote:
Hi Khasim and Deepak,

To check all the required Libraries, Pcds, ... are included correctly,
it is faster to run the CI tests.

The edk2 CI is currently not available for edk2-platforms. I created a
branch that can run the CI on your patch-set at:
https://github.com/PierreARM/edk2-platforms/tree/review/N1Sdp_v2

Can you run the CI and make the required correction ? This patch itself
might not require any but I think some other patches in the serie do.

To run the CI:
-Rebase your master branch and the shared branch on origin/master:
git checkout master && git rebase origin/master
git checkout review/N1Sdp_v2 && git rebase origin/master
-Run the CI
stuart_setup -c .pytool/CISettings.py TOOL_CHAIN_TAG=GCC5
stuart_update -c .pytool/CISettings.py TOOL_CHAIN_TAG=GCC5
stuart_ci_build -c .pytool/CISettings.py TOOL_CHAIN_TAG=GCC5 -a AARCH64
-p N1Sdp

Please let me know if something doesn't works or you have troubles,

If the CI doesn't ask for modifications on this patch, it looks good to me.
I am able to run these tests, it throws few errors for variable names, doxygen style, duplicate GUIDs and coding styles. I will fixes these along with inputs on other patches and post new version this week.

Thanks for the support.

Regards,
Pierre
Regards,
Pierre
On 10/10/21 19:29, Khasim Mohammed via groups.io wrote:
This patch adds PCDs and updates the fdf file for N1Sdp
platform specific configurations.

Signed-off-by: Deepak Pandey <Deepak.Pandey@...>
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@...>
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 98 ++++++++++++++++++++++++++++
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 28 +++++++-
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 13 +++-
3 files changed, 136 insertions(+), 3 deletions(-)
create mode 100644 Platform/ARM/N1Sdp/N1SdpPlatform.dec

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dec b/Platform/ARM/N1Sdp/N1SdpPlatform.dec
new file mode 100644
index 0000000000..d56891b985
--- /dev/null
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dec
@@ -0,0 +1,98 @@
+## @file
+# Describes the N1Sdp configuration.
+#
+# Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x0001001A
+ PACKAGE_NAME = N1SdpPlatform
+ PACKAGE_GUID = 29aacb23-61e8-4fe2-8a06-793537cd26e9
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+
+[LibraryClasses]
+ ArmPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+
+[Guids.common]
+ gArmN1SdpTokenSpaceGuid = { 0xd8f1624a, 0x98c1, 0x4f64, { 0xa6, 0x41, 0x19, 0x5e, 0xb5, 0x3b, 0x26, 0x0f } }
+
+[PcdsFixedAtBuild]
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskBase|0x88000000|UINT32|0x00000001
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskSize|0x18000000|UINT32|0x00000002
+
+ # PCIe
+ gArmN1SdpTokenSpaceGuid.PcdPcieExpressBaseAddress|0x70000000|UINT32|0x00000007
+
+ # External memory
+ gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0|UINT64|0x00000029
+
+[PcdsFeatureFlag.common]
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskSupported|FALSE|BOOLEAN|0x00000003
+
+[PcdsFixedAtBuild.common]
+ # CoreSight Debug and Trace components
+ # CoreSight ETMs
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm0Base|0x402040000|UINT64|0x0000002D
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm0MaxBase|0x402040FFF|UINT64|0x0000002E
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm1Base|0x402140000|UINT64|0x0000002F
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm1MaxBase|0x402140FFF|UINT64|0x00000030
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm2Base|0x403040000|UINT64|0x00000031
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm2MaxBase|0x403040FFF|UINT64|0x00000032
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm3Base|0x403140000|UINT64|0x00000033
+ gArmN1SdpTokenSpaceGuid.PcdCsEtm3MaxBase|0x403140FFF|UINT64|0x00000034
+
+ # CoreSight TMC (ETRs/ETFs/ETBs)
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf0Base|0x400410000|UINT64|0x00000035
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf0MaxBase|0x400410FFF|UINT64|0x00000036
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf1Base|0x400420000|UINT64|0x00000037
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf1MaxBase|0x400420FFF|UINT64|0x00000038
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf2Base|0x400010000|UINT64|0x00000039
+ gArmN1SdpTokenSpaceGuid.PcdCsEtf2MaxBase|0x400010FFF|UINT64|0x0000003A
+ gArmN1SdpTokenSpaceGuid.PcdCsEtrBase|0x400120000|UINT64|0x00000043
+ gArmN1SdpTokenSpaceGuid.PcdCsEtrMaxBase|0x400120FFF|UINT64|0x00000044
+
+ # CoreSight Dynamic Funnel(s)
+ gArmN1SdpTokenSpaceGuid.PcdCsFunnel0Base|0x4000B0000|UINT64|0x0000003B
+ gArmN1SdpTokenSpaceGuid.PcdCsFunnel0MaxBase|0x4000B0FFF|UINT64|0x0000003C
+ gArmN1SdpTokenSpaceGuid.PcdCsFunnel1Base|0x4000A0000|UINT64|0x0000003D
+ gArmN1SdpTokenSpaceGuid.PcdCsFunnel1MaxBase|0x4000A0FFF|UINT64|0x0000003E
+
+ # CoreSight Dynamic Replicator(s)
+ gArmN1SdpTokenSpaceGuid.PcdCsReplicatorBase|0x400110000|UINT64|0x0000003F
+ gArmN1SdpTokenSpaceGuid.PcdCsReplicatorMaxBase|0x400110FFF|UINT64|0x00000040
+
+ # CoreSight TPIU
+ gArmN1SdpTokenSpaceGuid.PcdCsTpiuBase|0x400130000|UINT64|0x00000041
+ gArmN1SdpTokenSpaceGuid.PcdCsTpiuMaxBase|0x400130FFF|UINT64|0x00000042
+
+ # CoreSight STM and STM Stimulus
+ gArmN1SdpTokenSpaceGuid.PcdCsStmBase|0x400800000|UINT64|0x00000045
+ gArmN1SdpTokenSpaceGuid.PcdCsStmMaxBase|0x400800FFF|UINT64|0x00000046
+ gArmN1SdpTokenSpaceGuid.PcdCsStmStimulusBase|0x4D000000|UINT32|0x00000047
+ gArmN1SdpTokenSpaceGuid.PcdCsStmStimulusSize|0x1000000|UINT32|0x00000048
+
+ # CoreSight Components' Size
+ #
+ # Newton TRMs specify the size for these coresight components as 64K.
+ # The actual size is just 4K though 64K is reserved. Access to the
+ # unmapped reserved region results in a DECERR response.
+ #
+ gArmN1SdpTokenSpaceGuid.PcdCsComponentSize|0x1000|UINT32|0x00000049
+
+ # Remote Chip PCIe
+ gArmN1SdpTokenSpaceGuid.PcdRemotePcieIoTranslation|0x40075200000|UINT64|0x0000004A
+ gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004B
+ gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x0000004C
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 61e7a909f8..d5ada590e1 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -1,8 +1,11 @@
+## @file
+# Component description file specific for N1Sdp
#
-# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
+##

################################################################################
#
@@ -33,6 +36,9 @@
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf

+ # file explorer library support
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+
[LibraryClasses.common.SEC]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -71,6 +77,9 @@
[LibraryClasses.common.DXE_RUNTIME_DRIVER]
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+!if $(TARGET) != RELEASE
+ DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
+!endif

[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -82,11 +91,16 @@
################################################################################

[PcdsFeatureFlag.common]
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskSupported|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE

[PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdVFPEnabled|1

+ # RAM Disk
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskBase|0x88000000
+ gArmN1SdpTokenSpaceGuid.PcdRamDiskSize|0x18000000
+
# Stacks for MPCores in Normal World
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x80000000
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000
@@ -99,6 +113,9 @@
# Secondary DDR memory
gArmNeoverseN1SocTokenSpaceGuid.PcdDramBlock2Base|0x8080000000

+ # External memory
+ gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0x40000000000
+
# GIC Base Addresses
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000000
gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
@@ -198,6 +215,9 @@
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}

+ # Platform driver
+ Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf
+
# Human Interface Support
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

@@ -236,6 +256,9 @@
# SATA Controller
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf

+ # NVMe boot devices
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
# Usb Support
MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
@@ -244,3 +267,6 @@
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
+
+ # RAM Disk
+ MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index c4e1f7b4b8..6b097438ad 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -1,8 +1,10 @@
+## @file
+# FDF file of N1Sdp
#
-# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
+##

################################################################################
#
@@ -109,6 +111,9 @@ READ_LOCK_STATUS = TRUE
# SATA Controller
INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf

+ # NVMe boot devices
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
# Usb Support
INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
@@ -137,10 +142,14 @@ READ_LOCK_STATUS = TRUE

# FV FileSystem
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
+ INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf

# UEFI applications
INF ShellPkg/Application/Shell/Shell.inf

+ # Platform driver
+ INF Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf
+
# Bds
INF MdeModulePkg/Application/UiApp/UiApp.inf
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf


Update NASM to stable release 2.15.05

Michael D Kinney
 

Hello,

I would like to propose that we update to a newer version of NASM.

https://www.nasm.us/

The most recent stable version is 2.15.05.

https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/

NASM 2.15.05 Documentation:

https://nasm.us/xdoc/2.15.05/html/
https://nasm.us/xdoc/2.15.05/nasmdoc.pdf


The reason to update is to use a version of NASM that supports
newer instructions that will allow the .nasm files with
DB statements for instructions to be updated to use
instruction names. This improves the readability/maintenance
of the .nasm source files:

https://nasm.us/xdoc/2.15.05/html/nasmdocb.html#section-B.1.41

Also, the work on tools such as uncrustify to format source files
require tests to make sure the source format changes do not cause
any functional changes. Compilers support flags for reproducible
builds. NASM 2.15.05 added the --reproducible flag that provides
the same feature for OBJ files produces by NASM.

https://nasm.us/xdoc/2.15.05/html/nasmdoc2.html#section-2.1.34


2.1.34 The --reproducible Option

If this option is given, NASM will not emit information that is
inherently dependent on the NASM version or different from run to
run (such as timestamps) into the output file.

Please let me know if there are any concerns with doing this tool update.
If there are no concerns, I will work on patches required to update
EDK II CI to use NASM 2.15.05 and to update the developer documentation
to require NASM 2.15.05 as the new minimum version.

Thanks,

Mike


Re: [edk2-libc Patch 1/1] AppPkg/Applications/Python: Remove py2.7.2 support from edk2-libc

Michael D Kinney
 

Hi JP,

Can you also update the documentation to remove references to Python 2.x or update for Python 3.x?

For example, the following file has Python 2.x references.

https://github.com/tianocore/edk2-libc/blob/master/AppPkg/Applications/Python/PythonReadMe.txt

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jayaprakash, N
Sent: Tuesday, October 19, 2021 8:43 PM
To: devel@edk2.groups.io
Cc: Rebecca Cran <rebecca@...>; Kinney, Michael D <michael.d.kinney@...>; Jayaprakash, N
<n.jayaprakash@...>
Subject: [edk2-devel] [edk2-libc Patch 1/1] AppPkg/Applications/Python: Remove py2.7.2 support from edk2-libc





Re: [PATCH] ShellPkg: Parse I/O APIC and x2APIC structure

Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@...>
 

[AMD Official Use Only]

Gentle reminder to merge the code.

-----Original Message-----
From: Gao, Zhichao <zhichao.gao@...>
Sent: 09 September 2021 07:54
To: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@...>; devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@...>
Subject: RE: [edk2-devel] [PATCH] ShellPkg: Parse I/O APIC and x2APIC structure

[CAUTION: External Email]

Reviewed-by: Zhichao Gao <zhichao.gao@...>

Thanks,
Zhichao

-----Original Message-----
From: Abdul Lateef Attar <AbdulLateef.Attar@...>
Sent: Tuesday, August 24, 2021 11:30 PM
To: devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@...>; Gao, Zhichao <zhichao.gao@...>;
Abdul Lateef Attar <AbdulLateef.Attar@...>
Subject: [edk2-devel] [PATCH] ShellPkg: Parse I/O APIC and x2APIC
structure

Parse and print the below interrupt structures
- I/O APIC Structure
- Interrupt Source Override Structure
- Processor Local x2APIC Structure
- Local x2APIC NMI Structure

Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@...>
---
.../Parsers/Madt/MadtParser.c | 99 +++++++++++++++++++
1 file changed, 99 insertions(+)

diff --git
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
er.c
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
er.c
index 15aa2392b6..2ba8c9ae52 100644
---
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
er.c
+++
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
+++ er.c
@@ -181,6 +181,57 @@ STATIC CONST ACPI_PARSER GicITSParser[] = {
{L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL} };

+/**
+ An ACPI_PARSER array describing the IO APIC Structure.
+**/
+STATIC CONST ACPI_PARSER IoApic[] = {
+ {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
+ {L"I/O APIC ID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"I/O APIC Address", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Global System Interrupt Base", 4, 8, L"0x%x", NULL, NULL, NULL,
+NULL} };
+
+/**
+ An ACPI_PARSER array describing the Interrupt Source Override Structure.
+**/
+STATIC CONST ACPI_PARSER InterruptSourceOverride[] = {
+ {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
+ {L"Bus", 1, 2, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Source", 1, 3, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Global System Interrupt", 4, 4, L"0x%x", NULL, NULL, NULL,
+NULL},
+ {L"Flags", 2, 8, L"0x%x", NULL, NULL, NULL, NULL} };
+
+
+/**
+ An ACPI_PARSER array describing the Processor Local x2APIC Structure.
+**/
+STATIC CONST ACPI_PARSER ProcessorLocalX2Apic[] = {
+ {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
+ {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
+
+ {L"X2APIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL}, {L"Flags",
+ 4, 8, L"0x%x", NULL, NULL, NULL, NULL}, {L"ACPI Processor UID", 4,
+ 12, L"0x%x", NULL, NULL, NULL, NULL} };
+
+/**
+ An ACPI_PARSER array describing the Local x2APIC NMI Structure.
+**/
+STATIC CONST ACPI_PARSER LocalX2ApicNmi[] = {
+ {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
+ {L"Flags", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
+
+ {L"ACPI Processor UID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Local x2APIC LINT#", 1, 8, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Reserved", 3, 9, L"0x%x%x%x", Dump3Chars, NULL, NULL, NULL} };
+
/**
An ACPI_PARSER array describing the ACPI MADT Table.
**/
@@ -357,6 +408,54 @@ ParseAcpiMadt (
break;
}

+ case EFI_ACPI_6_3_IO_APIC: {
+ ParseAcpi (
+ TRUE,
+ 2,
+ "IO APIC",
+ InterruptContollerPtr,
+ *MadtInterruptControllerLength,
+ PARSER_PARAMS (IoApic)
+ );
+ break;
+ }
+
+ case EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE: {
+ ParseAcpi (
+ TRUE,
+ 2,
+ "INTERRUPT SOURCE OVERRIDE",
+ InterruptContollerPtr,
+ *MadtInterruptControllerLength,
+ PARSER_PARAMS (InterruptSourceOverride)
+ );
+ break;
+ }
+
+ case EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC: {
+ ParseAcpi (
+ TRUE,
+ 2,
+ "PROCESSOR LOCAL X2APIC",
+ InterruptContollerPtr,
+ *MadtInterruptControllerLength,
+ PARSER_PARAMS (ProcessorLocalX2Apic)
+ );
+ break;
+ }
+
+ case EFI_ACPI_6_3_LOCAL_X2APIC_NMI: {
+ ParseAcpi (
+ TRUE,
+ 2,
+ "LOCAL x2APIC NMI",
+ InterruptContollerPtr,
+ *MadtInterruptControllerLength,
+ PARSER_PARAMS (LocalX2ApicNmi)
+ );
+ break;
+ }
+
default: {
IncrementErrorCount ();
Print (
--
2.25.1


[PATCH 6/6] uefi-sct/SctPkg: TCG2 Protocol: add SubmitCommand test

Joseph Hemann
 

From: Joseph Hemann <Joseph.hemann@...>

-add initial TCG2 protocol test for SubmitCommand()
-checkpoint for test function with GET_RANDOM Command

Cc: G Edhaya Chandran <Edhaya.Chandran@...>
Cc: Barton Gao <gaojie@...>
Cc: Carolyn Gjertsen <Carolyn.Gjertsen@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Eric Jin <eric.jin@...>
Cc: Arvin Chen <arvinx.chen@...>
Cc: Supreeth Venkatesh <Supreeth.Venkatesh@...>
Signed-off-by: Joseph Hemann <Joseph.hemann@...>
---
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.c | 4 +
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.h | 10 +
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.h | 49 +++++
.../TCG2ProtocolBBTestConformance.c | 178 ++++++++++++++++++
.../BlackBoxTest/TCG2ProtocolBBTestMain.c | 10 +
5 files changed, 251 insertions(+)

diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
index 89c4151752cd..b5a4e5c7218e 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
@@ -53,3 +53,7 @@ EFI_GUID gTcg2ConformanceTestAssertionGuid011 = EFI_TEST_TCG2CONFORMANCE_ASSERTI
EFI_GUID gTcg2ConformanceTestAssertionGuid012 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_012_GUID;

EFI_GUID gTcg2ConformanceTestAssertionGuid013 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_013_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid014 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_014_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid015 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_015_GUID;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
index 2cb715105529..ccc5a4bef957 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
@@ -90,3 +90,13 @@ extern EFI_GUID gTcg2ConformanceTestAssertionGuid012;
{ 0x45fa1a42, 0x912a, 0x5124, {0x84, 0xf4, 0x41, 0x67, 0xab, 0xb5, 0x89, 0x90 }}

extern EFI_GUID gTcg2ConformanceTestAssertionGuid013;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_014_GUID \
+{ 0x1689bc3a, 0x2298, 0xa116, {0x28, 0x4c, 0xc1, 0xdd, 0xaa, 0xd8, 0xef, 0x51 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid014;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_015_GUID \
+{ 0x126a789a, 0x1932, 0x3234, {0x21, 0xab, 0x42, 0x64, 0x8a, 0x7b, 0x63, 0x76 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid015;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
index 69fb358922df..0fdf753f95fa 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
@@ -43,6 +43,9 @@ Abstract:
#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0103 \
{0x907a7878, 0xb294, 0xf147, {0xe9, 0x0a, 0x65, 0x43, 0xab, 0x55, 0x76, 0x46} }

+#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0104 \
+ {0x9087ad78, 0x9ad2, 0x4172, {0x9a, 0xbc, 0x98, 0x23, 0x08, 0xf5, 0x6d, 0x26} }
+
#define EV_POST_CODE 0x01

#define EV_NO_ACTION 0x03
@@ -51,6 +54,39 @@ Abstract:

#define PE_COFF_IMAGE 0x0000000000000010

+// ST_NO_SESSION as definied in Table 19 of TPM Library Part 2: Structures
+#define ST_NO_SESSIONS (UINT16) 0x8001
+
+// TPM_RC_SUCCESS as definied in Table 16 of TPM Library Spec Part 2: Structures
+#define TPM_RC_SUCCESS (UINT32) 0x0000000
+
+// TPM_CC_GetRandom as definied in Table 12 of TPM Library Spec Part 2: Structures
+#define TPM_CC_GetRandom (UINT32) 0x0000017B
+
+#pragma pack(1)
+// TPM2B_DIGEST as definied in Table 73 of TPM Library Spec Part 2: Structures
+typedef struct {
+ UINT16 size;
+ UINT8 digest[8]; // Size of buffer in spec is defined to be variable length but for this test will always be 8
+} TPM2B_DIGEST;
+
+// GetRandomCommand Structure as defined in Sectin 16.1 of TPM Spec Part 3: Commands
+typedef struct {
+ UINT16 Tag;
+ UINT32 CommandSize;
+ UINT32 CommandCode;
+ UINT16 BytesRequested;
+} GET_RANDOM_COMMAND;
+
+// GetRandomResponse Structure as defined in Sectin 16.1 of TPM Spec Part 3: Commands
+typedef struct {
+ UINT16 Tag;
+ UINT32 ResponseSize;
+ UINT32 ResponseCode;
+ TPM2B_DIGEST randomBytes;
+} GET_RANDOM_RESPONSE;
+#pragma
+
EFI_STATUS
EFIAPI
BBTestTCG2ProtocolUnload (
@@ -105,6 +141,12 @@ BBTestHashLogExtendEventConformanceTestCheckpoint4 (
IN EFI_TCG2_PROTOCOL *TCG2
);

+EFI_STATUS
+BBTestSubmitCommandConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
EFI_STATUS
BBTestGetCapabilityConformanceTest (
IN EFI_BB_TEST_PROTOCOL *This,
@@ -129,3 +171,10 @@ BBTestHashLogExtendEventConformanceTest (
IN EFI_HANDLE SupportHandle
);

+EFI_STATUS
+BBTestSubmitCommandConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ );
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
index d3aaf979c087..b764e22116d0 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
@@ -177,6 +177,52 @@ BBTestHashLogExtendEventConformanceTest (
return EFI_SUCCESS;
}

+/**
+ * @brief Entrypoint for SubmitCommand() Function Test.
+ * 1 checkpoint will be tested.
+ * @param This a pointer of EFI_BB_TEST_PROTOCOL
+ * @param ClientInterface A pointer to the interface array under test
+ * @param TestLevel Test "thoroughness" control
+ * @param SupportHandle A handle containing protocols required
+ * @return EFI_SUCCESS
+ * @return EFI_NOT_FOUND
+ */
+
+EFI_STATUS
+BBTestSubmitCommandConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ )
+{
+ EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib;
+ EFI_STATUS Status;
+ EFI_TCG2_PROTOCOL *TCG2;
+
+ //
+ // init
+ //
+ TCG2 = (EFI_TCG2_PROTOCOL*)ClientInterface;
+
+ //
+ // Get the Standard Library Interface
+ //
+ Status = gtBS->HandleProtocol (
+ SupportHandle,
+ &gEfiStandardTestLibraryGuid,
+ (VOID **) &StandardLib
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ // Test GetRandom TPM Command
+ BBTestSubmitCommandConformanceTestCheckpoint1 (StandardLib, TCG2);
+
+ return EFI_SUCCESS;
+}
+
EFI_STATUS
BBTestGetCapabilityConformanceTestCheckpoint1 (
IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
@@ -837,3 +883,135 @@ BBTestHashLogExtendEventConformanceTestCheckpoint4 (

return EFI_SUCCESS;
}
+
+EFI_STATUS
+BBTestSubmitCommandConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ GET_RANDOM_RESPONSE CommandResponse;
+ GET_RANDOM_COMMAND CommandInput;
+ int IsNonZero = 0;
+
+ // Build TPM2 GetRandom command for 8 random bytes
+ CommandInput.Tag = SctSwapBytes16(ST_NO_SESSIONS);
+ CommandInput.CommandSize = SctSwapBytes32(sizeof(GET_RANDOM_COMMAND));
+ CommandInput.CommandCode = SctSwapBytes32(TPM_CC_GetRandom);
+ CommandInput.BytesRequested = SctSwapBytes16(8);
+
+ // zero out randomBytes to ensure SubmitCommand returns random bytes
+ SctZeroMem(&CommandResponse, sizeof(GET_RANDOM_RESPONSE));
+
+ Status = TCG2->SubmitCommand (
+ TCG2,
+ sizeof(GET_RANDOM_COMMAND),
+ &CommandInput,
+ sizeof(GET_RANDOM_RESPONSE),
+ &CommandResponse);
+
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+
+ // Verify SubmitCommand returns EFI_SUCCESS
+ if (Status != EFI_SUCCESS) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return EFI_SUCCESS, Status = %r",
+ Status
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid014,
+ L"TCG2_PROTOCOL.SubmitCommand - SubmitCommand() should return EFI_SUCCESS",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+
+ // Verify SubmitCommand returns correct Response Tag
+ if (SctSwapBytes16(CommandResponse.Tag) != ST_NO_SESSIONS) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return ST_NO_SESSIONS response Tag"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ if (SctSwapBytes32(CommandResponse.ResponseCode) != TPM_RC_SUCCESS) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return Correct ResponseCode, ResponseCode = %x",
+ SctSwapBytes32(CommandResponse.ResponseCode)
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ if (SctSwapBytes32(CommandResponse.ResponseSize) != sizeof(GET_RANDOM_RESPONSE)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return Correct ResponseSize, Size = %x",
+ SctSwapBytes32(CommandResponse.ResponseSize)
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ // Check that number of random bytes returned equals amount requested
+ if (SctSwapBytes16(CommandResponse.randomBytes.size) != 8) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return correct amount of random bytes, Size = %x",
+ SctSwapBytes16(CommandResponse.randomBytes.size)
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ // If random bytes are returned at least one should be non-zero
+ for (int i = 0; i < 8; i++) {
+ if (CommandResponse.randomBytes.digest[i] != 0) {
+ IsNonZero = 1;
+ }
+ }
+
+ if (!IsNonZero) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol SubmitCommand Test: SubmitCommand should return RandomBytes",
+ Status
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid015,
+ L"TCG2_PROTOCOL.SubmitCommand - SubmitCommand() should return EFI_SUCCESS",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
index 892fce2691c1..419e2a3e5ad2 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
@@ -65,6 +65,16 @@ EFI_BB_TEST_ENTRY_FIELD gBBTestEntryField[] = {
EFI_TEST_CASE_AUTO,
BBTestHashLogExtendEventConformanceTest
},
+ {
+ EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0104,
+ L"SubmitCommand_Conf",
+ L"Test the SubmitCommmand API",
+ EFI_TEST_LEVEL_DEFAULT,
+ gSupportProtocolGuid1,
+ EFI_TEST_CASE_AUTO,
+ BBTestSubmitCommandConformanceTest
+ },
+
0
};

--
2.17.1


[PATCH 5/6] uefi-sct/SctPkg: TCG2 Protocol: add GetEventLog test

Joseph Hemann
 

From: Joseph Hemann <Joseph.hemann@...>

-add initial TCG2 protocol test for GetEventLog()
-checkpoint for test function with invalid eventlog format
-checkpoint for test function with valid eventlog format

Cc: G Edhaya Chandran <Edhaya.Chandran@...>
Cc: Barton Gao <gaojie@...>
Cc: Carolyn Gjertsen <Carolyn.Gjertsen@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Eric Jin <eric.jin@...>
Cc: Arvin Chen <arvinx.chen@...>
Cc: Supreeth Venkatesh <Supreeth.Venkatesh@...>
Signed-off-by: Joseph Hemann <Joseph.hemann@...>
---
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.c | 8 +
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.h | 19 ++
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.h | 14 ++
.../TCG2ProtocolBBTestConformance.c | 204 +++++++++++++++++-
uefi-sct/SctPkg/UEFI/Protocol/TCG2.h | 45 ++++
5 files changed, 289 insertions(+), 1 deletion(-)

diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
index 32438f967d41..89c4151752cd 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
@@ -45,3 +45,11 @@ EFI_GUID gTcg2ConformanceTestAssertionGuid007 = EFI_TEST_TCG2CONFORMANCE_ASSERTI
EFI_GUID gTcg2ConformanceTestAssertionGuid008 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_008_GUID;

EFI_GUID gTcg2ConformanceTestAssertionGuid009 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_009_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid010 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_010_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid011 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_011_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid012 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_012_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid013 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_013_GUID;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
index 27908816bb81..2cb715105529 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
@@ -71,3 +71,22 @@ extern EFI_GUID gTcg2ConformanceTestAssertionGuid008;

extern EFI_GUID gTcg2ConformanceTestAssertionGuid009;

+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_010_GUID \
+{ 0x0363d22f, 0xc66a, 0x4872, {0xa5, 0x46, 0x06, 0x7f, 0x6a, 0x0d, 0xdb, 0xcd }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid010;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_011_GUID \
+{ 0x9cd6d636, 0x603a, 0x4b78, {0x80, 0xa3, 0xa3, 0xb9, 0xcc, 0x6a, 0x0b, 0x08 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid011;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_012_GUID \
+{ 0xfc80408e, 0x9a3c, 0x4054, {0x96, 0xf9, 0x31, 0x23, 0x35, 0xc2, 0x31, 0x35 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid012;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_013_GUID \
+{ 0x45fa1a42, 0x912a, 0x5124, {0x84, 0xf4, 0x41, 0x67, 0xab, 0xb5, 0x89, 0x90 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid013;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
index f552e833b42b..69fb358922df 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
@@ -45,6 +45,8 @@ Abstract:

#define EV_POST_CODE 0x01

+#define EV_NO_ACTION 0x03
+
#define EFI_TCG2_EXTEND_ONLY 0x0000000000000001

#define PE_COFF_IMAGE 0x0000000000000010
@@ -91,6 +93,18 @@ BBTestHashLogExtendEventConformanceTestCheckpoint2 (
IN EFI_TCG2_PROTOCOL *TCG2
);

+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint3 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint4 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
EFI_STATUS
BBTestGetCapabilityConformanceTest (
IN EFI_BB_TEST_PROTOCOL *This,
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
index a3992c4709a6..d3aaf979c087 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
@@ -126,7 +126,7 @@ BBTestGetActivePcrBanksConformanceTest (

/**
* @brief Entrypoint for HashLogExtendEvent() Function Test.
- * 2 checkpoints will be tested.
+ * 4 checkpoints will be tested.
* @param This a pointer of EFI_BB_TEST_PROTOCOL
* @param ClientInterface A pointer to the interface array under test
* @param TestLevel Test "thoroughness" control
@@ -168,6 +168,12 @@ BBTestHashLogExtendEventConformanceTest (
//Test with correct size field
BBTestHashLogExtendEventConformanceTestCheckpoint2 (StandardLib, TCG2);

+ // Test GetEventLog using invalid EventLog Format
+ BBTestHashLogExtendEventConformanceTestCheckpoint3 (StandardLib, TCG2);
+
+ // Test GetEventLog using valid EventLog Format
+ BBTestHashLogExtendEventConformanceTestCheckpoint4 (StandardLib, TCG2);
+
return EFI_SUCCESS;
}

@@ -635,3 +641,199 @@ BBTestHashLogExtendEventConformanceTestCheckpoint2 (

return EFI_SUCCESS;
}
+
+#define EFI_TCG2_INVALID_EVENT_LOG_FORMAT 0x20
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint3 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ EFI_TCG2_EVENT_LOG_FORMAT EventLogFormat;
+ EFI_PHYSICAL_ADDRESS *EventLogLocation;
+ EFI_PHYSICAL_ADDRESS *EventLogLastEntry;
+ BOOLEAN *EventLogTruncated;
+
+ // Ensure Get EventLog returns Invalid Parameter when passed invalid format
+ EventLogFormat = EFI_TCG2_INVALID_EVENT_LOG_FORMAT;
+
+ Status = TCG2->GetEventLog (
+ TCG2,
+ EventLogFormat,
+ EventLogLocation,
+ EventLogLastEntry,
+ EventLogTruncated);
+
+ if (EFI_INVALID_PARAMETER != Status) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid010,
+ L"TCG2_PROTOCOL.GetEventLog - GetEventLog() should return EFI_INVALID_PARAMETER when passed in invalid EventLog Format",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint4 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ EFI_TCG2_EVENT_LOG_FORMAT EventLogFormat;
+ EFI_PHYSICAL_ADDRESS EventLogLocation;
+ EFI_PHYSICAL_ADDRESS EventLogLastEntry;
+ BOOLEAN EventLogTruncated;
+ TCG_PCR_EVENT *EventLogHeader;
+ TCG_EfiSpecIDEventStruct *EventLogHeaderSpecEvent;
+ TCG_PCR_EVENT2 *LastEvent;
+ UINT8 *data = "Spec ID Event03\0\0";
+
+ EventLogFormat = EFI_TCG2_EVENT_LOG_FORMAT_TCG_2;
+
+ // Call GetEventLog with valid EventLogFormat
+ Status = TCG2->GetEventLog (
+ TCG2,
+ EventLogFormat,
+ &EventLogLocation,
+ &EventLogLastEntry,
+ &EventLogTruncated);
+
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+
+ // Verify GetEventLog returns EFI_SUCCESS
+ if (Status != EFI_SUCCESS) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: GetEventLog should return EFI_SUCCESS with valid EventLogFormat, Status = %r",
+ Status
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid011,
+ L"TCG2_PROTOCOL.GetEventLog - GetEventLog() should return EFI_SUCCESS",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ // If GetEventLog doesn't return EFI_SUCCESS abort test
+ if (Status != EFI_SUCCESS) {
+ return Status;
+ }
+
+ EventLogHeader = (TCG_PCR_EVENT *) EventLogLocation;
+ EventLogHeaderSpecEvent = (TCG_EfiSpecIDEventStruct *) EventLogHeader->Event;
+
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+
+
+ // Verify valid eventlog header is returned
+ // Verify EventLogHeader PCR index == 0
+ if (EventLogHeader->PCRIndex != 0) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: EventLogHeader should have PCR index == 0"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ // Verify EventLogHeader event type = EV_NO_ACTION
+ if (EventLogHeader->EventType != EV_NO_ACTION) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: EventLogHeader should be EventType == EV_NO_ACTION"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ // Verify EventLog Signature
+ Status = SctStrCmp(EventLogHeaderSpecEvent->signature, data);
+
+ if (Status != EFI_SUCCESS) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: EventLogHeader Signature did not match \'Spec ID Event03\'"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid012,
+ L"TCG2_PROTOCOL.GetEventLog - GetEventLog() should return correct EventLogHeader",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+
+ // Verify Event recorded in checkpoint2 was recorded in Eventlog
+ LastEvent = (TCG_PCR_EVENT2 *) EventLogLastEntry;
+
+ // Verify Last Event PCR = 16
+ if (LastEvent->PCRIndex != 16) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: PCR Index of Last event should be 16"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ // Verify last event type = EV_POST_CODE
+ if (LastEvent->EventType != EV_POST_CODE) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetEventLog Test: PCR Index of last event should be type EV_POST_CODE"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid013,
+ L"TCG2_PROTOCOL.GetEventLog - GetEventLog() should record Event from Checkpoint2 as last EventLogEntry",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
diff --git a/uefi-sct/SctPkg/UEFI/Protocol/TCG2.h b/uefi-sct/SctPkg/UEFI/Protocol/TCG2.h
index 9ece78e0deaf..5f095dffa7eb 100644
--- a/uefi-sct/SctPkg/UEFI/Protocol/TCG2.h
+++ b/uefi-sct/SctPkg/UEFI/Protocol/TCG2.h
@@ -49,6 +49,7 @@ Abstract:
#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 0x00000001

#define EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 0x00000002
+#define HASH_NUMBER 0x04

typedef struct _EFI_TCG2_PROTOCOL EFI_TCG2_PROTOCOL;

@@ -114,6 +115,50 @@ typedef struct tdEFI_TCG2_EVENT {
UINT8 Event[];
} EFI_TCG2_EVENT;

+typedef struct {
+ UINT16 hashAlg;
+ UINT8 digest[];
+} TPMT_HA;
+
+typedef struct tdTPML_DIGEST_VALUES {
+ UINT32 Count; // number of digests
+ TPMT_HA Digests[HASH_NUMBER]; // Count digests
+} TPML_DIGEST_VALUES;
+
+// This Declaration is for parsing the eventlog header which is defined to be 20 bytes in TCG EFI Protocol Spec
+typedef UINT8 TCG_DIGEST[20];
+
+typedef struct tdTCG_PCR_EVENT2 {
+ TCG_PCRINDEX PCRIndex; // PCRIndex event extended to
+ TCG_EVENTTYPE EventType; // Type of event (see [2])
+ TPML_DIGEST_VALUES Digests; // List of digests extended to //PCRIndex
+ UINT32 EventSize; // Size of the event data
+ UINT8 *Event; // The event data
+} TCG_PCR_EVENT2;
+
+typedef struct tdTCG_PCR_EVENT {
+ UINT32 PCRIndex; // PCRIndex event extended to
+ UINT32 EventType; // Type of event (see EFI specs)
+ TCG_DIGEST Digest; // Value extended into PCRIndex
+ UINT32 EventSize; // Size of the event data
+ UINT8 Event[0]; // The event data
+} TCG_PCR_EVENT;
+// Structure to be added to the Event Log
+
+typedef struct tdTCG_EfiSpecIdEventAlgorithmSize {
+ UINT16 algorithmId;
+ UINT16 digestSize;
+} TCG_EfiSpecIdEventAlgorithmSize;
+
+typedef struct tdTCG_EfiSpecIdEventStruct {
+ UINT8 signature[16];
+ UINT32 platformClass;
+ UINT8 specVersionMinor;
+ UINT8 specVersionMajor;
+ UINT8 specErrata;
+ UINT8 uintnSize;
+} TCG_EfiSpecIDEventStruct;
+
typedef
EFI_STATUS
(EFIAPI * EFI_TCG2_HASH_LOG_EXTEND_EVENT) (
--
2.17.1


[PATCH 4/6] uefi-sct/SctPkg: TCG2 Protocol: add HashLogExtendEvent test

Joseph Hemann
 

From: Joseph Hemann <Joseph.hemann@...>

-add initial TCG2 protocol test for HashLogExtendEvent()
-checkpoint for test of function with invalid parameters
-checkpoint for test of function with valid parameters

Cc: G Edhaya Chandran <Edhaya.Chandran@...>
Cc: Barton Gao <gaojie@...>
Cc: Carolyn Gjertsen <Carolyn.Gjertsen@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Eric Jin <eric.jin@...>
Cc: Arvin Chen <arvinx.chen@...>
Cc: Supreeth Venkatesh <Supreeth.Venkatesh@...>
Signed-off-by: Joseph Hemann <Joseph.hemann@...>
---
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.c | 8 +
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.h | 20 ++
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.h | 29 ++
.../TCG2ProtocolBBTestConformance.c | 278 ++++++++++++++++++
.../BlackBoxTest/TCG2ProtocolBBTestMain.c | 9 +
5 files changed, 344 insertions(+)

diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
index 0497f08f74f2..32438f967d41 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
@@ -37,3 +37,11 @@ EFI_GUID gTcg2ConformanceTestAssertionGuid003 = EFI_TEST_TCG2CONFORMANCE_ASSERTI
EFI_GUID gTcg2ConformanceTestAssertionGuid004 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_004_GUID;

EFI_GUID gTcg2ConformanceTestAssertionGuid005 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_005_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid006 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_006_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid007 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_007_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid008 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_008_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid009 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_009_GUID;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
index f470255ccdcf..27908816bb81 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
@@ -51,3 +51,23 @@ extern EFI_GUID gTcg2ConformanceTestAssertionGuid004;

extern EFI_GUID gTcg2ConformanceTestAssertionGuid005;

+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_006_GUID \
+{ 0xa8e1b5e6, 0xfc09, 0x461c, {0xb0, 0xe9, 0x2a, 0x49, 0xcd, 0x25, 0xc1, 0x24 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid006;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_007_GUID \
+{ 0x26f04a9b, 0x7b7a, 0x4f47, {0xbe, 0xa8, 0xb1, 0xa6, 0x02, 0x65, 0x19, 0x8a }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid007;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_008_GUID \
+{ 0x4d1d9985, 0x91e2, 0x4948, {0x89, 0x16, 0xbb, 0x98, 0x13, 0x62, 0x39, 0x1d }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid008;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_009_GUID \
+{ 0xfb59cab7, 0x4f8c, 0x4ded, {0xa4, 0x1c, 0xc8, 0x41, 0x20, 0x1c, 0x37, 0x22 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid009;
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
index a6773010b64f..f552e833b42b 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
@@ -40,6 +40,15 @@ Abstract:
#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0102 \
{0x847f1ae0, 0xb429, 0x49f1, {0x9e, 0x0c, 0x8f, 0x43, 0xfb, 0x55, 0x34, 0x54} }

+#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0103 \
+ {0x907a7878, 0xb294, 0xf147, {0xe9, 0x0a, 0x65, 0x43, 0xab, 0x55, 0x76, 0x46} }
+
+#define EV_POST_CODE 0x01
+
+#define EFI_TCG2_EXTEND_ONLY 0x0000000000000001
+
+#define PE_COFF_IMAGE 0x0000000000000010
+
EFI_STATUS
EFIAPI
BBTestTCG2ProtocolUnload (
@@ -70,6 +79,18 @@ BBTestGetActivePcrBanksConformanceTestCheckpoint2 (
IN EFI_TCG2_PROTOCOL *TCG2
);

+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
EFI_STATUS
BBTestGetCapabilityConformanceTest (
IN EFI_BB_TEST_PROTOCOL *This,
@@ -86,3 +107,11 @@ BBTestGetActivePcrBanksConformanceTest (
IN EFI_HANDLE SupportHandle
);

+EFI_STATUS
+BBTestHashLogExtendEventConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ );
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
index 5277f9433f7e..a3992c4709a6 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
@@ -124,6 +124,53 @@ BBTestGetActivePcrBanksConformanceTest (
return EFI_SUCCESS;
}

+/**
+ * @brief Entrypoint for HashLogExtendEvent() Function Test.
+ * 2 checkpoints will be tested.
+ * @param This a pointer of EFI_BB_TEST_PROTOCOL
+ * @param ClientInterface A pointer to the interface array under test
+ * @param TestLevel Test "thoroughness" control
+ * @param SupportHandle A handle containing protocols required
+ * @return EFI_SUCCESS
+ * @return EFI_NOT_FOUND
+ */
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ )
+{
+ EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib;
+ EFI_STATUS Status;
+ EFI_TCG2_PROTOCOL *TCG2;
+ //
+ // init
+ //
+ TCG2 = (EFI_TCG2_PROTOCOL*)ClientInterface;
+
+ // Get the Standard Library Interface
+ //
+ Status = gtBS->HandleProtocol (
+ SupportHandle,
+ &gEfiStandardTestLibraryGuid,
+ (VOID **) &StandardLib
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ //Test Using NULL Pointer
+ BBTestHashLogExtendEventConformanceTestCheckpoint1 (StandardLib, TCG2);
+
+ //Test with correct size field
+ BBTestHashLogExtendEventConformanceTestCheckpoint2 (StandardLib, TCG2);
+
+ return EFI_SUCCESS;
+}
+
EFI_STATUS
BBTestGetCapabilityConformanceTestCheckpoint1 (
IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
@@ -357,3 +404,234 @@ BBTestGetActivePcrBanksConformanceTestCheckpoint2 (

return EFI_SUCCESS;
}
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ UINT64 Flags = 0;
+ EFI_PHYSICAL_ADDRESS DataToHash;
+ UINT64 DataToHashLen;
+ EFI_TCG2_EVENT *EfiTcgEvent;
+ const CHAR16 *EventData = L"TCG2 Protocol Test";
+ const CHAR16 *Str = L"The quick brown fox jumps over the lazy dog";
+ UINT32 EfiTcgEventSize = sizeof(EFI_TCG2_EVENT) + SctStrSize(EventData);
+
+ DataToHash = Str;
+ DataToHashLen = SctStrLen(Str);
+
+ Status = gtBS->AllocatePool (
+ EfiBootServicesData,
+ EfiTcgEventSize,
+ (VOID **)&EfiTcgEvent
+ );
+
+ EfiTcgEvent->Header.HeaderSize = sizeof(EFI_TCG2_EVENT_HEADER);
+ EfiTcgEvent->Header.EventType = EV_POST_CODE;
+ EfiTcgEvent->Header.PCRIndex = 16;
+ EfiTcgEvent->Size = EfiTcgEvent->Header.HeaderSize + SctStrSize(EventData);
+
+ // Ensure HashLogExtendEvent returns Invalid Parameter when passing in NULL DataToHash pointer
+ // EFI Protocol Spec Section 6.6.5 #1
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ NULL,
+ 0,
+ EfiTcgEvent);
+
+ if (EFI_INVALID_PARAMETER != Status) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid004,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - Test with NULL DataToHash Pointer should return EFI_INVALID_PARAMETER",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ // Ensure HashLogExtendEvent returns Invalid Parameter when passing in NULL EfiTcgEvent pointer
+ // EFI Protocol Spec Section 6.6.5 #1
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ DataToHash,
+ DataToHashLen,
+ NULL);
+
+ if (EFI_INVALID_PARAMETER != Status) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid005,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - Test with NULL EfiTcgEvent Pointer should return EFI_INVALID_PARAMETER",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ // Ensure HashLogExtendEvent returns Invalid Parameter when passed in EventSize < HeaderSize + sizeof(UINT32)
+ // EFI Protocol Spec Section 6.6.5 #2
+ EfiTcgEvent->Size = EfiTcgEvent->Header.HeaderSize + sizeof(UINT32) - 1;
+
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ DataToHash,
+ DataToHashLen,
+ EfiTcgEvent);
+
+ if (EFI_INVALID_PARAMETER != Status) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid006,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - Test with Event.Size < Event.Header.HeaderSize + sizeof(UINT32) should return EFI_INVALID_PARAMETER",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ // Ensure HashLogExtendEvent returns Invalid Parameter when passing in PCR Index > 23
+ // EFI Protocol Spec Section 6.6.5 #3
+ EfiTcgEvent->Header.PCRIndex = 24;
+ EfiTcgEvent->Size = EfiTcgEvent->Header.HeaderSize + SctStrSize(EventData);
+
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ DataToHash,
+ DataToHashLen,
+ EfiTcgEvent);
+
+ if (EFI_INVALID_PARAMETER != Status) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid007,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - Test with PCRIndex > 23 should return EFI_INVALID_PARAMETER",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BBTestHashLogExtendEventConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+
+ EFI_TCG2_EVENT *EfiTcgEvent;
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ UINT64 Flags = 0;
+ EFI_PHYSICAL_ADDRESS DataToHash;
+ UINT64 DataToHashLen;
+ const CHAR16 *Str = L"The quick brown fox jumps over the lazy dog";
+ const CHAR16 *EventData = L"TCG2 Protocol Test";
+ UINT32 EfiTcgEventSize = sizeof(EFI_TCG2_EVENT) + SctStrSize(EventData);
+
+ DataToHash = Str;
+ DataToHashLen = SctStrLen(Str);
+
+ Status = gtBS->AllocatePool (
+ EfiBootServicesData,
+ EfiTcgEventSize,
+ (VOID **)&EfiTcgEvent
+ );
+
+ EfiTcgEvent->Header.HeaderSize = sizeof(EFI_TCG2_EVENT_HEADER);
+ EfiTcgEvent->Header.EventType = EV_POST_CODE;
+ EfiTcgEvent->Header.PCRIndex = 16;
+ EfiTcgEvent->Size = EfiTcgEvent->Header.HeaderSize + SctStrSize(EventData);
+
+ // Perform HashLogExtendEvent over test buffer to PCR 16
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ DataToHash,
+ DataToHashLen,
+ EfiTcgEvent);
+
+ if (Status != EFI_SUCCESS) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid008,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - HashLogExtendEvent() Test: HashLogExtendEvent should return EFI_SUCCESS",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ // Test with valid Parameters but with Flags = PE_COFF_IMAGE
+ // EFI Protocol Spec Section 6.6.5 #4
+ Flags = PE_COFF_IMAGE;
+
+ Status = TCG2->HashLogExtendEvent (
+ TCG2,
+ Flags,
+ DataToHash,
+ DataToHashLen,
+ EfiTcgEvent);
+
+ if (Status != EFI_UNSUPPORTED) {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid009,
+ L"TCG2_PROTOCOL.HashLogExtendEvent - HashLogExtendEvent() Test Handling of PE_COFF_IMAGE flag",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ gtBS->FreePool (EfiTcgEvent);
+
+ return EFI_SUCCESS;
+}
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
index 4e7b15937ebb..892fce2691c1 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
@@ -56,6 +56,15 @@ EFI_BB_TEST_ENTRY_FIELD gBBTestEntryField[] = {
EFI_TEST_CASE_AUTO,
BBTestGetActivePcrBanksConformanceTest
},
+ {
+ EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0103,
+ L"HashLogExtendEvent_Conf",
+ L"Test the HashLogExtendEvent API",
+ EFI_TEST_LEVEL_DEFAULT,
+ gSupportProtocolGuid1,
+ EFI_TEST_CASE_AUTO,
+ BBTestHashLogExtendEventConformanceTest
+ },
0
};

--
2.17.1


[PATCH 3/6] uefi-sct/SctPkg: TCG2 Protocol: add GetActivePcrBanks test

Joseph Hemann
 

From: Joseph Hemann <Joseph.hemann@...>

-add initial TCG2 protocol test for GetActivePcrBanks()
-checkpoint for NULL pointer passed for buffer
-checkpoint for test of function with proper input

Cc: G Edhaya Chandran <Edhaya.Chandran@...>
Cc: Barton Gao <gaojie@...>
Cc: Carolyn Gjertsen <Carolyn.Gjertsen@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Eric Jin <eric.jin@...>
Cc: Arvin Chen <arvinx.chen@...>
Cc: Supreeth Venkatesh <Supreeth.Venkatesh@...>
Signed-off-by: Joseph Hemann <Joseph.hemann@...>
---
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.c | 4 +
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.h | 10 ++
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.h | 23 +++
.../TCG2ProtocolBBTestConformance.c | 140 +++++++++++++++++-
.../BlackBoxTest/TCG2ProtocolBBTestMain.c | 9 ++
5 files changed, 185 insertions(+), 1 deletion(-)

diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
index 206662ee7933..0497f08f74f2 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
@@ -33,3 +33,7 @@ EFI_GUID gTcg2ConformanceTestAssertionGuid001 = EFI_TEST_TCG2CONFORMANCE_ASSERTI
EFI_GUID gTcg2ConformanceTestAssertionGuid002 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_002_GUID;

EFI_GUID gTcg2ConformanceTestAssertionGuid003 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_003_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid004 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_004_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid005 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_005_GUID;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
index b675756b9fb7..f470255ccdcf 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
@@ -41,3 +41,13 @@ extern EFI_GUID gTcg2ConformanceTestAssertionGuid002;

extern EFI_GUID gTcg2ConformanceTestAssertionGuid003;

+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_004_GUID \
+{ 0x7a1e79a3, 0x4064, 0x4372, {0xbb, 0x64, 0x55, 0xb8, 0xf2, 0xa5, 0xa3, 0x26 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid004;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_005_GUID \
+{ 0xb0e717c4, 0xb1e2, 0x49f7, {0xb2, 0xd7, 0x60, 0x58, 0x97, 0x7d, 0x09, 0x2c }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid005;
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
index 674540182d2d..a6773010b64f 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
@@ -37,6 +37,9 @@ Abstract:
#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0101 \
{0x39ff9c71, 0x4b41, 0x4e5b, {0xae, 0xd7, 0x87, 0xc7, 0x94, 0x18, 0x7d, 0x67} }

+#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0102 \
+ {0x847f1ae0, 0xb429, 0x49f1, {0x9e, 0x0c, 0x8f, 0x43, 0xfb, 0x55, 0x34, 0x54} }
+
EFI_STATUS
EFIAPI
BBTestTCG2ProtocolUnload (
@@ -55,6 +58,18 @@ BBTestGetCapabilityConformanceTestCheckpoint2 (
IN EFI_TCG2_PROTOCOL *TCG2
);

+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
EFI_STATUS
BBTestGetCapabilityConformanceTest (
IN EFI_BB_TEST_PROTOCOL *This,
@@ -63,3 +78,11 @@ BBTestGetCapabilityConformanceTest (
IN EFI_HANDLE SupportHandle
);

+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ );
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
index fec542167171..5277f9433f7e 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
@@ -75,6 +75,54 @@ BBTestGetCapabilityConformanceTest (
return EFI_SUCCESS;
}

+/**
+ * @brief Entrypoint for GetActivePcrBanks() Function Test.
+ * 2 checkpoints will be tested.
+ * @param This a pointer of EFI_BB_TEST_PROTOCOL
+ * @param ClientInterface A pointer to the interface array under test
+ * @param TestLevel Test "thoroughness" control
+ * @param SupportHandle A handle containing protocols required
+ * @return EFI_SUCCESS
+ * @return EFI_NOT_FOUND
+ */
+
+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ )
+{
+ EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib;
+ EFI_STATUS Status;
+ EFI_TCG2_PROTOCOL *TCG2;
+
+ //
+ // init
+ //
+ TCG2 = (EFI_TCG2_PROTOCOL*)ClientInterface;
+
+ //
+ // Get the Standard Library Interface
+ //
+ Status = gtBS->HandleProtocol (
+ SupportHandle,
+ &gEfiStandardTestLibraryGuid,
+ (VOID **) &StandardLib
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ // Test Using NULL Pointer
+ BBTestGetActivePcrBanksConformanceTestCheckpoint1 (StandardLib, TCG2);
+
+ // Test with correct size field
+ BBTestGetActivePcrBanksConformanceTestCheckpoint2 (StandardLib, TCG2);
+
+ return EFI_SUCCESS;
+}

EFI_STATUS
BBTestGetCapabilityConformanceTestCheckpoint1 (
@@ -181,7 +229,7 @@ BBTestGetCapabilityConformanceTestCheckpoint2 (
AssertionType = EFI_TEST_ASSERTION_FAILED;
}

- EFI_TCG2_EVENT_ALGORITHM_BITMAP HashBitMapAlgos = EFI_TCG2_BOOT_HASH_ALG_SHA256 | EFI_TCG2_BOOT_HASH_ALG_SHA384 | EFI_TCG2_BOOT_HASH_ALG_SHA512;
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP HashBitMapAlgos = EFI_TCG2_BOOT_HASH_ALG_SHA1 | EFI_TCG2_BOOT_HASH_ALG_SHA256 | EFI_TCG2_BOOT_HASH_ALG_SHA384 | EFI_TCG2_BOOT_HASH_ALG_SHA512;

if (!(BootServiceCap.HashAlgorithmBitmap & HashBitMapAlgos)) {
StandardLib->RecordMessage (
@@ -219,3 +267,93 @@ BBTestGetCapabilityConformanceTestCheckpoint2 (
return EFI_SUCCESS;
}

+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP *ActivePcrBanks = NULL;
+ Status = TCG2->GetActivePcrBanks (
+ TCG2,
+ ActivePcrBanks);
+
+ // Ensure GetCapablity returns Invalid Parameter when passing in NULL pointer
+ if (EFI_INVALID_PARAMETER == Status) {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid004,
+ L"TCG2_PROTOCOL.GetActivePcrBanks - GetActivePcrBanks() returns EFI_INVALID_PARAMETER with NULL pointer Passed in",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BBTestGetActivePcrBanksConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP ActivePcrBanks;
+ Status = TCG2->GetActivePcrBanks (
+ TCG2,
+ &ActivePcrBanks);
+
+ // Ensure GetActivePcrBanks returns EFI_SUCCESS
+ if (Status == EFI_SUCCESS) {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ } else {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetActivePcrBanks Test: GetActivePcrBanks should return EFI_SUCCESS",
+ ActivePcrBanks
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP BitMapAlgos = EFI_TCG2_BOOT_HASH_ALG_SHA256 | EFI_TCG2_BOOT_HASH_ALG_SHA384 | EFI_TCG2_BOOT_HASH_ALG_SHA512;
+
+ // Ensure ActivePcrBanks has SHA256/384/512 in its Bitmap
+ if (!(ActivePcrBanks & BitMapAlgos)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetActivePcrBanks Test: GetActiVePcrBanks should have SHA256/384/512 Algorithm in its Bitmap. ActivePcrBanks = %x",
+ ActivePcrBanks
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid005,
+ L"TCG2_PROTOCOL.GetActivePcrBanks - GetActivePcrBanks should return with EFI_SUCCESS and have SHA256/384/512 Algoritms in its Bitmap",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
index 97da8f58e35f..4e7b15937ebb 100644
--- a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
@@ -47,6 +47,15 @@ EFI_BB_TEST_ENTRY_FIELD gBBTestEntryField[] = {
EFI_TEST_CASE_AUTO,
BBTestGetCapabilityConformanceTest
},
+ {
+ EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0102,
+ L"GetActivePcrBanks_Conf",
+ L"Test the GetActivePcrBanks API",
+ EFI_TEST_LEVEL_DEFAULT,
+ gSupportProtocolGuid1,
+ EFI_TEST_CASE_AUTO,
+ BBTestGetActivePcrBanksConformanceTest
+ },
0
};

--
2.17.1


[PATCH 2/6] uefi-sct/SctPkg: TCG2 Protocol: add GetCapability Test

Joseph Hemann
 

From: Joseph Hemann <Joseph.hemann@...>

-implement initial infrastructure for the TCG2 protocol test
including updates to .dsc file, inf file, GUID source files,
update to Category.ini.

-add initial TCG2 protocol test for GetCapability(), as
defined in the TCG EFI Protocol Spec 6.4.4.
-checkpoint for NULL pointer passed for buffer
-checkpoint for validating fields of the struct returned by GetCapabilty()

Cc: G Edhaya Chandran <Edhaya.Chandran@...>
Cc: Barton Gao <gaojie@...>
Cc: Carolyn Gjertsen <Carolyn.Gjertsen@...>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Cc: Eric Jin <eric.jin@...>
Cc: Arvin Chen <arvinx.chen@...>
Cc: Supreeth Venkatesh <Supreeth.Venkatesh@...>
Signed-off-by: Joseph Hemann <Joseph.hemann@...>
---
uefi-sct/SctPkg/CommonGenFramework.sh | 1 +
uefi-sct/SctPkg/Config/Data/Category.ini | 7 +
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.c | 35 +++
.../EFI/Protocol/TCG2/BlackBoxTest/Guid.h | 43 ++++
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.h | 65 ++++++
.../TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf | 51 ++++
.../TCG2ProtocolBBTestConformance.c | 221 ++++++++++++++++++
.../BlackBoxTest/TCG2ProtocolBBTestMain.c | 102 ++++++++
uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc | 1 +
9 files changed, 526 insertions(+)
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
create mode 100644 uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c

diff --git a/uefi-sct/SctPkg/CommonGenFramework.sh b/uefi-sct/SctPkg/CommonGenFramework.sh
index 779a6a4492b3..997d8ba1638b 100755
--- a/uefi-sct/SctPkg/CommonGenFramework.sh
+++ b/uefi-sct/SctPkg/CommonGenFramework.sh
@@ -210,6 +210,7 @@ then
cp $ProcessorType/DiskIo2BBTest.efi $Framework/Test/ > NUL
cp $ProcessorType/TimeStampBBTest.efi $Framework/Test/ > NUL
cp $ProcessorType/RandomNumberBBTest.efi $Framework/Test/ > NUL
+ cp $ProcessorType/TCG2ProtocolBBTest.efi $Framework/Test/ > NUL
cp $ProcessorType/Hash2BBTest.efi $Framework/Test/ > NUL
cp $ProcessorType/Pkcs7BBTest.efi $Framework/Test/ > NUL
cp $ProcessorType/ConfigKeywordHandlerBBTest.efi $Framework/Test/ > NUL
diff --git a/uefi-sct/SctPkg/Config/Data/Category.ini b/uefi-sct/SctPkg/Config/Data/Category.ini
index af27e362ec8a..c239fe4ba98c 100644
--- a/uefi-sct/SctPkg/Config/Data/Category.ini
+++ b/uefi-sct/SctPkg/Config/Data/Category.ini
@@ -1026,3 +1026,10 @@ InterfaceGuid = 8D59D32B-C655-4AE9-9B15-F25904992A43
Name = IHV\ConsoleSupportTest\AbsolutePointerProtocolTest
Description = Absolute Pointer Protocol Test on IHV Drivers

+[Category Data]
+Revision = 0x00010000
+CategoryGuid = 607f766c-7455-42be-930b-e4d76db2720f
+InterfaceGuid = 607f766c-7455-42be-930b-e4d76db2720f
+Name = TCG2ProtocolTest
+Description =
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
new file mode 100644
index 000000000000..206662ee7933
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.c
@@ -0,0 +1,35 @@
+/** @file
+
+ Copyright 2006 - 2013 Unified EFI, Inc.<BR>
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+
+ guid.c
+
+Abstract:
+
+ GUIDs auto-generated for EFI test assertion.
+
+--*/
+
+#include "Efi.h"
+#include "Guid.h"
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid001 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_001_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid002 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_002_GUID;
+
+EFI_GUID gTcg2ConformanceTestAssertionGuid003 = EFI_TEST_TCG2CONFORMANCE_ASSERTION_003_GUID;
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
new file mode 100644
index 000000000000..b675756b9fb7
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/Guid.h
@@ -0,0 +1,43 @@
+/** @file
+
+ Copyright 2006 - 2016 Unified EFI, Inc.<BR>
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+
+ guid.h
+
+Abstract:
+
+ GUIDs auto-generated for EFI test assertion.
+
+--*/
+
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_001_GUID \
+{ 0xca93b02a, 0xe897, 0x4400, {0x81, 0x38, 0xc8, 0xa8, 0xcb, 0x2f, 0xc1, 0xed }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid001;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_002_GUID \
+{ 0xda8821d9, 0x3d2c, 0x4698, {0x8c, 0xd5, 0x0f, 0x0c, 0x82, 0x94, 0x1d, 0x0c }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid002;
+
+#define EFI_TEST_TCG2CONFORMANCE_ASSERTION_003_GUID \
+{ 0xfdee7001, 0x7e28, 0x4e35, {0x99, 0x66, 0x98, 0x0b, 0xeb, 0xba, 0xf1, 0x57 }}
+
+extern EFI_GUID gTcg2ConformanceTestAssertionGuid003;
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
new file mode 100644
index 000000000000..674540182d2d
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.h
@@ -0,0 +1,65 @@
+/** @file
+
+ Copyright 2006 - 2017 Unified EFI, Inc.<BR>
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+ TCG2ProtocolBBTest.h
+
+Abstract:
+ head file of test driver of EFI TCG2 Protocol Test
+
+--*/
+
+#include "SctLib.h"
+#include <Library/EfiTestLib.h>
+#include <UEFI/Protocol/TCG2.h>
+#include "Guid.h"
+
+#define EFI_TCG2_TEST_REVISION 0x00010000
+
+//////////////////////////////////////////////////////////////////////////////
+//
+// Entry GUIDs for Function Test
+//
+#define EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0101 \
+ {0x39ff9c71, 0x4b41, 0x4e5b, {0xae, 0xd7, 0x87, 0xc7, 0x94, 0x18, 0x7d, 0x67} }
+
+EFI_STATUS
+EFIAPI
+BBTestTCG2ProtocolUnload (
+ IN EFI_HANDLE ImageHandle
+ );
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ );
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ );
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf
new file mode 100644
index 000000000000..f41d84b32a5c
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf
@@ -0,0 +1,51 @@
+## @file
+#
+# Copyright 2006 - 2015 Unified EFI, Inc.<BR>
+# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+#/*++
+#
+# Module Name:
+#
+# TCG2ProtocolBBTest.inf
+#
+# Abstract:
+#
+# Component description file for TCG2 Protocol Black-Box Test.
+#
+#--*/
+
+[defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = TCG2ProtocolBBTest
+ FILE_GUID = BD8CB762-3935-434C-AC3F-462244910A2D
+ MODULE_TYPE = UEFI_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = InitializeBBTestTCG2Protocol
+
+[sources.common]
+ Guid.c
+ TCG2ProtocolBBTestMain.c
+ TCG2ProtocolBBTestConformance.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ SctPkg/SctPkg.dec
+ SctPkg/UEFI/UEFI.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ SctLib
+ EfiTestLib
+
+[Protocols]
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
new file mode 100644
index 000000000000..fec542167171
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestConformance.c
@@ -0,0 +1,221 @@
+/** @file
+
+ Copyright 2006 - 2016 Unified EFI, Inc.<BR>
+ Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+
+ TCG2BBTestConformance.c
+
+Abstract:
+
+ for EFI Driver TCG2 Protocol's Basic Test
+
+--*/
+
+#include "TCG2ProtocolBBTest.h"
+
+/**
+ * @brief Entrypoint for GetCapability() Function Test.
+ * 2 checkpoints will be tested.
+ * @param This a pointer of EFI_BB_TEST_PROTOCOL
+ * @param ClientInterface A pointer to the interface array under test
+ * @param TestLevel Test "thoroughness" control
+ * @param SupportHandle A handle containing protocols required
+ * @return EFI_SUCCESS
+ * @return EFI_NOT_FOUND
+ */
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTest (
+ IN EFI_BB_TEST_PROTOCOL *This,
+ IN VOID *ClientInterface,
+ IN EFI_TEST_LEVEL TestLevel,
+ IN EFI_HANDLE SupportHandle
+ )
+{
+ EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib;
+ EFI_STATUS Status;
+ EFI_TCG2_PROTOCOL *TCG2;
+
+ //
+ // init
+ //
+ TCG2 = (EFI_TCG2_PROTOCOL*)ClientInterface;
+
+ //
+ // Get the Standard Library Interface
+ //
+ Status = gtBS->HandleProtocol (
+ SupportHandle,
+ &gEfiStandardTestLibraryGuid,
+ (VOID **) &StandardLib
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ // Test Using NULL BootCapablity Pointer
+ BBTestGetCapabilityConformanceTestCheckpoint1 (StandardLib, TCG2);
+
+ // Test for validating fields of struct returned by GetCapability()
+ BBTestGetCapabilityConformanceTestCheckpoint2 (StandardLib, TCG2);
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTestCheckpoint1 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ EFI_TCG2_BOOT_SERVICE_CAPABILITY *BootServiceCapPtr = NULL;
+
+ Status = TCG2->GetCapability (
+ TCG2,
+ BootServiceCapPtr);
+
+ // Ensure GetCapablity returns Invalid Parameter when passing in NULL pointer
+ if (EFI_INVALID_PARAMETER == Status) {
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+ } else {
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid001,
+ L"TCG2_PROTOCOL.GetCapability - GetCapability() returns EFI_INVALID_PARAMETER with NULL pointer Capability Struct Passed in",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BBTestGetCapabilityConformanceTestCheckpoint2 (
+ IN EFI_STANDARD_TEST_LIBRARY_PROTOCOL *StandardLib,
+ IN EFI_TCG2_PROTOCOL *TCG2
+ )
+{
+ EFI_TEST_ASSERTION AssertionType;
+ EFI_STATUS Status;
+ char StructureVersionMajor;
+ char StructureVersionMinor;
+ char ProtocolVersionMajor;
+ char ProtocolVersionMinor;
+ EFI_TCG2_BOOT_SERVICE_CAPABILITY BootServiceCap;
+
+ BootServiceCap.Size = sizeof(EFI_TCG2_BOOT_SERVICE_CAPABILITY);
+
+ Status = TCG2->GetCapability (
+ TCG2,
+ &BootServiceCap);
+
+ AssertionType = EFI_TEST_ASSERTION_PASSED;
+
+ StructureVersionMajor = BootServiceCap.StructureVersion.Major;
+ StructureVersionMinor = BootServiceCap.StructureVersion.Minor;
+
+ // TCG EFI Protocol spec 6.4.4 #4
+ if ((StructureVersionMajor != 1) | (StructureVersionMinor != 1)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: GetCapabilty should have StructureVersion 1.1"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ ProtocolVersionMajor = BootServiceCap.ProtocolVersion.Major;
+ ProtocolVersionMinor = BootServiceCap.ProtocolVersion.Minor;
+
+ // TCG EFI Protocol spec 6.4.4 #4
+ if ((ProtocolVersionMajor != 1) | (ProtocolVersionMinor != 1)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: protocol version must be 1.1"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ if (!(BootServiceCap.SupportedEventLogs & EFI_TCG2_EVENT_LOG_FORMAT_TCG_2)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: GetCapabilty must support TCG2 event log format"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ if (BootServiceCap.NumberOfPcrBanks < 1 ) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: expect at least 1 PCR bank"
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP HashBitMapAlgos = EFI_TCG2_BOOT_HASH_ALG_SHA256 | EFI_TCG2_BOOT_HASH_ALG_SHA384 | EFI_TCG2_BOOT_HASH_ALG_SHA512;
+
+ if (!(BootServiceCap.HashAlgorithmBitmap & HashBitMapAlgos)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: unexpected hash algorithms reported = %x",
+ BootServiceCap.HashAlgorithmBitmap
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ if (!(BootServiceCap.ActivePcrBanks & HashBitMapAlgos)) {
+ StandardLib->RecordMessage (
+ StandardLib,
+ EFI_VERBOSE_LEVEL_DEFAULT,
+ L"\r\nTCG2 Protocol GetCapablity Test: unexpected active PCR banks reported = %x",
+ BootServiceCap.ActivePcrBanks
+ );
+
+ AssertionType = EFI_TEST_ASSERTION_FAILED;
+ }
+
+ StandardLib->RecordAssertion (
+ StandardLib,
+ AssertionType,
+ gTcg2ConformanceTestAssertionGuid003,
+ L"TCG2_PROTOCOL.GetCapability - GetCapability checks failed",
+ L"%a:%d: Status - %r",
+ __FILE__,
+ (UINTN)__LINE__,
+ Status
+ );
+
+ return EFI_SUCCESS;
+}
+
diff --git a/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
new file mode 100644
index 000000000000..97da8f58e35f
--- /dev/null
+++ b/uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTestMain.c
@@ -0,0 +1,102 @@
+/** @file
+
+ Copyright 2006 - 2017 Unified EFI, Inc.<BR>
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, Arm Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+ TCG2ProtocolBBTestMain.c
+
+Abstract:
+ for EFI TCG2 Protocol Test
+
+--*/
+
+#include "TCG2ProtocolBBTest.h"
+
+EFI_BB_TEST_PROTOCOL_FIELD gBBTestProtocolField = {
+ EFI_TCG2_TEST_REVISION,
+ EFI_TCG2_PROTOCOL_GUID,
+ L"Testing For EFI TCG2 Protocol",
+ L"Total # test cases for the EFI TCG2 Protocol"
+};
+
+EFI_GUID gSupportProtocolGuid1[2] = {
+ EFI_STANDARD_TEST_LIBRARY_GUID,
+ EFI_NULL_GUID
+};
+
+EFI_BB_TEST_ENTRY_FIELD gBBTestEntryField[] = {
+ {
+ EFI_TCG2_PROTOCOL_TEST_ENTRY_GUID0101,
+ L"GetCapability_Conf",
+ L"Test the GetCapablity API",
+ EFI_TEST_LEVEL_DEFAULT,
+ gSupportProtocolGuid1,
+ EFI_TEST_CASE_AUTO,
+ BBTestGetCapabilityConformanceTest
+ },
+ 0
+};
+
+EFI_BB_TEST_PROTOCOL *gBBTestProtocolInterface;
+
+/**
+ * Creates/installs the BlackBox Interface and eminating Entry Point
+ * node list.
+ * @param ImageHandle The test driver image handle
+ * @param SystemTable Pointer to System Table
+ * @return EFI_SUCCESS Indicates the interface was installed
+ * @return EFI_OUT_OF_RESOURCES Indicates space for the new handle could not be allocated
+ * @return EFI_INVALID_PARAMETER: One of the parameters has an invalid value.
+ */
+EFI_STATUS
+EFIAPI
+InitializeBBTestTCG2Protocol (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EfiInitializeTestLib (ImageHandle, SystemTable);
+
+ //
+ // initialize test utility lib
+ //
+ SctInitializeLib (ImageHandle, SystemTable);
+
+ return EfiInitAndInstallBBTestInterface (
+ &ImageHandle,
+ &gBBTestProtocolField,
+ gBBTestEntryField,
+ BBTestTCG2ProtocolUnload,
+ &gBBTestProtocolInterface
+ );
+}
+
+/**
+ * The driver's Unload function
+ * @param ImageHandle The test driver image handle
+ * @return EFI_SUCCESS Indicates the interface was Uninstalled
+*/
+EFI_STATUS
+EFIAPI
+BBTestTCG2ProtocolUnload (
+ IN EFI_HANDLE ImageHandle
+ )
+{
+ return EfiUninstallAndFreeBBTestInterface (
+ ImageHandle,
+ gBBTestProtocolInterface
+ );
+}
diff --git a/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc b/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc
index 5b3e5307e8f1..3d3e9704e8db 100644
--- a/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc
+++ b/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc
@@ -288,6 +288,7 @@ SctPkg/TestCase/UEFI/EFI/Protocol/StorageSecurityCommand/BlackBoxTest/StorageSec
SctPkg/TestCase/UEFI/EFI/Protocol/AdapterInfo/BlackBoxTest/AdapterInfoProtocolBBTest.inf
SctPkg/TestCase/UEFI/EFI/Protocol/TimeStamp/BlackBoxTest/TimeStampProtocolBBTest.inf
SctPkg/TestCase/UEFI/EFI/Protocol/RandomNumber/BlackBoxTest/RandomNumberBBTest.inf
+SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTest.inf

SctPkg/TestCase/UEFI/EFI/Protocol/Hash2/BlackBoxTest/Hash2BBTest.inf
SctPkg/TestCase/UEFI/EFI/Protocol/PKCS7Verify/BlackBoxTest/Pkcs7BBTest.inf
--
2.17.1

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