Date   

[PATCH v2 2/5] ShellPkg: add a helper function for getting a new file name

Joey Gouly
 

From: Marc Moisson-Franckhauser <marc.moisson-franckhauser@...>

Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)

This new helper will not overwrite existing files, by appending a number
to the end of the filename.

Signed-off-by: Joey Gouly <joey.gouly@...>
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h | 25 +++++-
ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.c | 80 ++++++++++++++++----
2 files changed, 91 insertions(+), 14 deletions(-)

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h
index d5b95f5ee707de18be1879b3cd235d6c5db11d9f..ae8a67b7681033d66d068341ae489ded67de8b44 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h
@@ -1,12 +1,13 @@
/** @file
Header file for AcpiView

- Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+ Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/

#ifndef ACPIVIEW_H_
#define ACPIVIEW_H_
+#include <Library/ShellLib.h>

/**
A macro to define the max file name length
@@ -23,6 +24,28 @@
**/
#define RSDP_LENGTH_OFFSET 20

+/**
+ This function finds a filename not already used by adding a number in between
+ the BaseFileName and the extension.
+
+ Make sure the buffer FileName is big enough before calling the function. A
+ size of MAX_FILE_NAME_LEN is recommended.
+
+ @param [in] BaseFileName Start of the desired file name.
+ @param [in] Extension Extension of the desired file name
+ (without '.').
+ @param [in, out] FileName Preallocated buffer for the returned file
+ name.
+ @param [in] FileNameBufferLen Size of FileName buffer..
+**/
+EFI_STATUS
+GetNewFileName (
+ IN CONST CHAR16* BaseFileName,
+ IN CONST CHAR16* Extension,
+ IN OUT CHAR16* FileName,
+ IN UINT32 FileNameBufferLen
+ );
+
/**
This function resets the ACPI table error counter to Zero.
**/
diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.c
index a4242ba9d99b05d07c829520c4011439445aadb0..db7b2e2a30525cc85a333b93f5eb97ec3a517b37 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.c
@@ -27,8 +27,55 @@
#include "Arm/SbbrValidator.h"
#endif

-STATIC UINT32 mTableCount;
-STATIC UINT32 mBinTableCount;
+STATIC UINT32 mTableCount;
+
+/**
+ This function finds a filename not already used by adding a number in between
+ The BaseFileName and the extension.
+
+ Make sure the buffer FileName is big enough before calling the function. A
+ size of MAX_FILE_NAME_LEN is recommended.
+
+ @param [in] BaseFileName Start of the desired file name.
+ @param [in] Extension Extension of the desired file name
+ (without '.').
+ @param [in, out] FileName Preallocated buffer for the returned file
+ name.
+ @param [in] FileNameBufferLen Size of FileName buffer..
+**/
+EFI_STATUS
+GetNewFileName (
+ IN CONST CHAR16* BaseFileName,
+ IN CONST CHAR16* Extension,
+ IN OUT CHAR16* FileName,
+ IN UINT32 FileNameBufferLen
+ )
+{
+ UINT16 Index;
+ EFI_STATUS Status;
+ SHELL_FILE_HANDLE tmpFileHandle;
+ for (Index = 0; Index <= 99; Index++) {
+ UnicodeSPrint(
+ FileName,
+ FileNameBufferLen,
+ L"%s%02d.%s",
+ BaseFileName,
+ Index,
+ Extension
+ );
+ Status = ShellOpenFileByName (
+ FileName,
+ &tmpFileHandle,
+ EFI_FILE_MODE_READ,
+ 0
+ );
+ if (Status == EFI_NOT_FOUND) {
+ return EFI_SUCCESS;
+ }
+ ShellCloseFile (&tmpFileHandle);
+ }
+ return EFI_OUT_OF_RESOURCES;
+}

/**
This function dumps the ACPI table to a file.
@@ -46,19 +93,27 @@ DumpAcpiTableToFile (
IN CONST UINTN Length
)
{
- CHAR16 FileNameBuffer[MAX_FILE_NAME_LEN];
- UINTN TransferBytes;
- SELECTED_ACPI_TABLE *SelectedTable;
+ CHAR16 FileNameBuffer[MAX_FILE_NAME_LEN];
+ UINTN TransferBytes;
+ EFI_STATUS Status;
+ SELECTED_ACPI_TABLE* SelectedTable;

GetSelectedAcpiTable (&SelectedTable);

- UnicodeSPrint (
- FileNameBuffer,
- sizeof (FileNameBuffer),
- L".\\%s%04d.bin",
- SelectedTable->Name,
- mBinTableCount++
- );
+ Status = GetNewFileName (
+ SelectedTable->Name,
+ L"bin",
+ FileNameBuffer,
+ sizeof (FileNameBuffer)
+ );
+ if (EFI_ERROR (Status)) {
+ Print (
+ L"Error: Could not open bin file for %s table:\n"
+ L"Could not get a file name.",
+ SelectedTable->Name
+ );
+ return FALSE;
+ }

Print (L"Dumping ACPI table to : %s ... ", FileNameBuffer);

@@ -207,7 +262,6 @@ AcpiView (

// Reset Table counts
mTableCount = 0;
- mBinTableCount = 0;

// Reset The error/warning counters
ResetErrorCount ();
--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")


[PATCH v2 4/5] ShellPkg: add dot file generator functions

Joey Gouly
 

From: Marc Moisson-Franckhauser <marc.moisson-franckhauser@...>

Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)

These can be used to generate dot files, that can be used to visualise
graphs in tables, such as PPTT.

Signed-off-by: Joey Gouly <joey.gouly@...>
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf | 4 +-
ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.h | 101 +++++++
ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.c | 283 ++++++++++++++++++++
3 files changed, 387 insertions(+), 1 deletion(-)

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf b/ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
index 63fc5a1281a894841dac704484c3d4f9481edb46..ffe4979b3ac5d0120bcf678cf7823afac6674e4f 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
@@ -1,7 +1,7 @@
## @file
# Provides Shell 'acpiview' command functions
#
-# Copyright (c) 2016 - 2020, Arm Limited. All rights reserved.<BR>
+# Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -27,6 +27,8 @@ [Sources.common]
AcpiView.h
AcpiViewConfig.c
AcpiViewConfig.h
+ DotGenerator.c
+ DotGenerator.h
Parsers/Aest/AestParser.c
Parsers/Bgrt/BgrtParser.c
Parsers/Dbg2/Dbg2Parser.c
diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.h b/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.h
new file mode 100644
index 0000000000000000000000000000000000000000..8e196eee75417c0a422023c00b043441076ac599
--- /dev/null
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.h
@@ -0,0 +1,101 @@
+/** @file
+ Header file for Dot File Generation
+
+ Copyright (c) 2021, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef DOT_GENERATOR_H_
+#define DOT_GENERATOR_H_
+
+#include <Protocol/Shell.h>
+
+#define DOT_COLOR_MASK 0b111
+// Flags for color of arrow or node.
+#define DOT_COLOR_BLACK 0b000 // default
+#define DOT_COLOR_GRAY 0b001
+#define DOT_COLOR_BLUE 0b010
+#define DOT_COLOR_YELLOW 0b011
+#define DOT_COLOR_RED 0b100
+
+#define DOT_ARROW_TYPE_MASK 0b1000
+// Flags for style of arrow.
+#define DOT_ARROW_FULL 0b0000 // default
+#define DOT_ARROW_DOTTED 0b1000
+
+// Flag for reversing how the nodes will be ranked and displayed.
+#define DOT_ARROW_RANK_REVERSE 0b10000
+
+#define DOT_BOX_TYPE_MASK 0b1100000
+// Flag for shape of box
+#define DOT_BOX_SQUARE 0b0000000 // default
+#define DOT_BOX_DIAMOND 0b0100000
+
+// Flag for adding the node's ID to the end of the label.
+#define DOT_BOX_ADD_ID_TO_LABEL 0b10000000
+
+// Valid flags for DotAddNode.
+#define DOT_BOX_FLAGS_MASK (DOT_COLOR_MASK |\
+ DOT_BOX_TYPE_MASK |\
+ DOT_BOX_ADD_ID_TO_LABEL)
+// Valid flags for DotAddLink.
+#define DOT_ARROW_FLAGS_MASK (DOT_COLOR_MASK |\
+ DOT_ARROW_TYPE_MASK |\
+ DOT_ARROW_RANK_REVERSE)
+
+
+/**
+ Opens a new dot file and writes a dot directional graph.
+
+ @param [in] FileName Null terminated unicode string.
+**/
+SHELL_FILE_HANDLE
+DotOpenNewFile (
+ IN CHAR16* FileName
+ );
+
+/**
+ Writes a dot graph footer and closes the dot file.
+
+ @param [in] DotFileHandle The handle of the dot file.
+**/
+VOID
+DotCloseFile (
+ SHELL_FILE_HANDLE DotFileHandle
+ );
+
+/**
+ Writes a line in the previously opened dot file describing a
+ new node.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] Id A unique identifier for the node.
+ @param [in] Flags Flags describing the node's characteristics.
+ @param [in] Label Label to be shown on the graph node.
+**/
+VOID
+DotAddNode (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN UINT32 Id,
+ IN UINT16 Flags,
+ IN CONST CHAR16* Label
+ );
+
+/**
+ Writes a line in the previously opened dot file describing a
+ new link between two nodes.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] IdSource An identifier for the source node of the link.
+ @param [in] IdTarget An identifier for the target node of the link.
+ @param [in] Flags Flags describing the node's characteristics.
+**/
+VOID
+DotAddLink (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN UINT32 IdSource,
+ IN UINT32 IdTarget,
+ IN UINT16 Flags
+ );
+
+#endif // DOT_GENERATOR_H_
diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.c
new file mode 100644
index 0000000000000000000000000000000000000000..e19b17537ca85babca5cda38025ae95701ff794f
--- /dev/null
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/DotGenerator.c
@@ -0,0 +1,283 @@
+/** @file
+ Dot File Generator
+
+ Copyright (c) 2021, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/UefiLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PrintLib.h>
+#include "DotGenerator.h"
+#include "AcpiView.h"
+
+#define MAX_DOT_BUFFER_SIZE 128
+
+/**
+ Writes a Null terminated ASCII string to the dot file handle.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] String Null terminated ascii string.
+**/
+STATIC
+VOID
+DotWriteFile (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN CHAR8* String
+ )
+{
+ UINTN TransferBytes;
+ EFI_STATUS Status;
+
+ if (DotFileHandle == NULL) {
+ Print (L"ERROR: Failed to write to dot file\n");
+ ASSERT (0);
+ return;
+ }
+
+ TransferBytes = AsciiStrLen (String);
+ Status = ShellWriteFile (
+ DotFileHandle,
+ &TransferBytes,
+ String
+ );
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (AsciiStrLen (String) == TransferBytes);
+}
+
+/**
+ Writes a new parameter to a previously started parameter list.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] Name Null terminated string of the parameter's name.
+ @param [in] Value Null terminated string of the parameter's value.
+ @param [in] Quoted True if value needs to be quoted.
+**/
+STATIC
+VOID
+DotAddParameter (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN CHAR16* Name,
+ IN CHAR16* Value,
+ IN BOOLEAN Quoted
+ )
+{
+ CHAR8 StringBuffer[MAX_DOT_BUFFER_SIZE];
+
+ ASSERT(DotFileHandle != NULL);
+
+ if (Quoted) {
+ AsciiSPrint (
+ StringBuffer,
+ sizeof (StringBuffer),
+ "[%s=\"%s\"]",
+ Name,
+ Value
+ );
+ } else {
+ AsciiSPrint (
+ StringBuffer,
+ sizeof (StringBuffer),
+ "[%s=%s]",
+ Name,
+ Value
+ );
+ }
+
+ DotWriteFile (DotFileHandle, StringBuffer);
+}
+
+/**
+ Writes the color argument of nodes or links according to flags.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] Flags Flags describing the color (one of DOT_COLOR_...)
+**/
+STATIC
+VOID
+WriteColor (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN UINT16 Flags
+ )
+{
+ ASSERT(DotFileHandle != NULL);
+
+ switch (Flags & DOT_COLOR_MASK) {
+ case DOT_COLOR_GRAY:
+ DotAddParameter (DotFileHandle, L"color", L"gray", FALSE);
+ break;
+ case DOT_COLOR_YELLOW:
+ DotAddParameter (DotFileHandle, L"color", L"yellow", FALSE);
+ break;
+ case DOT_COLOR_BLUE:
+ DotAddParameter (DotFileHandle, L"color", L"blue", FALSE);
+ break;
+ case DOT_COLOR_RED:
+ DotAddParameter (DotFileHandle, L"color", L"red", FALSE);
+ break;
+ case DOT_COLOR_BLACK:
+ default:
+ DotAddParameter (DotFileHandle, L"color", L"black", FALSE);
+ break;
+ }
+}
+
+/**
+ Opens a new dot file and writes a dot directional graph.
+
+ @param [in] FileName Null terminated unicode string.
+**/
+SHELL_FILE_HANDLE
+DotOpenNewFile (
+ IN CHAR16* FileName
+ )
+{
+ SHELL_FILE_HANDLE DotFileHandle;
+ EFI_STATUS Status;
+
+ Status = ShellOpenFileByName (
+ FileName,
+ &DotFileHandle,
+ EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE,
+ 0
+ );
+ if (EFI_ERROR (Status)) {
+ Print (L"ERROR: Couldn't open dot file");
+ return NULL;//Status;
+ }
+ Print (L"Creating DOT Graph in : %s... ", FileName);
+ DotWriteFile (DotFileHandle, "digraph {\n\trankdir=BT\n");
+ return DotFileHandle;
+}
+
+/**
+ Writes a dot graph footer and closes the dot file.
+
+ @param [in] DotFileHandle The handle of the dot file.
+**/
+VOID
+DotCloseFile (
+ SHELL_FILE_HANDLE DotFileHandle
+ )
+{
+ ASSERT(DotFileHandle != NULL);
+
+ DotWriteFile (DotFileHandle, "}\n");
+ ShellCloseFile (&DotFileHandle);
+ Print (L"Done.\n");
+}
+
+/**
+ Writes a line in the previously opened dot file describing a
+ new node.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] Id A unique identifier for the node.
+ @param [in] Flags Flags describing the node's characteristics.
+ @param [in] Label Label to be shown on the graph node.
+**/
+VOID
+DotAddNode (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN UINT32 Id,
+ IN UINT16 Flags,
+ IN CONST CHAR16* Label
+ )
+{
+ CHAR8 LineBuffer[64];
+ CHAR16 LabelBuffer[MAX_DOT_BUFFER_SIZE];
+
+ ASSERT ((Flags & ~DOT_BOX_FLAGS_MASK) == 0);
+ ASSERT(DotFileHandle != NULL);
+
+ AsciiSPrint (
+ LineBuffer,
+ sizeof (LineBuffer),
+ "\tx%x",
+ Id
+ );
+ DotWriteFile (DotFileHandle, LineBuffer);
+
+ switch (Flags & DOT_BOX_TYPE_MASK) {
+ case DOT_BOX_DIAMOND:
+ DotAddParameter (DotFileHandle, L"shape", L"diamond", FALSE);
+ break;
+ case DOT_BOX_SQUARE:
+ default:
+ DotAddParameter (DotFileHandle, L"shape", L"box", FALSE);
+ break;
+ }
+
+ if (Label != NULL) {
+ if ((Flags & DOT_BOX_ADD_ID_TO_LABEL) != 0) {
+ UnicodeSPrint (
+ LabelBuffer,
+ sizeof (LabelBuffer),
+ L"%s\\n0x%x",
+ Label,
+ Id
+ );
+ } else {
+ UnicodeSPrint (
+ LabelBuffer,
+ sizeof (LabelBuffer),
+ L"%s",
+ Label
+ );
+ }
+ DotAddParameter (DotFileHandle, L"label", LabelBuffer, TRUE);
+ }
+
+ WriteColor (DotFileHandle, Flags);
+ DotWriteFile (DotFileHandle, "\n");
+}
+
+/**
+ Writes a line in the previously opened dot file describing a
+ new link between two nodes.
+
+ @param [in] DotFileHandle The handle of the dot file.
+ @param [in] IdSource An identifier for the source node of the link.
+ @param [in] IdTarget An identifier for the target node of the link.
+ @param [in] Flags Flags describing the node's characteristics.
+**/
+VOID
+DotAddLink (
+ SHELL_FILE_HANDLE DotFileHandle,
+ IN UINT32 IdSource,
+ IN UINT32 IdTarget,
+ IN UINT16 Flags
+ )
+{
+ CHAR8 LineBuffer[64];
+
+ ASSERT(DotFileHandle != NULL);
+ ASSERT ((Flags & ~DOT_ARROW_FLAGS_MASK) == 0);
+
+ AsciiSPrint (
+ LineBuffer,
+ sizeof (LineBuffer),
+ "\tx%x -> x%x",
+ IdSource,
+ IdTarget
+ );
+ DotWriteFile (DotFileHandle, LineBuffer);
+
+ if ((Flags & DOT_ARROW_RANK_REVERSE) != 0) {
+ DotAddParameter (DotFileHandle, L"dir", L"back", FALSE);
+ }
+
+ switch (Flags & DOT_ARROW_TYPE_MASK) {
+ case DOT_ARROW_DOTTED:
+ DotAddParameter (DotFileHandle, L"style", L"dotted", FALSE);
+ break;
+ case DOT_ARROW_FULL:
+ default:
+ DotAddParameter (DotFileHandle, L"style", L"solid", FALSE);
+ break;
+ }
+
+ WriteColor (DotFileHandle, Flags);
+ DotWriteFile (DotFileHandle, "\n");
+}
--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")


Re: [PATCH v2] UefiCpuPkg: SecCoreNative without ResetVector

Marvin Häuser <mhaeuser@...>
 

This will also help with PE file alignment in FD, as SecCore no longer needs to be pinned to the very top. Thank you!

Best regards,
Marvin

On 16/09/2021 16:26, Ashraf Ali S wrote:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3492

Currently SecCore.inf having the resetvector code under IA32. if the
user wants to use both SecCore and UefiCpuPkg ResetVector it's not
possible, since SecCore and ResetVector(VTF0.INF/ResetVector.inf)
are sharing the same GUID which is BFV. to overcome this issue we can
create the Duplicate version of the SecCore.inf as SecCoreNative.inf
which contains pure SecCore Native functionality without resetvector.
SecCoreNative.inf should have the Unique GUID so that it can be used
along with UefiCpuPkg ResetVector in there implementation.

Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Debkumar De <debkumar.de@...>
Cc: Harry Han <harry.han@...>
Cc: Catharine West <catharine.west@...>
Cc: Digant H Solanki <digant.h.solanki@...>
Cc: Sangeetha V <sangeetha.v@...>

Signed-off-by: Ashraf Ali S <ashraf.ali.s@...>
---
UefiCpuPkg/SecCore/SecCoreNative.inf | 80 ++++++++++++++++++++++++++++
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
2 files changed, 81 insertions(+)
create mode 100644 UefiCpuPkg/SecCore/SecCoreNative.inf

diff --git a/UefiCpuPkg/SecCore/SecCoreNative.inf b/UefiCpuPkg/SecCore/SecCoreNative.inf
new file mode 100644
index 0000000000..b528c59879
--- /dev/null
+++ b/UefiCpuPkg/SecCore/SecCoreNative.inf
@@ -0,0 +1,80 @@
+## @file
+# SecCoreNative module that implements the SEC phase.
+#
+# This is the first module taking control after the reset vector.
+# The entry point function is _ModuleEntryPoint in PlatformSecLib.
+# The entry point function starts in 32bit protected mode or 64bit
+# mode depending on how resetvector is implemented, enables
+# temporary memory and calls into SecStartup().
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SecCoreNative
+ MODULE_UNI_FILE = SecCore.uni
+ FILE_GUID = 43CA74CA-7D29-49A0-B3B9-20F84015B27D
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 EBC
+#
+
+[Sources]
+ SecMain.c
+ SecMain.h
+ FindPeiCore.c
+ SecBist.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ PlatformSecLib
+ PcdLib
+ DebugAgentLib
+ UefiCpuLib
+ PeCoffGetEntryPointLib
+ PeCoffExtraActionLib
+ CpuExceptionHandlerLib
+ ReportStatusCodeLib
+ PeiServicesLib
+ PeiServicesTablePointerLib
+ HobLib
+
+[Ppis]
+ ## SOMETIMES_CONSUMES
+ ## PRODUCES
+ gEfiSecPlatformInformationPpiGuid
+ ## SOMETIMES_CONSUMES
+ ## SOMETIMES_PRODUCES
+ gEfiSecPlatformInformation2PpiGuid
+ gEfiTemporaryRamDonePpiGuid ## PRODUCES
+ ## NOTIFY
+ ## SOMETIMES_CONSUMES
+ gPeiSecPerformancePpiGuid
+ gEfiPeiCoreFvLocationPpiGuid
+ ## CONSUMES
+ gRepublishSecPpiPpiGuid
+
+[Guids]
+ ## SOMETIMES_PRODUCES ## HOB
+ gEfiFirmwarePerformanceGuid
+
+[Pcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMigrateTemporaryRamFirmwareVolumes ## CONSUMES
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ SecCoreExtra.uni
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 699c91626b..870b452840 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -161,6 +161,7 @@
UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
UefiCpuPkg/SecCore/SecCore.inf
+ UefiCpuPkg/SecCore/SecCoreNative.inf
UefiCpuPkg/SecMigrationPei/SecMigrationPei.inf
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {


[PATCH v2] UefiCpuPkg: SecCoreNative without ResetVector

Ashraf Ali S
 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3492

Currently SecCore.inf having the resetvector code under IA32. if the
user wants to use both SecCore and UefiCpuPkg ResetVector it's not
possible, since SecCore and ResetVector(VTF0.INF/ResetVector.inf)
are sharing the same GUID which is BFV. to overcome this issue we can
create the Duplicate version of the SecCore.inf as SecCoreNative.inf
which contains pure SecCore Native functionality without resetvector.
SecCoreNative.inf should have the Unique GUID so that it can be used
along with UefiCpuPkg ResetVector in there implementation.

Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Debkumar De <debkumar.de@...>
Cc: Harry Han <harry.han@...>
Cc: Catharine West <catharine.west@...>
Cc: Digant H Solanki <digant.h.solanki@...>
Cc: Sangeetha V <sangeetha.v@...>

Signed-off-by: Ashraf Ali S <ashraf.ali.s@...>
---
UefiCpuPkg/SecCore/SecCoreNative.inf | 80 ++++++++++++++++++++++++++++
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
2 files changed, 81 insertions(+)
create mode 100644 UefiCpuPkg/SecCore/SecCoreNative.inf

diff --git a/UefiCpuPkg/SecCore/SecCoreNative.inf b/UefiCpuPkg/SecCore/SecCoreNative.inf
new file mode 100644
index 0000000000..b528c59879
--- /dev/null
+++ b/UefiCpuPkg/SecCore/SecCoreNative.inf
@@ -0,0 +1,80 @@
+## @file
+# SecCoreNative module that implements the SEC phase.
+#
+# This is the first module taking control after the reset vector.
+# The entry point function is _ModuleEntryPoint in PlatformSecLib.
+# The entry point function starts in 32bit protected mode or 64bit
+# mode depending on how resetvector is implemented, enables
+# temporary memory and calls into SecStartup().
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SecCoreNative
+ MODULE_UNI_FILE = SecCore.uni
+ FILE_GUID = 43CA74CA-7D29-49A0-B3B9-20F84015B27D
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 EBC
+#
+
+[Sources]
+ SecMain.c
+ SecMain.h
+ FindPeiCore.c
+ SecBist.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ PlatformSecLib
+ PcdLib
+ DebugAgentLib
+ UefiCpuLib
+ PeCoffGetEntryPointLib
+ PeCoffExtraActionLib
+ CpuExceptionHandlerLib
+ ReportStatusCodeLib
+ PeiServicesLib
+ PeiServicesTablePointerLib
+ HobLib
+
+[Ppis]
+ ## SOMETIMES_CONSUMES
+ ## PRODUCES
+ gEfiSecPlatformInformationPpiGuid
+ ## SOMETIMES_CONSUMES
+ ## SOMETIMES_PRODUCES
+ gEfiSecPlatformInformation2PpiGuid
+ gEfiTemporaryRamDonePpiGuid ## PRODUCES
+ ## NOTIFY
+ ## SOMETIMES_CONSUMES
+ gPeiSecPerformancePpiGuid
+ gEfiPeiCoreFvLocationPpiGuid
+ ## CONSUMES
+ gRepublishSecPpiPpiGuid
+
+[Guids]
+ ## SOMETIMES_PRODUCES ## HOB
+ gEfiFirmwarePerformanceGuid
+
+[Pcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMigrateTemporaryRamFirmwareVolumes ## CONSUMES
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ SecCoreExtra.uni
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 699c91626b..870b452840 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -161,6 +161,7 @@
UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
UefiCpuPkg/SecCore/SecCore.inf
+ UefiCpuPkg/SecCore/SecCoreNative.inf
UefiCpuPkg/SecMigrationPei/SecMigrationPei.inf
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
--
2.30.2.windows.1


Cancelled Event: TianoCore Design Meeting - APAC/NAMO - Friday, September 17, 2021 #cal-cancelled

devel@edk2.groups.io Calendar <noreply@...>
 

Cancelled: TianoCore Design Meeting - APAC/NAMO

This event has been cancelled.

When:
Friday, September 17, 2021
9:30am to 10:30am
(UTC+08:00) Asia/Shanghai

Where:
Microsoft Teams

Organizer: Ray Ni ray.ni@...

Description:

TOPIC

  1. NA

For more info, see here: https://www.tianocore.org/design-meeting/


Microsoft Teams meeting

Join on your computer or mobile app

Click here to join the meeting

Join with a video conferencing device

teams@...

Video Conference ID: 119 715 416 0

Alternate VTC dialing instructions

Learn More | Meeting options


Re: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ashraf Ali S
 

Hi., Ray

We cannot add ResetVector1G.inf in the DSC file since FILE_GUID should be the VTF GUID.
So it's better to be added in the YAML file as we were doing for FixupVtf/Vtf.inf.

Regards,
Ashraf Ali S
Intel Technology India Pvt. Ltd.

-----Original Message-----
From: Ni, Ray <ray.ni@...>
Sent: Thursday, September 16, 2021 6:10 PM
To: S, Ashraf Ali <ashraf.ali.s@...>; devel@edk2.groups.io
Cc: Kumar, Rahul1 <rahul1.kumar@...>; De, Debkumar <debkumar.de@...>; Han, Harry <harry.han@...>; West, Catharine <catharine.west@...>; V, Sangeetha <sangeetha.v@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dureja, Sahil <sahil.dureja@...>
Subject: RE: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Reviewed-by: Ray Ni <ray.ni@...>

-----Original Message-----
From: S, Ashraf Ali <ashraf.ali.s@...>
Sent: Thursday, September 16, 2021 8:07 PM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali <ashraf.ali.s@...>; Ni, Ray <ray.ni@...>; Kumar, Rahul1 <rahul1.kumar@...>; De, Debkumar <debkumar.de@...>; Han, Harry <harry.han@...>; West, Catharine <catharine.west@...>; V, Sangeetha <sangeetha.v@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dureja, Sahil <sahil.dureja@...>
Subject: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Debkumar De <debkumar.de@...>
Cc: Harry Han <harry.han@...>
Cc: Catharine West <catharine.west@...>
Cc: Sangeetha V <sangeetha.v@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Sahil Dureja <sahil.dureja@...>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@...>
---
.../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Bin/X64/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M}/ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../{ => X64/PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../PageTable2M}/ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
UefiCpuPkg/ResetVector/Vtf0/Build.py | 101 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/PageTables1G.asm | 53 +++++++++
.../X64/{PageTables.asm => PageTables2M.asm} | 14 +--
UefiCpuPkg/UefiCpuPkg.ci.yaml | 3 +-
21 files changed, 187 insertions(+), 49 deletions(-)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.serial.raw (56%)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables.asm => PageTables2M.asm} (74%)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..79b23c047bdc6e552d77d5c9e9aeae21ff04d91d
GIT binary patch
literal 484
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literal 0
HcmV?d00001

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
new file mode 100644
index 0000000000000000000000000000000000000000..ce7faa502b858e99908bcdb397b776258205e1d5
GIT binary patch
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literal 0
HcmV?d00001

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..6503a988abdac06f9aa88f0a65f2525e12233b0a
GIT binary patch
literal 868
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
deleted file mode 100644
index 2c6ff655ded2a5855ca8f4428d559a7727eb6983..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
deleted file mode 100644
index e34780a3a2c9b22bd10a1d5a405e344faaff94f3..0000000000000000000000000000000000000000
GIT binary patch
literal 0
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
deleted file mode 100644
index 6dfa68eabb48a44bc50a0b7fe678f80b5cdadfd5..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..47ac07798b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|IA32/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|X64/PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..75705cd344
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|IA32/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|X64/PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
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index 0000000000000000000000000000000000000000..279ba03b0c01f552a0d3ed8900e06b91f2555901
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
new file mode 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..3f1d5cd2c8 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#

-import glob
import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+ALL_RAW_FORMAT = '*' + FILE_FORMAT
+IA32 = 'IA32'
+X64 = 'X64'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
- #print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+# Check for all raw binaries and delete them
+for root, dirs, files in os.walk('Bin'):
+ for file in files:
+ if file.endswith(FILE_FORMAT):
+ os.remove(os.path.join(root, file))

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ if arch.lower() == X64.lower():
+ directory = os.path.join('Bin', X64, pageTable)
+ else:
+ directory = os.path.join('Bin', IA32)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.makedirs(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..bdea1fb875 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/PageTables1G.asm"
+ %else
+ %include "X64/PageTables2M.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index e32facd76e..6e0ab95fd8 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -48,7 +48,8 @@
"DscPath": "UefiCpuPkg.dsc",
"IgnoreInf": [
"UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf",
- "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf"
+ "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf",
+ "UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf"
]
},
"HostUnitTestDscCompleteCheck": {
--
2.30.2.windows.1


Re: [PATCH v2 1/2] UefiCpuPkg: Refactor initialization of CPU features during S3 resume

Ni, Ray
 

Reviewed-by: Ray Ni <ray.ni@...>

I merged the patch with the "#ifndef .." removed.

-----Original Message-----
From: Lou, Yun <yun.lou@...>
Sent: Thursday, September 16, 2021 5:27 PM
To: devel@edk2.groups.io
Cc: Lou, Yun <yun.lou@...>; Ni, Ray <ray.ni@...>; Dong, Eric <eric.dong@...>; Laszlo Ersek
<lersek@...>; Kumar, Rahul1 <rahul1.kumar@...>
Subject: [PATCH v2 1/2] UefiCpuPkg: Refactor initialization of CPU features during S3 resume

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631

Refactor initialization of CPU features during S3 resume.

In addition, the macro ACPI_CPU_DATA_STRUCTURE_UPDATE is used to fix
incompatibility issue caused by ACPI_CPU_DATA structure update. It will
be removed after all the platform code uses new ACPI_CPU_DATA structure.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
OvmfPkg/CpuS3DataDxe/CpuS3Data.c | 7 +-
UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 7 +-
UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 12 +-
UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 18 +--
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 160 +++++++++++---------
UefiCpuPkg/Include/AcpiCpuData.h | 91 ++++++-----
6 files changed, 167 insertions(+), 128 deletions(-)

diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c
index 5ffe1f3cd7..de20d87567 100644
--- a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c
+++ b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c
@@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not
support hot plug CPUs. This module can be copied into a CPU specific package

and customized if these additional features are required.



-Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2015 - 2020, Red Hat, Inc.



SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -252,10 +252,7 @@ CpuS3DataInitialize (
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;



if (OldAcpiCpuData != NULL) {

- AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable;

- AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;

- AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;

- CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));

+ CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof
(CPU_FEATURE_INIT_DATA));

}



//

diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
index 078af36cfb..61ec7c44b2 100644
--- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
+++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
@@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not
support hot plug CPUs. This module can be copied into a CPU specific package

and customized if these additional features are required.



-Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>

Copyright (c) 2015, Red Hat, Inc.



SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -247,10 +247,7 @@ CpuS3DataInitialize (
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;



if (OldAcpiCpuData != NULL) {

- AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable;

- AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;

- AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;

- CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));

+ CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof
(CPU_FEATURE_INIT_DATA));

}



//

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index 57511c4efa..6e2ab79518 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -1,7 +1,7 @@
/** @file

CPU Features Initialize functions.



- Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>

+ Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent



**/

@@ -152,10 +152,10 @@ CpuInitDataInitialize (
ASSERT (AcpiCpuData != NULL);

CpuFeaturesData->AcpiCpuData= AcpiCpuData;



- CpuStatus = &AcpiCpuData->CpuStatus;

+ CpuStatus = &AcpiCpuData->CpuFeatureInitData.CpuStatus;

Location = AllocateZeroPool (sizeof (EFI_CPU_PHYSICAL_LOCATION) * NumberOfCpus);

ASSERT (Location != NULL);

- AcpiCpuData->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location;

+ AcpiCpuData->CpuFeatureInitData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location;



for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {

InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];

@@ -1131,7 +1131,7 @@ SetProcessorRegister (
CpuFeaturesData = (CPU_FEATURES_DATA *) Buffer;

AcpiCpuData = CpuFeaturesData->AcpiCpuData;



- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable;

+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->CpuFeatureInitData.RegisterTable;



InitApicId = GetInitialApicId ();

RegisterTable = NULL;

@@ -1147,8 +1147,8 @@ SetProcessorRegister (


ProgramProcessorRegister (

RegisterTable,

- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation + ProcIndex,

- &AcpiCpuData->CpuStatus,

+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->CpuFeatureInitData.ApLocation + ProcIndex,

+ &AcpiCpuData->CpuFeatureInitData.CpuStatus,

&CpuFeaturesData->CpuFlags

);

}

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
index 60daa5cc87..e6ef9c602d 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
@@ -952,8 +952,8 @@ GetAcpiCpuData (
AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;

}



- if (AcpiCpuData->RegisterTable == 0 ||

- AcpiCpuData->PreSmmInitRegisterTable == 0) {

+ if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0 ||

+ AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {

//

// Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs

//

@@ -976,11 +976,11 @@ GetAcpiCpuData (
RegisterTable[NumberOfCpus + Index].AllocatedSize = 0;

RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;

}

- if (AcpiCpuData->RegisterTable == 0) {

- AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;

+ if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0) {

+ AcpiCpuData->CpuFeatureInitData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;

}

- if (AcpiCpuData->PreSmmInitRegisterTable == 0) {

- AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);

+ if (AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {

+ AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable +
NumberOfCpus);

}

}



@@ -1063,9 +1063,9 @@ CpuRegisterTableWriteWorker (
CpuFeaturesData = GetCpuFeaturesData ();

if (CpuFeaturesData->RegisterTable == NULL) {

AcpiCpuData = GetAcpiCpuData ();

- ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->RegisterTable != 0));

- CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->RegisterTable;

- CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->PreSmmInitRegisterTable;

+ ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->CpuFeatureInitData.RegisterTable != 0));

+ CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->CpuFeatureInitData.RegisterTable;

+ CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData-
CpuFeatureInitData.PreSmmInitRegisterTable;
}



if (PreSmmFlag) {

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index ab7f39aa2b..2873cba083 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -476,16 +476,19 @@ SetRegister (
IN BOOLEAN PreSmmRegisterTable

)

{

+ CPU_FEATURE_INIT_DATA *FeatureInitData;

CPU_REGISTER_TABLE *RegisterTable;

CPU_REGISTER_TABLE *RegisterTables;

UINT32 InitApicId;

UINTN ProcIndex;

UINTN Index;



+ FeatureInitData = &mAcpiCpuData.CpuFeatureInitData;

+

if (PreSmmRegisterTable) {

- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable;

+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->PreSmmInitRegisterTable;

} else {

- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable;

+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->RegisterTable;

}

if (RegisterTables == NULL) {

return;

@@ -503,18 +506,18 @@ SetRegister (
}

ASSERT (RegisterTable != NULL);



- if (mAcpiCpuData.ApLocation != 0) {

+ if (FeatureInitData->ApLocation != 0) {

ProgramProcessorRegister (

RegisterTable,

- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)mAcpiCpuData.ApLocation + ProcIndex,

- &mAcpiCpuData.CpuStatus,

+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)FeatureInitData->ApLocation + ProcIndex,

+ &FeatureInitData->CpuStatus,

&mCpuFlags

);

} else {

ProgramProcessorRegister (

RegisterTable,

NULL,

- &mAcpiCpuData.CpuStatus,

+ &FeatureInitData->CpuStatus,

&mCpuFlags

);

}

@@ -1010,6 +1013,71 @@ IsRegisterTableEmpty (
return TRUE;

}



+/**

+ Copy the data used to initialize processor register into SMRAM.

+

+ @param[in,out] CpuFeatureInitDataDst Pointer to the destination CPU_FEATURE_INIT_DATA structure.

+ @param[in] CpuFeatureInitDataSrc Pointer to the source CPU_FEATURE_INIT_DATA structure.

+

+**/

+VOID

+CopyCpuFeatureInitDatatoSmram (

+ IN OUT CPU_FEATURE_INIT_DATA *CpuFeatureInitDataDst,

+ IN CPU_FEATURE_INIT_DATA *CpuFeatureInitDataSrc

+ )

+{

+ CPU_STATUS_INFORMATION *CpuStatus;

+

+ if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable,
mAcpiCpuData.NumberOfCpus)) {

+ CpuFeatureInitDataDst->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool
(mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));

+ ASSERT (CpuFeatureInitDataDst->PreSmmInitRegisterTable != 0);

+

+ CopyRegisterTable (

+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->PreSmmInitRegisterTable,

+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable,

+ mAcpiCpuData.NumberOfCpus

+ );

+ }

+

+ if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable,
mAcpiCpuData.NumberOfCpus)) {

+ CpuFeatureInitDataDst->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus *
sizeof (CPU_REGISTER_TABLE));

+ ASSERT (CpuFeatureInitDataDst->RegisterTable != 0);

+

+ CopyRegisterTable (

+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->RegisterTable,

+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable,

+ mAcpiCpuData.NumberOfCpus

+ );

+ }

+

+ CpuStatus = &CpuFeatureInitDataDst->CpuStatus;

+ CopyMem (CpuStatus, &CpuFeatureInitDataSrc->CpuStatus, sizeof (CPU_STATUS_INFORMATION));

+

+ if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage != 0) {

+ CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

+ sizeof (UINT32) * CpuStatus->PackageCount,

+ (UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage

+ );

+ ASSERT (CpuStatus->ThreadCountPerPackage != 0);

+ }

+

+ if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore != 0) {

+ CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

+ sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount),

+ (UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore

+ );

+ ASSERT (CpuStatus->ThreadCountPerCore != 0);

+ }

+

+ if (CpuFeatureInitDataSrc->ApLocation != 0) {

+ CpuFeatureInitDataDst->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

+ mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),

+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)CpuFeatureInitDataSrc->ApLocation

+ );

+ ASSERT (CpuFeatureInitDataDst->ApLocation != 0);

+ }

+}

+

/**

Get ACPI CPU data.



@@ -1064,39 +1132,13 @@ GetAcpiCpuData (


CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiCpuData->IdtrProfile, sizeof (IA32_DESCRIPTOR));



- if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable,
mAcpiCpuData.NumberOfCpus)) {

- mAcpiCpuData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus *
sizeof (CPU_REGISTER_TABLE));

- ASSERT (mAcpiCpuData.PreSmmInitRegisterTable != 0);

-

- CopyRegisterTable (

- (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable,

- (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable,

- mAcpiCpuData.NumberOfCpus

- );

- } else {

- mAcpiCpuData.PreSmmInitRegisterTable = 0;

- }

-

- if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, mAcpiCpuData.NumberOfCpus)) {

- mAcpiCpuData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof
(CPU_REGISTER_TABLE));

- ASSERT (mAcpiCpuData.RegisterTable != 0);

-

- CopyRegisterTable (

- (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable,

- (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable,

- mAcpiCpuData.NumberOfCpus

- );

- } else {

- mAcpiCpuData.RegisterTable = 0;

- }

-

//

// Copy AP's GDT, IDT and Machine Check handler into SMRAM.

//

Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile;

Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;



- GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);

+ GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);

ASSERT (GdtForAp != NULL);

IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1));

MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1));

@@ -1109,41 +1151,23 @@ GetAcpiCpuData (
Idtr->Base = (UINTN)IdtForAp;

mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;



- CpuStatus = &mAcpiCpuData.CpuStatus;

- CopyMem (CpuStatus, &AcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));

- if (AcpiCpuData->CpuStatus.ThreadCountPerPackage != 0) {

- CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

- sizeof (UINT32) * CpuStatus->PackageCount,

- (UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerPackage

- );

- ASSERT (CpuStatus->ThreadCountPerPackage != 0);

- }

- if (AcpiCpuData->CpuStatus.ThreadCountPerCore != 0) {

- CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

- sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount),

- (UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerCore

- );

- ASSERT (CpuStatus->ThreadCountPerCore != 0);

- }

- if (AcpiCpuData->ApLocation != 0) {

- mAcpiCpuData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (

- mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),

- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation

- );

- ASSERT (mAcpiCpuData.ApLocation != 0);

- }

- if (CpuStatus->PackageCount != 0) {

- mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (

- sizeof (UINT32) * CpuStatus->PackageCount *

- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

- );

- ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);

- mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (

- sizeof (UINT32) * CpuStatus->PackageCount *

- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

- );

- ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);

- }

+ ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));

+ CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);

+

+ CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;

+

+ mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (

+ sizeof (UINT32) * CpuStatus->PackageCount *

+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

+ );

+ ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);

+

+ mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (

+ sizeof (UINT32) * CpuStatus->PackageCount *

+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

+ );

+ ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);

+

InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);

}



diff --git a/UefiCpuPkg/Include/AcpiCpuData.h b/UefiCpuPkg/Include/AcpiCpuData.h
index 62a01b2c6b..2fa8801d1f 100644
--- a/UefiCpuPkg/Include/AcpiCpuData.h
+++ b/UefiCpuPkg/Include/AcpiCpuData.h
@@ -1,7 +1,7 @@
/** @file

Definitions for CPU S3 data.



-Copyright (c) 2013 - 2020, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent



**/

@@ -9,6 +9,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _ACPI_CPU_DATA_H_

#define _ACPI_CPU_DATA_H_



+//

+// This macro definition is used to fix incompatibility issue caused by

+// ACPI_CPU_DATA structure update. It will be removed after all the platform

+// code uses new ACPI_CPU_DATA structure.

+//

+#ifndef ACPI_CPU_DATA_STRUCTURE_UPDATE

+#define ACPI_CPU_DATA_STRUCTURE_UPDATE

+#endif

+

//

// Register types in register table

//

@@ -118,6 +127,49 @@ typedef struct {
EFI_PHYSICAL_ADDRESS RegisterTableEntry;

} CPU_REGISTER_TABLE;



+//

+// Data structure that is used for CPU feature initialization during ACPI S3

+// resume.

+//

+typedef struct {

+ //

+ // Physical address of an array of CPU_REGISTER_TABLE structures, with

+ // NumberOfCpus entries. If a register table is not required, then the

+ // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.

+ // If TableLength is > 0, then elements of RegisterTableEntry are used to

+ // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,

+ // before SMBASE relocation is performed.

+ // If a register table is not required for any one of the CPUs, then

+ // PreSmmInitRegisterTable may be set to 0.

+ //

+ EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;

+ //

+ // Physical address of an array of CPU_REGISTER_TABLE structures, with

+ // NumberOfCpus entries. If a register table is not required, then the

+ // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.

+ // If TableLength is > 0, then elements of RegisterTableEntry are used to

+ // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,

+ // after SMBASE relocation is performed.

+ // If a register table is not required for any one of the CPUs, then

+ // RegisterTable may be set to 0.

+ //

+ EFI_PHYSICAL_ADDRESS RegisterTable;

+ //

+ // CPU information which is required when set the register table.

+ //

+ CPU_STATUS_INFORMATION CpuStatus;

+ //

+ // Location info for each AP.

+ // It points to an array which saves all APs location info.

+ // The array count is the AP count in this CPU.

+ //

+ // If the platform does not support MSR setting at S3 resume, and

+ // therefore it doesn't need the dependency semaphores, it should set

+ // this field to 0.

+ //

+ EFI_PHYSICAL_ADDRESS ApLocation;

+} CPU_FEATURE_INIT_DATA;

+

//

// Data structure that is required for ACPI S3 resume. The PCD

// PcdCpuS3DataAddress must be set to the physical address where this structure

@@ -172,28 +224,6 @@ typedef struct {
//

EFI_PHYSICAL_ADDRESS MtrrTable;

//

- // Physical address of an array of CPU_REGISTER_TABLE structures, with

- // NumberOfCpus entries. If a register table is not required, then the

- // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.

- // If TableLength is > 0, then elements of RegisterTableEntry are used to

- // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,

- // before SMBASE relocation is performed.

- // If a register table is not required for any one of the CPUs, then

- // PreSmmInitRegisterTable may be set to 0.

- //

- EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;

- //

- // Physical address of an array of CPU_REGISTER_TABLE structures, with

- // NumberOfCpus entries. If a register table is not required, then the

- // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.

- // If TableLength is > 0, then elements of RegisterTableEntry are used to

- // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,

- // after SMBASE relocation is performed.

- // If a register table is not required for any one of the CPUs, then

- // RegisterTable may be set to 0.

- //

- EFI_PHYSICAL_ADDRESS RegisterTable;

- //

// Physical address of a buffer that contains the machine check handler that

// is used during an ACPI S3 Resume. In order for this machine check

// handler to be active on an AP during an ACPI S3 resume, the machine check

@@ -208,19 +238,10 @@ typedef struct {
//

UINT32 ApMachineCheckHandlerSize;

//

- // CPU information which is required when set the register table.

- //

- CPU_STATUS_INFORMATION CpuStatus;

- //

- // Location info for each AP.

- // It points to an array which saves all APs location info.

- // The array count is the AP count in this CPU.

- //

- // If the platform does not support MSR setting at S3 resume, and

- // therefore it doesn't need the dependency semaphores, it should set

- // this field to 0.

+ // Data structure that is used for CPU feature initialization during ACPI S3

+ // resume.

//

- EFI_PHYSICAL_ADDRESS ApLocation;

+ CPU_FEATURE_INIT_DATA CpuFeatureInitData;

} ACPI_CPU_DATA;



#endif

--
2.28.0.windows.1


Re: [PATCH v2 2/2] UefiCpuPkg: Prevent from re-initializing CPU features during S3 resume

Ni, Ray
 

Reviewed-by: Ray Ni <ray.ni@...>

-----Original Message-----
From: Lou, Yun <yun.lou@...>
Sent: Thursday, September 16, 2021 5:27 PM
To: devel@edk2.groups.io
Cc: Lou, Yun <yun.lou@...>; Ni, Ray <ray.ni@...>; Dong, Eric <eric.dong@...>; Laszlo Ersek
<lersek@...>; Kumar, Rahul1 <rahul1.kumar@...>
Subject: [PATCH v2 2/2] UefiCpuPkg: Prevent from re-initializing CPU features during S3 resume

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631

Current CPU feature initialization design:
During normal boot, CpuFeaturesPei module (inside FSP) initializes the
CPU features. During S3 boot, CpuFeaturesPei module does nothing, and
CpuSmm driver (in SMRAM) initializes CPU features instead.

This code change prevents CpuSmm driver from re-initializing CPU
features during S3 resume if CpuFeaturesPei module has done the same
initialization.

In addition, EDK2 contains DxeIpl PEIM that calls S3RestoreConfig2 PPI
during S3 boot and this PPI eventually calls CpuSmm driver (in SMRAM) to
initialize the CPU features, so "EDK2 + FSP" does not have the CPU
feature initialization issue during S3 boot. But "coreboot" does not
contain DxeIpl PEIM and the issue appears, unless
"PcdCpuFeaturesInitOnS3Resume" is set to TRUE.

Signed-off-by: Jason Lou <yun.lou@...>
Cc: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Rahul Kumar <rahul1.kumar@...>
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 34 ++++++++++++--------
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 3 +-
2 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 2873cba083..2496abb392 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -1152,23 +1152,31 @@ GetAcpiCpuData (
mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;



ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));

- CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);



- CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;

+ if (!PcdGetBool (PcdCpuFeaturesInitOnS3Resume)) {

+ //

+ // If the CPU features will not be initialized by CpuFeaturesPei module during

+ // next ACPI S3 resume, copy the CPU features initialization data into SMRAM,

+ // which will be consumed in SmmRestoreCpu during next S3 resume.

+ //

+ CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);



- mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (

- sizeof (UINT32) * CpuStatus->PackageCount *

- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

- );

- ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);

+ CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;



- mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (

- sizeof (UINT32) * CpuStatus->PackageCount *

- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

- );

- ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);

+ mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (

+ sizeof (UINT32) * CpuStatus->PackageCount *

+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

+ );

+ ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);



- InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);

+ mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (

+ sizeof (UINT32) * CpuStatus->PackageCount *

+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount

+ );

+ ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);

+

+ InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);

+ }

}



/**

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
index 76b1462996..0e88071c70 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
@@ -4,7 +4,7 @@
# This SMM driver performs SMM initialization, deploy SMM Entry Vector,

# provides CPU specific services in SMM.

#

-# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>

+# Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.<BR>

# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>

#

# SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -134,6 +134,7 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable ## CONSUMES

gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode ## CONSUMES

gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmShadowStackSize ## SOMETIMES_CONSUMES

+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume ## CONSUMES

gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CONSUMES

gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ## CONSUMES

gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask ## CONSUMES

--
2.28.0.windows.1


Re: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ni, Ray
 

Wait a sec. I think you don't need to edit yaml file. You can directly include the new INF to DSC file.

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
Sent: Thursday, September 16, 2021 8:40 PM
To: S, Ashraf Ali <ashraf.ali.s@...>; devel@edk2.groups.io
Cc: Kumar, Rahul1 <rahul1.kumar@...>; De, Debkumar <debkumar.de@...>; Han, Harry <harry.han@...>; West, Catharine <catharine.west@...>; V, Sangeetha <sangeetha.v@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dureja, Sahil <sahil.dureja@...>
Subject: Re: [edk2-devel] [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Reviewed-by: Ray Ni <ray.ni@...>

-----Original Message-----
From: S, Ashraf Ali <ashraf.ali.s@...>
Sent: Thursday, September 16, 2021 8:07 PM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali <ashraf.ali.s@...>; Ni, Ray <ray.ni@...>; Kumar, Rahul1 <rahul1.kumar@...>; De, Debkumar <debkumar.de@...>; Han, Harry <harry.han@...>; West, Catharine <catharine.west@...>; V, Sangeetha <sangeetha.v@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dureja, Sahil <sahil.dureja@...>
Subject: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Debkumar De <debkumar.de@...>
Cc: Harry Han <harry.han@...>
Cc: Catharine West <catharine.west@...>
Cc: Sangeetha V <sangeetha.v@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Sahil Dureja <sahil.dureja@...>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@...>
---
.../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Bin/X64/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M}/ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../{ => X64/PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../PageTable2M}/ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
UefiCpuPkg/ResetVector/Vtf0/Build.py | 101 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/PageTables1G.asm | 53 +++++++++
.../X64/{PageTables.asm => PageTables2M.asm} | 14 +--
UefiCpuPkg/UefiCpuPkg.ci.yaml | 3 +-
21 files changed, 187 insertions(+), 49 deletions(-)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.serial.raw (56%)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables.asm => PageTables2M.asm} (74%)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..79b23c047bdc6e552d77d5c9e9aeae21ff04d91d
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
new file mode 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..6503a988abdac06f9aa88f0a65f2525e12233b0a
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
deleted file mode 100644
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GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..47ac07798b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|IA32/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|X64/PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..75705cd344
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|IA32/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|X64/PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
similarity index 56%
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
index 61c71349a8a599916f3eeae8c5dee92efb56db71..f1d6536cec924d0e167cf1ee4e9309ed5fd7ad60 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..3f1d5cd2c8 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#

-import glob
import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+ALL_RAW_FORMAT = '*' + FILE_FORMAT
+IA32 = 'IA32'
+X64 = 'X64'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
- #print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+# Check for all raw binaries and delete them
+for root, dirs, files in os.walk('Bin'):
+ for file in files:
+ if file.endswith(FILE_FORMAT):
+ os.remove(os.path.join(root, file))

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ if arch.lower() == X64.lower():
+ directory = os.path.join('Bin', X64, pageTable)
+ else:
+ directory = os.path.join('Bin', IA32)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.makedirs(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..bdea1fb875 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/PageTables1G.asm"
+ %else
+ %include "X64/PageTables2M.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index e32facd76e..6e0ab95fd8 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -48,7 +48,8 @@
"DscPath": "UefiCpuPkg.dsc",
"IgnoreInf": [
"UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf",
- "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf"
+ "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf",
+ "UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf"
]
},
"HostUnitTestDscCompleteCheck": {
--
2.30.2.windows.1


Re: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

Ni, Ray
 

Reviewed-by: Ray Ni <ray.ni@...>

-----Original Message-----
From: S, Ashraf Ali <ashraf.ali.s@...>
Sent: Thursday, September 16, 2021 8:07 PM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali <ashraf.ali.s@...>; Ni, Ray <ray.ni@...>; Kumar, Rahul1 <rahul1.kumar@...>; De, Debkumar <debkumar.de@...>; Han, Harry <harry.han@...>; West, Catharine <catharine.west@...>; V, Sangeetha <sangeetha.v@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dureja, Sahil <sahil.dureja@...>
Subject: [PATCH v7] UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Debkumar De <debkumar.de@...>
Cc: Harry Han <harry.han@...>
Cc: Catharine West <catharine.west@...>
Cc: Sangeetha V <sangeetha.v@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Cc: Sahil Dureja <sahil.dureja@...>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@...>
---
.../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 0 -> 484 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.raw | Bin 0 -> 468 bytes
.../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 0 -> 868 bytes
.../Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 516 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.ia32.raw | Bin 484 -> 0 bytes
.../Vtf0/Bin/ResetVector.ia32.serial.raw | Bin 884 -> 0 bytes
.../ResetVector/Vtf0/Bin/ResetVector.inf | 4 +-
.../ResetVector/Vtf0/Bin/ResetVector1G.inf | 31 ++++++
.../PageTable1G/ResetVector.x64.port80.raw | Bin 0 -> 12292 bytes
.../Bin/X64/PageTable1G/ResetVector.x64.raw | Bin 0 -> 12292 bytes
.../PageTable1G/ResetVector.x64.serial.raw | Bin 0 -> 12292 bytes
.../PageTable2M}/ResetVector.x64.port80.raw | Bin 28676 -> 28676 bytes
.../{ => X64/PageTable2M}/ResetVector.x64.raw | Bin 28676 -> 28676 bytes
.../PageTable2M}/ResetVector.x64.serial.raw | Bin 28676 -> 28676 bytes
UefiCpuPkg/ResetVector/Vtf0/Build.py | 101 ++++++++++++------
UefiCpuPkg/ResetVector/Vtf0/PageTables.inc | 20 ++++
UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 2 +-
UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-
.../ResetVector/Vtf0/X64/PageTables1G.asm | 53 +++++++++
.../X64/{PageTables.asm => PageTables2M.asm} | 14 +--
UefiCpuPkg/UefiCpuPkg.ci.yaml | 3 +-
21 files changed, 187 insertions(+), 49 deletions(-)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.port80.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.raw (56%)
rename UefiCpuPkg/ResetVector/Vtf0/Bin/{ => X64/PageTable2M}/ResetVector.x64.serial.raw (56%)
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables.asm => PageTables2M.asm} (74%)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..79b23c047bdc6e552d77d5c9e9aeae21ff04d91d
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
new file mode 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
index 8fc9564ebb..47ac07798b 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
@@ -22,10 +22,10 @@
#

[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
+ RAW|IA32/ResetVector.ia32.raw|*

[Binaries.X64]
- RAW|ResetVector.x64.raw|*
+ RAW|X64/PageTable2M/ResetVector.x64.raw|*

[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
new file mode 100644
index 0000000000..75705cd344
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
@@ -0,0 +1,31 @@
+## @file
+# Reset Vector binary
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetVector
+ MODULE_UNI_FILE = ResetVector.uni
+ FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.1
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Binaries.Ia32]
+ RAW|IA32/ResetVector.ia32.raw|*
+
+[Binaries.X64]
+ RAW|X64/PageTable1G/ResetVector.x64.raw|*
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..279ba03b0c01f552a0d3ed8900e06b91f2555901
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
new file mode 100644
index 0000000000000000000000000000000000000000..9b09a80f225736a413b7146b0e7bd4aafc73abe1
GIT binary patch
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
new file mode 100644
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
similarity index 56%
rename from UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw
rename to UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
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diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py
index b791d32762..3f1d5cd2c8 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Build.py
+++ b/UefiCpuPkg/ResetVector/Vtf0/Build.py
@@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#

-import glob
import os
import subprocess
import sys

+PAGE_TABLE_2M = 'PageTable2M'
+PAGE_TABLE_1G = 'PageTable1G'
+FILE_FORMAT = '.raw'
+ALL_RAW_FORMAT = '*' + FILE_FORMAT
+IA32 = 'IA32'
+X64 = 'X64'
+
+# Pre-Define a Macros for Page Table
+PAGE_TABLES = {
+ PAGE_TABLE_2M : "PAGE_TABLE_2M",
+ PAGE_TABLE_1G : "PAGE_TABLE_1G"
+}
+
def RunCommand(commandLine):
- #print ' '.join(commandLine)
return subprocess.call(commandLine)

-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
+# Check for all raw binaries and delete them
+for root, dirs, files in os.walk('Bin'):
+ for file in files:
+ if file.endswith(FILE_FORMAT):
+ os.remove(os.path.join(root, file))

for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- print(f"Command : {' '.join(commandLine)}")
- ret = RunCommand(commandLine)
- if ret != 0:
- print(f"something went wrong while executing {commandLine[-1]}")
- sys.exit()
- print('\tASM\t' + output)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print('\tFIXUP\t' + output)
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
+ for pageTable in PAGE_TABLES.keys():
+ ret = True
+ if arch.lower() == X64.lower():
+ directory = os.path.join('Bin', X64, pageTable)
+ else:
+ directory = os.path.join('Bin', IA32)
+
+ # output raw binary name with arch type
+ fileName = 'ResetVector' + '.' + arch
+
+ if debugType is not None:
+ fileName += '.' + debugType
+ fileName += FILE_FORMAT
+
+ output = os.path.join(directory, fileName)
+
+ # if the directory not exists then create it
+ if not os.path.isdir(directory):
+ os.makedirs(directory)
+
+ # Prepare the command to execute the nasmb
+ commandLine = (
+ 'nasm',
+ '-D', 'ARCH_%s' % arch.upper(),
+ '-D', 'DEBUG_%s' % str(debugType).upper(),
+ '-D', PAGE_TABLES[pageTable].upper(),
+ '-o', output,
+ 'Vtf0.nasmb',
+ )
+
+ print(f"Command : {' '.join(commandLine)}")
+
+ try:
+ ret = RunCommand(commandLine)
+ except FileNotFoundError:
+ print("NASM not found")
+ except:
+ pass
+
+ if ret != 0:
+ print(f"something went wrong while executing {commandLine[-1]}")
+ sys.exit()
+ print('\tASM\t' + output)
+
+ commandLine = (
+ 'python',
+ 'Tools/FixupForRawSection.py',
+ output,
+ )
+ print('\tFIXUP\t' + output)
+ ret = RunCommand(commandLine)
+ if ret != 0: sys.exit(ret)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
new file mode 100644
index 0000000000..31958ae878
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/PageTables.inc
@@ -0,0 +1,20 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of Page Table Entry for the reset vector module
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_SIZE 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_PAT 0x01000
+
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index e6e5b54243..97f4600968 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===

Dependencies:
-* Python 2.5~2.7
+* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index 493738c79c..bdea1fb875 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -35,8 +35,14 @@

%include "PostCodes.inc"

+%include "PageTables.inc"
+
%ifdef ARCH_X64
-%include "X64/PageTables.asm"
+ %ifdef PAGE_TABLE_1G
+ %include "X64/PageTables1G.asm"
+ %else
+ %include "X64/PageTables2M.asm"
+ %endif
%endif

%ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
new file mode 100644
index 0000000000..19bd3d5a92
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
@@ -0,0 +1,53 @@
+;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+; Linear-Address Translation to a 1-GByte Page
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_DIRTY + \
+ PAGE_PRESENT + \
+ PAGE_SIZE)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+
+%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
+
+ALIGN 16
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+ ;
+ ; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
+ ;
+%assign i 0
+%rep 512
+ DQ PDP_1G(i)
+ %assign i i+1
+%endrep
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
similarity index 74%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
index 5bc3093f90..b97df384ac 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
@@ -11,19 +11,7 @@ BITS 64

%define ALIGN_TOP_TO_4K_FOR_PAGING

-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \
diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index e32facd76e..6e0ab95fd8 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -48,7 +48,8 @@
"DscPath": "UefiCpuPkg.dsc",
"IgnoreInf": [
"UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf",
- "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf"
+ "UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf",
+ "UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf"
]
},
"HostUnitTestDscCompleteCheck": {
--
2.30.2.windows.1


[PATCH v4 19/20] OvmfPkg/Microvm: add README

Gerd Hoffmann
 

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Microvm/README | 54 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 OvmfPkg/Microvm/README

diff --git a/OvmfPkg/Microvm/README b/OvmfPkg/Microvm/README
new file mode 100644
index 000000000000..78c2b53318de
--- /dev/null
+++ b/OvmfPkg/Microvm/README
@@ -0,0 +1,54 @@
+
+This is an *experimental* port of OVMF for the qemu microvm
+machine type.
+
+microvm background info
+-----------------------
+
+microvm is designed for modern, virtio-based workloads. Most legacy
+lpc/isa devices like pit and pic can be turned off. virtio-mmio
+(i.e. '-device virtio-{blk,net,scsi,...}-device') is used for
+storage/network/etc.
+
+Optional pcie support is available and any pcie device supported by
+qemu can be plugged in (including virtio-pci if you prefer that over
+virtio-mmio).
+
+https://qemu.readthedocs.io/en/latest/system/i386/microvm.html
+https://www.kraxel.org/blog/2020/10/qemu-microvm-acpi/
+
+design issues
+-------------
+
+Not fully clear yet how to do hardware detection best. Right now
+using device tree to find virtio-mmio devices and pcie host bridge,
+can reuse existing ArmVirtPkg code that way. Needs patched qemu.
+
+features
+--------
+ [working] serial console
+ [working] direct kernel boot
+ [in progress] virtio-mmio support
+ [in progress] pcie support
+
+known limitations
+-----------------
+ * rtc=on is required for now.
+ * can't use separate code/vars (actually an microvm limitation,
+ there is no pflash support).
+ * transitional virtio-pci devices do not work. microvm doesn't
+ support ioports on pcie, and ovmf doesn't initialize pcie devices
+ with ioports if there is no address space for them (even though
+ pcie devices are required to be functional without ioports).
+
+known bugs
+----------
+ * timer has wrong frequency (running fast on my hardware).
+
+usage
+-----
+qemu-system-x86_64 \
+ -nographic \
+ -machine microvm,acpi=on,pit=off,pic=off,rtc=on \
+ -bios /path/to/MICROVM.fd \
+ [ ... more args here ... ]
--
2.31.1


[PATCH v4 20/20] OvmfPkg/Microvm: add Maintainers.txt entry

Gerd Hoffmann
 

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Reviewed-by: Jiewen Yao <Jiewen.yao@...>
---
Maintainers.txt | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index 41f491bcaed1..52f9aa99ac7d 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -440,6 +440,12 @@ F: OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibBhyve.inf
R: Rebecca Cran <rebecca@...> [bcran]
R: Peter Grehan <grehan@...> [grehan-freebsd]

+OvmfPkg: microvm-related modules
+F: OvmfPkg/Microvm/
+F: OvmfPkg/Include/IndustryStandard/Microvm.h
+F: OvmfPkg/Library/ResetSystemLib/*Microvm.*
+R: Gerd Hoffmann <kraxel@...> [kraxel]
+
OvmfPkg: CSM modules
F: OvmfPkg/Csm/
R: David Woodhouse <dwmw2@...> [dwmw2]
--
2.31.1


[PATCH v4 18/20] OvmfPkg/Microvm: wire up serial console, drop super-io

Gerd Hoffmann
 

Microvm has no LPC bridge, so drop the PciSioSerialDxe driver.
Use SerialDxe instead, with ioport hardcoded to 0x3f8 aka com1 aka ttyS0.

With this tianocore boots to uefi shell prompt on the serial console.
Direct kernel boot can be used too.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 11 +++--
OvmfPkg/Microvm/MicrovmX64.fdf | 4 +-
.../PlatformBootManagerLib/BdsPlatform.c | 40 +++++++++++++++++++
3 files changed, 49 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 399506874975..c11fc9fc3be0 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -233,6 +233,8 @@ [LibraryClasses]
[LibraryClasses.common]
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+ PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf

[LibraryClasses.common.SEC]
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
@@ -537,6 +539,11 @@ [PcdsFixedAtBuild]
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }

+ # microvm serial port^M
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF}
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x3f8
+
################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
@@ -732,9 +739,7 @@ [Components]
#
# ISA Support
#
- OvmfPkg/SioBusDxe/SioBusDxe.inf
- MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
- MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf

#
# SMBIOS Support
diff --git a/OvmfPkg/Microvm/MicrovmX64.fdf b/OvmfPkg/Microvm/MicrovmX64.fdf
index b4d56bd2d0e7..6314014f3de7 100644
--- a/OvmfPkg/Microvm/MicrovmX64.fdf
+++ b/OvmfPkg/Microvm/MicrovmX64.fdf
@@ -260,11 +260,9 @@ [FV.DXEFV]
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf

-INF OvmfPkg/SioBusDxe/SioBusDxe.inf
!if $(SOURCE_DEBUG_ENABLE) == FALSE
-INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
+INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
!endif
-INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf

INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
index 5536fcb8894d..b581a20cc6b7 100644
--- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
+++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
@@ -8,6 +8,7 @@

#include "BdsPlatform.h"
#include <Guid/RootBridgesConnectedEventGroup.h>
+#include <Guid/SerialPortLibVendor.h>
#include <Protocol/FirmwareVolume2.h>
#include <Library/PlatformBmPrintScLib.h>
#include <Library/Tcg2PhysicalPresenceLib.h>
@@ -661,6 +662,43 @@ PrepareLpcBridgeDevicePath (
return EFI_SUCCESS;
}

+typedef struct {
+ VENDOR_DEVICE_PATH Guid;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} SERIAL_DEVICE_PATH;
+
+SERIAL_DEVICE_PATH serialDevicePath = {
+ {
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0} },
+ EDKII_SERIAL_PORT_LIB_VENDOR_GUID
+ },
+ { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
+};
+
+VOID
+PrepareMicrovmDevicePath (
+ VOID
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT16 HostBridgeDevId;
+
+ HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
+ if (HostBridgeDevId != MICROVM_PSEUDO_DEVICE_ID) {
+ return;
+ }
+
+ DevicePath = (EFI_DEVICE_PATH_PROTOCOL*)&serialDevicePath;
+ DevicePath = AppendDevicePathNode (DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);
+ DevicePath = AppendDevicePathNode (DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);
+
+ EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
+ EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
+ EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
+}
+
EFI_STATUS
GetGopDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,
@@ -1021,6 +1059,8 @@ PlatformInitializeConsole (
//
VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);

+ PrepareMicrovmDevicePath ();
+
//
// Have chance to connect the platform default console,
// the platform default console is the minimum device group
--
2.31.1


[PATCH v4 17/20] OvmfPkg/Microvm: use PciHostBridgeLibNull

Gerd Hoffmann
 

Shortcut PCI support for now (proper PCIe
support will be wired up later).

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index d7fd7e84ca49..399506874975 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -659,7 +659,7 @@ [Components]
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
<LibraryClasses>
- PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+ PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
NULL|OvmfPkg/Library/PlatformHasIoMmuLib/PlatformHasIoMmuLib.inf
}
--
2.31.1


[PATCH v4 16/20] OvmfPkg/Microvm: BdsPlatform: PciAcpiInitialization tweak.

Gerd Hoffmann
 

Nothing to do here ;)

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
index 71f63b244828..5536fcb8894d 100644
--- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
+++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
@@ -1233,6 +1233,8 @@ PciAcpiInitialization (
PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6a), PciHostIrqs[2]); // G
PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H
break;
+ case MICROVM_PSEUDO_DEVICE_ID:
+ return;
default:
if (XenDetected ()) {
//
--
2.31.1


[PATCH v4 15/20] OvmfPkg/ResetSystemLib: add driver for microvm

Gerd Hoffmann
 

Uses the generic event device to reset and poweroff.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 14 +--
.../BaseResetSystemLibMicrovm.inf | 37 ++++++++
.../DxeResetSystemLibMicrovm.inf | 40 +++++++++
OvmfPkg/Include/IndustryStandard/Microvm.h | 7 ++
OvmfPkg/Include/OvmfPlatforms.h | 1 +
.../ResetSystemLib/DxeResetSystemLibMicrovm.c | 49 ++++++++++
.../ResetSystemLib/ResetSystemLibMicrovm.c | 89 +++++++++++++++++++
OvmfPkg/PlatformPei/Platform.c | 1 +
8 files changed, 231 insertions(+), 7 deletions(-)
create mode 100644 OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
create mode 100644 OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
create mode 100644 OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.c
create mode 100644 OvmfPkg/Library/ResetSystemLib/ResetSystemLibMicrovm.c

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index a000c195d866..d7fd7e84ca49 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -131,7 +131,7 @@ [SkuIds]
[LibraryClasses]
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
TimerLib|MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
@@ -321,7 +321,7 @@ [LibraryClasses.common.DXE_CORE]

[LibraryClasses.common.DXE_RUNTIME_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
@@ -339,7 +339,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]

[LibraryClasses.common.UEFI_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
@@ -354,7 +354,7 @@ [LibraryClasses.common.UEFI_DRIVER]

[LibraryClasses.common.DXE_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
@@ -379,7 +379,7 @@ [LibraryClasses.common.DXE_DRIVER]

[LibraryClasses.common.UEFI_APPLICATION]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
@@ -392,7 +392,7 @@ [LibraryClasses.common.UEFI_APPLICATION]

[LibraryClasses.common.DXE_SMM_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
@@ -413,7 +413,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER]

[LibraryClasses.common.SMM_CORE]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
- ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+ ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
SmmCorePlatformHookLib|MdeModulePkg/Library/SmmCorePlatformHookLibNull/SmmCorePlatformHookLibNull.inf
MemoryAllocationLib|MdeModulePkg/Library/PiSmmCoreMemoryAllocationLib/PiSmmCoreMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
diff --git a/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf b/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
new file mode 100644
index 000000000000..564b1d3022a6
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
@@ -0,0 +1,37 @@
+## @file
+# DXE library instance for ResetSystem library class for OVMF
+#
+# Copyright (C) 2020, Red Hat, Inc.
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = ResetSystemLibMicrovm
+ FILE_GUID = 7cd630bb-f581-4d1a-97ca-9dbc900e26a4
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ResetSystemLib|SEC PEI_CORE PEIM DXE_CORE
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ ResetSystemLibMicrovm.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ IoLib
+ TimerLib
diff --git a/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf b/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
new file mode 100644
index 000000000000..ac9c2599642c
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
@@ -0,0 +1,40 @@
+## @file
+# DXE library instance for ResetSystem library class for OVMF
+#
+# Copyright (C) 2020, Red Hat, Inc.
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = ResetSystemLibMicrovm
+ FILE_GUID = 3d6faf60-804a-4ca9-a36a-1a92416919d0
+ MODULE_TYPE = DXE_RUNTIME_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ResetSystemLib|DXE_DRIVER DXE_RUNTIME_DRIVER SMM_CORE DXE_SMM_DRIVER UEFI_DRIVER UEFI_APPLICATION
+ CONSTRUCTOR = DxeResetSystemLibMicrovmConstructor
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ ResetSystemLibMicrovm.c
+ DxeResetSystemLibMicrovm.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ DxeServicesTableLib
+ IoLib
+ TimerLib
diff --git a/OvmfPkg/Include/IndustryStandard/Microvm.h b/OvmfPkg/Include/IndustryStandard/Microvm.h
index c56547c4f2a4..ae0c2e53117b 100644
--- a/OvmfPkg/Include/IndustryStandard/Microvm.h
+++ b/OvmfPkg/Include/IndustryStandard/Microvm.h
@@ -9,4 +9,11 @@

#define MICROVM_PSEUDO_DEVICE_ID 0xfff1

+/* generic event device */
+#define MICROVM_GED_MMIO_BASE 0xfea00000
+#define MICROVM_GED_MMIO_BASE_REGS (MICROVM_GED_MMIO_BASE + 0x200)
+#define MICROVM_ACPI_GED_REG_SLEEP_CTL 0x00
+#define MICROVM_ACPI_GED_REG_RESET 0x02
+#define MICROVM_ACPI_GED_RESET_VALUE 0x42
+
#endif // __MICROVM_H__
diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h
index 77dd818e3002..3b85593b7063 100644
--- a/OvmfPkg/Include/OvmfPlatforms.h
+++ b/OvmfPkg/Include/OvmfPlatforms.h
@@ -15,6 +15,7 @@
#include <IndustryStandard/Q35MchIch9.h>
#include <IndustryStandard/I440FxPiix4.h>
#include <IndustryStandard/Bhyve.h>
+#include <IndustryStandard/Microvm.h>

//
// OVMF Host Bridge DID Address
diff --git a/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.c b/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.c
new file mode 100644
index 000000000000..0de8b39f5408
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.c
@@ -0,0 +1,49 @@
+/** @file
+ Reset System Library functions for OVMF
+
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h> // BIT1
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h> // CpuDeadLoop()
+#include <Library/DebugLib.h> // ASSERT()
+#include <Library/DxeServicesTableLib.h>
+#include <Library/IoLib.h> // IoWrite8()
+#include <Library/ResetSystemLib.h> // ResetCold()
+#include <Library/TimerLib.h> // MicroSecondDelay()
+#include <Library/UefiRuntimeLib.h> // EfiGoneVirtual()
+#include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
+
+EFI_STATUS
+EFIAPI
+DxeResetSystemLibMicrovmConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ UINTN Address = MICROVM_GED_MMIO_BASE;
+ EFI_STATUS Status;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
+
+ DEBUG ((DEBUG_INFO, "%a: start\n", __FUNCTION__));
+
+ Status = gDS->GetMemorySpaceDescriptor (Address, &Descriptor);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "%a: GetMemorySpaceDescriptor failed\n", __FUNCTION__));
+ return RETURN_UNSUPPORTED;
+ }
+
+ Status = gDS->SetMemorySpaceAttributes (Address, SIZE_4KB,
+ Descriptor.Attributes | EFI_MEMORY_RUNTIME);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "%a: SetMemorySpaceAttributes failed\n", __FUNCTION__));
+ return RETURN_UNSUPPORTED;
+ }
+
+ DEBUG ((DEBUG_INFO, "%a: done\n", __FUNCTION__));
+ return EFI_SUCCESS;
+}
diff --git a/OvmfPkg/Library/ResetSystemLib/ResetSystemLibMicrovm.c b/OvmfPkg/Library/ResetSystemLib/ResetSystemLibMicrovm.c
new file mode 100644
index 000000000000..5c714cf06a54
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/ResetSystemLibMicrovm.c
@@ -0,0 +1,89 @@
+/** @file
+ Reset System Library functions for OVMF
+
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h> // BIT1
+
+#include <Library/BaseLib.h> // CpuDeadLoop()
+#include <Library/DebugLib.h> // ASSERT()
+#include <Library/IoLib.h> // IoWrite8()
+#include <Library/ResetSystemLib.h> // ResetCold()
+#include <Library/TimerLib.h> // MicroSecondDelay()
+#include <Library/UefiRuntimeLib.h> // EfiGoneVirtual()
+#include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
+
+static UINTN MicrovmGedBase (VOID)
+{
+ VOID *Address = (VOID*) MICROVM_GED_MMIO_BASE_REGS;
+
+ if (EfiGoneVirtual ()) {
+ EfiConvertPointer (0, &Address);
+ DEBUG ((DEBUG_INFO, "%a: virtual -> 0x%x\n", __FUNCTION__, Address));
+ } else {
+ DEBUG ((DEBUG_INFO, "%a: physical -> 0x%x\n", __FUNCTION__, Address));
+ }
+
+ return (UINTN) Address;
+}
+
+static VOID MicrovmReset (VOID)
+{
+ UINTN Address = MicrovmGedBase();
+
+ DEBUG ((DEBUG_INFO, "%a: microvm reset via ged\n", __FUNCTION__));
+ MmioWrite8 (Address + MICROVM_ACPI_GED_REG_RESET,
+ MICROVM_ACPI_GED_RESET_VALUE);
+ CpuDeadLoop ();
+}
+
+static VOID MicrovmShutdown (VOID)
+{
+ UINTN Address = MicrovmGedBase();
+
+ DEBUG ((DEBUG_INFO, "%a: microvm poweroff via ged\n", __FUNCTION__));
+ MmioWrite8 (Address + MICROVM_ACPI_GED_REG_SLEEP_CTL,
+ (1 << 5) /* enable bit */ |
+ (5 << 2) /* typ == S5 */);
+ CpuDeadLoop ();
+}
+
+VOID EFIAPI ResetCold (VOID)
+{
+ MicrovmReset();
+}
+
+VOID EFIAPI ResetWarm (VOID)
+{
+ MicrovmReset();
+}
+
+VOID
+EFIAPI
+ResetPlatformSpecific (
+ IN UINTN DataSize,
+ IN VOID *ResetData
+ )
+{
+ MicrovmReset();
+}
+
+VOID
+EFIAPI
+ResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN VOID *ResetData OPTIONAL
+ )
+{
+ MicrovmReset();
+}
+
+VOID EFIAPI ResetShutdown (VOID)
+{
+ MicrovmShutdown();
+}
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 039b19dfb187..142df9cd9612 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -161,6 +161,7 @@ MemMapInitialization (
AddIoMemoryRangeHob (0x0A0000, BASE_1MB);

if (mHostBridgeDevId == MICROVM_PSEUDO_DEVICE_ID) {
+ AddIoMemoryBaseSizeHob (MICROVM_GED_MMIO_BASE, SIZE_4KB);
AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB); /* ioapic #1 */
AddIoMemoryBaseSizeHob (0xFEC10000, SIZE_4KB); /* ioapic #2 */
return;
--
2.31.1


[PATCH v4 14/20] OvmfPkg/Microvm: PlatformPei/Platform: set id.

Gerd Hoffmann
 

Set PcdOvmfHostBridgePciDevId to MICROVM_PSEUDO_DEVICE_ID.
Return and skip i440fx/q35 chipset tweaks.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/PlatformPei/Platform.c | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index dedd7ff1a8e5..039b19dfb187 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -365,6 +365,12 @@ MiscInitialization (
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
+ case MICROVM_PSEUDO_DEVICE_ID:
+ DEBUG ((DEBUG_INFO, "%a: microvm\n", __FUNCTION__));
+ PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId,
+ MICROVM_PSEUDO_DEVICE_ID);
+ ASSERT_RETURN_ERROR (PcdStatus);
+ return;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, mHostBridgeDevId));
--
2.31.1


[PATCH v4 13/20] OvmfPkg/Microvm: PlatformPei/Platform memory map tweaks

Gerd Hoffmann
 

Microvm needs ioapic hobs only.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/PlatformPei/Platform.c | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index ed93d11c8ac6..dedd7ff1a8e5 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -160,6 +160,12 @@ MemMapInitialization (
//
AddIoMemoryRangeHob (0x0A0000, BASE_1MB);

+ if (mHostBridgeDevId == MICROVM_PSEUDO_DEVICE_ID) {
+ AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB); /* ioapic #1 */
+ AddIoMemoryBaseSizeHob (0xFEC10000, SIZE_4KB); /* ioapic #2 */
+ return;
+ }
+
TopOfLowRam = GetSystemMemorySizeBelow4gb ();
PciExBarBase = 0;
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
--
2.31.1


[PATCH v4 00/20] OvmfPkg: Add support for microvm machine type

Gerd Hoffmann
 

This patch series adds basic support for the
microvm machine type to OVMF.

Working:
- uefi shell @ serial console.
- direct kernel boot.

Comming in followup patches:
- virtio-mmio support.
- pcie support.

Usage:
qemu-system-x86_64 -nographic -M microvm -bios MICROVM.fd ...

v2 changes:
- pick up review tags
- add bugzilla link
- fix timer configuration
- fix reset shutdown
- add readme
- add maintainers entry

v3 changes:
- pick up more review tags
- fix CI failures (https://github.com/tianocore/edk2/pull/1949)

v4:
- drop runtime "detection" of microvm, we know that at compile time.

Gerd Hoffmann (20):
OvmfPkg/Microvm: copy OvmfPkgX64 files as-is
OvmfPkg/Microvm: rename output files, fix includes
OvmfPkg/Microvm: no smm
OvmfPkg/Microvm: no secure boot
OvmfPkg/Microvm: no tpm
OvmfPkg/Microvm: no sev
OvmfPkg/Microvm: no csm
OvmfPkg/Microvm: no emulated scsi
OvmfPkg/Microvm: use MdePkg/Library/SecPeiDxeTimerLibCpu
OvmfPkg/Microvm: use XenTimerDxe (lapic timer)
OvmfPkg/Microvm: add header file
OvmfPkg/Microvm: PlatformPei/MemDetect tweaks
OvmfPkg/Microvm: PlatformPei/Platform memory map tweaks
OvmfPkg/Microvm: PlatformPei/Platform: set id.
OvmfPkg/ResetSystemLib: add driver for microvm
OvmfPkg/Microvm: BdsPlatform: PciAcpiInitialization tweak.
OvmfPkg/Microvm: use PciHostBridgeLibNull
OvmfPkg/Microvm: wire up serial console, drop super-io
OvmfPkg/Microvm: add README
OvmfPkg/Microvm: add Maintainers.txt entry

OvmfPkg/Microvm/MicrovmX64.dsc | 842 ++++++++++++++++++
OvmfPkg/Microvm/MicrovmX64.fdf | 462 ++++++++++
.../BaseResetSystemLibMicrovm.inf | 37 +
.../DxeResetSystemLibMicrovm.inf | 40 +
OvmfPkg/Include/IndustryStandard/Microvm.h | 19 +
OvmfPkg/Include/OvmfPlatforms.h | 1 +
.../PlatformBootManagerLib/BdsPlatform.c | 42 +
.../ResetSystemLib/DxeResetSystemLibMicrovm.c | 49 +
.../ResetSystemLib/ResetSystemLibMicrovm.c | 89 ++
OvmfPkg/PlatformPei/MemDetect.c | 5 +
OvmfPkg/PlatformPei/Platform.c | 18 +
Maintainers.txt | 6 +
OvmfPkg/Microvm/README | 54 ++
13 files changed, 1664 insertions(+)
create mode 100644 OvmfPkg/Microvm/MicrovmX64.dsc
create mode 100644 OvmfPkg/Microvm/MicrovmX64.fdf
create mode 100644 OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
create mode 100644 OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.inf
create mode 100644 OvmfPkg/Include/IndustryStandard/Microvm.h
create mode 100644 OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibMicrovm.c
create mode 100644 OvmfPkg/Library/ResetSystemLib/ResetSystemLibMicrovm.c
create mode 100644 OvmfPkg/Microvm/README

--
2.31.1


[PATCH v4 12/20] OvmfPkg/Microvm: PlatformPei/MemDetect tweaks

Gerd Hoffmann
 

Set mHostBridgeDevId to MICROVM_PSEUDO_DEVICE_ID using a
compile time switch.

Skip host bridge setup on microvm.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@...>
Acked-by: Jiewen Yao <Jiewen.yao@...>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 3 +++
OvmfPkg/PlatformPei/MemDetect.c | 5 +++++
OvmfPkg/PlatformPei/Platform.c | 5 +++++
3 files changed, 13 insertions(+)

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 019b50de7d8f..a000c195d866 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -73,6 +73,9 @@ [Defines]
!endif

[BuildOptions]
+ GCC:*_*_*_CC_FLAGS = -DPLATFORM_IS_MICROVM
+ INTEL:*_*_*_CC_FLAGS = /D PLATFORM_IS_MICROVM
+ MSFT:*_*_*_CC_FLAGS = /D PLATFORM_IS_MICROVM
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG
MSFT:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 2c2c4641ec8a..8125644bc91a 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -15,6 +15,7 @@ Module Name:
//
#include <IndustryStandard/E820.h>
#include <IndustryStandard/I440FxPiix4.h>
+#include <IndustryStandard/Microvm.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <PiPei.h>
#include <Register/Intel/SmramSaveStateMap.h>
@@ -135,6 +136,10 @@ QemuUc32BaseInitialization (
UINT32 LowerMemorySize;
UINT32 Uc32Size;

+ if (mHostBridgeDevId == MICROVM_PSEUDO_DEVICE_ID) {
+ return;
+ }
+
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
// On q35, the 32-bit area that we'll mark as UC, through variable MTRRs,
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index d3a20122a2ea..ed93d11c8ac6 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -31,6 +31,7 @@
#include <Library/ResourcePublicationLib.h>
#include <Ppi/MasterBootMode.h>
#include <IndustryStandard/I440FxPiix4.h>
+#include <IndustryStandard/Microvm.h>
#include <IndustryStandard/Pci22.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <IndustryStandard/QemuCpuHotplug.h>
@@ -714,7 +715,11 @@ InitializePlatform (
//
// Query Host Bridge DID
//
+#ifdef PLATFORM_IS_MICROVM
+ mHostBridgeDevId = MICROVM_PSEUDO_DEVICE_ID;
+#else
mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
+#endif

MaxCpuCountInitialization ();

--
2.31.1

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