Date   

Re: [PATCH] Reallocate TPM Active PCRs based on platform support.

Rodrigo Gonzalez del Cueto
 

Hi Jiewen,

Indeed, this bug has existed for a long time in this code. What recently changed are the TPM configurations we are testing and exposed the issue; this can be reproduced when the BIOS supported algorithms are a strict subset of the PCRs currently active in the TPM.

Now that we are using TPM configurations with support for additional PCR banks (ex. SHA384 and SM3) the bug has been exposed when compiling a BIOS without support for these PCR banks which are active by default in the some of the TPMs.

Regards,
-Rodrigo


From: Yao, Jiewen <jiewen.yao@...>
Sent: Sunday, August 8, 2021 6:13 PM
To: Gonzalez Del Cueto, Rodrigo <rodrigo.gonzalez.del.cueto@...>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Wang, Jian J <jian.j.wang@...>
Subject: RE: [PATCH] Reallocate TPM Active PCRs based on platform support.
 
Hi Rodrigo
I don’t understand the problem statement.

This code has been there for long time. What is changed recently ?

Thank you
Yao Jiewen


> -----Original Message-----
> From: Gonzalez Del Cueto, Rodrigo <rodrigo.gonzalez.del.cueto@...>
> Sent: Thursday, August 5, 2021 7:28 AM
> To: devel@edk2.groups.io
> Cc: Gonzalez Del Cueto, Rodrigo <rodrigo.gonzalez.del.cueto@...>;
> Wang, Jian J <jian.j.wang@...>; Yao, Jiewen <jiewen.yao@...>
> Subject: [PATCH] Reallocate TPM Active PCRs based on platform support.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3515
>
> In V2: Add case to RegisterHashInterfaceLib logic
>
> RegisterHashInterfaceLib needs to correctly handle registering the HashLib
> instance supported algorithm bitmap when PcdTpm2HashMask is set to zero.
>
> The current implementation of SyncPcrAllocationsAndPcrMask() triggers
> PCR bank reallocation only based on the intersection between
> TpmActivePcrBanks and PcdTpm2HashMask.
>
> When the software HashLibBaseCryptoRouter solution is used, no PCR bank
> reallocation is occurring based on the supported hashing algorithms
> registered by the HashLib instances.
>
> Need to have an additional check for the intersection between the
> TpmActivePcrBanks and the PcdTcg2HashAlgorithmBitmap populated by the
> HashLib instances present on the platform's BIOS.
>
> Signed-off-by: Rodrigo Gonzalez del Cueto
> <rodrigo.gonzalez.del.cueto@...>
>
> Cc: Jian J Wang <jian.j.wang@...>
> Cc: Jiewen Yao <jiewen.yao@...>
> ---
>  SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c
> |  6 +++++-
>  SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c |
> 6 +++++-
>  SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c                                        | 18
> +++++++++++++++++-
>  SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf                                      |  1 +
>  4 files changed, 28 insertions(+), 3 deletions(-)
>
> diff --git
> a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.
> c
> b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.
> c
> index 7a0f61efbb..0821159120 100644
> ---
> a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.
> c
> +++
> b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.
> c
> @@ -230,13 +230,17 @@ RegisterHashInterfaceLib (
>  {
>    UINTN              Index;
>    UINT32             HashMask;
> +  UINT32             Tpm2HashMask;
>    EFI_STATUS         Status;
>
>    //
>    // Check allow
>    //
>    HashMask = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);
> -  if ((HashMask & PcdGet32 (PcdTpm2HashMask)) == 0) {
> +  Tpm2HashMask = PcdGet32 (PcdTpm2HashMask);
> +
> +  if ((Tpm2HashMask != 0) &&
> +      ((HashMask & Tpm2HashMask) == 0)) {
>      return EFI_UNSUPPORTED;
>    }
>
> diff --git
> a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
> b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
> index 42cb562f67..6ae51dbce4 100644
> ---
> a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
> +++
> b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
> @@ -327,13 +327,17 @@ RegisterHashInterfaceLib (
>    UINTN              Index;
>    HASH_INTERFACE_HOB *HashInterfaceHob;
>    UINT32             HashMask;
> +  UINT32             Tpm2HashMask;
>    EFI_STATUS         Status;
>
>    //
>    // Check allow
>    //
>    HashMask = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);
> -  if ((HashMask & PcdGet32 (PcdTpm2HashMask)) == 0) {
> +  Tpm2HashMask = PcdGet32 (PcdTpm2HashMask);
> +
> +  if ((Tpm2HashMask != 0) &&
> +      ((HashMask & Tpm2HashMask) == 0)) {
>      return EFI_UNSUPPORTED;
>    }
>
> diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
> b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
> index 93a8803ff6..5ad6a45cf3 100644
> --- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
> +++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
> @@ -262,6 +262,7 @@ SyncPcrAllocationsAndPcrMask (
>  {
>    EFI_STATUS                        Status;
>    EFI_TCG2_EVENT_ALGORITHM_BITMAP   TpmHashAlgorithmBitmap;
> +  EFI_TCG2_EVENT_ALGORITHM_BITMAP   BiosHashAlgorithmBitmap;
>    UINT32                            TpmActivePcrBanks;
>    UINT32                            NewTpmActivePcrBanks;
>    UINT32                            Tpm2PcrMask;
> @@ -273,16 +274,27 @@ SyncPcrAllocationsAndPcrMask (
>    // Determine the current TPM support and the Platform PCR mask.
>    //
>    Status = Tpm2GetCapabilitySupportedAndActivePcrs
> (&TpmHashAlgorithmBitmap, &TpmActivePcrBanks);
> +
>    ASSERT_EFI_ERROR (Status);
> +
> +  DEBUG ((EFI_D_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs -
> TpmHashAlgorithmBitmap: 0x%08x\n", TpmHashAlgorithmBitmap));
> +  DEBUG ((EFI_D_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs -
> TpmActivePcrBanks 0x%08x\n", TpmActivePcrBanks));
>
>    Tpm2PcrMask = PcdGet32 (PcdTpm2HashMask);
>    if (Tpm2PcrMask == 0) {
>      //
>      // if PcdTPm2HashMask is zero, use ActivePcr setting
>      //
> +    DEBUG ((EFI_D_VERBOSE, "Initializing PcdTpm2HashMask to
> TpmActivePcrBanks 0x%08x\n", TpmActivePcrBanks));
>      PcdSet32S (PcdTpm2HashMask, TpmActivePcrBanks);
> +    DEBUG ((EFI_D_VERBOSE, "Initializing Tpm2PcrMask to TpmActivePcrBanks
> 0x%08x\n", Tpm2PcrMask));
>      Tpm2PcrMask = TpmActivePcrBanks;
>    }
> +
> +  BiosHashAlgorithmBitmap = PcdGet32 (PcdTcg2HashAlgorithmBitmap);
> +  DEBUG ((EFI_D_INFO, "PcdTcg2HashAlgorithmBitmap 0x%08x\n",
> BiosHashAlgorithmBitmap));
> +  DEBUG ((EFI_D_INFO, "Tpm2PcrMask 0x%08x\n", Tpm2PcrMask)); // Active
> PCR banks from TPM input
> +  DEBUG ((EFI_D_INFO, "TpmActivePcrBanks & BiosHashAlgorithmBitmap =
> 0x%08x\n", NewTpmActivePcrBanks));
>
>    //
>    // Find the intersection of Pcd support and TPM support.
> @@ -294,9 +306,12 @@ SyncPcrAllocationsAndPcrMask (
>    // If there are active PCR banks that are not supported by the Platform mask,
>    // update the TPM allocations and reboot the machine.
>    //
> -  if ((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) {
> +  if (((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) ||
> +      ((TpmActivePcrBanks & BiosHashAlgorithmBitmap) != TpmActivePcrBanks)) {
>      NewTpmActivePcrBanks = TpmActivePcrBanks & Tpm2PcrMask;
> +    NewTpmActivePcrBanks &= BiosHashAlgorithmBitmap;
>
> +    DEBUG ((EFI_D_INFO, "NewTpmActivePcrBanks 0x%08x\n",
> NewTpmActivePcrBanks));
>      DEBUG ((EFI_D_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n",
> __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks));
>      if (NewTpmActivePcrBanks == 0) {
>        DEBUG ((EFI_D_ERROR, "%a - No viable PCRs active! Please set a less
> restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
> @@ -331,6 +346,7 @@ SyncPcrAllocationsAndPcrMask (
>      }
>
>      Status = PcdSet32S (PcdTpm2HashMask, NewTpm2PcrMask);
> +    DEBUG ((EFI_D_INFO, "Setting PcdTpm2Hash Mask to 0x%08x\n",
> NewTpm2PcrMask));
>      ASSERT_EFI_ERROR (Status);
>    }
>  }
> diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
> b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
> index 06c26a2904..17ad116126 100644
> --- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
> +++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
> @@ -86,6 +86,7 @@
>    ## SOMETIMES_CONSUMES
>    ## SOMETIMES_PRODUCES
>    gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask
> +  gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap                  ##
> CONSUMES
>
>  [Depex]
>    gEfiPeiMasterBootModePpiGuid AND
> --
> 2.31.1.windows.1


Re: [PATCH v6 1/6] OvmfPkg/BaseMemEncryptLib: Detect SEV live migration feature.

Gerd Hoffmann
 

Hi,

I still really don't understand the need for the CPUID loop. KVM only ever
programs CPUID function 0x40000000, right?
Nope. When you enable hyper-v emulation features you'll go find the kvm
cpuid @ 0x40000000 and the hyper-v cpuid @ 0x40000100 (or the other way
around, not sure).

take care,
Gerd


Re: [PATCH 1/1] OvmfPkg PlatformBootManagerLib: Move TryRunningQemuKernel()

Gerd Hoffmann
 

Hi,

insmod /lib/modules/5.13.8/kernel/fs/jbd2/jbd2.ko
insmod /lib/modules/5.13.8/kernel/fs/mbcache.ko
insmod /lib/modules/5.13.8/kernel/fs/ext4/ext4.ko
mount: mounting /dev/sda2 on /mnt failed: No such file or directory
ERROR: No /sbin/init found on rootdev (or not mounted). Trouble ahead.
You can try to fix it. Type 'exit' when things are done.

At that point I'm dropped into a recovery shell to try fixing something
but there's nothing that can be done since the disk containing the OS is
not visible.
From the above, I think I've done everything possible to verify the
problem and a possible fix. Is there something fundamentally wrong in
the way I'm going about this?
Root cause is not clear. Grab the kernel log ('dmesg') from a good and
a bad boot and comparing them should give a clue.

take care,
Gerd


Re: [PATCH v2 2/2] UefiCpuPkg/BaseUefiCpuLib: Use toolchain-specific rodata section name

Andrew Fish
 



On Aug 9, 2021, at 7:43 PM, Ni, Ray <ray.ni@...> wrote:

Acked-by: Ray Ni <ray.ni@...>

I will depend on tool owner to review the tool configuration change making sure that the correct section name is chosen for different C compilers.


Ray,

I made a detailed response about Mach-O with Xcode/clang and I don’t think patch works. Not sure if it breaks anything, but it puts things in the .data PE/COFF section. 

I’m also worried it is broken for any toolchain that generates ELF and use GenFw. I don’t think the GenFw tool creates a PE/COFF .rodata section [1] so if things work they will end up in the .data section, or things might break? Some one who knows that tool better than me should take a detailed look. 

I’m guessing it likely does the correct thing for toolchains that generate PE/COFF directly? 

My vote is to not add this feature until we can prove it works properly on all the toolchains. For Xcode it may be easier to just dump this stuff in the .text section (see my other mail for more background). It looks like we might have to modify GenFw if we want to create a .rodata section? 

It might be possible to cheat and use this concept to force code into the text section for ELF and Mach-O, but I’m not sure if that hits the correct security bar. But the last thing we want is to claim something is in a read only section when it is in a read write section. 

[1]  git grep CreateSectionHeader
BaseTools/Source/C/GenFw/Elf32Convert.c:602:    CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,
BaseTools/Source/C/GenFw/Elf32Convert.c:612:    CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,
BaseTools/Source/C/GenFw/Elf32Convert.c:622:    CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,
BaseTools/Source/C/GenFw/Elf32Convert.c:1107:    CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,
BaseTools/Source/C/GenFw/Elf64Convert.c:929:    CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,
BaseTools/Source/C/GenFw/Elf64Convert.c:939:    CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,
BaseTools/Source/C/GenFw/Elf64Convert.c:949:    CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,
BaseTools/Source/C/GenFw/Elf64Convert.c:1641:    CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,
BaseTools/Source/C/GenFw/ElfConvert.c:125:CreateSectionHeader (
BaseTools/Source/C/GenFw/ElfConvert.h:74:CreateSectionHeader (

Thanks,

Andrew Fish

Thanks,
Ray

-----Original Message-----
From: Marvin Häuser <mhaeuser@...>
Sent: Monday, August 9, 2021 5:51 PM
To: devel@edk2.groups.io
Cc: Dong, Eric <eric.dong@...>; Ni, Ray <ray.ni@...>; Kumar, Rahul1 <rahul1.kumar@...>; Vitaly Cheptsov
<vit9696@...>
Subject: [PATCH v2 2/2] UefiCpuPkg/BaseUefiCpuLib: Use toolchain-specific rodata section name

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3318

Correctly define the read-only data sections with the
toolchain-specific section name. This hardens image permission
security and may save image space.

Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Vitaly Cheptsov <vit9696@...>
Signed-off-by: Marvin Häuser <mhaeuser@...>
---
UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm | 2 +-
UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm  | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
index 5e27cc325012..cfb8bf4a5ae0 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
@@ -6,7 +6,7 @@
;*

;------------------------------------------------------------------------------



-    SECTION .rodata

+    SECTION RODATA_SECTION_NAME



;

; Float control word initial value:

diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
index 8485b4713548..3c976a21e391 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
@@ -6,7 +6,7 @@
;*

;------------------------------------------------------------------------------



-    SECTION .rodata

+    SECTION RODATA_SECTION_NAME

;

; Float control word initial value:

; all exceptions masked, double-extended-precision, round-to-nearest

--
2.31.1





[edk2-platforms] [PATCH V1] MinPlatformPkg: Cleanup PeiFspWrapperHobProcessLib dependencies

Nate DeSimone
 

PeiFspWrapperHobProcessLib is currently set to depens on
FspWrapperPlatformLib, but it does not use any of the
functions implemented by that LibraryClass. This change
removes that unneeded dependency.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Michael Kubacki <Michael.Kubacki@...>
Cc: Benjamin Doron <benjamin.doron00@...>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@...>
---
.../PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
index 64f3302959..b846e7af1d 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
@@ -1,7 +1,7 @@
## @file
# Provide FSP wrapper hob process related function.
#
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -55,7 +55,6 @@
BaseMemoryLib
HobLib
DebugLib
- FspWrapperPlatformLib
PeiServicesLib
PeiServicesTablePointerLib

--
2.27.0.windows.1


[edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Update SA_MISC_PEI_PREMEM_CONFIG

Nate DeSimone
 

Updates SA_MISC_PEI_PREMEM_CONFIG from revision 1
to revision 3. Add initialization of the policy values.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Michael Kubacki <Michael.Kubacki@...>
Cc: Benjamin Doron <benjamin.doron00@...>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@...>
---
.../KabylakeRvp3/OpenBoardPkg.dsc | 24 +++---
.../PeiSiliconPolicyUpdateLib.c | 39 +++++++++-
.../PeiSiliconPolicyUpdateLib.inf | 9 ++-
.../ConfigBlock/SaMiscPeiPreMemConfig.h | 77 ++++++++++++++++++-
.../Library/PeiSaPolicyLib/PeiSaPolicyLib.c | 37 ++++++++-
5 files changed, 169 insertions(+), 17 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 8523ab3f4f..f64555e391 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -182,17 +182,6 @@
# Board-specific
#######################################
PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookLib.inf
-!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
- #
- # FSP API mode
- #
- SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
-!else
- #
- # FSP Dispatch mode and non-FSP build (EDK2 build)
- #
- SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
-!endif

[LibraryClasses.IA32.SEC]
#######################################
@@ -200,6 +189,7 @@
#######################################
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
+ SiliconPolicyUpdateLib|MinPlatformPkg/PlatformInit/Library/SiliconPolicyUpdateLibNull/SiliconPolicyUpdateLibNull.inf

[LibraryClasses.common.PEIM]
#######################################
@@ -222,6 +212,18 @@
#######################################
# Board Package
#######################################
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # FSP API mode
+ #
+ SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+!else
+ #
+ # FSP Dispatch mode and non-FSP build (EDK2 build)
+ #
+ SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+!endif
+
# Thunderbolt
!if gKabylakeOpenBoardPkgTokenSpaceGuid.PcdTbtEnable == TRUE
PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
index 5cc7c03c61..2dce9be63c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
@@ -1,7 +1,7 @@
/** @file
Provides silicon policy update library functions.

-Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -398,6 +398,8 @@ SiliconPolicyUpdatePreMem (
SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig;
MEMORY_CONFIG_NO_CRC *MemConfigNoCrc;
VOID *Buffer;
+ UINTN VariableSize;
+ VOID *MemorySavedData;
UINT8 SpdAddressTable[4];

DEBUG((DEBUG_INFO, "\nUpdating Policy in Pre-Mem\n"));
@@ -417,6 +419,41 @@ SiliconPolicyUpdatePreMem (
// Pass board specific SpdAddressTable to policy
//
CopyMem ((VOID *) MiscPeiPreMemConfig->SpdAddressTable, (VOID *) SpdAddressTable, (sizeof (UINT8) * 4));
+
+ //
+ // Set size of SMRAM
+ //
+ MiscPeiPreMemConfig->TsegSize = PcdGet32 (PcdTsegSize);
+
+ //
+ // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
+ // Note: AmberLake FSP does not implement the FSPM_ARCH_CONFIG_PPI added in FSP 2.1, hence
+ // the platform specific S3DataPtr must be used instead.
+ //
+ VariableSize = 0;
+ MemorySavedData = NULL;
+ Status = PeiGetVariable (
+ L"MemoryConfig",
+ &gFspNonVolatileStorageHobGuid,
+ &MemorySavedData,
+ &VariableSize
+ );
+ DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - %r\n", Status));
+ DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));
+ if (!EFI_ERROR (Status)) {
+ MiscPeiPreMemConfig->S3DataPtr = MemorySavedData;
+ }
+
+ //
+ // In FSP Dispatch Mode these BAR values are initialized by SiliconPolicyInitPreMem() in
+ // KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLib/PeiPolicyInitPreMem.c; this function calls
+ // PEI_PREMEM_SI_DEFAULT_POLICY_INIT_PPI->PeiPreMemPolicyInit() to initialize all Config Blocks
+ // with default policy values (including these BAR values.) PEI_PREMEM_SI_DEFAULT_POLICY_INIT_PPI
+ // is implemented in the FSP. Make sure the value that FSP is using matches the value we are using.
+ //
+ ASSERT (PcdGet64 (PcdMchBaseAddress) <= 0xFFFFFFFF);
+ ASSERT (MiscPeiPreMemConfig->MchBar == (UINT32) PcdGet64 (PcdMchBaseAddress));
+ ASSERT (MiscPeiPreMemConfig->SmbusBar == PcdGet16 (PcdSmbusBaseAddress));
}
MemConfigNoCrc = NULL;
Status = GetConfigBlock (Policy, &gMemoryConfigNoCrcGuid, (VOID *) &MemConfigNoCrc);
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
index 97ec70f611..5c2da68bf9 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -1,7 +1,7 @@
### @file
# Component information file for silicon policy update library
#
-# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021 Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -11,7 +11,7 @@
INF_VERSION = 0x00010005
BASE_NAME = PeiSiliconPolicyUpdateLib
FILE_GUID = 14F5D83D-76A5-4241-BEC5-987E70E233D5
- MODULE_TYPE = BASE
+ MODULE_TYPE = PEIM
VERSION_STRING = 1.0
LIBRARY_CLASS = SiliconPolicyUpdateLib

@@ -33,6 +33,7 @@
[Packages]
MinPlatformPkg/MinPlatformPkg.dec
MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
UefiCpuPkg/UefiCpuPkg.dec
KabylakeSiliconPkg/SiPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
@@ -49,11 +50,15 @@
gHsioPciePreMemConfigGuid ## CONSUMES
gHsioSataPreMemConfigGuid ## CONSUMES
gSaMiscPeiPreMemConfigGuid ## CONSUMES
+ gFspNonVolatileStorageHobGuid ## CONSUMES

[Pcd]
gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gSiPkgTokenSpaceGuid.PcdMchBaseAddress
+ gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress
+ gSiPkgTokenSpaceGuid.PcdTsegSize
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompResistor ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompTarget ## CONSUMES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
index 4aa02e3142..2ed587f425 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
@@ -1,7 +1,7 @@
/** @file
Policy details for miscellaneous configuration in System Agent

-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -14,18 +14,91 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define SA_MC_MAX_SOCKETS 4
#endif

-#define SA_MISC_PEI_PREMEM_CONFIG_REVISION 1
+#define SA_MISC_PEI_PREMEM_CONFIG_REVISION 3

/**
This configuration block is to configure SA Miscellaneous variables during PEI Pre-Mem phase like programming
different System Agent BARs, TsegSize, IedSize, MmioSize required etc.
<b>Revision 1</b>:
- Initial version.
+ <b>Revision 2</b>:
+ - Added SgDelayAfterOffMethod, SgDelayAfterLinkEnable and SgGenSpeedChangeEnable.
+ <b>Revision 3</b>:
+ - Added BdatTestType and BdatSchema.
**/
typedef struct {
CONFIG_BLOCK_HEADER Header; ///< Offset 0-27 Config Block Header
UINT8 SpdAddressTable[SA_MC_MAX_SOCKETS];///< Offset 28 Memory DIMMs' SPD address for reading SPD data. <b>example: SpdAddressTable[0]=0xA2(C0D0), SpdAddressTable[1]=0xA0(C0D1), SpdAddressTable[2]=0xA2(C1D0), SpdAddressTable[3]=0xA0(C1D1)</b>
+ VOID *S3DataPtr; ///< Offset 32 Memory data save pointer for S3 resume. The memory space should be allocated and filled with proper S3 resume data on a resume path
UINT32 MchBar; ///< Offset 36 Address of System Agent MCHBAR: <b>0xFED10000</b>
+ UINT32 DmiBar; ///< Offset 40 Address of System Agent DMIBAR: <b>0xFED18000</b>
+ UINT32 EpBar; ///< Offset 44 Address of System Agent EPBAR: <b>0xFED19000</b>
+ UINT32 SmbusBar; ///< Offset 48 Address of System Agent SMBUS BAR: <b>0xEFA0</b>
+ UINT32 GdxcBar; ///< Offset 52 Address of System Agent GDXCBAR: <b>0xFED84000</b>
+ /**
+ Offset 56 Size of TSEG in bytes. (Must be power of 2)
+ <b>0x400000</b>: 4MB for Release build (When IED enabled, it will be 8MB)
+ 0x1000000 : 16MB for Debug build (Regardless IED enabled or disabled)
+ **/
+ UINT32 TsegSize;
+ UINT32 EdramBar; ///< Offset 60 Address of System Agent EDRAMBAR: <b>0xFED80000</b>
+ /**
+ Offset 64
+ <b>(Test)</b> Size of IED region in bytes.
+ <b>0</b> : IED Disabled (no memory occupied)
+ 0x400000 : 4MB SMM memory occupied by IED (Part of TSEG)
+ <b>Note: Enabling IED may also enlarge TsegSize together.</b>
+ **/
+ UINT32 IedSize;
+ UINT8 UserBd; ///< Offset 68 <b>0=Mobile/Mobile Halo</b>, 1=Desktop/DT Halo, 5=ULT/ULX/Mobile Halo, 7=UP Server
+ UINT8 SgMode; ///< Offset 69 SgMode: <b>0=Disabled</b>, 1=SG Muxed, 2=SG Muxless, 3=PEG
+ UINT16 SgSubSystemId; ///< Offset 70 Switchable Graphics Subsystem ID: <b>2212</b>
+ UINT16 SgDelayAfterPwrEn; ///< Offset 72 Dgpu Delay after Power enable using Setup option: 0=Minimal, 1000=Maximum, <b>300=300 microseconds</b>
+ UINT16 SgDelayAfterHoldReset; ///< Offset 74 Dgpu Delay after Hold Reset using Setup option: 0=Minimal, 1000=Maximum, <b>100=100 microseconds</b>
+ UINT32 SkipExtGfxScan:1; ///< <b>(Test)</b> OFfset 76:0 :1=Skip External Gfx Device Scan; <b>0=Scan for external graphics devices</b>. Set this policy to skip External Graphics card scanning if the platform uses Internal Graphics only.
+ UINT32 BdatEnable:1; ///< <b>(Test)</b> OFfset 76:1 :This field enables the generation of the BIOS DATA ACPI Tables: <b>0=FALSE</b>, 1=TRUE\n Please refer to the MRC documentation for more details
+ UINT32 TxtImplemented:1; ///< OFfset 76:2 :This field currently is used to tell MRC if it should run after TXT initializatoin completed: <b>0=Run without waiting for TXT</b>, 1=Run after TXT initialization by callback
+ /**
+ Offset 76:3 :
+ <b>(Test)</b> Scan External Discrete Graphics Devices for Legacy Only VGA OpROMs
+
+ When enabled, if the primary graphics device is an external discrete graphics device, Si will scan the
+ graphics device for legacy only VGA OpROMs. If the primary graphics device only implements legacy VBIOS, then the
+ LegacyOnlyVgaOpRomDetected field in the SA_DATA_HOB will be set to 1.
+
+ This is intended to ease the implementation of a BIOS feature to automatically enable CSM if the Primary Gfx device
+ only supports Legacy VBIOS (No UEFI GOP Present). Otherwise disabling CSM won't result in no video being displayed.
+ This is useful for platforms that implement PCIe slots that allow the end user to install an arbitrary Gfx device.
+
+ This setting will only take effect if SkipExtGfxScan == 0. It is ignored otherwise.
+
+ - Disabled (0x0) : Don't Scan for Legacy Only VGA OpROMs (Default)
+ - <b>Enabled</b> (0x1) : Scan External Gfx for Legacy Only VGA OpROM
+ **/
+ UINT32 ScanExtGfxForLegacyOpRom:1;
+ UINT32 RsvdBits0 :28; ///< OFfset 76:4 :Reserved for future use
+ UINT8 LockPTMregs; ///< <b>(Test)</b> Offset 80 Lock PCU Thermal Management registers: 0=FALSE, <b>1=TRUE</b>
+ UINT8 BdatTestType; ///< Offset 81 When BdatEnable is set to TRUE, this option selects the type of data which will be populated in the BIOS Data ACPI Tables: <b>0=RMT</b>, 1=RMT Per Bit, 2=Margin 2D.
+ UINT8 BdatSchema; ///< Offset 82 When BdatEnable is set to TRUE, this option selects the BDAT Schema version which will be used to format BDAT Test results: 0=Schema 2, <b>1=Schema 6B</b>
+ UINT8 Rsvd1; ///< Offset 83 Reserved for future use
+ /**
+ Offset 84 :
+ Size of reserved MMIO space for PCI devices\n
+ <b>0=AUTO</b>, 512=512MB, 768=768MB, 1024=1024MB, 1280=1280MB, 1536=1536MB, 1792=1792MB,
+ 2048=2048MB, 2304=2304MB, 2560=2560MB, 2816=2816MB, 3072=3072MB\n
+ When AUTO mode selected, the MMIO size will be calculated by required MMIO size from PCIe devices detected.
+ **/
+ UINT16 MmioSize;
+ INT16 MmioSizeAdjustment; ///< Offset 86 Increase (given positive value) or Decrease (given negative value) the Reserved MMIO size when Dynamic Tolud/AUTO mode enabled (in MBs): <b>0=no adjustment</b>
+ UINT64 AcpiReservedMemoryBase; ///< Offset 88 The Base address of a Reserved memory buffer allocated in previous boot for S3 resume used. Originally it is retrieved from AcpiVariableCompatibility variable.
+ UINT64 SystemMemoryLength; ///< Offset 96 Total system memory length from previous boot, this is required for S3 resume. Originally it is retrieved from AcpiVariableCompatibility variable.
+ UINT32 AcpiReservedMemorySize; ///< Offset 104 The Size of a Reserved memory buffer allocated in previous boot for S3 resume used. Originally it is retrieved from AcpiVariableCompatibility variable.
+ UINT32 OpRomScanTempMmioBar; ///< <b>(Test)</b> Offset 108 Temporary address to MMIO map OpROMs during VGA scanning. Used for ScanExtGfxForLegacyOpRom feature. MUST BE 16MB ALIGNED!
+ UINT32 OpRomScanTempMmioLimit; ///< <b>(Test)</b> Offset 112 Limit address for OpROM MMIO range. Used for ScanExtGfxForLegacyOpRom feature. (OpROMScanTempMmioLimit - OpRomScanTempMmioBar) MUST BE >= 16MB!
+ UINT16 SgDelayAfterOffMethod; ///< Offset 128 Dgpu Delay after off method is called using Setup option: 0=Minimal, 1000=Maximum, <b>300=300 microseconds</b>
+ UINT16 SgDelayAfterLinkEnable; ///< Offset 130 Delay after link enable method is called using Setup option: 0=Minimal, 1000=Maximum, <b>100=100 microseconds</b>
+ UINT8 SgGenSpeedChangeEnable; ///< Offset 132 Enable/Disable Gen speed changes using Setup option: 0=Disable, 1=Enable
+ UINT8 Rsvd3[3]; ///< Offset 133 Reserved for future use
} SA_MISC_PEI_PREMEM_CONFIG;
#pragma pack(pop)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.c b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.c
index eb18d993e7..5210856346 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.c
@@ -1,7 +1,7 @@
/** @file
This file provides services for PEI policy default initialization

-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -19,6 +19,9 @@ extern EFI_GUID gMemoryConfigNoCrcGuid;
extern EFI_GUID gGraphicsPeiConfigGuid;
extern EFI_GUID gVtdConfigGuid;

+#define DEFAULT_OPTION_ROM_TEMP_BAR 0x80000000
+#define DEFAULT_OPTION_ROM_TEMP_MEM_LIMIT 0xC0000000
+
//
// Function call to Load defaults for Individial IP Blocks
//
@@ -33,6 +36,38 @@ LoadSaMiscPeiPreMemDefault (

DEBUG ((DEBUG_INFO, "MiscPeiPreMemConfig->Header.GuidHob.Name = %g\n", &MiscPeiPreMemConfig->Header.GuidHob.Name));
DEBUG ((DEBUG_INFO, "MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x%x\n", MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength));
+
+ //
+ // Policy initialization commented out here is because it's the same with default 0 and no need to re-do again.
+ //
+ MiscPeiPreMemConfig->LockPTMregs = 1;
+
+ //
+ // Initialize the Platform Configuration
+ //
+ MiscPeiPreMemConfig->MchBar = (UINT32) PcdGet64 (PcdMchBaseAddress);
+ MiscPeiPreMemConfig->DmiBar = 0xFED18000;
+ MiscPeiPreMemConfig->EpBar = 0xFED19000;
+ MiscPeiPreMemConfig->EdramBar = 0xFED80000;
+ MiscPeiPreMemConfig->SmbusBar = PcdGet16 (PcdSmbusBaseAddress);
+ MiscPeiPreMemConfig->TsegSize = PcdGet32 (PcdTsegSize);
+ MiscPeiPreMemConfig->GdxcBar = 0xFED84000;
+
+ //
+ // Initialize the Switchable Graphics Default Configuration
+ //
+ MiscPeiPreMemConfig->SgDelayAfterHoldReset = 100; //100ms
+ MiscPeiPreMemConfig->SgDelayAfterPwrEn = 300; //300ms
+ MiscPeiPreMemConfig->SgDelayAfterOffMethod = 0;
+ MiscPeiPreMemConfig->SgDelayAfterLinkEnable = 0;
+ MiscPeiPreMemConfig->SgGenSpeedChangeEnable = 0;
+
+ ///
+ /// Initialize the DataPtr for S3 resume
+ ///
+ MiscPeiPreMemConfig->S3DataPtr = NULL;
+ MiscPeiPreMemConfig->OpRomScanTempMmioBar = DEFAULT_OPTION_ROM_TEMP_BAR;
+ MiscPeiPreMemConfig->OpRomScanTempMmioLimit = DEFAULT_OPTION_ROM_TEMP_MEM_LIMIT;
}

VOID
--
2.27.0.windows.1


Re: [PATCH v2 1/2] BaseTools: Define the read-only data section name per toolchain

Andrew Fish
 



On Aug 9, 2021, at 2:51 AM, Marvin Häuser <mhaeuser@...> wrote:

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3318

Different toolchains of the EDK II build system may generate ELF or
Mach-O files, which use the ".rodata" naming convention, or PE/COFF
files, which use the ".rdata" naming convention. Section permissions
are chosen based on this name per file format by NASM. To harden
image permission security, and to save space by avoiding both
".rdata" and ".rodata" sections being emitted, expose the appropriate
name as a preprocessor constant.

Cc: Bob Feng <bob.c.feng@...>
Cc: Liming Gao <gaoliming@...>
Cc: Yuwei Chen <yuwei.chen@...>
Cc: Vitaly Cheptsov <vit9696@...>
Signed-off-by: Marvin Häuser <mhaeuser@...>
---
BaseTools/Conf/tools_def.template | 172 ++++++++++----------
1 file changed, 86 insertions(+), 86 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 2e6b382ab623..84d464916c4d 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -463,9 +463,9 @@ NOOPT_VS2008_IA32_CC_FLAGS        = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2008_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2008_IA32_ASM_FLAGS       = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2008_IA32_NASM_FLAGS    = -Ox -f win32 -g

-RELEASE_VS2008_IA32_NASM_FLAGS    = -Ox -f win32

-NOOPT_VS2008_IA32_NASM_FLAGS      = -O0 -f win32 -g

+  DEBUG_VS2008_IA32_NASM_FLAGS    = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2008_IA32_NASM_FLAGS    = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2008_IA32_NASM_FLAGS      = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2008_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2008_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -495,9 +495,9 @@ NOOPT_VS2008_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2008_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2008_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2008_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2008_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2008_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2008_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2008_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2008_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2008_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2008_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -574,9 +574,9 @@ NOOPT_VS2008x86_IA32_CC_FLAGS      = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2008x86_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2008x86_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2008x86_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2008x86_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2008x86_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2008x86_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2008x86_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2008x86_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2008x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2008x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -605,9 +605,9 @@ NOOPT_VS2008x86_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2008x86_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2008x86_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2008x86_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2008x86_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2008x86_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2008x86_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2008x86_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2008x86_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2008x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2008x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -688,9 +688,9 @@ NOOPT_VS2010_IA32_CC_FLAGS        = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2010_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2010_IA32_ASM_FLAGS       = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2010_IA32_NASM_FLAGS    = -Ox -f win32 -g

-RELEASE_VS2010_IA32_NASM_FLAGS    = -Ox -f win32

-NOOPT_VS2010_IA32_NASM_FLAGS      = -O0 -f win32 -g

+  DEBUG_VS2010_IA32_NASM_FLAGS    = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2010_IA32_NASM_FLAGS    = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2010_IA32_NASM_FLAGS      = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2010_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2010_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -720,9 +720,9 @@ NOOPT_VS2010_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2010_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2010_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2010_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2010_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2010_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2010_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2010_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2010_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2010_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2010_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -799,9 +799,9 @@ NOOPT_VS2010x86_IA32_CC_FLAGS      = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2010x86_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2010x86_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2010x86_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2010x86_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2010x86_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2010x86_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2010x86_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2010x86_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2010x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2010x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -831,9 +831,9 @@ NOOPT_VS2010x86_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2010x86_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2010x86_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2010x86_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2010x86_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2010x86_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2010x86_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2010x86_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2010x86_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2010x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2010x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -913,9 +913,9 @@ NOOPT_VS2012_IA32_CC_FLAGS        = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2012_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2012_IA32_ASM_FLAGS       = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2012_IA32_NASM_FLAGS    = -Ox -f win32 -g

-RELEASE_VS2012_IA32_NASM_FLAGS    = -Ox -f win32

-NOOPT_VS2012_IA32_NASM_FLAGS      = -O0 -f win32 -g

+  DEBUG_VS2012_IA32_NASM_FLAGS    = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2012_IA32_NASM_FLAGS    = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2012_IA32_NASM_FLAGS      = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2012_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2012_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -945,9 +945,9 @@ NOOPT_VS2012_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2012_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2012_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2012_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2012_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2012_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2012_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2012_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2012_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2012_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2012_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1024,9 +1024,9 @@ NOOPT_VS2012x86_IA32_CC_FLAGS      = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2012x86_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2012x86_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2012x86_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2012x86_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2012x86_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2012x86_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2012x86_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2012x86_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2012x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2012x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1056,9 +1056,9 @@ NOOPT_VS2012x86_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2012x86_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2012x86_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2012x86_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2012x86_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2012x86_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2012x86_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2012x86_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2012x86_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2012x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2012x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1138,9 +1138,9 @@ NOOPT_VS2013_IA32_CC_FLAGS        = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2013_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2013_IA32_ASM_FLAGS       = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2013_IA32_NASM_FLAGS    = -Ox -f win32 -g

-RELEASE_VS2013_IA32_NASM_FLAGS    = -Ox -f win32

-NOOPT_VS2013_IA32_NASM_FLAGS      = -O0 -f win32 -g

+  DEBUG_VS2013_IA32_NASM_FLAGS    = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2013_IA32_NASM_FLAGS    = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2013_IA32_NASM_FLAGS      = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2013_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2013_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1170,9 +1170,9 @@ NOOPT_VS2013_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2013_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2013_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2013_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2013_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2013_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2013_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2013_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2013_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2013_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2013_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1249,9 +1249,9 @@ NOOPT_VS2013x86_IA32_CC_FLAGS      = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2013x86_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2013x86_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2013x86_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2013x86_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2013x86_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2013x86_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2013x86_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2013x86_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2013x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2013x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1281,9 +1281,9 @@ NOOPT_VS2013x86_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2013x86_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2013x86_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2013x86_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2013x86_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2013x86_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2013x86_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2013x86_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2013x86_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2013x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2013x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1364,9 +1364,9 @@ NOOPT_VS2015_IA32_CC_FLAGS        = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2015_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2015_IA32_ASM_FLAGS       = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2015_IA32_NASM_FLAGS    = -Ox -f win32 -g

-RELEASE_VS2015_IA32_NASM_FLAGS    = -Ox -f win32

-NOOPT_VS2015_IA32_NASM_FLAGS      = -O0 -f win32 -g

+  DEBUG_VS2015_IA32_NASM_FLAGS    = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2015_IA32_NASM_FLAGS    = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2015_IA32_NASM_FLAGS      = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2015_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2015_IA32_DLINK_FLAGS   = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1396,9 +1396,9 @@ NOOPT_VS2015_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2015_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2015_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2015_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2015_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2015_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2015_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2015_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2015_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2015_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2015_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1476,9 +1476,9 @@ NOOPT_VS2015x86_IA32_CC_FLAGS      = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768
RELEASE_VS2015x86_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2015x86_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2015x86_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2015x86_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2015x86_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2015x86_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2015x86_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2015x86_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2015x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2015x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1508,9 +1508,9 @@ NOOPT_VS2015x86_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE
RELEASE_VS2015x86_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2015x86_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2015x86_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2015x86_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2015x86_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2015x86_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2015x86_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2015x86_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2015x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2015x86_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1586,9 +1586,9 @@ NOOPT_VS2017_IA32_CC_FLAGS      = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D
RELEASE_VS2017_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2017_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2017_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2017_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2017_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2017_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2017_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2017_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2017_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2017_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1616,9 +1616,9 @@ NOOPT_VS2017_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2017_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2017_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2017_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2017_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2017_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2017_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2017_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2017_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2017_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2017_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1744,9 +1744,9 @@ NOOPT_VS2019_IA32_CC_FLAGS      = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D
RELEASE_VS2019_IA32_ASM_FLAGS   = /nologo /c /WX /W3 /Cx /coff /Zd

NOOPT_VS2019_IA32_ASM_FLAGS     = /nologo /c /WX /W3 /Cx /coff /Zd /Zi



-  DEBUG_VS2019_IA32_NASM_FLAGS  = -Ox -f win32 -g

-RELEASE_VS2019_IA32_NASM_FLAGS  = -Ox -f win32

-NOOPT_VS2019_IA32_NASM_FLAGS    = -O0 -f win32 -g

+  DEBUG_VS2019_IA32_NASM_FLAGS  = -Ox -f win32 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2019_IA32_NASM_FLAGS  = -Ox -f win32 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2019_IA32_NASM_FLAGS    = -O0 -f win32 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2019_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2019_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -1774,9 +1774,9 @@ NOOPT_VS2019_X64_CC_FLAGS       = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /G
RELEASE_VS2019_X64_ASM_FLAGS    = /nologo /c /WX /W3 /Cx /Zd

NOOPT_VS2019_X64_ASM_FLAGS      = /nologo /c /WX /W3 /Cx /Zd /Zi



-  DEBUG_VS2019_X64_NASM_FLAGS   = -Ox -f win64 -g

-RELEASE_VS2019_X64_NASM_FLAGS   = -Ox -f win64

-NOOPT_VS2019_X64_NASM_FLAGS     = -O0 -f win64 -g

+  DEBUG_VS2019_X64_NASM_FLAGS   = -Ox -f win64 -g -DRODATA_SECTION_NAME=.rdata

+RELEASE_VS2019_X64_NASM_FLAGS   = -Ox -f win64 -DRODATA_SECTION_NAME=.rdata

+NOOPT_VS2019_X64_NASM_FLAGS     = -O0 -f win64 -g -DRODATA_SECTION_NAME=.rdata



  DEBUG_VS2019_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG

RELEASE_VS2019_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data

@@ -2030,7 +2030,7 @@ DEFINE GCC_PP_FLAGS                        = -E -x assembler-with-cpp -include A
*_GCC48_IA32_DLINK2_FLAGS         = DEF(GCC48_IA32_DLINK2_FLAGS)

*_GCC48_IA32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)

*_GCC48_IA32_OBJCOPY_FLAGS        =

-*_GCC48_IA32_NASM_FLAGS           = -f elf32

+*_GCC48_IA32_NASM_FLAGS           = -f elf32 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC48_IA32_CC_FLAGS       = DEF(GCC48_IA32_CC_FLAGS) -Os

RELEASE_GCC48_IA32_CC_FLAGS       = DEF(GCC48_IA32_CC_FLAGS) -Os -Wno-unused-but-set-variable

@@ -2058,7 +2058,7 @@ RELEASE_GCC48_IA32_CC_FLAGS       = DEF(GCC48_IA32_CC_FLAGS) -Os -Wno-unused-but
*_GCC48_X64_DLINK2_FLAGS         = DEF(GCC48_X64_DLINK2_FLAGS)

*_GCC48_X64_RC_FLAGS             = DEF(GCC_X64_RC_FLAGS)

*_GCC48_X64_OBJCOPY_FLAGS        =

-*_GCC48_X64_NASM_FLAGS           = -f elf64

+*_GCC48_X64_NASM_FLAGS           = -f elf64 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC48_X64_CC_FLAGS       = DEF(GCC48_X64_CC_FLAGS) -Os

RELEASE_GCC48_X64_CC_FLAGS       = DEF(GCC48_X64_CC_FLAGS) -Os -Wno-unused-but-set-variable

@@ -2170,7 +2170,7 @@ RELEASE_GCC48_AARCH64_CC_FLAGS   = DEF(GCC48_AARCH64_CC_FLAGS) -Wno-unused-but-s
*_GCC49_IA32_DLINK2_FLAGS         = DEF(GCC49_IA32_DLINK2_FLAGS)

*_GCC49_IA32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)

*_GCC49_IA32_OBJCOPY_FLAGS        =

-*_GCC49_IA32_NASM_FLAGS           = -f elf32

+*_GCC49_IA32_NASM_FLAGS           = -f elf32 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC49_IA32_CC_FLAGS       = DEF(GCC49_IA32_CC_FLAGS) -Os

RELEASE_GCC49_IA32_CC_FLAGS       = DEF(GCC49_IA32_CC_FLAGS) -Os -Wno-unused-but-set-variable -Wno-unused-const-variable

@@ -2198,7 +2198,7 @@ RELEASE_GCC49_IA32_CC_FLAGS       = DEF(GCC49_IA32_CC_FLAGS) -Os -Wno-unused-but
*_GCC49_X64_DLINK2_FLAGS         = DEF(GCC49_X64_DLINK2_FLAGS)

*_GCC49_X64_RC_FLAGS             = DEF(GCC_X64_RC_FLAGS)

*_GCC49_X64_OBJCOPY_FLAGS        =

-*_GCC49_X64_NASM_FLAGS           = -f elf64

+*_GCC49_X64_NASM_FLAGS           = -f elf64 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC49_X64_CC_FLAGS       = DEF(GCC49_X64_CC_FLAGS) -Os

RELEASE_GCC49_X64_CC_FLAGS       = DEF(GCC49_X64_CC_FLAGS) -Os -Wno-unused-but-set-variable -Wno-unused-const-variable

@@ -2316,7 +2316,7 @@ RELEASE_GCC49_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
*_GCC5_IA32_DLINK2_FLAGS         = DEF(GCC5_IA32_DLINK2_FLAGS) -no-pie

*_GCC5_IA32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)

*_GCC5_IA32_OBJCOPY_FLAGS        =

-*_GCC5_IA32_NASM_FLAGS           = -f elf32

+*_GCC5_IA32_NASM_FLAGS           = -f elf32 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC5_IA32_CC_FLAGS       = DEF(GCC5_IA32_CC_FLAGS) -flto -Os

  DEBUG_GCC5_IA32_DLINK_FLAGS    = DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386

@@ -2348,7 +2348,7 @@ RELEASE_GCC5_IA32_DLINK_FLAGS    = DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,
*_GCC5_X64_DLINK2_FLAGS          = DEF(GCC5_X64_DLINK2_FLAGS)

*_GCC5_X64_RC_FLAGS              = DEF(GCC_X64_RC_FLAGS)

*_GCC5_X64_OBJCOPY_FLAGS         =

-*_GCC5_X64_NASM_FLAGS            = -f elf64

+*_GCC5_X64_NASM_FLAGS            = -f elf64 -DRODATA_SECTION_NAME=.rodata



  DEBUG_GCC5_X64_CC_FLAGS        = DEF(GCC5_X64_CC_FLAGS) -flto -DUSING_LTO -Os

  DEBUG_GCC5_X64_DLINK_FLAGS     = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os

@@ -2589,7 +2589,7 @@ DEFINE CLANG38_ALL_CC_FLAGS         = DEF(GCC48_ALL_CC_FLAGS) DEF(CLANG38_WARNIN
*_CLANG38_IA32_ASM_FLAGS            = DEF(GCC5_ASM_FLAGS) -m32 -march=i386 DEF(CLANG38_IA32_TARGET)

*_CLANG38_IA32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)

*_CLANG38_IA32_OBJCOPY_FLAGS        =

-*_CLANG38_IA32_NASM_FLAGS           = -f elf32

+*_CLANG38_IA32_NASM_FLAGS           = -f elf32 -DRODATA_SECTION_NAME=.rodata

*_CLANG38_IA32_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANG38_IA32_TARGET)

*_CLANG38_IA32_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANG38_IA32_TARGET)

*_CLANG38_IA32_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANG38_IA32_TARGET)

@@ -2626,7 +2626,7 @@ NOOPT_CLANG38_IA32_DLINK2_FLAGS     = DEF(GCC5_IA32_DLINK2_FLAGS) -O0
*_CLANG38_X64_ASM_FLAGS            = DEF(GCC5_ASM_FLAGS) -m64 DEF(CLANG38_X64_TARGET)

*_CLANG38_X64_RC_FLAGS             = DEF(GCC_X64_RC_FLAGS)

*_CLANG38_X64_OBJCOPY_FLAGS        =

-*_CLANG38_X64_NASM_FLAGS           = -f elf64

+*_CLANG38_X64_NASM_FLAGS           = -f elf64 -DRODATA_SECTION_NAME=.rodata

*_CLANG38_X64_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANG38_X64_TARGET)

*_CLANG38_X64_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANG38_X64_TARGET)

*_CLANG38_X64_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANG38_X64_TARGET)

@@ -2777,7 +2777,7 @@ DEFINE CLANGPDB_ALL_CC_FLAGS         = DEF(GCC48_ALL_CC_FLAGS) DEF(CLANGPDB_WARN
*_CLANGPDB_IA32_ASLCC_FLAGS          = DEF(GCC_ASLCC_FLAGS) -m32 -fno-lto DEF(CLANGPDB_IA32_TARGET)

*_CLANGPDB_IA32_ASM_FLAGS            = DEF(GCC_ASM_FLAGS) -m32 -march=i386 DEF(CLANGPDB_IA32_TARGET)

*_CLANGPDB_IA32_OBJCOPY_FLAGS        =

-*_CLANGPDB_IA32_NASM_FLAGS           = -f win32

+*_CLANGPDB_IA32_NASM_FLAGS           = -f win32 -DRODATA_SECTION_NAME=.rdata

*_CLANGPDB_IA32_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANGPDB_IA32_TARGET)

*_CLANGPDB_IA32_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANGPDB_IA32_TARGET)

*_CLANGPDB_IA32_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANGPDB_IA32_TARGET)

@@ -2811,7 +2811,7 @@ NOOPT_CLANGPDB_IA32_DLINK2_FLAGS     =
*_CLANGPDB_X64_ASLCC_FLAGS          = DEF(GCC_ASLCC_FLAGS) -m64 -fno-lto DEF(CLANGPDB_X64_TARGET)

*_CLANGPDB_X64_ASM_FLAGS            = DEF(GCC_ASM_FLAGS) -m64 DEF(CLANGPDB_X64_TARGET)

*_CLANGPDB_X64_OBJCOPY_FLAGS        =

-*_CLANGPDB_X64_NASM_FLAGS           = -f win64

+*_CLANGPDB_X64_NASM_FLAGS           = -f win64 -DRODATA_SECTION_NAME=.rdata

*_CLANGPDB_X64_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANGPDB_X64_TARGET)

*_CLANGPDB_X64_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANGPDB_X64_TARGET)

*_CLANGPDB_X64_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANGPDB_X64_TARGET)

@@ -2878,7 +2878,7 @@ DEFINE CLANGDWARF_X64_DLINK2_FLAGS        = -Wl,--defsym=PECOFF_HEADER_SIZE=0x22
*_CLANGDWARF_IA32_ASM_FLAGS            = DEF(GCC5_ASM_FLAGS) -m32 -march=i386 DEF(CLANG38_IA32_TARGET)

*_CLANGDWARF_IA32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)

*_CLANGDWARF_IA32_OBJCOPY_FLAGS        =

-*_CLANGDWARF_IA32_NASM_FLAGS           = -f elf32

+*_CLANGDWARF_IA32_NASM_FLAGS           = -f elf32 -DRODATA_SECTION_NAME=.rodata

*_CLANGDWARF_IA32_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANG38_IA32_TARGET)

*_CLANGDWARF_IA32_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANG38_IA32_TARGET)

*_CLANGDWARF_IA32_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANG38_IA32_TARGET)

@@ -2914,7 +2914,7 @@ NOOPT_CLANGDWARF_IA32_DLINK2_FLAGS     = DEF(CLANGDWARF_IA32_DLINK2_FLAGS) -O0 -
*_CLANGDWARF_X64_ASM_FLAGS            = DEF(GCC5_ASM_FLAGS) -m64 DEF(CLANG38_X64_TARGET)

*_CLANGDWARF_X64_RC_FLAGS             = DEF(GCC_X64_RC_FLAGS)

*_CLANGDWARF_X64_OBJCOPY_FLAGS        =

-*_CLANGDWARF_X64_NASM_FLAGS           = -f elf64

+*_CLANGDWARF_X64_NASM_FLAGS           = -f elf64 -DRODATA_SECTION_NAME=.rodata

*_CLANGDWARF_X64_PP_FLAGS             = DEF(GCC_PP_FLAGS) DEF(CLANG38_X64_TARGET)

*_CLANGDWARF_X64_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANG38_X64_TARGET)

*_CLANGDWARF_X64_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANG38_X64_TARGET)

@@ -2985,7 +2985,7 @@ RELEASE_XCODE5_IA32_DLINK_FLAGS      = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$
  DEBUG_XCODE5_IA32_ASM_FLAGS  = -arch i386 -g

  NOOPT_XCODE5_IA32_ASM_FLAGS  = -arch i386 -g

RELEASE_XCODE5_IA32_ASM_FLAGS  = -arch i386

-      *_XCODE5_IA32_NASM_FLAGS = -f macho32

+      *_XCODE5_IA32_NASM_FLAGS = -f macho32 -DRODATA_SECTION_NAME=.rodata




An EFI Mach-O file does not contain a .rodata section. A Mach-O contains a __DATA segment that is broken up into sections. For a typical EFI image there are __const, __data, __bss sections in the __DATA segment [1].

The mtoc [2] tool used to convert mach-O to PE/COFF converts the entire __DATA segment (__const, __data, and __bss) into the .data section. Thus adding any kind of new data section is a no-op at best. 

If you want something to be read only for Xcode/clang you are better off putting it in the __TEXT section [3]. The __TEXT section is read only and for X64 can not even contain relocations. 

[1] otool -lh DxeCore.dll
...
Load command 1
      cmd LC_SEGMENT_64
  cmdsize 312
  segname __DATA
   vmaddr 0x000000000002b000
   vmsize 0x0000000000147000
  fileoff 180224
 filesize 8192
  maxprot 0x00000003
 initprot 0x00000003
   nsects 3
    flags 0x0
Section
  sectname __const
   segname __DATA
      addr 0x000000000002b000
      size 0x0000000000000718
    offset 180224
     align 2^4 (16)
    reloff 0
    nreloc 0
     flags 0x00000000
 reserved1 0
 reserved2 0
Section
  sectname __data
   segname __DATA
      addr 0x000000000002b720
      size 0x00000000000014f0
    offset 182048
     align 2^4 (16)
    reloff 0
    nreloc 0
     flags 0x00000000
 reserved1 0
 reserved2 0
Section
  sectname __bss
   segname __DATA
      addr 0x000000000002cc10
      size 0x0000000000144e11
    offset 0
     align 2^4 (16)
    reloff 0
    nreloc 0
     flags 0x00000001
 reserved1 0
 reserved2 0


[3] otool more output…
Load command 0
      cmd LC_SEGMENT_64
  cmdsize 392
  segname __TEXT
   vmaddr 0x0000000000000240
   vmsize 0x00000000000296c0
  fileoff 1184
 filesize 169664
  maxprot 0x00000005
 initprot 0x00000005
   nsects 4
    flags 0x0
Section
  sectname __text
   segname __TEXT
      addr 0x0000000000000240
      size 0x000000000002489f
    offset 1184
     align 2^3 (8)
    reloff 0
    nreloc 0
     flags 0x80000400
 reserved1 0
 reserved2 0
Section
  sectname __cstring
   segname __TEXT
      addr 0x0000000000024ae0
      size 0x000000000000496d
    offset 150848
     align 2^4 (16)
    reloff 0
    nreloc 0
     flags 0x00000002
 reserved1 0
 reserved2 0
Section
  sectname __ustring
   segname __TEXT
      addr 0x000000000002944e
      size 0x0000000000000048
    offset 169646
     align 2^1 (2)
    reloff 0
    nreloc 0
     flags 0x00000000
 reserved1 0
 reserved2 0
Section
  sectname __const
   segname __TEXT
      addr 0x00000000000294a0
      size 0x0000000000000448
    offset 169728
     align 2^4 (16)
    reloff 0
    nreloc 0
     flags 0x00000000
 reserved1 0
 reserved2 0

Thanks,

Andrew Fish



  DEBUG_XCODE5_IA32_CC_FLAGS   = -arch i386 -c -g -Os       -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS)

@@ -3003,7 +3003,7 @@ RELEASE_XCODE5_X64_DLINK_FLAGS      = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _
  DEBUG_XCODE5_X64_ASM_FLAGS  = -arch x86_64 -g

  NOOPT_XCODE5_X64_ASM_FLAGS  = -arch x86_64 -g

RELEASE_XCODE5_X64_ASM_FLAGS  = -arch x86_64

-      *_XCODE5_X64_NASM_FLAGS = -f macho64

+      *_XCODE5_X64_NASM_FLAGS = -f macho64 -DRODATA_SECTION_NAME=.rodata

*_XCODE5_*_PP_FLAGS         = -E -x assembler-with-cpp -include AutoGen.h

*_XCODE5_*_VFRPP_FLAGS      = -x c -E -P -DVFRCOMPILE -include $(MODULE_NAME)StrDefs.h



--
2.31.1









Re: [PATCH EDK2 v2 1/1] MdeModulePkg/UefiSortLib:Add UefiSortLib unit test

Wu, Hao A
 

Sorry Mike,

Do you have advice on how to deal with ECC reporting function naming issue on the 'main' function for unit test cases?
So far, I think Wenyi has tried following the same pattern in file MdeModulePkg\Universal\Variable\RuntimeDxe\RuntimeDxeUnitTest\VariableLockRequestToLockUnitTest.c:

///
/// Avoid ECC error for function name that starts with lower case letter
///
#define Main main

/**
Standard POSIX C entry point for host based unit test execution.

@param[in] Argc Number of arguments
@param[in] Argv Array of pointers to arguments

@retval 0 Success
@retval other Error
**/
INT32
Main (
IN INT32 Argc,
IN CHAR8 *Argv[]
)

But it looks like the ECC checker in the merge test is still complaining.

Best Regards,
Hao Wu

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Wu, Hao
A
Sent: Wednesday, August 4, 2021 4:24 PM
To: xiewenyi (A) <xiewenyi2@...>; Kinney, Michael D
<michael.d.kinney@...>; devel@edk2.groups.io
Cc: songdongkuang@...; Wang, Jian J <jian.j.wang@...>
Subject: Re: [edk2-devel] [PATCH EDK2 v2 1/1]
MdeModulePkg/UefiSortLib:Add UefiSortLib unit test

-----Original Message-----
From: xiewenyi (A) <xiewenyi2@...>
Sent: Wednesday, August 4, 2021 4:05 PM
To: Wu, Hao A <hao.a.wu@...>; devel@edk2.groups.io
Cc: songdongkuang@...; Wang, Jian J <jian.j.wang@...>
Subject: Re: [edk2-devel] [PATCH EDK2 v2 1/1]
MdeModulePkg/UefiSortLib:Add UefiSortLib unit test



On 2021/8/2 9:56, Wu, Hao A wrote:
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Wu,
Hao A
Sent: Thursday, July 29, 2021 4:26 PM
To: Wenyi Xie <xiewenyi2@...>; devel@edk2.groups.io; Wang,
Jian J <jian.j.wang@...>
Cc: songdongkuang@...
Subject: Re: [edk2-devel] [PATCH EDK2 v2 1/1]
MdeModulePkg/UefiSortLib:Add UefiSortLib unit test

-----Original Message-----
From: Wenyi Xie <xiewenyi2@...>
Sent: Thursday, July 29, 2021 4:01 PM
To: devel@edk2.groups.io; Wang, Jian J <jian.j.wang@...>;
Wu, Hao A <hao.a.wu@...>
Cc: songdongkuang@...; xiewenyi2@...
Subject: [PATCH EDK2 v2 1/1] MdeModulePkg/UefiSortLib:Add
UefiSortLib unit test

Adding two unit test case for UefiSortLib. One is a test on
sorting an array of
UINT32 by using PerformQuickSort, another is a test on comparing
the same buffer by using StringCompare.

Thanks.
Reviewed-by: Hao A Wu <hao.a.wu@...>

Sorry, I found that there are a couple of coding format style check
failures
when merging the patch.
Could you help to resolve them and then create a test pull request
on the
GitHub for verification? Thanks in advance.
(I think you can take the case under
MdeModulePkg/Universal/Variable/RuntimeDxe/RuntimeDxeUnitTest/
for
reference.)
Hi, Wu Hao

I try to deal with the coding format style check failures, and meet a
failure which I am not sure how to solve.
I take the case you told for reference, but still there's a failure
said the define should be capital letters.
but if change it to capital letters, there will be another error
Function name does not follow the rules: 1. First character should be
upper case 2. Must contain lower case characters 3. No white space
characters

#define Main main

INT32
Main (
IN INT32 Argc,
IN CHAR8 *Argv[]
)
{
UnitTestingEntry ();
return 0;
}

Hello Mike,

I saw the below commit:
SHA-1: dcaa93936591883aa7826eb45ef00416ad82ef08
* MdeModulePkg/Variable/RuntimeDxe: Add Variable Lock Protocol Unit
Tests has a similar case that should involve the naming of the 'main' function
within the unit test codes.

I am wondering how the open raised by Wenyi was handled back then.
Do you have suggestions for this case? Thanks in advance.

Best Regards,
Hao Wu



Thanks
Wenyi

Error details:
2021-08-02T01:09:28.5955820Z ##[section]Starting: Build and Test
MdeModulePkg IA32,X64,ARM,AARCH64,RISCV64 2021-08-
02T01:09:28.5960733Z
==========================================================
=======
=============
2021-08-02T01:09:28.5961018Z Task : Command Line
2021-08-02T01:09:28.5961258Z Description : Run a command line with
arguments
2021-08-02T01:09:28.5961502Z Version : 1.1.3
2021-08-02T01:09:28.5961897Z Author : Microsoft Corporation
2021-08-02T01:09:28.5962259Z Help : [More
Information](https://go.microsoft.com/fwlink/?LinkID=613735)
2021-08-02T01:09:28.5962678Z
==========================================================
=======
=====
======== 2021-08-02T01:09:29.3504946Z (node:3659) Warning: Use
Cipheriv for counter mode of aes-256-ctr
2021-08-02T01:09:29.3510020Z
(node:3659) Warning: Use Cipheriv for counter mode of aes-256-ctr
2021-08-02T01:09:29.3511551Z (node:3659) Warning: Use Cipheriv for
counter mode of aes-256-ctr 2021-08-02T01:09:29.3513605Z (node:3659)
Warning: Use Cipheriv for counter mode of aes-256-ctr
2021-08-02T01:09:29.3516798Z (node:3659) Warning: Use Cipheriv for
counter mode of aes-256-ctr 2021-08-02T01:09:29.3517536Z (node:3659)
Warning: Use Cipheriv for counter mode of aes-256-ctr
2021-08-02T01:09:29.3518178Z (node:3659) Warning: Use Cipheriv for
counter mode of aes-256-ctr 2021-08-02T01:09:29.3545461Z
[command]/opt/hostedtoolcache/Python/3.8.11/x64/bin/stuart_ci_build
-c .pytool/CISettings.py -p MdeModulePkg -t RELEASE,NO-TARGET -a
IA32,X64,ARM,AARCH64,RISCV64 TOOL_CHAIN_TAG=GCC5
2021-08-02T01:09:29.3546707Z SECTION - Init SDE
2021-08-02T01:09:29.3547571Z WARNING - Using Pip Tools based
BaseTools 2021-08-02T01:09:29.3548395Z SECTION - Loading Plugins
2021-08-02T01:09:29.3549212Z SECTION - Start Invocable Tool
2021-08-02T01:09:29.3550018Z SECTION - Getting Environment
2021-08-02T01:09:29.3550794Z SECTION - Loading plugins
2021-08-02T01:09:29.3551675Z SECTION - Building MdeModulePkg
Package
2021-08-02T01:09:29.3552693Z PROGRESS - --Running MdeModulePkg:
EccCheck Test NO-TARGET -- 2021-08-02T01:09:33.0697006Z ERROR -
2021-08-02T01:09:33.0698018Z ERROR - EFI coding style error
2021-08-02T01:09:33.0698748Z ERROR - *Error code: 5007
2021-08-02T01:09:33.0700631Z ERROR - *There should be no
initialization of a variable as part of its declaration
2021-08-02T01:09:33.0702675Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0703421Z ERROR - *Line number:
77 2021-08-02T01:09:33.0703929Z ERROR - *Variable Name: TestCount
2021-08-02T01:09:33.0715684Z ERROR - 2021-08-02T01:09:33.0716634Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0717372Z ERROR -
*Error code: 5007 2021-08-02T01:09:33.0718214Z ERROR - *There should
be no initialization of a variable as part of its declaration
2021-08-02T01:09:33.0719195Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0720631Z ERROR - *Line number:
78 2021-08-02T01:09:33.0721451Z ERROR - *Variable Name: TestBuffer
2021-08-02T01:09:33.0722114Z ERROR - 2021-08-02T01:09:33.0724953Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0725713Z ERROR -
*Error code: 5007 2021-08-02T01:09:33.0726562Z ERROR - *There should
be no initialization of a variable as part of its declaration
2021-08-02T01:09:33.0727526Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0728345Z ERROR - *Line number:
79 2021-08-02T01:09:33.0729046Z ERROR - *Variable Name: TestResult
2021-08-02T01:09:33.0729694Z ERROR - 2021-08-02T01:09:33.0732496Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0733224Z ERROR -
*Error code: 7001 2021-08-02T01:09:33.0734114Z ERROR - *There should
be no use of int, unsigned, char, void, long in any .c, .h or .asl
files 2021-08-02T01:09:33.0737620Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0739185Z ERROR - *Line number:
117 2021-08-02T01:09:33.0741301Z ERROR - *[main] Return type int
2021-08-02T01:09:33.0744099Z ERROR - 2021-08-02T01:09:33.0744829Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0745459Z ERROR -
*Error code: 7001 2021-08-02T01:09:33.0746821Z ERROR - *There should
be no use of int, unsigned, char, void, long in any .c, .h or .asl
files 2021-08-02T01:09:33.0747774Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0749076Z ERROR - *Line number:
117 2021-08-02T01:09:33.0749713Z ERROR - *Parameter argc
2021-08-02T01:09:33.0750999Z ERROR - 2021-08-02T01:09:33.0751607Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0754599Z ERROR -
*Error code: 7001 2021-08-02T01:09:33.0761175Z ERROR - *There should
be no use of int, unsigned, char, void, long in any .c, .h or .asl
files 2021-08-02T01:09:33.0762167Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0763160Z ERROR - *Line number:
117 2021-08-02T01:09:33.0763741Z ERROR - *Parameter argv
2021-08-02T01:09:33.0764290Z ERROR - 2021-08-02T01:09:33.0764843Z
ERROR - EFI coding style error 2021-08-02T01:09:33.0766810Z ERROR -
*Error code: 8006 2021-08-02T01:09:33.0767819Z ERROR - *Function
name does not follow the rules: 1. First character should be upper case 2.
Must contain lower case characters 3. No white space characters
2021-08-02T01:09:33.0768881Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0769619Z ERROR - *Line number:
181 2021-08-02T01:09:33.0773329Z ERROR - *The function name [main]
does not follow the rules 2021-08-02T01:09:33.0791935Z ERROR -
2021-08-02T01:09:33.0793865Z ERROR - EFI coding style error
2021-08-02T01:09:33.0794555Z ERROR - *Error code: 9002
2021-08-02T01:09:33.0795350Z ERROR - *The function headers should
follow Doxygen special documentation blocks in section 2.3.5
2021-08-02T01:09:33.0796271Z ERROR - *file:
//home/vsts/work/1/s/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiS
or tLibUnitTest.c 2021-08-02T01:09:33.0796985Z ERROR - *Line number:
178 2021-08-02T01:09:33.0797610Z ERROR - *No doxygen tags in comment
2021-08-02T01:09:33.0798208Z ERROR - 2021-08-02T01:09:33.0798859Z
ERROR - --->Test Failed: EccCheck Test NO-TARGET returned 1
2021-08-02T01:09:33.0807351Z PROGRESS - --Running MdeModulePkg:
Dsc
Complete Check Test NO-TARGET -- 2021-08-02T01:09:33.1524790Z
PROGRESS
- --->Test Success: Dsc Complete Check Test NO-TARGET
2021-08-02T01:09:33.1536004Z PROGRESS - --Running MdeModulePkg:
Char
Encoding Check Test NO-TARGET -- 2021-08-02T01:09:33.6280380Z
PROGRESS
- --->Test Success: Char Encoding Check Test NO-TARGET
2021-08-02T01:09:33.6289076Z PROGRESS - --Running MdeModulePkg:
License Check Test NO-TARGET -- 2021-08-02T01:09:33.6495642Z
PROGRESS
- --->Test Success: License Check Test NO-TARGET
2021-08-02T01:09:33.6508125Z PROGRESS - --Running MdeModulePkg:
Compiler Plugin RELEASE -- 2021-08-02T01:09:33.6785178Z PROGRESS -
Start time: 2021-08-02 01:09:33.677952 2021-08-02T01:09:33.6787716Z
PROGRESS - Setting up the Environment 2021-08-02T01:09:33.7725244Z
PROGRESS - Running Pre Build 2021-08-02T01:09:33.7740357Z PROGRESS -
Running Build RELEASE 2021-08-02T01:17:18.5479885Z PROGRESS - Running
Post Build
2021-08-02T01:17:18.5511807Z PROGRESS - End time: 2021-08-02
01:17:18.549974 Total time Elapsed: 0:07:44
2021-08-02T01:17:18.5512997Z PROGRESS - --->Test Success: Compiler
Plugin RELEASE 2021-08-02T01:17:18.5519284Z PROGRESS - --Running
MdeModulePkg: Library Class Check Test NO-TARGET --
2021-08-02T01:17:18.5639216Z PROGRESS - --->Test Success: Library
Class Check Test NO-TARGET 2021-08-02T01:17:18.5648791Z PROGRESS -
--Running MdeModulePkg: Dependency Check Test NO-TARGET --
2021-08-02T01:17:18.7306611Z PROGRESS - --->Test Success: Dependency
Check Test NO-TARGET 2021-08-02T01:17:18.7316162Z PROGRESS -
--Running
MdeModulePkg: Spell Check Test NO-TARGET --
2021-08-02T01:17:23.7922166Z WARNING - --->Test Skipped: in plugin!
Spell Check Test NO-TARGET 2021-08-02T01:17:23.7934112Z PROGRESS -
--Running MdeModulePkg: Guid Check Test NO-TARGET --
2021-08-02T01:17:27.1928850Z PROGRESS - --->Test Success: Guid Check
Test NO-TARGET 2021-08-02T01:17:27.1939129Z PROGRESS - --Running
MdeModulePkg: Host Unit Test Dsc Complete Check Test NO-TARGET --
2021-08-02T01:17:27.3703640Z PROGRESS - --->Test Success: Host Unit
Test Dsc Complete Check Test NO-TARGET 2021-08-02T01:17:27.3731676Z
ERROR - Overall Build Status: Error 2021-08-02T01:17:27.3733283Z
PROGRESS - There were 1 failures out of 10 attempts
2021-08-02T01:17:27.3734501Z SECTION - Summary
2021-08-02T01:17:27.3735613Z ERROR - Error
2021-08-02T01:17:27.4159842Z
##[error]/opt/hostedtoolcache/Python/3.8.11/x64/bin/stuart_ci_build
failed with return code: 1 2021-08-02T01:17:27.4173134Z
##[error]/opt/hostedtoolcache/Python/3.8.11/x64/bin/stuart_ci_build
failed with error:
/opt/hostedtoolcache/Python/3.8.11/x64/bin/stuart_ci_build failed
with return code: 1 2021-08-02T01:17:27.4178252Z ##[section]Finishing:
Build and Test MdeModulePkg IA32,X64,ARM,AARCH64,RISCV64

Best Regards,
Hao Wu



I will wait a couple days before merging to see if any additional
comment from other reviewers.

Best Regards,
Hao Wu



Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Signed-off-by: Wenyi Xie <xiewenyi2@...>
---
MdeModulePkg/Test/MdeModulePkgHostTest.dsc | 6 +
MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.inf
|
32
++++
MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.c
| 188
++++++++++++++++++++
3 files changed, 226 insertions(+)

diff --git a/MdeModulePkg/Test/MdeModulePkgHostTest.dsc
b/MdeModulePkg/Test/MdeModulePkgHostTest.dsc
index 4da4692c8451..c9ec835df65d 100644
--- a/MdeModulePkg/Test/MdeModulePkgHostTest.dsc
+++ b/MdeModulePkg/Test/MdeModulePkgHostTest.dsc
@@ -41,3 +41,9 @@ [Components]
<PcdsFixedAtBuild>

gEfiMdeModulePkgTokenSpaceGuid.PcdAllowVariablePolicyEnforcementDis
able|TRUE
}
+
+
MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.inf {
+ <LibraryClasses>
+
+ UefiSortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib
+ DevicePathLib|.i
+ DevicePathLib|nf
+ }
diff --git
a/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.in
f
b/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.in
f
new file mode 100644
index 000000000000..85d8dcd69619
--- /dev/null
+++
b/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.in
+++ f
@@ -0,0 +1,32 @@
+## @file
+# This is a unit test for the UefiSortLib.
+#
+# Copyright (C) Huawei Technologies Co., Ltd. All rights reserved
+#
+SPDX-License-Identifier: BSD-2-Clause-Patent ##
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = UefiSortLibUnitTest
+ FILE_GUID = 271337A3-0D79-BA3E-BC03-714E518E3B1B
+ VERSION_STRING = 1.0
+ MODULE_TYPE = HOST_APPLICATION
+
+#
+# The following information is for reference only and not
+required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ UefiSortLibUnitTest.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec
+
+[LibraryClasses]
+ UnitTestLib
+ DebugLib
+ UefiSortLib
diff --git
a/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.c
b/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.c
new file mode 100644
index 000000000000..71f30d8b9f7f
--- /dev/null
+++
b/MdeModulePkg/Library/UefiSortLib/UnitTest/UefiSortLibUnitTest.
+++ c
@@ -0,0 +1,188 @@
+/** @file
+ Unit tests of the UefiSortLib
+
+ Copyright (C) Huawei Technologies Co., Ltd. All rights reserved
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <stdio.h>
+#include <string.h>
+#include <stdarg.h>
+#include <stddef.h>
+#include <setjmp.h>
+#include <cmocka.h>
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <Library/UnitTestLib.h>
+#include <Library/SortLib.h>
+
+#define UNIT_TEST_APP_NAME "UefiSortLib Unit Tests"
+#define UNIT_TEST_APP_VERSION "1.0"
+
+#define TEST_ARRAY_SIZE_9 9
+
+/**
+ The function is called by PerformQuickSort to compare int values.
+
+ @param[in] Left The pointer to first buffer.
+ @param[in] Right The pointer to second buffer.
+
+ @retval 0 Buffer1 equal to Buffer2.
+ @return <0 Buffer1 is less than Buffer2.
+ @return >0 Buffer1 is greater than Buffer2.
+
+**/
+INTN
+EFIAPI
+TestCompareFunction (
+ IN CONST VOID *Left,
+ IN CONST VOID *Right
+ )
+{
+ if (*(UINT32*)Right > *(UINT32*)Left) {
+ return 1;
+ } else if (*(UINT32*)Right < *(UINT32*)Left) {
+ return -1;
+ }
+
+ return 0;
+}
+
+/**
+ Unit test for PerformQuickSort () API of the UefiSortLib.
+
+ @param[in] Context [Optional] An optional parameter that
enables:
+ 1) test-case reuse with varied parameters and
+ 2) test-case re-entry for Target tests that need a
+ reboot. This parameter is a VOID* and it is the
+ responsibility of the test author to ensure that the
+ contents are well understood by all test cases that may
+ consume it.
+
+ @retval UNIT_TEST_PASSED The Unit test has completed and
the
test
+ case was successful.
+ @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has
failed.
+**/
+UNIT_TEST_STATUS
+EFIAPI
+SortUINT32ArrayShouldSucceed (
+ IN UNIT_TEST_CONTEXT Context
+ )
+{
+ UINTN TestCount = TEST_ARRAY_SIZE_9;
+ UINT32 TestBuffer[TEST_ARRAY_SIZE_9] = {1, 2, 3, 4, 5, 6, 7 ,8,
+9};
+ UINT32 TestResult[TEST_ARRAY_SIZE_9] = {9, 8, 7, 6, 5, 4, 3, 2,
+1};
+
+ PerformQuickSort (TestBuffer, TestCount, sizeof (UINT32),
+ (SORT_COMPARE)TestCompareFunction);
+ UT_ASSERT_MEM_EQUAL (TestBuffer, TestResult, sizeof (UINT32) *
+ TEST_ARRAY_SIZE_9);
+
+ return UNIT_TEST_PASSED;
+}
+
+/**
+ Unit test for StringCompare () API of the UefiSortLib.
+
+ @param[in] Context [Optional] An optional parameter that
enables:
+ 1) test-case reuse with varied parameters and
+ 2) test-case re-entry for Target tests that need a
+ reboot. This parameter is a VOID* and it is the
+ responsibility of the test author to ensure that the
+ contents are well understood by all test cases that may
+ consume it.
+
+ @retval UNIT_TEST_PASSED The Unit test has completed and
the
test
+ case was successful.
+ @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has
failed.
+**/
+UNIT_TEST_STATUS
+EFIAPI
+CompareSameBufferShouldSucceed (
+ IN UNIT_TEST_CONTEXT Context
+ )
+{
+ INTN retval;
+ CONST CHAR16* TestBuffer[] = { L"abcdefg" };
+
+ retval = StringCompare (TestBuffer, TestBuffer);
+ UT_ASSERT_TRUE (retval == 0);
+
+ return UNIT_TEST_PASSED;
+}
+
+/**
+ Initialze the unit test framework, suite, and unit tests for
+the
+ UefiSortLib and run the UefiSortLib unit test.
+
+ @retval EFI_SUCCESS All test cases were dispatched.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources
available to
+ initialize the unit tests.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+UnitTestingEntry (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UNIT_TEST_FRAMEWORK_HANDLE Framework;
+ UNIT_TEST_SUITE_HANDLE SortTests;
+
+ Framework = NULL;
+
+ DEBUG(( DEBUG_INFO, "%a v%a\n", UNIT_TEST_APP_NAME,
+ UNIT_TEST_APP_VERSION ));
+
+ //
+ // Start setting up the test framework for running the tests.
+ //
+ Status = InitUnitTestFramework (&Framework,
UNIT_TEST_APP_NAME,
+ gEfiCallerBaseName, UNIT_TEST_APP_VERSION); if (EFI_ERROR
+ (Status))
{
+ DEBUG ((DEBUG_ERROR, "Failed in InitUnitTestFramework. Status
= %r\n", Status));
+ goto EXIT;
+ }
+
+ //
+ // Populate the UefiSortLib Unit Test Suite.
+ //
+ Status = CreateUnitTestSuite (&SortTests, Framework,
+ "UefiSortLib Sort Tests", "UefiSortLib.SortLib", NULL, NULL); if
(EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed in CreateUnitTestSuite for
+ UefiSortLib
API Tests\n"));
+ Status = EFI_OUT_OF_RESOURCES;
+ goto EXIT;
+ }
+
+ //
+ //
+ --------------Suite--------Description------------Name----------
+ --
+ --
+ Fu
+ nction----------------Pre---Post---Context-----------
+ //
+ AddTestCase (SortTests, "Sort the Array", "Sort",
SortUINT32ArrayShouldSucceed, NULL, NULL, NULL);
+ AddTestCase (SortTests, "Compare the Buffer", "Compare",
CompareSameBufferShouldSucceed, NULL, NULL, NULL);
+
+ //
+ // Execute the tests.
+ //
+ Status = RunAllTestSuites (Framework);
+
+EXIT:
+ if (Framework) {
+ FreeUnitTestFramework (Framework);
+ }
+
+ return Status;
+}
+
+/**
+ Standard POSIX C entry point for host based unit test execution.
+**/
+int
+main (
+ int argc,
+ char *argv[]
+ )
+{
+ return UnitTestingEntry ();
+}
--
2.20.1.windows.1



.



[PATCH v2 6/6] Platform/RaspberryPi: Enable NVMe boot on CM4

Jeremy Linton
 

The CM4 has a number of carrier boards with PCIe
slots. With the PCIe changes in place its quite
possible to utilize a NVMe root device. Lets allow
people to boot from it.

Reviewed-by: Andrei Warkentin <awarkentin@...>
Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
Platform/RaspberryPi/RPi4/RPi4.dsc | 5 +++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 5 +++++
2 files changed, 10 insertions(+)

diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RP=
i4/RPi4.dsc
index babcbb2f41..25c29a0fbf 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -754,6 +754,11 @@
}
=20
#
+ # NVMe boot devices
+ #
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
# UEFI application (Shell Embedded Boot Loader)
#
ShellPkg/Application/Shell/Shell.inf {
diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RP=
i4/RPi4.fdf
index 3534cd3dc3..0c782d2f35 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.fdf
+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
@@ -283,6 +283,11 @@ READ_LOCK_STATUS =3D TRUE
INF EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf
=20
#
+ # NVMe boot devices
+ #
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
# SCSI Bus and Disk Driver
#
INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
--=20
2.13.7


[PATCH v2 5/6] Silicon/Broadcom/Bcm27xx: Move linkup check into the cfg accessor

Jeremy Linton
 

The existing code fails to create/finish configuring the
pcie subsystem if it fails to get a linkup. This is reasonable
on the RPi4 because it generally won't happen, and the OS
could not see the root port. Now that the OS can see the
root port, its a bit odd if it only shows up when
something is plugged into the first slot. Lets move the
link up check into the config accessor where it will be used
to restrict sending CFG TLP's out the port when nothing is
plugged in. Thus avoiding a SERROR during probe.

Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
.../Bcm2711PciHostBridgeLib/Bcm2711PciHostBridgeLibConstructor.c | 5 -=
----
.../Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 7 +=
++++++
2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciHostBridgeLib/Bcm=
2711PciHostBridgeLibConstructor.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2=
711PciHostBridgeLib/Bcm2711PciHostBridgeLibConstructor.c
index 8587d2d36d..4d4c584726 100644
--- a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciHostBridgeLib/Bcm2711Pci=
HostBridgeLibConstructor.c
+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciHostBridgeLib/Bcm2711Pci=
HostBridgeLibConstructor.c
@@ -204,11 +204,6 @@ Bcm2711PciHostBridgeLibConstructor (
} while (((Data & 0x30) !=3D 0x030) && (Timeout));
DEBUG ((DEBUG_VERBOSE, "PCIe link ready (status=3D%x) Timeout=3D%d\n",=
Data, Timeout));
=20
- if ((Data & 0x30) !=3D 0x30) {
- DEBUG ((DEBUG_ERROR, "PCIe link not ready (status=3D%x)\n", Data));
- return EFI_DEVICE_ERROR;
- }
-
if ((Data & 0x80) !=3D 0x80) {
DEBUG ((DEBUG_ERROR, "PCIe link not in RC mode (status=3D%x)\n", Dat=
a));
return EFI_UNSUPPORTED;
diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSeg=
mentLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegm=
entLib.c
index 6d15e82fa2..b627e5730b 100644
--- a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib=
.c
+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib=
.c
@@ -105,6 +105,13 @@ PciSegmentLibGetConfigBase (
return 0xFFFFFFFF;
}
=20
+ /* Don't probe slots if the link is down */
+ Data =3D MmioRead32 (PCIE_REG_BASE + PCIE_MISC_PCIE_STATUS);
+ if ((Data & 0x30) !=3D 0x30) {
+ DEBUG ((DEBUG_ERROR, "PCIe link not ready (status=3D%x)\n", Da=
ta));
+ return 0xFFFFFFFF;
+ }
+
MmioWrite32 (PCIE_REG_BASE + PCIE_EXT_CFG_INDEX, Address);
mPciSegmentLastAccess =3D Address;
}
--=20
2.13.7


[PATCH v2 4/6] Silicon/Broadcom/Bcm27xx: Relax PCIe device restriction

Jeremy Linton
 

The CM4 has an actual PCIe slot, so the device filtering
need to be a little less restrictive WRT busses with more
than 1 device given that switches can now appear in the
topology. Since it is possible to start numbering the
busses with a non-zero value, the bus restriction should
be based on the secondary side of the root port. This
isn't likely but its better than hard-coding the limit.

Suggested-by: René Treffer <treffer+groups.io@...>
Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
.../Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.c
index 44ce3b4b99..6d15e82fa2 100644
--- a/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.c
+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.c
@@ -19,6 +19,7 @@
#include <Library/PciSegmentLib.h>
#include <Library/UefiLib.h>
#include <IndustryStandard/Bcm2711.h>
+#include <IndustryStandard/Pci30.h>

typedef enum {
PciCfgWidthUint8 = 0,
@@ -78,6 +79,9 @@ PciSegmentLibGetConfigBase (
UINT64 Base;
UINT64 Offset;
UINT32 Dev;
+ UINT32 Bus;
+ UINT32 Data;
+ UINT32 HostPortSec;

Base = PCIE_REG_BASE;
Offset = Address & 0xFFF; /* Pick off the 4k register offset */
@@ -89,17 +93,20 @@ PciSegmentLibGetConfigBase (
Base += PCIE_EXT_CFG_DATA;
if (mPciSegmentLastAccess != Address) {
Dev = EFI_PCI_ADDR_DEV (Address);
+ Bus = EFI_PCI_ADDR_BUS (Address);
+ HostPortSec = MmioRead8 (PCIE_REG_BASE +
+ PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
+
/*
- * Scan things out directly rather than translating the "bus" to a device, etc..
- * only we need to limit each bus to a single device.
+ * There can only be a single device on bus 1 (downstream of root).
+ * Subsequent busses (behind a PCIe switch) can have more.
*/
- if (Dev < 1) {
- MmioWrite32 (PCIE_REG_BASE + PCIE_EXT_CFG_INDEX, Address);
- mPciSegmentLastAccess = Address;
- } else {
- mPciSegmentLastAccess = 0;
+ if (Dev > 0 && (Bus <= HostPortSec)) {
return 0xFFFFFFFF;
}
+
+ MmioWrite32 (PCIE_REG_BASE + PCIE_EXT_CFG_INDEX, Address);
+ mPciSegmentLastAccess = Address;
}
}
return Base + Offset;
--
2.13.7


[PATCH v2 3/6] Platform/RaspberryPi: Add PCIe SSDT

Jeremy Linton
 

Since we plan on toggling between XHCI and PCI the PCI
root needs to be in its own SSDT. This is all thats needed
of UEFI. The SMC conduit is provided directly to the running
OS. When the OS detects this PCIe port on a machine without
a MCFG it attempts to connect to the SMC conduit. The RPi
definition doesn't have any power mgmt, and only provides
a description of the root port.

Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 3 +
Platform/RaspberryPi/AcpiTables/Pci.asl | 209 +++++++++++++++=
++++++
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 6 +
3 files changed, 218 insertions(+)
create mode 100644 Platform/RaspberryPi/AcpiTables/Pci.asl

diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf b/Platform/Ra=
spberryPi/AcpiTables/AcpiTables.inf
index f3e8d950c1..da2a6db85f 100644
--- a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.inf
@@ -39,6 +39,7 @@
Pptt.aslc
SsdtThermal.asl
Xhci.asl
+ Pci.asl
=20
[Packages]
ArmPkg/ArmPkg.dec
@@ -59,6 +60,8 @@
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioAdr
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
gBcm27xxTokenSpaceGuid.PcdBcmGenetRegistersAddress
gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
diff --git a/Platform/RaspberryPi/AcpiTables/Pci.asl b/Platform/Raspberry=
Pi/AcpiTables/Pci.asl
new file mode 100644
index 0000000000..31527d87b5
--- /dev/null
+++ b/Platform/RaspberryPi/AcpiTables/Pci.asl
@@ -0,0 +1,209 @@
+/** @file
+ *
+ * Copyright (c) 2019 Linaro, Limited. All rights reserved.
+ * Copyright (c) 2021 Arm
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Bcm2711.h>
+
+#include "AcpiTables.h"
+
+/*
+ * The following can be used to remove parenthesis from
+ * defined macros that the compiler complains about.
+ */
+#define ISOLATE_ARGS(...) __VA_ARGS__
+#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
+
+#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO=
_WINDOW)
+#define SANITIZED_PCIE_MMIO_LEN REMOVE_PARENTHESES(PCIE_BRIDGE_M=
MIO_LEN)
+#define SANITIZED_PCIE_PCI_MMIO_BEGIN REMOVE_PARENTHESES(PCIE_TOP_OF_M=
EM_WIN)
+
+/*
+ * According to UEFI boot log for the VLI device on Pi 4.
+ */
+#define RT_REG_LENGTH 0x1000
+
+DefinitionBlock (__FILE__, "SSDT", 5, "RPIFDN", "RPI4PCIE", 2)
+{
+ Scope (\_SB_)
+ {
+
+ Device (SCB0) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x1)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) {
+ // Container devices with _DMA must have _CRS,=20
+ // meaning SCB0 to provide all resources that
+ // PCI0 consumes (except interrupts).
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory (ResourceProducer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
+ 0x0,
+ 0x1, // LEN
+ ,
+ ,
+ MMIO
+ )
+ })
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Add (MMBE, RT_REG_LENGTH - 1, MMBE)
+ Add (MMLE, RT_REG_LENGTH - 1, MMLE)
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ // PCIe can only DMA to first 3GB with early SOC's
+ // But we keep the restriction on the later ones
+ // To avoid DMA translation problems.
+ QWordMemory (ResourceProducer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x0, // MIN
+ 0xbfffffff, // MAX
+ 0x0, // TRA
+ 0xc0000000, // LEN
+ ,
+ ,
+ )
+ })
+
+
+ Device(PCI0)
+ {
+ Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
+ Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
+ Name(_SEG, Zero) // PCI Segment Group number
+ Name(_BBN, Zero) // PCI Base Bus Number
+ Name(_CCA, 0) // Mark the PCI noncoherent
+
+ // Root Complex 0
+ Device (RP0) {
+ Name(_ADR, 0xF0000000) // Dev 0, Func 0
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x0, // MIN
+ 0xbfffffff, // MAX
+ 0x0, // TRA
+ 0xc0000000, // LEN
+ ,
+ ,
+ )
+ })
+
+ // PCI Routing Table
+ Name(_PRT, Package() {
+ Package (4) { 0x0000FFFF, 0, zero, 175 },
+ Package (4) { 0x0000FFFF, 1, zero, 176 },
+ Package (4) { 0x0000FFFF, 2, zero, 177 },
+ Package (4) { 0x0000FFFF, 3, zero, 178 }
+ })
+
+ // Root complex resources
+ Method (_CRS, 0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ WordBusNumber ( // Bus numbers assigned to this root
+ ResourceProducer,
+ MinFixed, MaxFixed, PosDecode,
+ 0, // AddressGranularity
+ 0, // AddressMinimum - Minimum Bus Number
+ 255, // AddressMaximum - Maximum Bus Number
+ 0, // AddressTranslation - Set to 0
+ 256 // RangeLength - Number of Busses
+ )
+
+ QWordMemory ( // 32-bit BAR Windows in 64-bit addr
+ ResourceProducer, PosDecode,
+ MinFixed, MaxFixed,
+ NonCacheable, ReadWrite, //cacheable? is that right=
?
+ 0x00000000, // Granularity
+ 0, // SANITIZED_PCIE_PCI_MMIO=
_BEGIN
+ 1, // SANITIZED_PCIE_MMIO_LEN=
+ SANITIZED_PCIE_PCI_MMIO_BEGIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // SANITIZED_PCIE_PCI_MMIO=
_BEGIN - SANITIZED_PCIE_CPU_MMIO_WINDOW
+ 2 // SANITIZED_PCIE_MMIO_LEN=
+ 1
+ ,,,MMI1,,TypeTranslation
+ )
+ }) // end Name(RBUF)
+
+ // Work around ASL's inability to add in a resource definition
+ // or for that matter compute the min,max,len properly
+ CreateQwordField (RBUF, MMI1._MIN, MMIB)
+ CreateQwordField (RBUF, MMI1._MAX, MMIE)
+ CreateQwordField (RBUF, MMI1._TRA, MMIT)
+ CreateQwordField (RBUF, MMI1._LEN, MMIL)
+ Add (MMIB, SANITIZED_PCIE_PCI_MMIO_BEGIN, MMIB)
+ Add (SANITIZED_PCIE_MMIO_LEN, SANITIZED_PCIE_PCI_MMIO_BEGIN, M=
MIE)
+ Subtract (MMIT, SANITIZED_PCIE_PCI_MMIO_BEGIN, MMIT)
+ Add (SANITIZED_PCIE_MMIO_LEN, 1 , MMIL)
+
+ Return (RBUF)
+ } // end Method(_CRS)
+ //
+ // OS Control Handoff
+ //
+ Name(SUPP, Zero) // PCI _OSC Support Field value
+ Name(CTRL, Zero) // PCI _OSC Control Field value
+
+ // See [1] 6.2.10, [2] 4.5
+ Method(_OSC,4) {
+ // Note, This code is very similar to the code in the PCIe fir=
mware
+ // specification which can be used as a reference
+ // Check for proper UUID
+ If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))=
) {
+ // Create DWord-adressable fields from the Capabilities Buff=
er
+ CreateDWordField(Arg3,0,CDW1)
+ CreateDWordField(Arg3,4,CDW2)
+ CreateDWordField(Arg3,8,CDW3)
+ // Save Capabilities DWord2 & 3
+ Store(CDW2,SUPP)
+ Store(CDW3,CTRL)
+ // Mask out Native HotPlug
+ And(CTRL,0x1E,CTRL)
+ // Always allow native PME, AER (no dependencies)
+ // Never allow SHPC (no SHPC controller in this system)
+ And(CTRL,0x1D,CTRL)
+
+ If(LNotEqual(Arg1,One)) { // Unknown revision
+ Or(CDW1,0x08,CDW1)
+ }
+
+ If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
+ Or(CDW1,0x10,CDW1)
+ }
+ // Update DWORD3 in the buffer
+ Store(CTRL,CDW3)
+ Return(Arg3)
+ } Else {
+ Or(CDW1,4,CDW1) // Unrecognized UUID
+ Return(Arg3)
+ }
+ } // End _OSC
+ } // PCI0
+ } //end SCB0
+ } //end scope sb
+} //end definition block
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platfor=
m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 7c5786303d..4c40820858 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -821,6 +821,12 @@ STATIC CONST NAMESPACE_TABLES SdtTables[] =3D {
PcdToken(PcdXhciPci),
NULL
},
+ {
+ SIGNATURE_64 ('R', 'P', 'I', '4', 'P', 'C', 'I', 'E'),
+ PcdToken(PcdXhciPci),
+ 0,
+ NULL
+ },
#endif
{ // DSDT
SIGNATURE_64 ('R', 'P', 'I', 0, 0, 0, 0, 0),
--=20
2.13.7


[PATCH v2 2/6] Platform/RaspberryPi: Break XHCI into its own SSDT

Jeremy Linton
 

Lets prepare to switch between XHCI and PCI by moving
the XHCI definition into its own SSDT. That way we can
select it based on the menu settings. The resource
producer/consumer flag is also corrected.

Reviewed-by: Andrei Warkentin <awarkentin@...>
Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 1 +
Platform/RaspberryPi/AcpiTables/Dsdt.asl | 3 --
Platform/RaspberryPi/AcpiTables/Xhci.asl | 35 ++++++++++++++--=
------
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 8 +++++
4 files changed, 31 insertions(+), 16 deletions(-)

diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf b/Platform/Ra=
spberryPi/AcpiTables/AcpiTables.inf
index 1ddc9ca5fe..f3e8d950c1 100644
--- a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.inf
@@ -38,6 +38,7 @@
SpcrPl011.aslc
Pptt.aslc
SsdtThermal.asl
+ Xhci.asl
=20
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/Raspberr=
yPi/AcpiTables/Dsdt.asl
index 1ee6379f46..b594d50bdf 100644
--- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
@@ -64,9 +64,6 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI"=
, 2)
Scope (\_SB_)
{
include ("Pep.asl")
-#if (RPI_MODEL =3D=3D 4)
- include ("Xhci.asl")
-#endif
=20
Device (CPU0)
{
diff --git a/Platform/RaspberryPi/AcpiTables/Xhci.asl b/Platform/Raspberr=
yPi/AcpiTables/Xhci.asl
index bc3fea60f9..9b37277956 100644
--- a/Platform/RaspberryPi/AcpiTables/Xhci.asl
+++ b/Platform/RaspberryPi/AcpiTables/Xhci.asl
@@ -9,6 +9,8 @@
=20
#include <IndustryStandard/Bcm2711.h>
=20
+#include "AcpiTables.h"
+
/*
* The following can be used to remove parenthesis from
* defined macros that the compiler complains about.
@@ -24,12 +26,17 @@
*/
#define XHCI_REG_LENGTH 0x1000
=20
-Device (SCB0) {
- Name (_HID, "ACPI0004")
- Name (_UID, 0x0)
- Name (_CCA, 0x0)
+DefinitionBlock (__FILE__, "SSDT", 5, "RPIFDN", "RPI4XHCI", 2)
+{
+ Scope (\_SB_)
+ {
+
+ Device (SCB0) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
=20
- Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
/*
* Container devices with _DMA must have _CRS, meaning SCB0
* to provide all resources that XHC0 consumes (except
@@ -57,15 +64,15 @@ Device (SCB0) {
Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
Return (RBUF)
- }
+ }
=20
- Name (_DMA, ResourceTemplate() {
+ Name (_DMA, ResourceTemplate() {
/*
* XHC0 is limited to DMA to first 3GB. Note this
* only applies to PCIe, not GENET or other devices
* next to the A72.
*/
- QWordMemory (ResourceConsumer,
+ QWordMemory (ResourceProducer,
,
MinFixed,
MaxFixed,
@@ -79,10 +86,10 @@ Device (SCB0) {
,
,
)
- })
+ })
=20
- Device (XHC0)
- {
+ Device (XHC0)
+ {
Name (_HID, "PNP0D10") // _HID: Hardware ID
Name (_UID, 0x0) // _UID: Unique ID
Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
@@ -131,5 +138,7 @@ Device (SCB0) {
Debug =3D "xHCI enable"
Store (0x6, CMND)
}
- }
-}
+ } // end XHC0
+ } //end SCB0
+ } //end scope sb
+} //end definition block
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platfor=
m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 87f6b4e7bb..7c5786303d 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -814,6 +814,14 @@ STATIC CONST NAMESPACE_TABLES SdtTables[] =3D {
PcdToken(PcdSdIsArasan),
SsdtEmmcNameOpReplace
},
+#if (RPI_MODEL =3D=3D 4)
+ {
+ SIGNATURE_64 ('R', 'P', 'I', '4', 'X', 'H', 'C', 'I'),
+ 0,
+ PcdToken(PcdXhciPci),
+ NULL
+ },
+#endif
{ // DSDT
SIGNATURE_64 ('R', 'P', 'I', 0, 0, 0, 0, 0),
0,
--=20
2.13.7


[PATCH v2 1/6] Platform/RaspberryPi: Add XHCI/PCI selection menu

Jeremy Linton
 

Arm has standardized a PCI SMC conduit that can be used
to access the PCI config space in a standardized way. This
functionality doesn't yet exist in many OS/Distro's. Lets
add another advanced config item that allows the user
to toggle between presenting the XHCI on the base RPi4
as a platform device, or presenting this newer PCIe
conduit. The CM4 doesn't have an attached XHCI controller
soldered to the PCIe, so PCIe mode is the default.

Signed-off-by: Jeremy Linton <jeremy.linton@...>
---
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 42 ++++++++++++++++=
++++++
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 +
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 +++
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 +++++++++
Platform/RaspberryPi/Include/ConfigVars.h | 4 +++
Platform/RaspberryPi/RPi3/RPi3.dsc | 6 ++++
Platform/RaspberryPi/RPi4/RPi4.dsc | 8 +++++
Platform/RaspberryPi/RaspberryPi.dec | 1 +
8 files changed, 84 insertions(+)

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platfor=
m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 9e78cb47ad..87f6b4e7bb 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -43,6 +43,7 @@ extern UINT8 ConfigDxeStrings[];
STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
STATIC UINT32 mModelFamily =3D 0;
STATIC UINT32 mModelInstalledMB =3D 0;
+STATIC UINT32 mModelRevision =3D 0;
=20
STATIC EFI_MAC_ADDRESS mMacAddress;
=20
@@ -271,6 +272,40 @@ SetupVariables (
ASSERT_EFI_ERROR (Status);
}
=20
+ if (mModelFamily >=3D 4) {
+ if (((mModelRevision >> 4) & 0xFF) =3D=3D 0x14) {
+ /*
+ * Enable PCIe by default on CM4
+ */
+ Status =3D PcdSet32S (PcdXhciPci, 2);
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ Size =3D sizeof (UINT32);
+ Status =3D gRT->GetVariable (L"XhciPci",
+ &gConfigDxeFormSetGuid,
+ NULL, &Size, &Var32);
+ if (EFI_ERROR (Status) || (Var32 =3D=3D 0)) {
+ /*
+ * Enable XHCI by default
+ */
+ Status =3D PcdSet32S (PcdXhciPci, 0);
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ /*=20
+ * Enable PCIe
+ */
+ Status =3D PcdSet32S (PcdXhciPci, 1);
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+ } else {
+ /*=20
+ * Disable PCIe and XHCI
+ */
+ Status =3D PcdSet32S (PcdXhciPci, 0);
+ ASSERT_EFI_ERROR (Status);
+ }
+
Size =3D sizeof (AssetTagVar);
Status =3D gRT->GetVariable (L"AssetTag",
&gConfigDxeFormSetGuid,
@@ -888,6 +923,13 @@ ConfigInitialize (
DEBUG ((DEBUG_INFO, "Current Raspberry Pi installed RAM size is %d M=
B\n", mModelInstalledMB));
}
=20
+ Status =3D mFwProtocol->GetModelRevision (&mModelRevision);
+ if (Status !=3D EFI_SUCCESS) {
+ DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi revision: %r\n",=
Status));
+ } else {
+ DEBUG ((DEBUG_INFO, "Current Raspberry Pi revision %x\n", mModelRevi=
sion));
+ }
+
Status =3D SetupVariables ();
if (Status !=3D EFI_SUCCESS) {
DEBUG ((DEBUG_ERROR, "Couldn't not setup NV vars: %r\n", Status));
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platf=
orm/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
index 4bb2d08550..e6e22ad82e 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
@@ -94,6 +94,7 @@
gRaspberryPiTokenSpaceGuid.PcdFanOnGpio
gRaspberryPiTokenSpaceGuid.PcdFanTemp
gRaspberryPiTokenSpaceGuid.PcdUartInUse
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci
=20
[Depex]
gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Pl=
atform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
index 466fa852cb..5ec17072c3 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
@@ -57,6 +57,11 @@
#string STR_ADVANCED_FANTEMP_PROMPT #language en-US "ACPI fan temperat=
ure"
#string STR_ADVANCED_FANTEMP_HELP #language en-US "Cycle a fan at C"
=20
+#string STR_ADVANCED_XHCIPCI_PROMPT #language en-US "ACPI XHCI/PCIe"
+#string STR_ADVANCED_XHCIPCI_HELP #language en-US "OS sees XHCI USB =
platform device or PCIe bridge"
+#string STR_ADVANCED_XHCIPCI_XHCI #language en-US "XHCI"
+#string STR_ADVANCED_XHCIPCI_PCIE #language en-US "PCIe"
+
#string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag"
#string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system As=
set Tag"
=20
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Pl=
atform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
index fa34eab809..18b3ec726e 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
@@ -56,6 +56,11 @@ formset
name =3D FanTemp,
guid =3D CONFIGDXE_FORM_SET_GUID;
=20
+ efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA,
+ attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTI=
ME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ name =3D XhciPci,
+ guid =3D CONFIGDXE_FORM_SET_GUID;
+
efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA,
attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTI=
ME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
name =3D SystemTableMode,
@@ -212,6 +217,18 @@ formset
default =3D 60,
endnumeric;
endif;
+
+ suppressif ideqval XhciPci.Value =3D=3D 2;
+ grayoutif NOT ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE=
_MODE_ACPI;
+ oneof varid =3D XhciPci.Value,
+ prompt =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT),
+ help =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_HELP),
+ flags =3D NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUI=
RED,
+ option text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_XHCI), v=
alue =3D 0, flags =3D DEFAULT;
+ option text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), v=
alue =3D 1, flags =3D 0;
+ endoneof;
+ endif;
+ endif;
#endif
string varid =3D AssetTag.AssetTag,
prompt =3D STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT),
diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/Raspber=
ryPi/Include/ConfigVars.h
index 142317985a..a5b32b5284 100644
--- a/Platform/RaspberryPi/Include/ConfigVars.h
+++ b/Platform/RaspberryPi/Include/ConfigVars.h
@@ -77,6 +77,10 @@ typedef struct {
} ADVANCED_FANTEMP_VARSTORE_DATA;
=20
typedef struct {
+ UINT32 Value;
+} ADVANCED_XHCIPCI_VARSTORE_DATA;
+
+typedef struct {
#define SYSTEM_TABLE_MODE_ACPI 0
#define SYSTEM_TABLE_MODE_BOTH 1
#define SYSTEM_TABLE_MODE_DT 2
diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RP=
i3/RPi3.dsc
index 1c8a5408e7..6ab5d1ae6d 100644
--- a/Platform/RaspberryPi/RPi3/RPi3.dsc
+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
@@ -520,6 +520,12 @@
=20
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspbe=
rryPiTokenSpaceGuid|0x0|0
=20
+ # Select XHCI/PCIe mode (not valid on rpi3)
+ #
+ # 0 - DISABLED
+ #
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid=
|0x0|0
+
#
# Common UEFI ones.
#
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RP=
i4/RPi4.dsc
index dcf9bb5f11..babcbb2f41 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -536,6 +536,14 @@
=20
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspbe=
rryPiTokenSpaceGuid|0x0|0
=20
+ # Select XHCI/PCIe mode
+ #
+ # 0 - XHCI Enabled (default on !cm4)
+ # 1 - PCIe Enabled
+ # 2 - PCIe Enabled (default on cm4)
+ #
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid=
|0x0|0
+
#
# Common UEFI ones.
#
diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/=
RaspberryPi.dec
index 2ca25ff9e6..797be59274 100644
--- a/Platform/RaspberryPi/RaspberryPi.dec
+++ b/Platform/RaspberryPi/RaspberryPi.dec
@@ -71,3 +71,4 @@
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|0|UINT32|0x0000001E
gRaspberryPiTokenSpaceGuid.PcdMmcEnableDma|0|UINT32|0x0000001F
gRaspberryPiTokenSpaceGuid.PcdUartInUse|1|UINT32|0x00000021
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000022
--=20
2.13.7


[PATCH v2 0/6] RPi4: Enable ACPI PCIe conduit

Jeremy Linton
 

A new Arm standard DEN0115A specifies how
platforms that don't have standard ECAM can
use the firmware to handle config read/write
operations. This is mostly implemented in TFA
but UEFI needs to assure that there is a
description of the root complex in the ACPI
namespace.

This set adds that description based on
a new menu item which toggles between XHCI
platform description and PCIe via a BDS
menu selection on the RPi4. The CM4 is really
the platform that needs this as it has a PCIe
slot. On that platform PCIe is enabled by default.

v1->v2:
Use global shared interrupts in PCI PRT
which is a pretty significant
simplification.
Modify bus max to use the secondary side
of the root port for enforcing device
limits
Various other AML cleanups per Ard (drop
redundant _DMA, bump UID to make it
unique, etc)
Break link status move into its own patch
MADT->MCFG typos in various comments
Commit message tweaking
=09
Jeremy Linton (6):
Platform/RaspberryPi: Add XHCI/PCI selection menu
Platform/RaspberryPi: Break XHCI into its own SSDT
Platform/RaspberryPi: Add PCIe SSDT
Silicon/Broadcom/Bcm27xx: Relax PCIe device restriction
Silicon/Broadcom/Bcm27xx: Move linkup check into the cfg accessor
Platform/RaspberryPi: Enable NVMe boot on CM4

Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 4 +
Platform/RaspberryPi/AcpiTables/Dsdt.asl | 3 -
Platform/RaspberryPi/AcpiTables/Pci.asl | 209 +++++++++++++++=
++++++
Platform/RaspberryPi/AcpiTables/Xhci.asl | 35 ++--
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 56 ++++++
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 +
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 +
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 ++
Platform/RaspberryPi/Include/ConfigVars.h | 4 +
Platform/RaspberryPi/RPi3/RPi3.dsc | 6 +
Platform/RaspberryPi/RPi4/RPi4.dsc | 13 ++
Platform/RaspberryPi/RPi4/RPi4.fdf | 5 +
Platform/RaspberryPi/RaspberryPi.dec | 1 +
.../Bcm2711PciHostBridgeLibConstructor.c | 5 -
.../Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 28 ++-
15 files changed, 364 insertions(+), 28 deletions(-)
create mode 100644 Platform/RaspberryPi/AcpiTables/Pci.asl

--=20
2.13.7


Cancelled Event: TianoCore Bug Triage - APAC / NAMO - Tuesday, August 10, 2021 #cal-cancelled

devel@edk2.groups.io Calendar <noreply@...>
 

Cancelled: TianoCore Bug Triage - APAC / NAMO

This event has been cancelled.

When:
Tuesday, August 10, 2021
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTUyZTg2NjgtNDhlNS00ODVlLTllYTUtYzg1OTNjNjdiZjFh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%22b286b53a-1218-4db3-bfc9-3d4c5aa7669e%22%7d

Organizer: Liming Gao gaoliming@...

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

Microsoft Teams meeting

Join on your computer or mobile app

Click here to join the meeting

Join with a video conferencing device

teams@...

Video Conference ID: 116 062 094 0

Alternate VTC dialing instructions

Or call in (audio only)

+1 916-245-6934,,77463821#   United States, Sacramento

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回复: [edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - 08/10/2021 #cal-reminder

gaoliming
 

Hi, all

 Few issues are submitted this week. Let’s cancel this week meeting.

 

3542

EDK2

Code

unassigned@...

UNCO

[MdePkg/BaseLib] Unaligned APIs cannot be called safely

16:55:31

mhaeuser@...

3528

EDK2

Code

unassigned@...

UNCO

Add SMM NV variable support in universal UEFI payload

Thu 00:14

guo.dong@...

3525

EDK2

Code

unassigned@...

UNCO

FSP NotifyPhase APIs caused 100ms delay in chrome platform.

2021-08-04

gregx.yeh@...

3524

Tianocor

Code

unassigned@...

UNCO

Update Openssl to the latest version 1.1.1k

2021-08-03

gaoliming@...

 

Thanks

Liming

发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 devel@edk2.groups.io Calendar
发送时间: 2021810 9:30
收件人: devel@edk2.groups.io
主题: [edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - 08/10/2021 #cal-reminder

 

Reminder: TianoCore Bug Triage - APAC / NAMO

When:
08/10/2021
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTUyZTg2NjgtNDhlNS00ODVlLTllYTUtYzg1OTNjNjdiZjFh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%22b286b53a-1218-4db3-bfc9-3d4c5aa7669e%22%7d

Organizer: Liming Gao gaoliming@...

View Event

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

Microsoft Teams meeting

Join on your computer or mobile app

Click here to join the meeting

Join with a video conferencing device

teams@...

Video Conference ID: 116 062 094 0

Alternate VTC dialing instructions

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Re: [PATCH v2 1/1] MdeModulePkg/PiSmmCore: Drop deprecated image profiling commands

Ni, Ray
 

Thank you very much!!

Reviewed-by: Ray Ni <ray.ni@...>

I will merge your patches after stable tag release.

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marvin Häuser
Sent: Monday, August 9, 2021 2:09 PM
To: devel@edk2.groups.io
Cc: Wang, Jian J <jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Dong, Eric <eric.dong@...>; Ni, Ray
<ray.ni@...>; Vitaly Cheptsov <vit9696@...>
Subject: [edk2-devel] [PATCH v2 1/1] MdeModulePkg/PiSmmCore: Drop deprecated image profiling commands

The legacy codebase allowed SMM images to be registered for profiling
from DXE. Support for this has been dropped entirely, so remove the
remaining handlers.

Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Vitaly Cheptsov <vit9696@...>
Signed-off-by: Marvin Häuser <mhaeuser@...>
---
MdeModulePkg/Core/PiSmmCore/SmramProfileRecord.c | 89 ++------------------
MdeModulePkg/Include/Guid/MemoryProfile.h | 6 +-
2 files changed, 12 insertions(+), 83 deletions(-)

diff --git a/MdeModulePkg/Core/PiSmmCore/SmramProfileRecord.c
b/MdeModulePkg/Core/PiSmmCore/SmramProfileRecord.c
index 1b302c810cc9..9d6e3bf27aca 100644
--- a/MdeModulePkg/Core/PiSmmCore/SmramProfileRecord.c
+++ b/MdeModulePkg/Core/PiSmmCore/SmramProfileRecord.c
@@ -2232,64 +2232,6 @@ Done:
mSmramProfileGettingStatus = SmramProfileGettingStatus;

}



-/**

- SMRAM profile handler to register SMM image.

-

- @param SmramProfileParameterRegisterImage The parameter of SMM profile register image.

-

-**/

-VOID

-SmramProfileHandlerRegisterImage (

- IN SMRAM_PROFILE_PARAMETER_REGISTER_IMAGE *SmramProfileParameterRegisterImage

- )

-{

- EFI_STATUS Status;

- EFI_SMM_DRIVER_ENTRY DriverEntry;

- VOID *EntryPointInImage;

-

- ZeroMem (&DriverEntry, sizeof (DriverEntry));

- CopyMem (&DriverEntry.FileName, &SmramProfileParameterRegisterImage->FileName, sizeof(EFI_GUID));

- DriverEntry.ImageBuffer = SmramProfileParameterRegisterImage->ImageBuffer;

- DriverEntry.NumberOfPage = (UINTN) SmramProfileParameterRegisterImage->NumberOfPage;

- Status = InternalPeCoffGetEntryPoint ((VOID *) (UINTN) DriverEntry.ImageBuffer, &EntryPointInImage);

- ASSERT_EFI_ERROR (Status);

- DriverEntry.ImageEntryPoint = (PHYSICAL_ADDRESS) (UINTN) EntryPointInImage;

-

- Status = RegisterSmramProfileImage (&DriverEntry, FALSE);

- if (!EFI_ERROR (Status)) {

- SmramProfileParameterRegisterImage->Header.ReturnStatus = 0;

- }

-}

-

-/**

- SMRAM profile handler to unregister SMM image.

-

- @param SmramProfileParameterUnregisterImage The parameter of SMM profile unregister image.

-

-**/

-VOID

-SmramProfileHandlerUnregisterImage (

- IN SMRAM_PROFILE_PARAMETER_UNREGISTER_IMAGE *SmramProfileParameterUnregisterImage

- )

-{

- EFI_STATUS Status;

- EFI_SMM_DRIVER_ENTRY DriverEntry;

- VOID *EntryPointInImage;

-

- ZeroMem (&DriverEntry, sizeof (DriverEntry));

- CopyMem (&DriverEntry.FileName, &SmramProfileParameterUnregisterImage->FileName, sizeof (EFI_GUID));

- DriverEntry.ImageBuffer = SmramProfileParameterUnregisterImage->ImageBuffer;

- DriverEntry.NumberOfPage = (UINTN) SmramProfileParameterUnregisterImage->NumberOfPage;

- Status = InternalPeCoffGetEntryPoint ((VOID *) (UINTN) DriverEntry.ImageBuffer, &EntryPointInImage);

- ASSERT_EFI_ERROR (Status);

- DriverEntry.ImageEntryPoint = (PHYSICAL_ADDRESS) (UINTN) EntryPointInImage;

-

- Status = UnregisterSmramProfileImage (&DriverEntry, FALSE);

- if (!EFI_ERROR (Status)) {

- SmramProfileParameterUnregisterImage->Header.ReturnStatus = 0;

- }

-}

-

/**

Dispatch function for a Software SMI handler.



@@ -2374,28 +2316,6 @@ SmramProfileHandler (
}

SmramProfileHandlerGetDataByOffset ((SMRAM_PROFILE_PARAMETER_GET_PROFILE_DATA_BY_OFFSET *) (UINTN)
CommBuffer);

break;

- case SMRAM_PROFILE_COMMAND_REGISTER_IMAGE:

- DEBUG ((EFI_D_ERROR, "SmramProfileHandlerRegisterImage\n"));

- if (TempCommBufferSize != sizeof (SMRAM_PROFILE_PARAMETER_REGISTER_IMAGE)) {

- DEBUG ((EFI_D_ERROR, "SmramProfileHandler: SMM communication buffer size invalid!\n"));

- return EFI_SUCCESS;

- }

- if (mSmramReadyToLock) {

- return EFI_SUCCESS;

- }

- SmramProfileHandlerRegisterImage ((SMRAM_PROFILE_PARAMETER_REGISTER_IMAGE *) (UINTN) CommBuffer);

- break;

- case SMRAM_PROFILE_COMMAND_UNREGISTER_IMAGE:

- DEBUG ((EFI_D_ERROR, "SmramProfileHandlerUnregisterImage\n"));

- if (TempCommBufferSize != sizeof (SMRAM_PROFILE_PARAMETER_UNREGISTER_IMAGE)) {

- DEBUG ((EFI_D_ERROR, "SmramProfileHandler: SMM communication buffer size invalid!\n"));

- return EFI_SUCCESS;

- }

- if (mSmramReadyToLock) {

- return EFI_SUCCESS;

- }

- SmramProfileHandlerUnregisterImage ((SMRAM_PROFILE_PARAMETER_UNREGISTER_IMAGE *) (UINTN) CommBuffer);

- break;

case SMRAM_PROFILE_COMMAND_GET_RECORDING_STATE:

DEBUG ((EFI_D_ERROR, "SmramProfileHandlerGetRecordingState\n"));

if (TempCommBufferSize != sizeof (SMRAM_PROFILE_PARAMETER_RECORDING_STATE)) {

@@ -2417,6 +2337,15 @@ SmramProfileHandler (
ParameterRecordingState->Header.ReturnStatus = 0;

break;



+ //

+ // Below 2 commands have been deprecated. They may not be (re-)used.

+ //

+ case SMRAM_PROFILE_COMMAND_DEPRECATED1:

+ case SMRAM_PROFILE_COMMAND_DEPRECATED2:

+ ASSERT (FALSE);

+ //

+ // Fall-through to the default (unrecognized command) case.

+ //

default:

break;

}

diff --git a/MdeModulePkg/Include/Guid/MemoryProfile.h b/MdeModulePkg/Include/Guid/MemoryProfile.h
index eee3b9125240..7565e68b5c33 100644
--- a/MdeModulePkg/Include/Guid/MemoryProfile.h
+++ b/MdeModulePkg/Include/Guid/MemoryProfile.h
@@ -389,10 +389,10 @@ struct _EDKII_MEMORY_PROFILE_PROTOCOL {
#define SMRAM_PROFILE_COMMAND_GET_PROFILE_INFO 0x1

#define SMRAM_PROFILE_COMMAND_GET_PROFILE_DATA 0x2

//

-// Below 2 commands are now used by ECP only and only valid before SmmReadyToLock

+// Below 2 commands have been deprecated. They may not be re-used.

//

-#define SMRAM_PROFILE_COMMAND_REGISTER_IMAGE 0x3

-#define SMRAM_PROFILE_COMMAND_UNREGISTER_IMAGE 0x4

+#define SMRAM_PROFILE_COMMAND_DEPRECATED1 0x3

+#define SMRAM_PROFILE_COMMAND_DEPRECATED2 0x4



#define SMRAM_PROFILE_COMMAND_GET_PROFILE_DATA_BY_OFFSET 0x5

#define SMRAM_PROFILE_COMMAND_GET_RECORDING_STATE 0x6

--
2.31.1





Re: [PATCH v2 2/2] UefiCpuPkg/BaseUefiCpuLib: Use toolchain-specific rodata section name

Ni, Ray
 

Acked-by: Ray Ni <ray.ni@...>

I will depend on tool owner to review the tool configuration change making sure that the correct section name is chosen for different C compilers.

Thanks,
Ray

-----Original Message-----
From: Marvin Häuser <mhaeuser@...>
Sent: Monday, August 9, 2021 5:51 PM
To: devel@edk2.groups.io
Cc: Dong, Eric <eric.dong@...>; Ni, Ray <ray.ni@...>; Kumar, Rahul1 <rahul1.kumar@...>; Vitaly Cheptsov
<vit9696@...>
Subject: [PATCH v2 2/2] UefiCpuPkg/BaseUefiCpuLib: Use toolchain-specific rodata section name

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3318

Correctly define the read-only data sections with the
toolchain-specific section name. This hardens image permission
security and may save image space.

Cc: Eric Dong <eric.dong@...>
Cc: Ray Ni <ray.ni@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Vitaly Cheptsov <vit9696@...>
Signed-off-by: Marvin Häuser <mhaeuser@...>
---
UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm | 2 +-
UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
index 5e27cc325012..cfb8bf4a5ae0 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
@@ -6,7 +6,7 @@
;*

;------------------------------------------------------------------------------



- SECTION .rodata

+ SECTION RODATA_SECTION_NAME



;

; Float control word initial value:

diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
index 8485b4713548..3c976a21e391 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
@@ -6,7 +6,7 @@
;*

;------------------------------------------------------------------------------



- SECTION .rodata

+ SECTION RODATA_SECTION_NAME

;

; Float control word initial value:

; all exceptions masked, double-extended-precision, round-to-nearest

--
2.31.1


Re: [edk2-platforms][PATCH v1 1/1] IntelSiliconPkg: Add BaseSmmAccessLibNull

Ni, Ray
 

Michael,
If your platform doesn't need SmmAccessPPI, you don't put the SmmAccess PEIM in the FDF.
Why do you need:
1. Put SmmAccess PEIM in FDF
2. Let SmmAccess PEIM link to a NULL dummy-do-nothing library

I feel the additional abstraction is not necessary.

Thanks,
Ray

-----Original Message-----
From: mikuback@... <mikuback@...>
Sent: Monday, August 9, 2021 10:16 PM
To: devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@...>; Chaganty, Rangasai V <rangasai.v.chaganty@...>
Subject: [edk2-platforms][PATCH v1 1/1] IntelSiliconPkg: Add BaseSmmAccessLibNull

From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3540

Adds a NULL instance of SmmAccessLib.

Cc: Ray Ni <ray.ni@...>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>
---
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.c | 33
++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf | 26
+++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 1 +
3 files changed, 60 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.c
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.c
new file mode 100644
index 000000000000..f5ad306b380b
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.c
@@ -0,0 +1,33 @@
+/** @file
+ A NULL library instance of SmmAccessLib.
+
+ Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/SmmAccessLib.h>
+
+/**
+ This function is to install an SMM Access PPI
+
+ @retval EFI_SUCCESS - Ppi successfully started and installed.
+ @retval EFI_NOT_FOUND - Ppi can't be found.
+ @retval EFI_OUT_OF_RESOURCES - Ppi does not have enough resources to initialize the driver.
+ @retval EFI_UNSUPPORTED - The PPI was not installed and installation is unsupported in
+ this instance of function implementation.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiInstallSmmAccessPpi (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf
new file mode 100644
index 000000000000..7fd3b0b89655
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf
@@ -0,0 +1,26 @@
+## @file
+# A NULL library instance of SmmAccessLib.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = BaseSmmAccessLibNull
+FILE_GUID = C1A14AB6-B757-4046-9B92-9DCE1A2154C6
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = SmmAccessLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[LibraryClasses]
+ DebugLib
+
+[Sources]
+ BaseSmmAccessLibNull.c
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index 1092371d848e..dd0928ec58f3 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -90,6 +90,7 @@ [Components]
IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf
IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf
+ IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.inf
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.inf
IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
--
2.28.0.windows.1

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