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[PATCH v2 2/4] OvmfPkg/TPM: Add a NULL implementation of TpmPlatformHierarchyLib
Stefan Berger <stefanb@...>
Add a NULL implementation of the library class TpmPlatformHierarchyLib
Signed-off-by: Stefan Berger <stefanb@...> --- .../PeiDxeTpmPlatformHierarchyLib.c | 19 ++++++++++++ .../PeiDxeTpmPlatformHierarchyLib.inf | 31 +++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.c create mode 100644 OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf diff --git a/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.c b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.c new file mode 100644 index 0000000000..a4d38a1465 --- /dev/null +++ b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.c @@ -0,0 +1,19 @@ +/** @file + Null TPM Platform Hierarchy configuration library. + + This library provides stub functions for customizing the TPM's Platform Hierarchy. + + Copyright (c) 2021, IBM Corporation. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <Uefi.h> + +VOID +EFIAPI +ConfigureTpmPlatformHierarchy ( + ) +{ + /* no nothing */ +} diff --git a/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf new file mode 100644 index 0000000000..f0c474d57c --- /dev/null +++ b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf @@ -0,0 +1,31 @@ +### @file +# +# TPM Platform Hierarchy configuration library. +# +# This library provides functions for customizing the TPM's Platform Hierarchy +# Authorization Value (platformAuth) and Platform Hierarchy Authorization +# Policy (platformPolicy) can be defined through this function. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> +# Copyright (c) Microsoft Corporation.<BR> +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PeiDxeTpmPlatformHierarchyLibNull + FILE_GUID = 7794F92C-4E8E-4E57-9E4A-49A0764C7D73 + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + LIBRARY_CLASS = TpmPlatformHierarchyLib|PEIM DXE_DRIVER + +[LibraryClasses] + BaseLib + +[Packages] + MdePkg/MdePkg.dec + +[Sources] + PeiDxeTpmPlatformHierarchyLib.c -- 2.31.1
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[PATCH v2 1/4] OvmfPkg/TPM: Import PeiDxeTpmPlatformHierarchyLib.c from edk2-platforms
Stefan Berger <stefanb@...>
Import PeiDxeTpmPlatformHierarchyLib.c from edk2-platforms. Modify it so
that ConfigureTpmPlatformHierarchy() is the only public function provided by this file. Signed-off-by: Stefan Berger <stefanb@...> --- .../Include/Library/TpmPlatformHierarchyLib.h | 27 +++ .../PeiDxeTpmPlatformHierarchyLib.c | 210 ++++++++++++++++++ .../PeiDxeTpmPlatformHierarchyLib.inf | 40 ++++ 3 files changed, 277 insertions(+) create mode 100644 OvmfPkg/Include/Library/TpmPlatformHierarchyLib.h create mode 100644 OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpm= PlatformHierarchyLib.c create mode 100644 OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpm= PlatformHierarchyLib.inf diff --git a/OvmfPkg/Include/Library/TpmPlatformHierarchyLib.h b/OvmfPkg/In= clude/Library/TpmPlatformHierarchyLib.h new file mode 100644 index 0000000000..a872fa09dc --- /dev/null +++ b/OvmfPkg/Include/Library/TpmPlatformHierarchyLib.h @@ -0,0 +1,27 @@ +/** @file=0D + TPM Platform Hierarchy configuration library.=0D +=0D + This library provides functions for customizing the TPM's Platform Hie= rarchy=0D + Authorization Value (platformAuth) and Platform Hierarchy Authorizatio= n=0D + Policy (platformPolicy) can be defined through this function.=0D +=0D +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>=0D +Copyright (c) Microsoft Corporation.<BR>=0D +SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef _TPM_PLATFORM_HIERARCHY_LIB_H_=0D +#define _TPM_PLATFORM_HIERARCHY_LIB_H_=0D +=0D +/**=0D + This service will perform the TPM Platform Hierarchy configuration at t= he SmmReadyToLock event.=0D +=0D +**/=0D +VOID=0D +EFIAPI=0D +ConfigureTpmPlatformHierarchy (=0D + VOID=0D + );=0D +=0D +#endif=0D diff --git a/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatfor= mHierarchyLib.c b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPl= atformHierarchyLib.c new file mode 100644 index 0000000000..ba2d99bb53 --- /dev/null +++ b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierar= chyLib.c @@ -0,0 +1,210 @@ +/** @file=0D + TPM Platform Hierarchy configuration library.=0D +=0D + This library provides functions for customizing the TPM's Platform Hie= rarchy=0D + Authorization Value (platformAuth) and Platform Hierarchy Authorizatio= n=0D + Policy (platformPolicy) can be defined through this function.=0D +=0D + Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>=0D + Copyright (c) Microsoft Corporation.<BR>=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D + @par Specification Reference:=0D + https://trustedcomputinggroup.org/resource/tcg-tpm-v2-0-provisioning-g= uidance/=0D +**/=0D +=0D +#include <Uefi.h>=0D +=0D +#include <Library/BaseMemoryLib.h>=0D +#include <Library/DebugLib.h>=0D +#include <Library/MemoryAllocationLib.h>=0D +#include <Library/RngLib.h>=0D +#include <Library/Tpm2CommandLib.h>=0D +#include <Library/Tpm2DeviceLib.h>=0D +=0D +//=0D +// The authorization value may be no larger than the digest produced by th= e hash=0D +// algorithm used for context integrity.=0D +//=0D +#define MAX_NEW_AUTHORIZATION_SIZE SHA512_DIGEST_SIZE=0D +=0D +UINT16 mAuthSize;=0D +=0D +/**=0D + Generate high-quality entropy source through RDRAND.=0D +=0D + @param[in] Length Size of the buffer, in bytes, to fill with.=0D + @param[out] Entropy Pointer to the buffer to store the entropy da= ta.=0D +=0D + @retval EFI_SUCCESS Entropy generation succeeded.=0D + @retval EFI_NOT_READY Failed to request random data.=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +RdRandGenerateEntropy (=0D + IN UINTN Length,=0D + OUT UINT8 *Entropy=0D + )=0D +{=0D + EFI_STATUS Status;=0D + UINTN BlockCount;=0D + UINT64 Seed[2];=0D + UINT8 *Ptr;=0D +=0D + Status =3D EFI_NOT_READY;=0D + BlockCount =3D Length / 64;=0D + Ptr =3D (UINT8 *)Entropy;=0D +=0D + //=0D + // Generate high-quality seed for DRBG Entropy=0D + //=0D + while (BlockCount > 0) {=0D + Status =3D GetRandomNumber128 (Seed);=0D + if (EFI_ERROR (Status)) {=0D + return Status;=0D + }=0D + CopyMem (Ptr, Seed, 64);=0D +=0D + BlockCount--;=0D + Ptr =3D Ptr + 64;=0D + }=0D +=0D + //=0D + // Populate the remained data as request.=0D + //=0D + Status =3D GetRandomNumber128 (Seed);=0D + if (EFI_ERROR (Status)) {=0D + return Status;=0D + }=0D + CopyMem (Ptr, Seed, (Length % 64));=0D +=0D + return Status;=0D +}=0D +=0D +/**=0D + This function returns the maximum size of TPM2B_AUTH; this structure is = used for an authorization value=0D + and limits an authValue to being no larger than the largest digest produ= ced by a TPM.=0D +=0D + @param[out] AuthSize Tpm2 Auth size=0D +=0D + @retval EFI_SUCCESS Auth size returned.=0D + @retval EFI_DEVICE_ERROR Can not return platform auth due to= device error.=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +GetAuthSize (=0D + OUT UINT16 *AuthSize=0D + )=0D +{=0D + EFI_STATUS Status;=0D + TPML_PCR_SELECTION Pcrs;=0D + UINTN Index;=0D + UINT16 DigestSize;=0D +=0D + Status =3D EFI_SUCCESS;=0D +=0D + while (mAuthSize =3D=3D 0) {=0D +=0D + mAuthSize =3D SHA1_DIGEST_SIZE;=0D + ZeroMem (&Pcrs, sizeof (TPML_PCR_SELECTION));=0D + Status =3D Tpm2GetCapabilityPcrs (&Pcrs);=0D +=0D + if (EFI_ERROR (Status)) {=0D + DEBUG ((DEBUG_ERROR, "Tpm2GetCapabilityPcrs fail!\n"));=0D + break;=0D + }=0D +=0D + DEBUG ((DEBUG_ERROR, "Tpm2GetCapabilityPcrs - %08x\n", Pcrs.count));=0D +=0D + for (Index =3D 0; Index < Pcrs.count; Index++) {=0D + DEBUG ((DEBUG_ERROR, "alg - %x\n", Pcrs.pcrSelections[Index].hash));= =0D +=0D + switch (Pcrs.pcrSelections[Index].hash) {=0D + case TPM_ALG_SHA1:=0D + DigestSize =3D SHA1_DIGEST_SIZE;=0D + break;=0D + case TPM_ALG_SHA256:=0D + DigestSize =3D SHA256_DIGEST_SIZE;=0D + break;=0D + case TPM_ALG_SHA384:=0D + DigestSize =3D SHA384_DIGEST_SIZE;=0D + break;=0D + case TPM_ALG_SHA512:=0D + DigestSize =3D SHA512_DIGEST_SIZE;=0D + break;=0D + case TPM_ALG_SM3_256:=0D + DigestSize =3D SM3_256_DIGEST_SIZE;=0D + break;=0D + default:=0D + DigestSize =3D SHA1_DIGEST_SIZE;=0D + break;=0D + }=0D +=0D + if (DigestSize > mAuthSize) {=0D + mAuthSize =3D DigestSize;=0D + }=0D + }=0D + break;=0D + }=0D +=0D + *AuthSize =3D mAuthSize;=0D + return Status;=0D +}=0D +=0D +/**=0D + Set PlatformAuth to random value.=0D +**/=0D +VOID=0D +RandomizePlatformAuth (=0D + VOID=0D + )=0D +{=0D + EFI_STATUS Status;=0D + UINT16 AuthSize;=0D + UINT8 *Rand;=0D + UINTN RandSize;=0D + TPM2B_AUTH NewPlatformAuth;=0D +=0D + //=0D + // Send Tpm2HierarchyChange Auth with random value to avoid PlatformAuth= being null=0D + //=0D +=0D + GetAuthSize (&AuthSize);=0D +=0D + ZeroMem (NewPlatformAuth.buffer, AuthSize);=0D + NewPlatformAuth.size =3D AuthSize;=0D +=0D + //=0D + // Allocate one buffer to store random data.=0D + //=0D + RandSize =3D MAX_NEW_AUTHORIZATION_SIZE;=0D + Rand =3D AllocatePool (RandSize);=0D +=0D + RdRandGenerateEntropy (RandSize, Rand);=0D + CopyMem (NewPlatformAuth.buffer, Rand, AuthSize);=0D +=0D + FreePool (Rand);=0D +=0D + //=0D + // Send Tpm2HierarchyChangeAuth command with the new Auth value=0D + //=0D + Status =3D Tpm2HierarchyChangeAuth (TPM_RH_PLATFORM, NULL, &NewPlatformA= uth);=0D + DEBUG ((DEBUG_INFO, "Tpm2HierarchyChangeAuth Result: - %r\n", Status));= =0D + ZeroMem (NewPlatformAuth.buffer, AuthSize);=0D + ZeroMem (Rand, RandSize);=0D +}=0D +=0D +/**=0D + This service defines the configuration of the Platform Hierarchy Author= ization Value (platformAuth)=0D + and Platform Hierarchy Authorization Policy (platformPolicy)=0D +=0D +**/=0D +VOID=0D +EFIAPI=0D +ConfigureTpmPlatformHierarchy (=0D + )=0D +{=0D + RandomizePlatformAuth ();=0D +}=0D diff --git a/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatfor= mHierarchyLib.inf b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpm= PlatformHierarchyLib.inf new file mode 100644 index 0000000000..a413e02302 --- /dev/null +++ b/OvmfPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierar= chyLib.inf @@ -0,0 +1,40 @@ +### @file=0D +#=0D +# TPM Platform Hierarchy configuration library.=0D +#=0D +# This library provides functions for customizing the TPM's Platform Hie= rarchy=0D +# Authorization Value (platformAuth) and Platform Hierarchy Authorizatio= n=0D +# Policy (platformPolicy) can be defined through this function.=0D +#=0D +# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>=0D +# Copyright (c) Microsoft Corporation.<BR>=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +###=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x00010005=0D + BASE_NAME =3D PeiDxeTpmPlatformHierarchyLib=0D + FILE_GUID =3D 7794F92C-4E8E-4E57-9E4A-49A0764C7D73= =0D + MODULE_TYPE =3D PEIM=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D TpmPlatformHierarchyLib|PEIM DXE_DRIV= ER=0D +=0D +[LibraryClasses]=0D + BaseLib=0D + BaseMemoryLib=0D + DebugLib=0D + MemoryAllocationLib=0D + RngLib=0D + Tpm2CommandLib=0D + Tpm2DeviceLib=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + MdeModulePkg/MdeModulePkg.dec=0D + SecurityPkg/SecurityPkg.dec=0D + CryptoPkg/CryptoPkg.dec=0D +=0D +[Sources]=0D + PeiDxeTpmPlatformHierarchyLib.c=0D --=20 2.31.1
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Re: [PATCH v2 1/2] MdePkg/BaseLib: Fix unaligned API prototypes
Michael D Kinney
Hi Marvin,
toggle quoted messageShow quoted text
Can you provide an example of which C compiler is flagging this as an error and what error message is generated. Please enter a BZ with this background information and add link to the BZ in the commit message. This is a change to the BaseLib class, so we need to make sure there are no impacts to any existing code. I looks like a safe change because changing from a pointer to a fixed size type to VOID * should be compatible. Please add that analysis to the background in the BZ as well. Thanks, Mike
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[PATCH v5 5/5] StandaloneMmPkg: build for 32bit arm machines
Etienne Carriere
This change allows to build StandaloneMmPkg components for 32bit Arm
StandaloneMm firmware. This change mainly moves AArch64/ source files to Arm/ side directory for several components: StandaloneMmCpu, StandaloneMmCoreEntryPoint and StandaloneMmMemLib. The source file is built for both 32b and 64b Arm targets. Signed-off-by: Etienne Carriere <etienne.carriere@...> --- Changes since v4: - Update StandaloneMmCoreEntryPoint.h path in StandaloneMmPkg.dec for both AArch64 and ARM targets. Changes since v3: - Fix BuildOptions.ARM in StandaloneMmPkg. - Remove Cc tags. No change since v2 Changes since v1: - ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID is defined in ArmStdSmc.h (see 1st commit in this series) instead of being local to EventHandle.c. - Fix void occurrence to VOID. - Fix path in StandaloneMmPkg/StandaloneMmPkg.dsc --- StandaloneMmPkg/Core/StandaloneMmCore.inf | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/EventHandle.c | 5 +++-- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.c | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.h | 0 StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.inf | 0 StandaloneMmPkg/Include/Library/{AArch64 => Arm}/StandaloneMmCoreEntryPoint.h | 0 StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/CreateHobList.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/SetPermissions.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/StandaloneMmCoreEntryPoint.c | 16 ++++++++-------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => Arm}/StandaloneMmCoreHobLib.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => Arm}/StandaloneMmCoreHobLibInternal.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmMemLib/{AArch64/StandaloneMmMemLibInternal.c => ArmStandaloneMmMemLibInternal.c} | 9 ++++++++- StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf | 6 +++--- StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf | 2 +- StandaloneMmPkg/StandaloneMmPkg.dec | 6 +++--- StandaloneMmPkg/StandaloneMmPkg.dsc | 12 ++++++++---- 18 files changed, 49 insertions(+), 37 deletions(-) diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.inf b/StandaloneMmPkg/Core/StandaloneMmCore.inf index 87bf6e9440..56042b7b39 100644 --- a/StandaloneMmPkg/Core/StandaloneMmCore.inf +++ b/StandaloneMmPkg/Core/StandaloneMmCore.inf @@ -17,7 +17,7 @@ PI_SPECIFICATION_VERSION = 0x00010032 ENTRY_POINT = StandaloneMmMain -# VALID_ARCHITECTURES = IA32 X64 AARCH64 +# VALID_ARCHITECTURES = IA32 X64 AARCH64 ARM [Sources] StandaloneMmCore.c diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c similarity index 95% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c index 63fbe26642..165d696f99 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c @@ -2,6 +2,7 @@ Copyright (c) 2016 HP Development Company, L.P. Copyright (c) 2016 - 2021, Arm Limited. All rights reserved. + Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent @@ -92,8 +93,8 @@ PiMmStandaloneArmTfCpuDriverEntry ( // receipt of a synchronous MM request. Use the Event ID to distinguish // between synchronous and asynchronous events. // - if ((ARM_SMC_ID_MM_COMMUNICATE_AARCH64 != EventId) && - (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 != EventId)) { + if ((ARM_SMC_ID_MM_COMMUNICATE != EventId) && + (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ != EventId)) { DEBUG ((DEBUG_INFO, "UnRecognized Event - 0x%x\n", EventId)); return EFI_INVALID_PARAMETER; } diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c similarity index 96% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c index d4590bcd19..10097f792f 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c @@ -10,7 +10,7 @@ #include <Base.h> #include <Pi/PiMmCis.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/DebugLib.h> #include <Library/ArmSvcLib.h> #include <Library/ArmLib.h> diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.h b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.h rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf diff --git a/StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryPoint.h b/StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h similarity index 100% rename from StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryPoint.h rename to StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c similarity index 97% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c index 4d4cf3d5ff..85f8194687 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Guid/MmramMemoryReserve.h> #include <Guid/MpInformation.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/ArmMmuLib.h> #include <Library/ArmSvcLib.h> #include <Library/DebugLib.h> diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c similarity index 96% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c index 4a380df4a6..cd4b90823e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Guid/MmramMemoryReserve.h> #include <Guid/MpInformation.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/ArmMmuLib.h> #include <Library/ArmSvcLib.h> #include <Library/DebugLib.h> diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c similarity index 94% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c index b445d6942e..49cf51a789 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c @@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <PiMm.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <PiPei.h> #include <Guid/MmramMemoryReserve.h> @@ -182,13 +182,13 @@ DelegatedEventLoop ( } if (FfaEnabled) { - EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64; + EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; EventCompleteSvcArgs->Arg1 = 0; EventCompleteSvcArgs->Arg2 = 0; - EventCompleteSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg4 = SvcStatus; } else { - EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg1 = SvcStatus; } } @@ -273,13 +273,13 @@ InitArmSvcArgs ( ) { if (FeaturePcdGet (PcdFfaEnable)) { - InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64; + InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; InitMmFoundationSvcArgs->Arg1 = 0; InitMmFoundationSvcArgs->Arg2 = 0; - InitMmFoundationSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg4 = *Ret; } else { - InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg1 = *Ret; } } @@ -395,7 +395,7 @@ _ModuleEntryPoint ( // ProcessModuleEntryPointList (HobStart); - DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint)); + DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP %p\n", (VOID *) CpuDriverEntryPoint)); finish: if (Status == RETURN_UNSUPPORTED) { diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf index 4fa426f58e..1762586cfa 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf @@ -21,10 +21,10 @@ # VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only) # -[Sources.AARCH64] - AArch64/StandaloneMmCoreEntryPoint.c - AArch64/SetPermissions.c - AArch64/CreateHobList.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreEntryPoint.c + Arm/SetPermissions.c + Arm/CreateHobList.c [Sources.X64] X64/StandaloneMmCoreEntryPoint.c @@ -34,14 +34,14 @@ MdeModulePkg/MdeModulePkg.dec StandaloneMmPkg/StandaloneMmPkg.dec -[Packages.AARCH64] +[Packages.ARM, Packages.AARCH64] ArmPkg/ArmPkg.dec [LibraryClasses] BaseLib DebugLib -[LibraryClasses.AARCH64] +[LibraryClasses.ARM, LibraryClasses.AARCH64] StandaloneMmMmuLib ArmSvcLib @@ -51,7 +51,7 @@ gEfiStandaloneMmNonSecureBufferGuid gEfiArmTfCpuDriverEpDescriptorGuid -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable [BuildOptions] diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLib.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLib.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLib.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLib.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLibInternal.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLibInternal.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf index a2559920e8..34ed536480 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf @@ -22,7 +22,7 @@ LIBRARY_CLASS = HobLib|MM_CORE_STANDALONE # -# VALID_ARCHITECTURES = X64 AARCH64 +# VALID_ARCHITECTURES = X64 AARCH64 ARM # [Sources.common] Common.c @@ -30,9 +30,9 @@ [Sources.X64] X64/StandaloneMmCoreHobLib.c -[Sources.AARCH64] - AArch64/StandaloneMmCoreHobLib.c - AArch64/StandaloneMmCoreHobLibInternal.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreHobLib.c + Arm/StandaloneMmCoreHobLibInternal.c [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c similarity index 86% rename from StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c index 4124959e04..fa7df46413 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c @@ -20,6 +20,13 @@ // extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalMaximumSupportAddress; +#ifdef MDE_CPU_AARCH64 +#define ARM_PHYSICAL_ADDRESS_BITS 36 +#endif +#ifdef MDE_CPU_ARM +#define ARM_PHYSICAL_ADDRESS_BITS 32 +#endif + /** Calculate and save the maximum support address. @@ -31,7 +38,7 @@ MmMemLibInternalCalculateMaximumSupportAddress ( { UINT8 PhysicalAddressBits; - PhysicalAddressBits = 36; + PhysicalAddressBits = ARM_PHYSICAL_ADDRESS_BITS; // // Save the maximum support address in one global variable diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf index 062b0d7a11..b29d97a746 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf @@ -28,7 +28,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = IA32 X64 AARCH64 +# VALID_ARCHITECTURES = IA32 X64 AARCH64 ARM # [Sources.Common] @@ -37,8 +37,8 @@ [Sources.IA32, Sources.X64] X86StandaloneMmMemLibInternal.c -[Sources.AARCH64] - AArch64/StandaloneMmMemLibInternal.c +[Sources.AARCH64, Sources.ARM] + ArmStandaloneMmMemLibInternal.c [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf index a2a059c5d6..ffb2a6d083 100644 --- a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf +++ b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf @@ -20,7 +20,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = AARCH64 +# VALID_ARCHITECTURES = AARCH64|ARM # # diff --git a/StandaloneMmPkg/StandaloneMmPkg.dec b/StandaloneMmPkg/StandaloneMmPkg.dec index 0dfed4ee99..46784d94e4 100644 --- a/StandaloneMmPkg/StandaloneMmPkg.dec +++ b/StandaloneMmPkg/StandaloneMmPkg.dec @@ -29,10 +29,10 @@ ## MM Memory Operation. MemLib|Include/Library/StandaloneMmMemLib.h -[LibraryClasses.AArch64] +[LibraryClasses.AArch64, LibraryClasses.ARM] ## @libraryclass Defines a set of interfaces for the MM core entrypoint for - ## AArch64. - StandaloneMmCoreEntryPoint|Include/Library/AArch64/StandaloneMmCoreEntryPoint.h + ## AArch64 and ARM. + StandaloneMmCoreEntryPoint|Include/Library/Arm/StandaloneMmCoreEntryPoint.h [Guids] gStandaloneMmPkgTokenSpaceGuid = { 0x18fe7632, 0xf5c8, 0x4e63, { 0x8d, 0xe8, 0x17, 0xa5, 0x5c, 0x59, 0x13, 0xbd }} diff --git a/StandaloneMmPkg/StandaloneMmPkg.dsc b/StandaloneMmPkg/StandaloneMmPkg.dsc index 0c45df95e2..8012f93b7d 100644 --- a/StandaloneMmPkg/StandaloneMmPkg.dsc +++ b/StandaloneMmPkg/StandaloneMmPkg.dsc @@ -20,7 +20,7 @@ PLATFORM_VERSION = 1.0 DSC_SPECIFICATION = 0x00010011 OUTPUT_DIRECTORY = Build/StandaloneMm - SUPPORTED_ARCHITECTURES = AARCH64|X64 + SUPPORTED_ARCHITECTURES = AARCH64|X64|ARM BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT @@ -60,7 +60,7 @@ StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf VariableMmDependency|StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf -[LibraryClasses.AARCH64] +[LibraryClasses.AARCH64, LibraryClasses.ARM] ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf @@ -118,8 +118,8 @@ StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf -[Components.AARCH64] - StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf +[Components.AARCH64, Components.ARM] + StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeCoffExtraActionLib.inf ################################################################################################### @@ -135,6 +135,10 @@ GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv8-a+nofp -mstrict-align GCC:*_*_*_CC_FLAGS = -mstrict-align +[BuildOptions.ARM] +GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv7-a +GCC:*_*_*_CC_FLAGS = -fno-stack-protector + [BuildOptions.X64] MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 GCC:*_GCC*_*_DLINK_FLAGS = -z common-page-size=0x1000 -- 2.17.1
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[PATCH v5 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures
Etienne Carriere
Use intermediate (UINTN) cast when casting int from/to pointer. This
is needed as UINT64 values cast from/to 32bit pointer for 32bit architectures. Signed-off-by: Etienne Carriere <etienne.carriere@...> Acked-by: Jiewen Yao <Jiewen.yao@...> Reviewed-by: Sami Mujawar <sami.mujawar@...> --- No change since v4 Changes since v3: - Remove Cc tags and apply review tags. No change since v2 No change since v1 --- StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c index 6884095c49..d4590bcd19 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c @@ -164,8 +164,8 @@ StandaloneMmCpuInitialize ( // Share the entry point of the CPU driver DEBUG ((DEBUG_INFO, "Sharing Cpu Driver EP *0x%lx = 0x%lx\n", - (UINT64) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, - (UINT64) PiMmStandaloneArmTfCpuDriverEntry)); + (UINTN) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, + (UINTN) PiMmStandaloneArmTfCpuDriverEntry)); *(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) = PiMmStandaloneArmTfCpuDriverEntry; // Find the descriptor that contains the whereabouts of the buffer for @@ -180,8 +180,8 @@ StandaloneMmCpuInitialize ( return Status; } - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINT64) NsCommBufMmramRange->PhysicalStart)); - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINT64) NsCommBufMmramRange->PhysicalSize)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINTN) NsCommBufMmramRange->PhysicalStart)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINTN) NsCommBufMmramRange->PhysicalSize)); CopyMem (&mNsCommBuffer, NsCommBufMmramRange, sizeof(EFI_MMRAM_DESCRIPTOR)); DEBUG ((DEBUG_INFO, "mNsCommBuffer: 0x%016lx - 0x%lx\n", mNsCommBuffer.CpuStart, mNsCommBuffer.PhysicalSize)); diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c index e8fb96bd6e..4d4cf3d5ff 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c @@ -72,14 +72,14 @@ CreateHobListFromBootInfo ( // Create a hoblist with a PHIT and EOH HobStart = HobConstructor ( - (VOID *) PayloadBootInfo->SpMemBase, + (VOID *) (UINTN) PayloadBootInfo->SpMemBase, (UINTN) PayloadBootInfo->SpMemLimit - PayloadBootInfo->SpMemBase, - (VOID *) PayloadBootInfo->SpHeapBase, - (VOID *) (PayloadBootInfo->SpHeapBase + PayloadBootInfo->SpHeapSize) + (VOID *) (UINTN) PayloadBootInfo->SpHeapBase, + (VOID *) (UINTN) (PayloadBootInfo->SpHeapBase + PayloadBootInfo->SpHeapSize) ); // Check that the Hoblist starts at the bottom of the Heap - ASSERT (HobStart == (VOID *) PayloadBootInfo->SpHeapBase); + ASSERT (HobStart == (VOID *) (UINTN) PayloadBootInfo->SpHeapBase); // Build a Boot Firmware Volume HOB BuildFvHob (PayloadBootInfo->SpImageBase, PayloadBootInfo->SpImageSize); @@ -190,9 +190,9 @@ CreateHobListFromBootInfo ( MmramRanges[3].RegionState = EFI_CACHEABLE | EFI_ALLOCATED; // Base and size of heap memory shared by all cpus - MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].CpuStart = (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].PhysicalSize = HobStart->EfiFreeMemoryBottom - (EFI_PHYSICAL_ADDRESS) HobStart; + MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].CpuStart = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].PhysicalSize = HobStart->EfiFreeMemoryBottom - (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; MmramRanges[4].RegionState = EFI_CACHEABLE | EFI_ALLOCATED; // Base and size of heap memory shared by all cpus diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c index 6c50f470aa..b445d6942e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c @@ -328,7 +328,7 @@ _ModuleEntryPoint ( // Locate PE/COFF File information for the Standalone MM core module Status = LocateStandaloneMmCorePeCoffData ( - (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase, + (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PayloadBootInfo->SpImageBase, &TeData, &TeDataSize ); -- 2.17.1
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[PATCH v5 3/5] GenFv: Arm: support images entered in Thumb mode
Etienne Carriere
Change GenFv for Arm architecture to generate a specific jump
instruction as image entry instruction, when the target entry label is assembled with Thumb instruction set. This is possible since SecCoreEntryAddress value fetched from the PE32 has its LSBit set when the entry instruction executes in Thumb mode. Signed-off-by: Etienne Carriere <etienne.carriere@...> Acked-by: Liming Gao <gaoliming@...> Reviewed-by: Sami Mujawar <sami.mujawar@...> --- No change since v4 Changes since v3: - Removed Cc tags and apply review tags. Changes since v2: - Fix missing parentheses in expression. Changes since v1: - Fix typos in commit log and inline comments - Change if() test operand to be an explicit boolean --- BaseTools/Source/C/GenFv/GenFvInternalLib.c | 38 +++++++++++++++----- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source/C/GenFv/GenFvInternalLib.c index 6e296b8ad6..6cf9c84e73 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -34,9 +34,27 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "FvLib.h" #include "PeCoffLib.h" -#define ARMT_UNCONDITIONAL_JUMP_INSTRUCTION 0xEB000000 #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION 0x14000000 +/* + * Arm instruction to jump to Fv entry instruction in Arm or Thumb mode. + * From ARM Arch Ref Manual versions b/c/d, section A8.8.25 BL, BLX (immediate) + * BLX (encoding A2) branches to offset in Thumb instruction set mode. + * BL (encoding A1) branches to offset in Arm instruction set mode. + */ +#define ARM_JUMP_OFFSET_MAX 0xffffff +#define ARM_JUMP_TO_ARM(Offset) (0xeb000000 | ((Offset - 8) >> 2)) + +#define _ARM_JUMP_TO_THUMB(Imm32) (0xfa000000 | \ + (((Imm32) & (1 << 1)) << (24 - 1)) | \ + (((Imm32) >> 2) & 0x7fffff)) +#define ARM_JUMP_TO_THUMB(Offset) _ARM_JUMP_TO_THUMB((Offset) - 8) + +/* + * Arm instruction to retrun from exception (MOVS PC, LR) + */ +#define ARM_RETURN_FROM_EXCEPTION 0xE1B0F07E + BOOLEAN mArm = FALSE; BOOLEAN mRiscV = FALSE; STATIC UINT32 MaxFfsAlignment = 0; @@ -2203,23 +2221,25 @@ Returns: // if we found an SEC core entry point then generate a branch instruction // to it and populate a debugger SWI entry as well if (UpdateVectorSec) { + UINT32 EntryOffset; VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM SEC vector"); - // B SecEntryPoint - signed_immed_24 part +/-32MB offset - // on ARM, the PC is always 8 ahead, so we're not really jumping from the base address, but from base address + 8 - ResetVector[0] = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress - 8) >> 2; + EntryOffset = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress); - if (ResetVector[0] > 0x00FFFFFF) { - Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 32MB of the start of the FV"); + if (EntryOffset > ARM_JUMP_OFFSET_MAX) { + Error(NULL, 0, 3000, "Invalid", "SEC Entry point offset above 1MB of the start of the FV"); return EFI_ABORTED; } - // Add opcode for an unconditional branch with no link. i.e.: " B SecEntryPoint" - ResetVector[0] |= ARMT_UNCONDITIONAL_JUMP_INSTRUCTION; + if ((SecCoreEntryAddress & 1) != 0) { + ResetVector[0] = ARM_JUMP_TO_THUMB(EntryOffset); + } else { + ResetVector[0] = ARM_JUMP_TO_ARM(EntryOffset); + } // SWI handler movs pc,lr. Just in case a debugger uses SWI - ResetVector[2] = 0xE1B0F07E; + ResetVector[2] = ARM_RETURN_FROM_EXCEPTION; // Place holder to support a common interrupt handler from ROM. // Currently not supported. For this to be used the reset vector would not be in this FV -- 2.17.1
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[PATCH v5 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg
Etienne Carriere
Changes in ArmPkg to prepare building StandaloneMm firmware for
32bit Arm architectures. Adds ArmmmuStandaloneMmLib library to the list of the standard components build for ArmPkg on when ARM architectures. Changes path of source file AArch64/ArmMmuStandaloneMmLib.c and compile it for both 32bit and 64bit architectures. Signed-off-by: Etienne Carriere <etienne.carriere@...> --- Changes since v4: - Remove changes related to MmCommunicationDxe and ArmMmuPeiLib since they currently don't need to be built for ARM targets. - Remove review tags applied to patch v3. Changes since v3: - Remove Cc tags and apply review tag. No change since v2 No change since v1 --- ArmPkg/ArmPkg.dec | 2 +- ArmPkg/ArmPkg.dsc | 2 ++ ArmPkg/Library/StandaloneMmMmuLib/{AArch64 => }/ArmMmuStandaloneMmLib.c | 15 ++++++++------- ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf | 6 +++--- 4 files changed, 14 insertions(+), 11 deletions(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index 214b2f5892..6ed51edd03 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -137,7 +137,7 @@ # hardware coherency (i.e., no virtualization or cache coherent DMA) gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043 -[PcdsFeatureFlag.AARCH64] +[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM] ## Used to select method for requesting services from S-EL1.<BR><BR> # TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.<BR> # FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 926986cf7f..8abe3713c8 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -161,4 +161,6 @@ [Components.AARCH64] ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf + +[Components.AARCH64, Components.ARM] ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c similarity index 92% rename from ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c rename to ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c index dd014beec8..20f873e680 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c @@ -2,6 +2,7 @@ File managing the MMU for ARMv8 architecture in S-EL0 Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR> + Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): @@ -62,7 +63,7 @@ SendMemoryPermissionRequest ( // for other Direct Request calls which are not atomic // We therefore check only for Direct Response by the // callee. - if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) { + if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP) { // A Direct Response means FF-A success // Now check the payload for errors // The callee sends back the return value @@ -164,13 +165,13 @@ GetMemoryPermissions ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = 0; SvcArgs.Arg3 = 0; @@ -219,15 +220,15 @@ RequestMemoryPermissionChange ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; SvcArgs.Arg5 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg6 = Permissions; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg3 = Permissions; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf index 6c71fe0023..ff20e58980 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf @@ -16,14 +16,14 @@ LIBRARY_CLASS = StandaloneMmMmuLib PI_SPECIFICATION_VERSION = 0x00010032 -[Sources.AARCH64] - AArch64/ArmMmuStandaloneMmLib.c +[Sources] + ArmMmuStandaloneMmLib.c [Packages] ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable [LibraryClasses] -- 2.17.1
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[PATCH v5 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A, Mm SVC and Std SMC IDs
Etienne Carriere
Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit
function IDs as per SMCCC specification. Defines also generic ARM SVC identifier macros to wrap 32bit or 64bit identifiers upon target built architecture. Signed-off-by: Etienne Carriere <etienne.carriere@...> Reviewed-by: Sami Mujawar <sami.mujawar@...> --- Changes since v3: - Remove Cc tags and apply review tag. No changes since v2 Changes since v1: - Define ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID in ArmStdSmc.h, as expected by few following commits in this series. --- ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 ++++++++++++ ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 15 +++++++++++++++ ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 8 ++++++++ 3 files changed, 35 insertions(+) diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h index 65b8343ade..ebcb54b28b 100644 --- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h @@ -17,9 +17,21 @@ #define ARM_FFA_SVC_H_ #define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 0x8400006F +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x84000070 #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 +#endif + #define SPM_MAJOR_VERSION_FFA 1 #define SPM_MINOR_VERSION_FFA 0 diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h index 33d60ccf17..deb3bc99d2 100644 --- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h @@ -15,10 +15,25 @@ * privileged operations on its behalf. */ #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060 +#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065 #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061 #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064 #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 +#endif + #define SET_MEM_ATTR_DATA_PERM_MASK 0x3 #define SET_MEM_ATTR_DATA_PERM_SHIFT 0 #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0 diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h index 67afb0ea2d..9116a291da 100644 --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h +++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h @@ -49,6 +49,14 @@ #define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041 +/* Generic ID when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32 +#endif + /* MM return error codes */ #define ARM_SMC_MM_RET_SUCCESS 0 #define ARM_SMC_MM_RET_NOT_SUPPORTED -1 -- 2.17.1
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[Patch V2] MinPlatformPkg: Fix the incompatible change about SecureBootVariableLib
duntan
V1: The newly created lib will be consumed by SecureBootConfigDxe.inf in CoreDxeInclude.dsc
V2: Add SecureBootVariableProvisionLib in CoreDxeInclude.dsc Cc: Chasel Chiu <chasel.chiu@...> Cc: Nate DeSimone <nathaniel.l.desimone@...> Cc: Liming Gao <gaoliming@...> Cc: Eric Dong <eric.dong@...> Signed-off-by: DunTan <dun.tan@...> --- Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc index b154f9615d..c3d05fc913 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc @@ -139,6 +139,8 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf + SecureBootVariableLib|SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.inf + SecureBootVariableProvisionLib|SecurityPkg/Library/SecureBootVariableProvisionLib/SecureBootVariableProvisionLib.inf !endif SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf -- 2.31.1.windows.1
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Re: [PATCH 1/1] OvmfPkg PlatformBootManagerLib: Move TryRunningQemuKernel()
James Bottomley
On Mon, 2021-08-09 at 22:53 +1000, Christoph Willing wrote:
With soft feature freeze started, I wonder if this patch could beI'm with Ard on this one: -kernel is working just fine for me and the team at IBM working on Kata containers. It sounds like this might be a problem local to your environment, so we need to debug it to understand the issue rather than blindly reverse existing commits. Regards, James
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Re: [PATCH v6 1/6] OvmfPkg/BaseMemEncryptLib: Detect SEV live migration feature.
Ashish Kalra
Hello Tom,
On Mon, Aug 09, 2021 at 08:41:27AM -0500, Tom Lendacky wrote: On 8/2/21 7:31 AM, Ashish Kalra wrote:Yes KVM only programs CPUID function 0x40000000, as do other hypervisors+I still really don't understand the need for the CPUID loop. KVM only ever like Hyper-V. Also mentioned that leaf 0x40000000 is the Hypervisor CPUID leaf range and vendor ID signature in MSFT Hypervisor Interface document. But looking at linux kernel code for the same functionality : static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves) { uint32_t base, eax, signature[3]; for (base = 0x40000000; base < 0x40010000; base += 0x100) { cpuid(base, &eax, &signature[0], &signature[1], &signature[2]); if (!memcmp(sig, signature, 12) ... ... And the Xen detection code in OVMF: for (mXenLeaf = 0x40000000; mXenLeaf < 0x40010000; mXenLeaf += 0x100) { AsmCpuid (mXenLeaf, NULL, (UINT32 *) &Signature[0], (UINT32 *) &Signature[4], (UINT32 *) &Signature[8]); if (!AsciiStrCmp ((CHAR8 *) Signature, "XenVMMXenVMM")) { return TRUE; The above functions are doing a loop-test. The kernel patch also mentions about the loop-test : https://lore.kernel.org/kvm/51FF1E26.6010707@redhat.com/t/ This patch introduce hypervisor_cpuid_base() which loop test the hypervisor existence function until the signature match and check the number of leaves if required. This could be used by Xen/KVM guest to detect the existence of hypervisor. The above patches/functions don't have any additonal documentation for why are they doing the loop-test ? I don't want to miss any functionality, hence i am reusing the same loop-test code. Thanks, Ashish + AsmCpuid (
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Re: [PATCH v6 6/6] OvmfPkg/AmdSevDxe: Add support for SEV live migration.
Lendacky, Thomas
On 8/2/21 7:33 AM, Ashish Kalra wrote:
From: Ashish Kalra <ashish.kalra@...>DEBUG_ERROR? + __FUNCTION__, Status));Should there be an "ASSERT_EFI_ERROR (Status)" after the DEBUG call? Thanks, Tom + }
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Re: [PATCH v6 2/6] OvmfPkg/BaseMemEncryptLib: Hypercall API for page encryption state change
Lendacky, Thomas
On 8/2/21 7:31 AM, Ashish Kalra wrote:
From: Ashish Kalra <ashish.kalra@...>s/STAT/STATE/ ? +#define KVM_MAP_GPA_RANGE_ENCRYPTED KVM_MAP_GPA_RANGE_ENC_STAT(1)Need to put the function parameters in the comment here. +Just a nit, but EncryptMask is a bit confusing because is sounds like the encryption mask used by SEV, but it's really the page encryption state as defined by the hypercall, maybe call it EncryptionState or EncryptState? +I don't believe the "L" is needed for "Phys" and "Pages" since those are UINTN variables. + PhysicalAddress,Indentation needs to be two spaces past the "DEBUG" function call. Thanks, Tom +
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[edk2-platforms][PATCH v1 1/1] IntelSiliconPkg: Add BaseSmmAccessLibNull
Michael Kubacki
From: Michael Kubacki <michael.kubacki@...>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3540 Adds a NULL instance of SmmAccessLib. Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Signed-off-by: Michael Kubacki <michael.kubacki@...> --- Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLib= Null/BaseSmmAccessLibNull.c | 33 ++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLib= Null/BaseSmmAccessLibNull.inf | 26 +++++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc = | 1 + 3 files changed, 60 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/Base= SmmAccessLibNull/BaseSmmAccessLibNull.c b/Silicon/Intel/IntelSiliconPkg/F= eature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.c new file mode 100644 index 000000000000..f5ad306b380b --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAcce= ssLibNull/BaseSmmAccessLibNull.c @@ -0,0 +1,33 @@ +/** @file + A NULL library instance of SmmAccessLib. + + Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR> + Copyright (c) Microsoft Corporation.<BR> + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <Uefi.h> +#include <Library/DebugLib.h> +#include <Library/SmmAccessLib.h> + +/** + This function is to install an SMM Access PPI + + @retval EFI_SUCCESS - Ppi successfully started and installed= . + @retval EFI_NOT_FOUND - Ppi can't be found. + @retval EFI_OUT_OF_RESOURCES - Ppi does not have enough resources to = initialize the driver. + @retval EFI_UNSUPPORTED - The PPI was not installed and installa= tion is unsupported in + this instance of function implementati= on. + +**/ +EFI_STATUS +EFIAPI +PeiInstallSmmAccessPpi ( + VOID + ) +{ + ASSERT (FALSE); + return EFI_UNSUPPORTED; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/Base= SmmAccessLibNull/BaseSmmAccessLibNull.inf b/Silicon/Intel/IntelSiliconPkg= /Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmmAccessLibNull.inf new file mode 100644 index 000000000000..7fd3b0b89655 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAcce= ssLibNull/BaseSmmAccessLibNull.inf @@ -0,0 +1,26 @@ +## @file +# A NULL library instance of SmmAccessLib. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> +# Copyright (c) Microsoft Corporation.<BR> +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] +INF_VERSION =3D 0x00010017 +BASE_NAME =3D BaseSmmAccessLibNull +FILE_GUID =3D C1A14AB6-B757-4046-9B92-9DCE1A2154C6 +VERSION_STRING =3D 1.0 +MODULE_TYPE =3D BASE +LIBRARY_CLASS =3D SmmAccessLib + +[Packages] + MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + +[LibraryClasses] + DebugLib + +[Sources] + BaseSmmAccessLibNull.c diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/= Intel/IntelSiliconPkg/IntelSiliconPkg.dsc index 1092371d848e..dd0928ec58f3 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -90,6 +90,7 @@ [Components] IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.= inf IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/Mi= crocodeFlashAccessLibNull.inf IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf + IntelSiliconPkg/Feature/SmmAccess/Library/BaseSmmAccessLibNull/BaseSmm= AccessLibNull.inf IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.= inf IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaL= ib.inf IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf --=20 2.28.0.windows.1
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Re: [PATCH v6 1/6] OvmfPkg/BaseMemEncryptLib: Detect SEV live migration feature.
Lendacky, Thomas
On 8/2/21 7:31 AM, Ashish Kalra wrote:
From: Ashish Kalra <ashish.kalra@...>I don't think KvmDetectSevLiveMigrationFeature() should be in OvmfPkg/Include/Library/MemEncryptSevLib.h since it isn't called except as a helper by InternalDetectSevLiveMigrationFeature(). You should probably create a new PeiDxeMemEncryptSevLibInternal.h header file for that function that lives in OvmfPkg/Library/BaseMemEncryptSevLib. #endif // _MEM_ENCRYPT_SEV_LIB_H_Add a space before the "()" + mSevLiveMigrationStatus = TRUE;Add a space before the "(" + VOIDCoding style requires these to be four separate declarations. +I still really don't understand the need for the CPUID loop. KVM only ever programs CPUID function 0x40000000, right? + AsmCpuid (Add a space before "(" + VOIDAdd a space before "()" Thanks, Tom + mSevLiveMigrationStatus = TRUE;
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[edk2-platforms][PATCH v1 1/1] IntelSiliconPkg/PeiSmmAccessLib: Remove S3 requirement
Michael Kubacki
From: Michael Kubacki <michael.kubacki@...>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3539 PeiInstallSmmAccessPpi() currently requires the boot mode be set to S3 to actually install gEfiPeiMmAccessPpiGuid. This change removes this requirement in the function implementation for two reasons: 1. Practical use cases exist to require this PPI in cases other than the boot mode being set to BOOT_ON_S3_RESUME. 2. It is poor API design to implicitly bury this requirement within a function whose responsibility is to install the PPI. The caller can easily place arbitrary constraints around whether to call based on conditions such as the boot mode being BOOT_ON_S3_RESUME. Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Signed-off-by: Michael Kubacki <michael.kubacki@...> --- Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/= PeiSmmAccessLib.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiS= mmAccessLib/PeiSmmAccessLib.c b/Silicon/Intel/IntelSiliconPkg/Feature/Smm= Access/Library/PeiSmmAccessLib/PeiSmmAccessLib.c index d9bf4fba983e..4df0d695fdaf 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAcces= sLib/PeiSmmAccessLib.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAcces= sLib/PeiSmmAccessLib.c @@ -252,19 +252,7 @@ PeiInstallSmmAccessPpi ( EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; SMM_ACCESS_PRIVATE_DATA *SmmAccessPrivate; VOID *HobList; - EFI_BOOT_MODE BootMode; =20 - Status =3D PeiServicesGetBootMode (&BootMode); - if (EFI_ERROR (Status)) { - // - // If not in S3 boot path. do nothing - // - return EFI_SUCCESS; - } - - if (BootMode !=3D BOOT_ON_S3_RESUME) { - return EFI_SUCCESS; - } // // Initialize private data // --=20 2.28.0.windows.1
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Re: [PATCH 1/1] OvmfPkg PlatformBootManagerLib: Move TryRunningQemuKernel()
Ard Biesheuvel
On Wed, 28 Jul 2021 at 04:18, Christoph Willing <chris.willing@...> wrote:
Can we pinpoint the failure condition a bit more? I heavily rely on -kernel for my local OVMF testing and other uses, and I am pretty sure it hasn't been broken for 3 years. So what else are you doing that triggers this failure? Is it related to boot order, the type of devices, etc? The last releases which actually work correctly are vUDK2017 and vUDK2018
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Re: [PATCH 1/1] OvmfPkg PlatformBootManagerLib: Move TryRunningQemuKernel()
Christoph Willing
With soft feature freeze started, I wonder if this patch could be
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reviewed and pushed for edk2-stable202108 tag? I think it has languished because I didn't initially Cc appropriately - pls add others as necessary. This patch is a trivial (I think) change which fixes a long standing and annoying bug for those booting Qemu with UEFI using external kernel & initrd. Thanks, chris
On 28/7/21 12:02 pm, Christoph Willing wrote:
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3504
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Re: [PATCH] MinPlatformPkg: Fix the incompatible change about SecureBootVariableLib
Zhiguang Liu
Hi Dun,
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SecureBootConfigDxe.inf will also consume SecureBootVariableProvisionLib library. Can you also add the library in this patch? Thanks Zhiguang
-----Original Message-----
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Re: [PATCH v2 4/7] ArmPkg/DefaultExceptionHandlerLib: Check DebugImageInfoTable type safely
Marvin Häuser <mhaeuser@...>
On 09/08/2021 13:55, Ard Biesheuvel wrote:
On Mon, 9 Aug 2021 at 11:51, Marvin Häuser <mhaeuser@...> wrote:Hey Ard,C does not allow casting to or dereferencing incompatible pointerHi Marvin, It's a series and there is a cover letter at: https://edk2.groups.io/g/devel/topic/patch_v2_0_7_fix_various/84764899?p=,,,20,0,0,0::recentpostdate%2Fsticky,,,20,2,0,84764899 The mails from yesterday can certainly be discarded, for some reason format-patch did not number the patches without the argument. The mails from today are numbered and there is a cover letter, but for some reason the threading is all wrong in Thunderbird for me. All subsequent patches have the "In-Reply-To" header in the patch files, I think it is supposed to work off of that? Is threading broken for you as well? Any idea what could have gone wrong? I will create a V3 with you CC'd on all patches once I understand everything that went wrong. Is it normal to CC all people from each patch on all patches of a series? Thanks and so sorry for the hassle! Best regards, Marvin I am going to disregard anything you sent yesterday and today, as it
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