Date   

Re: [RFC] MemoryProtectionLib for Dynamic Memory Guard Settings

Taylor Beebe
 

Thanks for your feedback, Jian.

In option 2, a most basic implementation would returning the current FixedAtBuild PCDs assuming they are kept. If they aren't, the library implementer could simply hard-code the return value for each memory protection setting.

In option 1, the HOB would be published in pre-mem and I'm not an expert on exploiting the pre-mem environment. Jiewen may have more to say on this.

-Taylor

On 7/28/2021 7:18 PM, Wang, Jian J wrote:
Thanks for the RFC. I'm not object to this idea. The only concern from me
is the potential security holes introduced by the changes. According to your
description, it allows 3rd party software to violate memory protection policy.
I'd like to see more explanations on how to avoid it to be exploited.
+Jiewen, what's current process to evaluate the security threat?
Regards,
Jian

-----Original Message-----
From: Taylor Beebe <t@taylorbeebe.com>
Sent: Friday, July 23, 2021 8:33 AM
To: devel@edk2.groups.io
Cc: spbrogan@outlook.com; Dong, Eric <eric.dong@intel.com>; Ni, Ray
<ray.ni@intel.com>; Kumar, Rahul1 <Rahul1.Kumar@intel.com>;
mikuback@linux.microsoft.com; Wang, Jian J <jian.j.wang@intel.com>; Wu,
Hao A <hao.a.wu@intel.com>; Bi, Dandan <dandan.bi@intel.com>;
gaoliming@byosoft.com.cn; Dong, Guo <guo.dong@intel.com>; Ma, Maurice
<maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [RFC] MemoryProtectionLib for Dynamic Memory Guard Settings

Current memory protection settings rely on FixedAtBuild PCD values
(minus PcdSetNxForStack). Because of this, the memory protection
configuration interface is fixed in nature. Cases arise in which memory
protections might need to be adjusted between boots (if platform design
allows) to avoid disabling a system. For example, platforms might choose
to allow the user to control their protection policies such as allow
execution of critical 3rd party software that might violate memory
protections.

This RFC seeks your feedback regarding introducing an interface that
allows dynamic configuration of memory protection settings.

I would like to propose two options:
1. Describing the memory protection setting configuration in a HOB that
is produced by the platform.
2. Introducing a library class (e.g. MemoryProtectionLib) that allows
abstraction of the memory protection setting configuration data source.

In addition, I would like to know if the memory protection FixedAtBuild
PCDs currently in MdeModulePkg can be removed so we can move the
configuration interface entirely to an option above.

In any case, I would like the settings to be visible to environments
such as Standalone MM where dynamic PCDs are not accessible.

I am seeking your feedback on this proposal in preparation for sending
an edk2 patch series.

--
Taylor Beebe
Software Engineer @ Microsoft
--
Taylor Beebe
Software Engineer @ Microsoft


回复: [edk2-devel] [PATCH 00/13] Add ACPI 6.4 header file

gaoliming
 

Chris:
Please submit one BZ (https://bugzilla.tianocore.org/) for this new
feature. I will review the code.

Thanks
Liming

-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Chris Jones
发送时间: 2021年7月30日 0:23
收件人: devel@edk2.groups.io
抄送: Sami.Mujawar@arm.com; Akanksha.Jain2@arm.com;
Ben.Anderson@arm.com; michael.d.kinney@intel.com;
gaoliming@byosoft.com.cn; zhiguang.liu@intel.com;
Matteo.Carlini@arm.com; nd@arm.com
主题: [edk2-devel] [PATCH 00/13] Add ACPI 6.4 header file

This patch series introduces a header file for the latest version of the
ACPI 6.4 specification, January 2021. This header contains all updates
to the ACPI specification in addition to addressing a few small errors
from the previous ACPI header files.

The changes can be seen at:
https://github.com/chris-jones-arm/edk2/tree/1661_add_acpi_64_header_v
1

Chris Jones (13):
MdePkg: Add ACPI 6.4 header file
MdePkg: Increment FADT version
MdePkg: Rename SBSA Generic Watchdog to Arm Generic Watchdog
MdePkg: Update PMTT to ACPI 6.4
MdePkg: Add SPA Location Cookie field to SPA Range structure
MdePkg: Remove DPPT table
MdePkg: Add flags and MinTransferSize to Generic Initiator
MdePkg: Add 'Type 5' PCC structure
MdePkg: Add Multiprocessor Wakeup structure
MdePkg: Add the Platform Health Assessment Table (PHAT)
MdePkg: Add Secure Access Components in the SDEV table
MdePkg: Add Cache ID to PPTT
MdePkg: Fix broken coding style in Acpi64.h

MdePkg/Include/IndustryStandard/Acpi.h | 4 +-
MdePkg/Include/IndustryStandard/Acpi64.h | 3148
++++++++++++++++++++
2 files changed, 3150 insertions(+), 2 deletions(-)
create mode 100644 MdePkg/Include/IndustryStandard/Acpi64.h

--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")





[PATCH] SecurityPkg: Debug code to audit BIOS TPM extend operations.

Rodrigo Gonzalez del Cueto
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2858

Add debug functionality to examine TPM extend operations
performed by BIOS and inspect the PCR 00 value prior to
any BIOS measurements.

Replaced usage of EFI_D_* for DEBUG_* definitions in debug
messages.

Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
---
SecurityPkg/Include/Library/Tpm2CommandLib.h | 28 ++++++++++++++++++++++------
SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c | 226 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------------
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c | 34 ++++++++++++++++++++--------------
3 files changed, 245 insertions(+), 43 deletions(-)

diff --git a/SecurityPkg/Include/Library/Tpm2CommandLib.h b/SecurityPkg/Include/Library/Tpm2CommandLib.h
index ee8eb62295..5e5c340893 100644
--- a/SecurityPkg/Include/Library/Tpm2CommandLib.h
+++ b/SecurityPkg/Include/Library/Tpm2CommandLib.h
@@ -1,7 +1,7 @@
/** @file
This library is used by other modules to send TPM2 command.

-Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -505,7 +505,7 @@ EFIAPI
Tpm2PcrEvent (
IN TPMI_DH_PCR PcrHandle,
IN TPM2B_EVENT *EventData,
- OUT TPML_DIGEST_VALUES *Digests
+ OUT TPML_DIGEST_VALUES *Digests
);

/**
@@ -522,10 +522,10 @@ Tpm2PcrEvent (
EFI_STATUS
EFIAPI
Tpm2PcrRead (
- IN TPML_PCR_SELECTION *PcrSelectionIn,
- OUT UINT32 *PcrUpdateCounter,
- OUT TPML_PCR_SELECTION *PcrSelectionOut,
- OUT TPML_DIGEST *PcrValues
+ IN TPML_PCR_SELECTION *PcrSelectionIn,
+ OUT UINT32 *PcrUpdateCounter,
+ OUT TPML_PCR_SELECTION *PcrSelectionOut,
+ OUT TPML_DIGEST *PcrValues
);

/**
@@ -1113,4 +1113,20 @@ GetDigestFromDigestList(
OUT VOID *Digest
);

+ /**
+ This function will query the TPM to determine which hashing algorithms and
+ get the digests of all active and supported PCR banks of a specific PCR register.
+
+ @param[in] PcrHandle The index of the PCR register to be read.
+ @param[out] HashList List of digests from PCR register being read.
+
+ @retval EFI_SUCCESS The Pcr was read successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2PcrReadForActiveBank (
+ IN TPMI_DH_PCR PcrHandle,
+ OUT TPML_DIGEST *HashList
+ );
#endif
diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c
index ddb15178fb..3b49192b93 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c
@@ -1,7 +1,7 @@
/** @file
Implement TPM2 Integrity related command.

-Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -109,7 +109,6 @@ Tpm2PcrExtend (
Cmd.Header.commandCode = SwapBytes32(TPM_CC_PCR_Extend);
Cmd.PcrHandle = SwapBytes32(PcrHandle);

-
//
// Add in Auth session
//
@@ -130,14 +129,26 @@ Tpm2PcrExtend (
Buffer += sizeof(UINT16);
DigestSize = GetHashSizeFromAlgo (Digests->digests[Index].hashAlg);
if (DigestSize == 0) {
- DEBUG ((EFI_D_ERROR, "Unknown hash algorithm %d\r\n", Digests->digests[Index].hashAlg));
+ DEBUG ((DEBUG_ERROR, "Unknown hash algorithm %d\r\n", Digests->digests[Index].hashAlg));
return EFI_DEVICE_ERROR;
}
+
CopyMem(
Buffer,
&Digests->digests[Index].digest,
DigestSize
);
+
+ DEBUG_CODE_BEGIN ();
+ UINTN Index2;
+ DEBUG ((DEBUG_VERBOSE, "Tpm2PcrExtend - Hash = 0x%04x, Pcr[%02d], digest = ", Digests->digests[Index].hashAlg, (UINT8) PcrHandle));
+
+ for (Index2 = 0; Index2 < DigestSize; Index2++) {
+ DEBUG ((DEBUG_VERBOSE, "%02x ", Buffer[Index2]));
+ }
+ DEBUG ((DEBUG_VERBOSE, "\n"));
+ DEBUG_CODE_END ();
+
Buffer += DigestSize;
}

@@ -151,7 +162,7 @@ Tpm2PcrExtend (
}

if (ResultBufSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrExtend: Failed ExecuteCommand: Buffer Too Small\r\n"));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrExtend: Failed ExecuteCommand: Buffer Too Small\r\n"));
return EFI_BUFFER_TOO_SMALL;
}

@@ -160,7 +171,7 @@ Tpm2PcrExtend (
//
RespSize = SwapBytes32(Res.Header.paramSize);
if (RespSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrExtend: Response size too large! %d\r\n", RespSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrExtend: Response size too large! %d\r\n", RespSize));
return EFI_BUFFER_TOO_SMALL;
}

@@ -168,10 +179,15 @@ Tpm2PcrExtend (
// Fail if command failed
//
if (SwapBytes32(Res.Header.responseCode) != TPM_RC_SUCCESS) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrExtend: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrExtend: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
return EFI_DEVICE_ERROR;
}

+ DEBUG_CODE_BEGIN ();
+ DEBUG ((DEBUG_VERBOSE, "Tpm2PcrExtend: PCR read after extend...\n"));
+ Tpm2PcrReadForActiveBank (PcrHandle, NULL);
+ DEBUG_CODE_END ();
+
//
// Unmarshal the response
//
@@ -246,7 +262,7 @@ Tpm2PcrEvent (
}

if (ResultBufSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrEvent: Failed ExecuteCommand: Buffer Too Small\r\n"));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrEvent: Failed ExecuteCommand: Buffer Too Small\r\n"));
return EFI_BUFFER_TOO_SMALL;
}

@@ -255,7 +271,7 @@ Tpm2PcrEvent (
//
RespSize = SwapBytes32(Res.Header.paramSize);
if (RespSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrEvent: Response size too large! %d\r\n", RespSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrEvent: Response size too large! %d\r\n", RespSize));
return EFI_BUFFER_TOO_SMALL;
}

@@ -263,7 +279,7 @@ Tpm2PcrEvent (
// Fail if command failed
//
if (SwapBytes32(Res.Header.responseCode) != TPM_RC_SUCCESS) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrEvent: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrEvent: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
return EFI_DEVICE_ERROR;
}

@@ -284,7 +300,7 @@ Tpm2PcrEvent (
Buffer += sizeof(UINT16);
DigestSize = GetHashSizeFromAlgo (Digests->digests[Index].hashAlg);
if (DigestSize == 0) {
- DEBUG ((EFI_D_ERROR, "Unknown hash algorithm %d\r\n", Digests->digests[Index].hashAlg));
+ DEBUG ((DEBUG_ERROR, "Unknown hash algorithm %d\r\n", Digests->digests[Index].hashAlg));
return EFI_DEVICE_ERROR;
}
CopyMem(
@@ -298,6 +314,7 @@ Tpm2PcrEvent (
return EFI_SUCCESS;
}

+
/**
This command returns the values of all PCR specified in pcrSelect.

@@ -353,11 +370,11 @@ Tpm2PcrRead (
}

if (RecvBufferSize < sizeof (TPM2_RESPONSE_HEADER)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
return EFI_DEVICE_ERROR;
}
if (SwapBytes32(RecvBuffer.Header.responseCode) != TPM_RC_SUCCESS) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrRead - responseCode - %x\n", SwapBytes32(RecvBuffer.Header.responseCode)));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrRead - responseCode - %x\n", SwapBytes32(RecvBuffer.Header.responseCode)));
return EFI_NOT_FOUND;
}

@@ -369,7 +386,7 @@ Tpm2PcrRead (
// PcrUpdateCounter
//
if (RecvBufferSize < sizeof (TPM2_RESPONSE_HEADER) + sizeof(RecvBuffer.PcrUpdateCounter)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
return EFI_DEVICE_ERROR;
}
*PcrUpdateCounter = SwapBytes32(RecvBuffer.PcrUpdateCounter);
@@ -378,7 +395,7 @@ Tpm2PcrRead (
// PcrSelectionOut
//
if (RecvBufferSize < sizeof (TPM2_RESPONSE_HEADER) + sizeof(RecvBuffer.PcrUpdateCounter) + sizeof(RecvBuffer.PcrSelectionOut.count)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
return EFI_DEVICE_ERROR;
}
PcrSelectionOut->count = SwapBytes32(RecvBuffer.PcrSelectionOut.count);
@@ -388,7 +405,7 @@ Tpm2PcrRead (
}

if (RecvBufferSize < sizeof (TPM2_RESPONSE_HEADER) + sizeof(RecvBuffer.PcrUpdateCounter) + sizeof(RecvBuffer.PcrSelectionOut.count) + sizeof(RecvBuffer.PcrSelectionOut.pcrSelections[0]) * PcrSelectionOut->count) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrRead - RecvBufferSize Error - %x\n", RecvBufferSize));
return EFI_DEVICE_ERROR;
}
for (Index = 0; Index < PcrSelectionOut->count; Index++) {
@@ -513,7 +530,7 @@ Tpm2PcrAllocate (
}

if (ResultBufSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrAllocate: Failed ExecuteCommand: Buffer Too Small\r\n"));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrAllocate: Failed ExecuteCommand: Buffer Too Small\r\n"));
Status = EFI_BUFFER_TOO_SMALL;
goto Done;
}
@@ -523,7 +540,7 @@ Tpm2PcrAllocate (
//
RespSize = SwapBytes32(Res.Header.paramSize);
if (RespSize > sizeof(Res)) {
- DEBUG ((EFI_D_ERROR, "Tpm2PcrAllocate: Response size too large! %d\r\n", RespSize));
+ DEBUG ((DEBUG_ERROR, "Tpm2PcrAllocate: Response size too large! %d\r\n", RespSize));
Status = EFI_BUFFER_TOO_SMALL;
goto Done;
}
@@ -532,7 +549,7 @@ Tpm2PcrAllocate (
// Fail if command failed
//
if (SwapBytes32(Res.Header.responseCode) != TPM_RC_SUCCESS) {
- DEBUG((EFI_D_ERROR,"Tpm2PcrAllocate: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
+ DEBUG((DEBUG_ERROR,"Tpm2PcrAllocate: Response Code error! 0x%08x\r\n", SwapBytes32(Res.Header.responseCode)));
Status = EFI_DEVICE_ERROR;
goto Done;
}
@@ -673,17 +690,180 @@ Tpm2PcrAllocateBanks (
&SizeNeeded,
&SizeAvailable
);
- DEBUG ((EFI_D_INFO, "Tpm2PcrAllocateBanks call Tpm2PcrAllocate - %r\n", Status));
+ DEBUG ((DEBUG_INFO, "Tpm2PcrAllocateBanks call Tpm2PcrAllocate - %r\n", Status));
if (EFI_ERROR (Status)) {
goto Done;
}

- DEBUG ((EFI_D_INFO, "AllocationSuccess - %02x\n", AllocationSuccess));
- DEBUG ((EFI_D_INFO, "MaxPCR - %08x\n", MaxPCR));
- DEBUG ((EFI_D_INFO, "SizeNeeded - %08x\n", SizeNeeded));
- DEBUG ((EFI_D_INFO, "SizeAvailable - %08x\n", SizeAvailable));
+ DEBUG ((DEBUG_INFO, "AllocationSuccess - %02x\n", AllocationSuccess));
+ DEBUG ((DEBUG_INFO, "MaxPCR - %08x\n", MaxPCR));
+ DEBUG ((DEBUG_INFO, "SizeNeeded - %08x\n", SizeNeeded));
+ DEBUG ((DEBUG_INFO, "SizeAvailable - %08x\n", SizeAvailable));

Done:
ZeroMem(&LocalAuthSession.hmac, sizeof(LocalAuthSession.hmac));
return Status;
}
+
+/**
+ This function will query the TPM to determine which hashing algorithms and
+ get the digests of all active and supported PCR banks of a specific PCR register.
+
+ @param[in] PcrHandle The index of the PCR register to be read.
+ @param[out] HashList List of digests from PCR register being read.
+
+ @retval EFI_SUCCESS The Pcr was read successfully.
+ @retval EFI_DEVICE_ERROR The command was unsuccessful.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2PcrReadForActiveBank (
+ IN TPMI_DH_PCR PcrHandle,
+ OUT TPML_DIGEST *HashList
+)
+{
+ EFI_STATUS Status;
+ TPML_PCR_SELECTION Pcrs;
+ TPML_PCR_SELECTION PcrSelectionIn;
+ TPML_PCR_SELECTION PcrSelectionOut;
+ TPML_DIGEST PcrValues;
+ UINT32 PcrUpdateCounter;
+ UINT8 PcrIndex;
+ UINT32 TpmHashAlgorithmBitmap;
+ TPMI_ALG_HASH CurrentPcrBankHash;
+ UINT32 ActivePcrBanks;
+ UINT32 TcgRegistryHashAlg;
+ UINTN Index;
+ UINTN Index2;
+
+ PcrIndex = (UINT8) PcrHandle;
+
+ if ((PcrIndex < 0) ||
+ (PcrIndex >= IMPLEMENTATION_PCR)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ZeroMem (&PcrSelectionIn, sizeof (PcrSelectionIn));
+ ZeroMem (&PcrUpdateCounter, sizeof (UINT32));
+ ZeroMem (&PcrSelectionOut, sizeof (PcrSelectionOut));
+ ZeroMem (&PcrValues, sizeof (PcrValues));
+ ZeroMem (&Pcrs, sizeof (TPML_PCR_SELECTION));
+
+ DEBUG ((DEBUG_INFO, "ReadPcr - %02d\n", PcrIndex));
+
+ //
+ // Read TPM capabilities
+ //
+ Status = Tpm2GetCapabilityPcrs (&Pcrs);
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ReadPcr: Unable to read TPM capabilities\n"));
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Get Active Pcrs
+ //
+ Status = Tpm2GetCapabilitySupportedAndActivePcrs (
+ &TpmHashAlgorithmBitmap,
+ &ActivePcrBanks
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ReadPcr: Unable to read TPM capabilities and active PCRs\n"));
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Select from Active PCRs
+ //
+ for (Index = 0; Index < Pcrs.count; Index++) {
+ CurrentPcrBankHash = Pcrs.pcrSelections[Index].hash;
+
+ switch (CurrentPcrBankHash) {
+ case TPM_ALG_SHA1:
+ DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA1 Present\n"));
+ TcgRegistryHashAlg = HASH_ALG_SHA1;
+ break;
+ case TPM_ALG_SHA256:
+ DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA256 Present\n"));
+ TcgRegistryHashAlg = HASH_ALG_SHA256;
+ break;
+ case TPM_ALG_SHA384:
+ DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA384 Present\n"));
+ TcgRegistryHashAlg = HASH_ALG_SHA384;
+ break;
+ case TPM_ALG_SHA512:
+ DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA512 Present\n"));
+ TcgRegistryHashAlg = HASH_ALG_SHA512;
+ break;
+ case TPM_ALG_SM3_256:
+ DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SM3 Present\n"));
+ TcgRegistryHashAlg = HASH_ALG_SM3_256;
+ break;
+ default:
+ //
+ // Unsupported algorithm
+ //
+ DEBUG ((DEBUG_VERBOSE, "Unknown algorithm present\n"));
+ TcgRegistryHashAlg = 0;
+ break;
+ }
+ //
+ // Skip unsupported and inactive PCR banks
+ //
+ if ((TcgRegistryHashAlg & ActivePcrBanks) == 0) {
+ DEBUG ((DEBUG_VERBOSE, "Skipping unsupported or inactive bank: 0x%04x\n", CurrentPcrBankHash));
+ continue;
+ }
+
+ //
+ // Select PCR from current active bank
+ //
+ PcrSelectionIn.pcrSelections[PcrSelectionIn.count].hash = Pcrs.pcrSelections[Index].hash;
+ PcrSelectionIn.pcrSelections[PcrSelectionIn.count].sizeofSelect = PCR_SELECT_MAX;
+ PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[0] = (PcrIndex < 8) ? 1 << PcrIndex : 0;
+ PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[1] = (PcrIndex > 7) && (PcrIndex < 16) ? 1 << (PcrIndex - 8) : 0;
+ PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[2] = (PcrIndex > 15) ? 1 << (PcrIndex - 16) : 0;
+ PcrSelectionIn.count++;
+ }
+
+ //
+ // Read PCRs
+ //
+ Status = Tpm2PcrRead (
+ &PcrSelectionIn,
+ &PcrUpdateCounter,
+ &PcrSelectionOut,
+ &PcrValues
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "Tpm2PcrRead failed Status = %r \n", Status));
+ return EFI_DEVICE_ERROR;
+ }
+
+ for (Index = 0; Index < PcrValues.count; Index++) {
+ DEBUG ((
+ DEBUG_INFO,
+ "ReadPcr - HashAlg = 0x%04x, Pcr[%02d], digest = ",
+ PcrSelectionOut.pcrSelections[Index].hash,
+ PcrIndex
+ ));
+
+ for(Index2 = 0; Index2 < PcrValues.digests[Index].size; Index2++) {
+ DEBUG ((DEBUG_INFO, "%02x ", PcrValues.digests[Index].buffer[Index2]));
+ }
+ DEBUG ((DEBUG_INFO, "\n"));
+ }
+
+ if (HashList != NULL) {
+ CopyMem (
+ HashList,
+ &PcrValues,
+ sizeof (TPML_DIGEST)
+ );
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
index 93a8803ff6..ea79fa0af6 100644
--- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
+++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
@@ -1,7 +1,7 @@
/** @file
Initialize TPM2 device and measure FVs before handing off control to DXE.

-Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Microsoft Corporation. All rights reserved. <BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -191,7 +191,6 @@ EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] = {
}
};

-
/**
Record all measured Firmware Volume Information into a Guid Hob
Guid Hob payload layout is
@@ -267,7 +266,7 @@ SyncPcrAllocationsAndPcrMask (
UINT32 Tpm2PcrMask;
UINT32 NewTpm2PcrMask;

- DEBUG ((EFI_D_ERROR, "SyncPcrAllocationsAndPcrMask!\n"));
+ DEBUG ((DEBUG_ERROR, "SyncPcrAllocationsAndPcrMask!\n"));

//
// Determine the current TPM support and the Platform PCR mask.
@@ -278,7 +277,7 @@ SyncPcrAllocationsAndPcrMask (
Tpm2PcrMask = PcdGet32 (PcdTpm2HashMask);
if (Tpm2PcrMask == 0) {
//
- // if PcdTPm2HashMask is zero, use ActivePcr setting
+ // if PcdTpm2HashMask is zero, use ActivePcr setting
//
PcdSet32S (PcdTpm2HashMask, TpmActivePcrBanks);
Tpm2PcrMask = TpmActivePcrBanks;
@@ -297,9 +296,9 @@ SyncPcrAllocationsAndPcrMask (
if ((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) {
NewTpmActivePcrBanks = TpmActivePcrBanks & Tpm2PcrMask;

- DEBUG ((EFI_D_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n", __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks));
+ DEBUG ((DEBUG_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n", __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks));
if (NewTpmActivePcrBanks == 0) {
- DEBUG ((EFI_D_ERROR, "%a - No viable PCRs active! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
+ DEBUG ((DEBUG_ERROR, "%a - No viable PCRs active! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
ASSERT (FALSE);
} else {
Status = Tpm2PcrAllocateBanks (NULL, (UINT32)TpmHashAlgorithmBitmap, NewTpmActivePcrBanks);
@@ -307,7 +306,7 @@ SyncPcrAllocationsAndPcrMask (
//
// We can't do much here, but we hope that this doesn't happen.
//
- DEBUG ((EFI_D_ERROR, "%a - Failed to reallocate PCRs!\n", __FUNCTION__));
+ DEBUG ((DEBUG_ERROR, "%a - Failed to reallocate PCRs!\n", __FUNCTION__));
ASSERT_EFI_ERROR (Status);
}
//
@@ -324,9 +323,9 @@ SyncPcrAllocationsAndPcrMask (
if ((Tpm2PcrMask & TpmHashAlgorithmBitmap) != Tpm2PcrMask) {
NewTpm2PcrMask = Tpm2PcrMask & TpmHashAlgorithmBitmap;

- DEBUG ((EFI_D_INFO, "%a - Updating PcdTpm2HashMask from 0x%X to 0x%X.\n", __FUNCTION__, Tpm2PcrMask, NewTpm2PcrMask));
+ DEBUG ((DEBUG_INFO, "%a - Updating PcdTpm2HashMask from 0x%X to 0x%X.\n", __FUNCTION__, Tpm2PcrMask, NewTpm2PcrMask));
if (NewTpm2PcrMask == 0) {
- DEBUG ((EFI_D_ERROR, "%a - No viable PCRs supported! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
+ DEBUG ((DEBUG_ERROR, "%a - No viable PCRs supported! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
ASSERT (FALSE);
}

@@ -365,7 +364,7 @@ LogHashEvent (
RetStatus = EFI_SUCCESS;
for (Index = 0; Index < sizeof(mTcg2EventInfo)/sizeof(mTcg2EventInfo[0]); Index++) {
if ((SupportedEventLogs & mTcg2EventInfo[Index].LogFormat) != 0) {
- DEBUG ((EFI_D_INFO, " LogFormat - 0x%08x\n", mTcg2EventInfo[Index].LogFormat));
+ DEBUG ((DEBUG_INFO, " LogFormat - 0x%08x\n", mTcg2EventInfo[Index].LogFormat));
switch (mTcg2EventInfo[Index].LogFormat) {
case EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2:
Status = GetDigestFromDigestList (TPM_ALG_SHA1, DigestList, &NewEventHdr->Digest);
@@ -476,7 +475,7 @@ HashLogExtendEvent (
}

if (Status == EFI_DEVICE_ERROR) {
- DEBUG ((EFI_D_ERROR, "HashLogExtendEvent - %r. Disable TPM.\n", Status));
+ DEBUG ((DEBUG_ERROR, "HashLogExtendEvent - %r. Disable TPM.\n", Status));
BuildGuidHob (&gTpmErrorHobGuid,0);
REPORT_STATUS_CODE (
EFI_ERROR_CODE | EFI_ERROR_MINOR,
@@ -1011,7 +1010,7 @@ PeimEntryMA (
}

if (GetFirstGuidHob (&gTpmErrorHobGuid) != NULL) {
- DEBUG ((EFI_D_ERROR, "TPM2 error!\n"));
+ DEBUG ((DEBUG_ERROR, "TPM2 error!\n"));
return EFI_DEVICE_ERROR;
}

@@ -1075,7 +1074,7 @@ PeimEntryMA (
for (PcrIndex = 0; PcrIndex < 8; PcrIndex++) {
Status = MeasureSeparatorEventWithError (PcrIndex);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Separator Event with Error not Measured. Error!\n"));
+ DEBUG ((DEBUG_ERROR, "Separator Event with Error not Measured. Error!\n"));
}
}
}
@@ -1092,6 +1091,13 @@ PeimEntryMA (
}
}

+ DEBUG_CODE_BEGIN ();
+ //
+ // Peek into TPM PCR 00 before any BIOS measurement.
+ //
+ Tpm2PcrReadForActiveBank (00, NULL);
+ DEBUG_CODE_END ();
+
//
// Only install TpmInitializedPpi on success
//
@@ -1106,7 +1112,7 @@ PeimEntryMA (

Done:
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "TPM2 error! Build Hob\n"));
+ DEBUG ((DEBUG_ERROR, "TPM2 error! Build Hob\n"));
BuildGuidHob (&gTpmErrorHobGuid,0);
REPORT_STATUS_CODE (
EFI_ERROR_CODE | EFI_ERROR_MINOR,
--
2.31.1.windows.1


Re: [PATCH v5 00/11] Measured SEV boot with kernel/initrd/cmdline

Dov Murik
 

On 29/07/2021 12:51, Ard Biesheuvel wrote:
On Wed, 28 Jul 2021 at 19:30, Dov Murik <dovmurik@linux.ibm.com> wrote:


On 28/07/2021 19:41, Yao, Jiewen wrote:
For OvmfPkg, reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
For ArmVirtPkg, acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Thanks Jiewen!

Merged as #1843

Note that I needed to add CryptoPkg/CryptoPkg.dec to the list of
acceptable dependencies in OvmfPkg.ci.yaml for the CI checks to be
able to pass.
Thanks Ard.

-Dov


[PATCH] Reallocate TPM Active PCRs based on platform support.

Rodrigo Gonzalez del Cueto
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3515

The current implementation of SyncPcrAllocationsAndPcrMask() triggers
PCR bank reallocation only based on the intersection between
TpmActivePcrBanks and PcdTpm2HashMask.

When the software HashLibBaseCryptoRouter solution is used, no PCR bank
reallocation is occurring based on the supported hashing algorithms
registered by the HashLib instances.

Need to have an additional check for the intersection between the
TpmActivePcrBanks and the PcdTcg2HashAlgorithmBitmap populated by the
HashLib instances present on the platform's BIOS.

Change-Id: I1cdabe14a4fb5adfc289a2dd60f1b467c64282ac
Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
---
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c | 18 +++++++++++++++++-
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf | 1 +
2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
index 93a8803ff6..5ad6a45cf3 100644
--- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
+++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
@@ -262,6 +262,7 @@ SyncPcrAllocationsAndPcrMask (
{
EFI_STATUS Status;
EFI_TCG2_EVENT_ALGORITHM_BITMAP TpmHashAlgorithmBitmap;
+ EFI_TCG2_EVENT_ALGORITHM_BITMAP BiosHashAlgorithmBitmap;
UINT32 TpmActivePcrBanks;
UINT32 NewTpmActivePcrBanks;
UINT32 Tpm2PcrMask;
@@ -273,16 +274,27 @@ SyncPcrAllocationsAndPcrMask (
// Determine the current TPM support and the Platform PCR mask.
//
Status = Tpm2GetCapabilitySupportedAndActivePcrs (&TpmHashAlgorithmBitmap, &TpmActivePcrBanks);
+
ASSERT_EFI_ERROR (Status);
+
+ DEBUG ((EFI_D_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmHashAlgorithmBitmap: 0x%08x\n", TpmHashAlgorithmBitmap));
+ DEBUG ((EFI_D_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmActivePcrBanks 0x%08x\n", TpmActivePcrBanks));

Tpm2PcrMask = PcdGet32 (PcdTpm2HashMask);
if (Tpm2PcrMask == 0) {
//
// if PcdTPm2HashMask is zero, use ActivePcr setting
//
+ DEBUG ((EFI_D_VERBOSE, "Initializing PcdTpm2HashMask to TpmActivePcrBanks 0x%08x\n", TpmActivePcrBanks));
PcdSet32S (PcdTpm2HashMask, TpmActivePcrBanks);
+ DEBUG ((EFI_D_VERBOSE, "Initializing Tpm2PcrMask to TpmActivePcrBanks 0x%08x\n", Tpm2PcrMask));
Tpm2PcrMask = TpmActivePcrBanks;
}
+
+ BiosHashAlgorithmBitmap = PcdGet32 (PcdTcg2HashAlgorithmBitmap);
+ DEBUG ((EFI_D_INFO, "PcdTcg2HashAlgorithmBitmap 0x%08x\n", BiosHashAlgorithmBitmap));
+ DEBUG ((EFI_D_INFO, "Tpm2PcrMask 0x%08x\n", Tpm2PcrMask)); // Active PCR banks from TPM input
+ DEBUG ((EFI_D_INFO, "TpmActivePcrBanks & BiosHashAlgorithmBitmap = 0x%08x\n", NewTpmActivePcrBanks));

//
// Find the intersection of Pcd support and TPM support.
@@ -294,9 +306,12 @@ SyncPcrAllocationsAndPcrMask (
// If there are active PCR banks that are not supported by the Platform mask,
// update the TPM allocations and reboot the machine.
//
- if ((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) {
+ if (((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) ||
+ ((TpmActivePcrBanks & BiosHashAlgorithmBitmap) != TpmActivePcrBanks)) {
NewTpmActivePcrBanks = TpmActivePcrBanks & Tpm2PcrMask;
+ NewTpmActivePcrBanks &= BiosHashAlgorithmBitmap;

+ DEBUG ((EFI_D_INFO, "NewTpmActivePcrBanks 0x%08x\n", NewTpmActivePcrBanks));
DEBUG ((EFI_D_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n", __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks));
if (NewTpmActivePcrBanks == 0) {
DEBUG ((EFI_D_ERROR, "%a - No viable PCRs active! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));
@@ -331,6 +346,7 @@ SyncPcrAllocationsAndPcrMask (
}

Status = PcdSet32S (PcdTpm2HashMask, NewTpm2PcrMask);
+ DEBUG ((EFI_D_INFO, "Setting PcdTpm2Hash Mask to 0x%08x\n", NewTpm2PcrMask));
ASSERT_EFI_ERROR (Status);
}
}
diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
index 06c26a2904..17ad116126 100644
--- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
+++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
@@ -86,6 +86,7 @@
## SOMETIMES_CONSUMES
## SOMETIMES_PRODUCES
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask
+ gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap ## CONSUMES

[Depex]
gEfiPeiMasterBootModePpiGuid AND
--
2.31.1.windows.1


[PATCH 00/13] Add ACPI 6.4 header file

Chris Jones
 

This patch series introduces a header file for the latest version of the
ACPI 6.4 specification, January 2021. This header contains all updates
to the ACPI specification in addition to addressing a few small errors
from the previous ACPI header files.

The changes can be seen at: https://github.com/chris-jones-arm/edk2/tree/1661_add_acpi_64_header_v1

Chris Jones (13):
MdePkg: Add ACPI 6.4 header file
MdePkg: Increment FADT version
MdePkg: Rename SBSA Generic Watchdog to Arm Generic Watchdog
MdePkg: Update PMTT to ACPI 6.4
MdePkg: Add SPA Location Cookie field to SPA Range structure
MdePkg: Remove DPPT table
MdePkg: Add flags and MinTransferSize to Generic Initiator
MdePkg: Add 'Type 5' PCC structure
MdePkg: Add Multiprocessor Wakeup structure
MdePkg: Add the Platform Health Assessment Table (PHAT)
MdePkg: Add Secure Access Components in the SDEV table
MdePkg: Add Cache ID to PPTT
MdePkg: Fix broken coding style in Acpi64.h

MdePkg/Include/IndustryStandard/Acpi.h | 4 +-
MdePkg/Include/IndustryStandard/Acpi64.h | 3148 ++++++++++++++++++++
2 files changed, 3150 insertions(+), 2 deletions(-)
create mode 100644 MdePkg/Include/IndustryStandard/Acpi64.h

--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")


Re: [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in ResetVector

Yao, Jiewen
 

Indeed. Too many emails.

Glad that we can reach consensus finally. :-)

Thanks, Min and Brijesh.

-----Original Message-----
From: Xu, Min M <min.m.xu@intel.com>
Sent: Thursday, July 29, 2021 9:22 PM
To: Yao, Jiewen <jiewen.yao@intel.com>; Brijesh Singh
<brijesh.singh@amd.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Justen, Jordan L
<jordan.l.justen@intel.com>; Erdem Aktas <erdemaktas@google.com>; James
Bottomley <jejb@linux.ibm.com>; Tom Lendacky <thomas.lendacky@amd.com>
Subject: RE: [edk2-devel] [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in
ResetVector

On July 29, 2021 8:13 PM, Yao Jiewen wrote:
Hey
I am not sure why Min did not response to my latest email.
I did give suggestion in my previous comment.
Ah, sorry I missed it. There are too many mails.
=====
CcWorkArea.Type = 0;
InitCcWorkAreaSev(); // set Type=1 if SEV InitCcWorkAreaTdx(); // set Type=2
if
TDX =====

That is option 1.

Thank you
Yao Jiewen

-----Original Message-----
From: Xu, Min M <min.m.xu@intel.com>
Sent: Thursday, July 29, 2021 7:54 PM
To: Brijesh Singh <brijesh.singh@amd.com>; Yao, Jiewen
<jiewen.yao@intel.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Justen, Jordan L
<jordan.l.justen@intel.com>; Erdem Aktas <erdemaktas@google.com>;
James Bottomley <jejb@linux.ibm.com>; Tom Lendacky
<thomas.lendacky@amd.com>
Subject: RE: [edk2-devel] [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in
ResetVector

On July 29, 2021 6:08 PM, Brijesh Singh wrote:
On 7/29/21 1:07 AM, Xu, Min M wrote:
On July 29, 2021 12:29 PM, Brijesh Singh wrote:
On 7/28/21 9:44 PM, Xu, Min M wrote:
Jiewen & Singh

From the discussion I am thinking we have below rules to follow
to the design the structure of TEE_WORK_AREA:
1. Design should be flexible but not too complicated 2. Reuse
the current SEV_ES_WORK_AREA (PcdSevEsWorkAreaBase) as
TEE_WORK_AREA 3.
TEE_WORK_AREA should be initialized to all-0 at the beginning of
ResetVecotr 4. Reduce the changes to exiting code if possible

So I try to make below conclusions below: (Please review) 1.
SEV_ES_WORK_AREA is used as the TEE_WORK_AREA by both TDX and
SEV,
maybe in the future it can be used by other CC technologies.

2. In MEMFD, add below initial value. So that TEE_WORK_AREA is
guaranteed to be cleared in legacy guest. In TDX this memory
region is initialized to be all-0 by host VMM. In SEV the memory
region is
cleared as well.
0x00B000|0x001000
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpa
ce
Guid.PcdSevEsWorkAreaSize
DATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
Hmm, I thought the contents of the data pages are controlled by
the host
VMM.
If the backing pages are not zero filled then there is no
guarantee that memory will be zero.  To verify it:

1. I applied your above change in OvmfPkgX86.fdt. I modified the
DATA values from 0x00 -> 0xCC

2. Modified the SecMain.c to dump the SevEsWorkArea on entry

And dump does not contain the 0xcc.

And to confirm further,  I attached to the qemu with the GDB
before the booting the OVMF, and modified the SevEsWorkArea with
some garbage number  and this time the dump printed garbage value
I put
through the debugger.

In summary, the OVMF to zero the workarea memory on the entry and
we
cannot rely on the DATA={0x00, 0x00...} to zero the CCWorkArea.
So in legacy guest, CCWorkArea is cleared to all-0 without the
DATA={0x00,0x00...}, right?

Okay, maybe I was not able to communicate it correctly.

The run I did is for the legacy guest. For the legacy guest, the
contents of the CCWorkArea may *not* be always zero even when you
use the DATA={0x00, 0x00...}.

Currently, Qemu uses zero filled backing pages, so we will get a
zero filled CCWorkArea; but nothing says that a backing page *must* be
zero.
Another VMM may choose to do things differently. In summary, the
OVMF reset vector code must zero  the CCWorkArea  before calling SEV
or TDX probes.
Ah, I see.
In current CheckSevFeatures, byte[SEV_ES_WORK_AREA] is cleared to0.
Then its values is set based on the result of SEV probe.

There is a bug here. CheckTdxFeatures does the similar work and it
sets the WORK_AREA to 2. If CheckSevFeatures is called after
CheckTdxFeatures, then WORK_AREA is cleared and it is set to 0 because
it is not SEV. The value is override.

I think there are 2 options:
Option 1:
Neither CheckTdxFeatures nor CheckSevFeatures should clear WORK_AREA.
Instead
It should be cleared to 0 outside and before these 2 calls. So in
Main16 after TransitionFromReal16To32BitFlat WORK_AREA is cleared to
0. In Tdx guest this WORK_AREA is initialized to 0 by host VMM.

Option 2:
Another option is to figure out a mechanism that only one
CheckXXXFeatures is called.
Since there are 2 entry point in Main.asm: Main16 and Main32.
In Main16 CheckSevFeatures is called after TransitionFromReal16To32BitFlat.
(eax should
be saved because it is used in SetCr3ForPageTables64) In Main32
CheckTdxFeatures is called after ReloadFlat32.

What's your opinion?


[edk2-platforms PATCH v1 1/1] Platform/Intel/SimicsOpenBoardPkg: Fix PCD type of PcdVideo*Resolution

 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3514

PcdVideoHorizontalResolution and PcdVideoVerticalResolutio are set in
the SimicsDxe module and consumed by the other module GraphicsConsoleDxe.
In this case, the type of these PCDs should be Dynamic.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Takuto Naito <naitaku@gmail.com>
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
index 251f46f812..88009b8f10 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
@@ -221,8 +221,6 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1
!endif
gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1024
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000

######################################
@@ -238,6 +236,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1024
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600

######################################
# Board Configuration
--
2.25.1


[edk2-platforms PATCH v1 0/1] Platform/Intel/SimicsOpenBoardPkg: Fix PCD type of PcdVideo*Resolution

 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3514

v1:
https://github.com/naitaku/edk2-platforms/tree/bug3514_v1

Cc: Agyeman Prince <prince.agyeman@intel.com>

Takuto Naito (1):
Platform/Intel/SimicsOpenBoardPkg: Fix PCD type of PcdVideo*Resolution

.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

--
2.25.1


Re: ArmPkg: TranslationTable exceeding TempRam on virtual systems

Arti Gupta <arti.gupta@...>
 

Hi,

Hoping to find a solution here. Would someone mind helping me with this?

Thanks a lot,

Arti

 

From: Arti Gupta
Sent: Thursday, July 1, 2021 2:35 AM
To: Bret Barkelew <Bret.Barkelew@...>; devel@edk2.groups.io
Subject: RE: ArmPkg: TranslationTable exceeding TempRam on virtual systems

 

Hey everyone,

Wondering if there are more thoughts on the questions Bret has posted below?

Thanks,
Arti

 

From: Bret Barkelew <Bret.Barkelew@...>
Sent: Thursday, May 27, 2021 4:29 PM
To: devel@edk2.groups.io; Arti Gupta <argu@...>
Subject: ArmPkg: TranslationTable exceeding TempRam on virtual systems

 

I’m fielding a series of questions coming out of our compatriot team that deals with virtual FW (for HyperV). They’re seeing ARM64 systems that have lots of RAM vastly exceeding the TempRam that’s passed into the system due to HOB allocations to create all the 4k entries for the early page tables.

 

Is this a known limitation or are we doing something dumb?

Is there a way to sparsely populate the page tables and fill them in more in DXE?

I’ve seen some questions about 64k pages on the list before. Is that an option?

 

Thanks in advance!

 

- Bret

 


[edk2 PATCH] MdeModulePkg: Fix typo in error message

Seonghyun Park <shpark.zilla@...>
 

Fix typo in error message in CapsuleApp.

Signed-off-by: Seonghyun Park <shpark1@protonmail.com>
---
MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c b/MdeModul=
ePkg/Application/CapsuleApp/CapsuleOnDisk.c
index dba50b3202..712cf2e1f7 100644
--- a/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c
+++ b/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c
@@ -509,7 +509,7 @@ GetUpdateFileSystem (
DevicePath =3D DuplicateDevicePath (MappedDevicePath);=0D
Status =3D GetEfiSysPartitionFromDevPath (DevicePath, &FullPath, Fs);=
=0D
if (EFI_ERROR (Status)) {=0D
- Print (L"Error: Cannot get EFI system partiion from '%s' - %r\n", Ma=
p, Status);=0D
+ Print (L"Error: Cannot get EFI system partition from '%s' - %r\n", M=
ap, Status);=0D
return EFI_NOT_FOUND;=0D
}=0D
Print (L"Warning: Cannot find Boot Option on '%s'!\n", Map);=0D
--=20
2.32.0


Re: Proposing a new area of the edk2-test repository

Nelson, Eric <eric.nelson@...>
 

 

Adding ResumeOK.efi tool under /edk2-test/test-tools/TestToolsPkg would be great.

 

Should I propose this in the RFC and DEVEL mailing lists as a next step?

 

Thanks,

__e

 

 

From: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Sent: Friday, July 9, 2021 1:12 PM
To: Bret Barkelew <Bret.Barkelew@...>; devel@edk2.groups.io; Nelson, Eric <eric.nelson@...>; G Edhaya Chandran <Edhaya.Chandran@...>; gaojie@...; Kinney, Michael D <michael.d.kinney@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

Interesting, thanks for sharing Bret. Some of those tests seem to be x64 specific (SMM tests), and some can be more generic like MorLockTestApp

 

Like I said earlier, I am not against adding test tools to edk2-test. That in fact is welcomed, especially if their usefulness in validating the solutions extend beyond specific implementations.

 

What would a good tree structure look like to accommodate misc tools? Today we have

 

/edk2-test/uefi-sct/SctPkg

 

How about something like this?

/edk2-test/test-tools/TestToolsPkg

or /edk2-test/ TestToolsPkg

 

The “ResumeOK” can be placed there

 

Any other ideas?

 

 

From: Bret Barkelew <Bret.Barkelew@...>
Sent: Thursday, June 24, 2021 12:25 AM
To: devel@edk2.groups.io; eric.nelson@...; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; G Edhaya Chandran <Edhaya.Chandran@...>; gaojie@...; Kinney, Michael D <michael.d.kinney@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

Fun fact! Mu also has a number of apps and things that we could work on moving to EDK2 if there were a suitable location. Right now, many of them are here:

mu_plus/UefiTestingPkg at release/202102 · microsoft/mu_plus (github.com)

 

- Bret

 

From: Nelson, Eric via groups.io
Sent: Wednesday, June 23, 2021 3:38 PM
To: Samer El-Haj-Mahmoud; G Edhaya Chandran; gaojie@...; devel@edk2.groups.io; Kinney, Michael D
Subject: [EXTERNAL] Re: [edk2-devel] Proposing a new area of the edk2-test repository

 

 

I have created a few other internal apps that build under WinTestPkg, although ResumeOK.efi is the only one I have received permissions to release sources for at this time.

And yes, they are primarily intended for validating Windows requirements.

I had some issues with my apps, needing to use different libraries than MdeModulePkg, and found it easier to create my own package, and use the libs I want.

 

__e

 

 

From: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Sent: Wednesday, June 23, 2021 1:56 PM
To: Nelson, Eric <eric.nelson@...>; G Edhaya Chandran <Edhaya.Chandran@...>; gaojie@...; devel@edk2.groups.io
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

+edk2 list

 

I am not against adding additional test tools to edk2-test. Just feel like there is a need to organize and have a strategy, rather than just use edk2-test as a dumping group of miscellaneous tools.

 

There is already a place for apps under https://github.com/tianocore/edk2/tree/master/MdeModulePkg/Application

 

We also have a number of EDK2 misc applications that use edk2-libc in https://github.com/tianocore/edk2-libc/tree/master/AppPkg/Applications

 

A couple of questions:

  • Do you expect more apps from WinTestPkg to be contributed to TianoCore? And are they all around testing specific Windows requirements? If so, then having an edk2-test/WinTestPkg makes sense to me, as you will have a collection of useful testing app targeting specific area.
    • But what about other OSes?
  • If this is a one-off test app and other WinTestPkg apps are not going to be contributed, then does it make sense to put this under MdeModulePkg/Application ?

 

 

 

From: Nelson, Eric <eric.nelson@...>
Sent: Wednesday, June 23, 2021 3:10 PM
To: G Edhaya Chandran <Edhaya.Chandran@...>; gaojie@...
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

 

Hi Edhay,

 

Do you have any more questions?

What do you think of creating another directory in edk2-test, for other test apps, in addition to uefi-sct, such as ResumeOK.efi?

 

Thanks,

__e

 

 

From: Nelson, Eric
Sent: Tuesday, June 15, 2021 12:00 PM
To: G Edhaya Chandran <Edhaya.Chandran@...>; gaojie@...
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

 

Hi Edhay,

 

ResumeOK.efi is a tool I wrote from the HelloWorld example, that validates Windows resume from S4 requirements, specifically that the memory-map run-time memory regions don’t change, and secondly that PCI devices don’t disappear from the system, both conditions would cause Windows to fail to resume from S4.

 

You install the tool to the root of the ESP, and set it as the default/top entry in the boot manager, and launch it.  (Disable Secure Boot.)

 

It runs warm, cold, and 60s ACPI RTC wake cycles, infinitely looking for errors.

 

ResumeOK.efi writes a file to the root of the ESP, ResumeOK.map, which contains the ACPI Facs->HardwareSignature, a list of the PCI devices in the system, and a copy of its memory map, from the first time it runs.

 

During each test pass, it runs a barrage of tests:

 

  1. Free memory test – does the available memory match the memory map saved in ResumeOK.map
  2. HW signature check – does the system still have the same HW signature as saved in the ResumeOK.map
  3. Allocation test – all the available memory is allocated, and then the memory map is checked if the run-time regions match ResumeOK.map.

 

If any of the tests fail, then the new/missing PCI devices are listed (HW signature fail case), or the memory descriptor that changed, it’s location, and current and previous type and size.

 

I have received permission from Intel to *try* to release the source under Edk2-test.

 

I’ve included a 64-bit binary, if you want to give it a test drive.

 

Make sure Secure Boot is off.

Also, it is required to manually delete any ResumeOK.map on the ESP, before beginning a new test pass.

 

The tool also supports a host of EFI Shell commands:

 

Resumeok.efi MEMMAP – displays Windows coalesced view of the current memory map

ResumeOK.efi ROKMAP – displays Windows coalesced view of the memory saved in ResumeOK.map

ResumeOK.efi RTDATA – displays an analysis of RT_Data pool usage

ResumeOK.efi NORESET – run one test pass, but suppress automatic SX cycling

 

These are the files that build it:

 

Edk2\WinTestPkg\Application

Edk2\WinTestPkg\WinTestPkg.dec

Edk2\WinTestPkg\WinTestPkg.dsc

Edk2\WinTestPkg\Application\ResumeOK

Edk2\WinTestPkg\Application\ResumeOK\AcpiTbl.c

Edk2\WinTestPkg\Application\ResumeOK\AcpiTbl.h

Edk2\WinTestPkg\Application\ResumeOK\AppSupport.c

Edk2\WinTestPkg\Application\ResumeOK\BitMap.c

Edk2\WinTestPkg\Application\ResumeOK\BitMap.h

Edk2\WinTestPkg\Application\ResumeOK\EfiFileLib.c

Edk2\WinTestPkg\Application\ResumeOK\EfiFileLib.h

Edk2\WinTestPkg\Application\ResumeOK\pci.c

Edk2\WinTestPkg\Application\ResumeOK\Pci.h

Edk2\WinTestPkg\Application\ResumeOK\ResumeOK.c

Edk2\WinTestPkg\Application\ResumeOK\ResumeOK.h

Edk2\WinTestPkg\Application\ResumeOK\ResumeOK.inf

Edk2\WinTestPkg\Application\ResumeOK\ResumeOK.uni

Edk2\WinTestPkg\Application\ResumeOK\ResumeOKExtra.uni

Edk2\WinTestPkg\Application\ResumeOK\RtData.c

Edk2\WinTestPkg\Application\ResumeOK\TimeBaseLib.c

 

Thanks,

__e

 

 

From: G Edhaya Chandran <Edhaya.Chandran@...>
Sent: Monday, June 14, 2021 9:36 PM
To: Nelson, Eric <eric.nelson@...>; gaojie@...
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>
Subject: RE: Proposing a new area of the edk2-test repository

 

Hi Eric,

 

    Thanks for reaching out to us.

Can we get more details of the tool?

 

Is this tool already open sourced or could you send us the basic documentation pertaining to it.

 

With Warm Regards,
Edhay

 

 

From: Nelson, Eric <eric.nelson@...>
Sent: 15 June 2021 04:23
To: gaojie@...; G Edhaya Chandran <Edhaya.Chandran@...>
Subject: Proposing a new area of the edk2-test repository

 

 

Hello SCT maintainers,

 

I’m looking to release source to a UEFI validation tool that has been a big hit with platform BIOS validation teams, so it can help other PC vendors.

 

My coworker Michael Kinney suggested I reach out to you directly about the idea of creating a new top level directory in the edk2-test repro for other test apps, and I could be maintainer.

 

What do you think of creating another directory in edk2-test, for other test apps, in addition to uefi-sct?

 

Thanks!

__e

 

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

 

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.


[PATCH] MdeModulePkg: CapsuleApp: Fix typo

Seonghyun Park
 

Fix typo in comment

Signed-off-by: Seonghyun Park <shpark1@protonmail.com>
---
MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c b/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c
index dba50b3202..712cf2e1f7 100644
--- a/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c
+++ b/MdeModulePkg/Application/CapsuleApp/CapsuleOnDisk.c
@@ -509,7 +509,7 @@ GetUpdateFileSystem (
DevicePath = DuplicateDevicePath (MappedDevicePath);
Status = GetEfiSysPartitionFromDevPath (DevicePath, &FullPath, Fs);
if (EFI_ERROR (Status)) {
- Print (L"Error: Cannot get EFI system partiion from '%s' - %r\n", Map, Status);
+ Print (L"Error: Cannot get EFI system partition from '%s' - %r\n", Map, Status);
return EFI_NOT_FOUND;
}
Print (L"Warning: Cannot find Boot Option on '%s'!\n", Map);
--
2.32.0


NetworkPkg: NetRandomInitSeed random seed generation

Arti Gupta <arti.gupta@...>
 

Hello,

While reviewing the code for NetRandomInitSeed in the DDxeNetLib, I see that it uses the time of day for random seed generation instead of something like RDRAND. Is there a reason for NetRandomInitSeed to do it this way? Also, there is no error status checking in the code if GetTime fails.

Thanks,
Arti


Re: [PATCH v2] IntelSiliconPkg/VTd: Fix variables may be used uninitialized

Chaganty, Rangasai V
 

Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>

-----Original Message-----
From: Hsu, WesleyX <wesleyx.hsu@intel.com>
Sent: Thursday, July 29, 2021 12:23 AM
To: devel@edk2.groups.io
Cc: Hsu, WesleyX <wesleyx.hsu@intel.com>; Chan, Amy <amy.chan@intel.com>; Yeh, HerbX <herbx.yeh@intel.com>; Peng, NickX <nickx.peng@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [PATCH v2] IntelSiliconPkg/VTd: Fix variables may be used uninitialized

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3491

Initialize several variables which may be used uninitialized after adding "-ffat-lto-objects" option in GCC5 tool chain.

Change-Id: Ib2684aa70637d449f8bbddb18cf0a458a2742909
Signed-off-by: WesleyX Hsu <wesleyx.hsu@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: HerbX Yeh <herbx.yeh@intel.com>
Cc: NickX Peng <nickx.peng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c | 7 ++++++-
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c | 9 +++++++--
2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
index 341e2beb..6676b2a9 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Translat
+++ ionTable.c
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020 - 2021, Intel Corporation. All rights
+ reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -111,6 +111,11 @@ CreateSecondLevelPagingEntryTable (
return EFI_SUCCESS;
}

+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
BaseAddress = ALIGN_VALUE_LOW (MemoryBase, SIZE_2MB);
EndAddress = ALIGN_VALUE_UP (MemoryLimit, SIZE_2MB);
DEBUG ((DEBUG_INFO, "CreateSecondLevelPagingEntryTable: BaseAddress - 0x%016lx, EndAddress - 0x%016lx\n", BaseAddress, EndAddress)); diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index d152039f..ca5f65a8 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationT
+++ able.c
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2021, Intel Corporation. All rights
+ reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -133,7 +133,7 @@ CreateContextEntry (
mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
- mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
+ mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
}
} else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex)); @@ -199,6 +199,11 @@ CreateSecondLevelPagingEntryTable (
return EFI_SUCCESS;
}

+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
BaseAddress = ALIGN_VALUE_LOW(MemoryBase, SIZE_2MB);
EndAddress = ALIGN_VALUE_UP(MemoryLimit, SIZE_2MB);
DEBUG ((DEBUG_INFO,"CreateSecondLevelPagingEntryTable: BaseAddress - 0x%016lx, EndAddress - 0x%016lx\n", BaseAddress, EndAddress));
--
2.32.0.windows.2


Re: [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in ResetVector

Min Xu
 

On July 29, 2021 8:13 PM, Yao Jiewen wrote:
Hey
I am not sure why Min did not response to my latest email.
I did give suggestion in my previous comment.
Ah, sorry I missed it. There are too many mails.
=====
CcWorkArea.Type = 0;
InitCcWorkAreaSev(); // set Type=1 if SEV InitCcWorkAreaTdx(); // set Type=2 if
TDX =====

That is option 1.

Thank you
Yao Jiewen

-----Original Message-----
From: Xu, Min M <min.m.xu@intel.com>
Sent: Thursday, July 29, 2021 7:54 PM
To: Brijesh Singh <brijesh.singh@amd.com>; Yao, Jiewen
<jiewen.yao@intel.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Justen, Jordan L
<jordan.l.justen@intel.com>; Erdem Aktas <erdemaktas@google.com>;
James Bottomley <jejb@linux.ibm.com>; Tom Lendacky
<thomas.lendacky@amd.com>
Subject: RE: [edk2-devel] [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in
ResetVector

On July 29, 2021 6:08 PM, Brijesh Singh wrote:
On 7/29/21 1:07 AM, Xu, Min M wrote:
On July 29, 2021 12:29 PM, Brijesh Singh wrote:
On 7/28/21 9:44 PM, Xu, Min M wrote:
Jiewen & Singh

From the discussion I am thinking we have below rules to follow
to the design the structure of TEE_WORK_AREA:
1. Design should be flexible but not too complicated 2. Reuse
the current SEV_ES_WORK_AREA (PcdSevEsWorkAreaBase) as
TEE_WORK_AREA 3.
TEE_WORK_AREA should be initialized to all-0 at the beginning of
ResetVecotr 4. Reduce the changes to exiting code if possible

So I try to make below conclusions below: (Please review) 1.
SEV_ES_WORK_AREA is used as the TEE_WORK_AREA by both TDX and
SEV,
maybe in the future it can be used by other CC technologies.

2. In MEMFD, add below initial value. So that TEE_WORK_AREA is
guaranteed to be cleared in legacy guest. In TDX this memory
region is initialized to be all-0 by host VMM. In SEV the memory
region is
cleared as well.
0x00B000|0x001000
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpa
ce
Guid.PcdSevEsWorkAreaSize
DATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
Hmm, I thought the contents of the data pages are controlled by
the host
VMM.
If the backing pages are not zero filled then there is no
guarantee that memory will be zero.  To verify it:

1. I applied your above change in OvmfPkgX86.fdt. I modified the
DATA values from 0x00 -> 0xCC

2. Modified the SecMain.c to dump the SevEsWorkArea on entry

And dump does not contain the 0xcc.

And to confirm further,  I attached to the qemu with the GDB
before the booting the OVMF, and modified the SevEsWorkArea with
some garbage number  and this time the dump printed garbage value
I put
through the debugger.

In summary, the OVMF to zero the workarea memory on the entry and
we
cannot rely on the DATA={0x00, 0x00...} to zero the CCWorkArea.
So in legacy guest, CCWorkArea is cleared to all-0 without the
DATA={0x00,0x00...}, right?

Okay, maybe I was not able to communicate it correctly.

The run I did is for the legacy guest. For the legacy guest, the
contents of the CCWorkArea may *not* be always zero even when you
use the DATA={0x00, 0x00...}.

Currently, Qemu uses zero filled backing pages, so we will get a
zero filled CCWorkArea; but nothing says that a backing page *must* be
zero.
Another VMM may choose to do things differently. In summary, the
OVMF reset vector code must zero  the CCWorkArea  before calling SEV
or TDX probes.
Ah, I see.
In current CheckSevFeatures, byte[SEV_ES_WORK_AREA] is cleared to0.
Then its values is set based on the result of SEV probe.

There is a bug here. CheckTdxFeatures does the similar work and it
sets the WORK_AREA to 2. If CheckSevFeatures is called after
CheckTdxFeatures, then WORK_AREA is cleared and it is set to 0 because
it is not SEV. The value is override.

I think there are 2 options:
Option 1:
Neither CheckTdxFeatures nor CheckSevFeatures should clear WORK_AREA.
Instead
It should be cleared to 0 outside and before these 2 calls. So in
Main16 after TransitionFromReal16To32BitFlat WORK_AREA is cleared to
0. In Tdx guest this WORK_AREA is initialized to 0 by host VMM.

Option 2:
Another option is to figure out a mechanism that only one
CheckXXXFeatures is called.
Since there are 2 entry point in Main.asm: Main16 and Main32.
In Main16 CheckSevFeatures is called after TransitionFromReal16To32BitFlat.
(eax should
be saved because it is used in SetCr3ForPageTables64) In Main32
CheckTdxFeatures is called after ReloadFlat32.

What's your opinion?


Re: [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in ResetVector

Brijesh Singh
 

On 7/29/21 7:12 AM, Yao, Jiewen wrote:
Hey
I am not sure why Min did not response to my latest email.
I did give suggestion in my previous comment.

=====
CcWorkArea.Type = 0;
InitCcWorkAreaSev(); // set Type=1 if SEV
InitCcWorkAreaTdx(); // set Type=2 if TDX
=====

That is option 1.
Yes that is exactly what we want Jiewen. 

The OvmfPkg reset vector should initialize the type to zero on entry,
and SEV/TDX will update the value (only if the feature is detected).


Thank you
Yao Jiewen

-----Original Message-----
From: Xu, Min M <min.m.xu@intel.com>
Sent: Thursday, July 29, 2021 7:54 PM
To: Brijesh Singh <brijesh.singh@amd.com>; Yao, Jiewen
<jiewen.yao@intel.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Justen, Jordan L
<jordan.l.justen@intel.com>; Erdem Aktas <erdemaktas@google.com>; James
Bottomley <jejb@linux.ibm.com>; Tom Lendacky <thomas.lendacky@amd.com>
Subject: RE: [edk2-devel] [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in
ResetVector

On July 29, 2021 6:08 PM, Brijesh Singh wrote:
On 7/29/21 1:07 AM, Xu, Min M wrote:
On July 29, 2021 12:29 PM, Brijesh Singh wrote:
On 7/28/21 9:44 PM, Xu, Min M wrote:
Jiewen & Singh

From the discussion I am thinking we have below rules to follow to
the design the structure of TEE_WORK_AREA:
1. Design should be flexible but not too complicated 2. Reuse the
current SEV_ES_WORK_AREA (PcdSevEsWorkAreaBase) as
TEE_WORK_AREA 3.
TEE_WORK_AREA should be initialized to all-0 at the beginning of
ResetVecotr 4. Reduce the changes to exiting code if possible

So I try to make below conclusions below: (Please review) 1.
SEV_ES_WORK_AREA is used as the TEE_WORK_AREA by both TDX and
SEV,
maybe in the future it can be used by other CC technologies.

2. In MEMFD, add below initial value. So that TEE_WORK_AREA is
guaranteed to be cleared in legacy guest. In TDX this memory region
is initialized to be all-0 by host VMM. In SEV the memory region is
cleared as well.
0x00B000|0x001000
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpa
ce
Guid.PcdSevEsWorkAreaSize
DATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
Hmm, I thought the contents of the data pages are controlled by the host
VMM.
If the backing pages are not zero filled then there is no guarantee
that memory will be zero.  To verify it:

1. I applied your above change in OvmfPkgX86.fdt. I modified the DATA
values from 0x00 -> 0xCC

2. Modified the SecMain.c to dump the SevEsWorkArea on entry

And dump does not contain the 0xcc.

And to confirm further,  I attached to the qemu with the GDB before
the booting the OVMF, and modified the SevEsWorkArea with some
garbage number  and this time the dump printed garbage value I put
through the debugger.
In summary, the OVMF to zero the workarea memory on the entry and
we
cannot rely on the DATA={0x00, 0x00...} to zero the CCWorkArea.
So in legacy guest, CCWorkArea is cleared to all-0 without the
DATA={0x00,0x00...}, right?

Okay, maybe I was not able to communicate it correctly.

The run I did is for the legacy guest. For the legacy guest, the contents of the
CCWorkArea may *not* be always zero even when you use the DATA={0x00,
0x00...}.

Currently, Qemu uses zero filled backing pages, so we will get a zero filled
CCWorkArea; but nothing says that a backing page *must* be zero.
Another VMM may choose to do things differently. In summary, the OVMF
reset vector code must zero  the CCWorkArea  before calling SEV or TDX
probes.
Ah, I see.
In current CheckSevFeatures, byte[SEV_ES_WORK_AREA] is cleared to0.
Then its values is set based on the result of SEV probe.

There is a bug here. CheckTdxFeatures does the similar work and it sets the
WORK_AREA to 2. If CheckSevFeatures is called after CheckTdxFeatures, then
WORK_AREA is cleared and it is set to 0 because it is not SEV. The value is
override.

I think there are 2 options:
Option 1:
Neither CheckTdxFeatures nor CheckSevFeatures should clear WORK_AREA.
Instead
It should be cleared to 0 outside and before these 2 calls. So in Main16 after
TransitionFromReal16To32BitFlat WORK_AREA is cleared to 0. In Tdx guest this
WORK_AREA
is initialized to 0 by host VMM.

Option 2:
Another option is to figure out a mechanism that only one CheckXXXFeatures is
called.
Since there are 2 entry point in Main.asm: Main16 and Main32.
In Main16 CheckSevFeatures is called after TransitionFromReal16To32BitFlat.
(eax should
be saved because it is used in SetCr3ForPageTables64)
In Main32 CheckTdxFeatures is called after ReloadFlat32.

What's your opinion?


Re: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot

manickavasakam karpagavinayagam
 

Nate :

If you see in this patch, linux.efi/initrd.cpio.xz are dummy files. These dummy files needs to be replaced by building the Linux Kernel.

How to build Linux Kernel is mentioned in the ReadMe document which is part of this patch.

1. Follow directions on http://osresearch.net/Building/ to compile the heads kernel and initrd for qemu-system_x86_64
2. Copy the following built files
(1) initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz
(2) bzimage to LinuxBootPkg/LinuxBinaries/linux.efi

Thank you

-Manic

-----Original Message-----
From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Sent: Thursday, July 29, 2021 3:17 AM
To: Manickavasakam Karpagavinayagam <manickavasakamk@ami.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felix Polyudov <Felixp@ami.com>; Harikrishna Doppalapudi <Harikrishnad@ami.com>; Manish Jha <manishj@ami.com>; Zachary Bobroff <zacharyb@ami.com>; Manickavasakam Karpagavinayagam <manickavasakamk@ami.com>
Subject: [EXTERNAL] RE: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for LINUX Boot


**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

Hi Manic,

Unfortunately this patch cannot be merged as is. It appears to contain a pre-built binary of the Linux kernel that has been pre-configured for Linuxboot use. While this is very convenient, the Linux kernel is licensed under the GPL and hence we cannot add it to edk2-platforms, which must be kept as BSD only. It might be possible to add this to edk2-non-osi, but even then we would require that you provide a readme file that explains how to get and compile the source code that you used to build this exact Linux image, as required by the GPL.

The easiest and safest option would be to remove the Linux binary all together and provide instructions to the user for how to build their own image and add it to the tree.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Wednesday, June 30, 2021 2:57 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI,
HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>;
Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM
<manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH V2] PurleyOpenBoardPkg : Support for
LINUX Boot

Support for LINUX Boot
To enable/disable feature, PcdLinuxBootEnable can be used
1. Follow directions on https://nam12.safelinks.protection.outlook.com/?url=http%3A%2F%2Fosresearch.net%2FBuilding%2F&;data=04%7C01%7Cmanickavasakamk%40ami.com%7C3a64470864e64ee9f28d08d95260d55c%7C27e97857e15f486cb58e86c2b3040f93%7C1%7C0%7C637631398142258756%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=ylzkAVWRzAtPBLq%2FFLqn1i4Y%2Fa0o%2FjR%2B7GpsfWI6OCk%3D&amp;reserved=0 to compile the
heads kernel and initrd for qemu-system_x86_64
2. Copy the following built files
(1) initrd.cpio.xz to
PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/initrd.cpio.xz
(2) bzimage to
PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/linux.efi

Notes:
V2 :
- Rename LinuxBootPkg to LinuxBoot
- Move LinuxBootPkg to PurleyOpenBoardPkg/Features/LinuxBoot
- Follow Coding Standard in LinuxBoot.C and LinuxBoot.h

Signed-off-by: manickavasakam karpagavinayagam
<manickavasakamk@ami.com>
---
.../BoardTiogaPass/CoreDxeInclude.dsc | 5 +-
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 5 +-
.../BoardTiogaPass/OpenBoardPkg.dsc | 7 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 57 ++-
.../BoardTiogaPass/PlatformPkgConfig.dsc | 7 +
.../LinuxBoot/LinuxBinaries/LinuxKernel.inf | 17 +
.../LinuxBoot/LinuxBinaries/initrd.cpio.xz | Bin 0 -> 16 bytes
.../LinuxBoot/LinuxBinaries/linux.efi | Bin 0 -> 16 bytes
.../Features/LinuxBoot/LinuxBoot.c | 412 ++++++++++++++++++
.../Features/LinuxBoot/LinuxBoot.h | 185 ++++++++
.../Features/LinuxBoot/LinuxBoot.inf | 40 ++
.../Features/LinuxBoot/LinuxBootNull.c | 36 ++
.../Features/LinuxBoot/LinuxBootNull.inf | 25 ++
.../Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec | 2 +
.../DxePlatformBootManagerLib/BdsPlatform.c | 9 +
.../DxePlatformBootManagerLib.inf | 2 +
Platform/Intel/Readme.md | 42 ++
17 files changed, 843 insertions(+), 8 deletions(-) create mode
100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/Lin
u
xKernel.inf
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/ini
tr
d.cpio.xz
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/lin
u
x.efi
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.c
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.h
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.inf
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.c
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.inf

diff --git
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
index b0660d72dd..a17015704b 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
+++
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.ds
+++ c
@@ -83,6 +83,7 @@

$(PLATFORM_BOARD_PACKAGE)/Override/MdeModulePkg/Bus/Pci/PciBus
Dxe/PciBusDxe.inf
#TiogaPass Override END

+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == FALSE
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
@@ -97,10 +98,11 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
FatPkg/EnhancedFatDxe/Fat.inf
-
+!endif

#MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputD
xe.inf

MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleD
xe.inf

+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == FALSE
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

@@ -124,6 +126,7 @@
<LibraryClasses>
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
}
+!endif

!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclud
e.fdf
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclud
e.fdf
index 141ce5dda3..6cd8ba6626 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclud
e.fdf
+++
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclu
+++ de.fdf
@@ -47,6 +47,7 @@ INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
INF
$(PLATFORM_BOARD_PACKAGE)/Override/MdeModulePkg/Bus/Pci/PciBus
Dxe/PciBusDxe.inf
#TiogaPass Override END

+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == FALSE
INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
@@ -62,10 +63,12 @@ INF
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
INF
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
+!endif

#INF
MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDx
e.inf
INF
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleD
xe.inf

+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == FALSE
INF
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

@@ -79,4 +82,4 @@ INF
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf

INF MdeModulePkg/Application/UiApp/UiApp.inf
INF
MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuAp
p.inf
-
+!endif
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
index e4c8e7fbf1..67472a1182 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
+++
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
@@ -104,6 +104,13 @@

##########################################################
######################

[LibraryClasses.common]
+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
+
+LinuxBootLib|$(PLATFORM_BOARD_PACKAGE)/Features/LinuxBoot/LinuxB
oot.inf
+ LoadLinuxLib|OvmfPkg/Library/LoadLinuxLib/LoadLinuxLib.inf
+!else
+
+LinuxBootLib|$(PLATFORM_BOARD_PACKAGE)/Features/LinuxBoot/LinuxB
ootNull
+.inf
+!endif
+
!if gPlatformTokenSpaceGuid.PcdFastBoot == FALSE

PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatfor
mBootManagerLib/DxePlatformBootManagerLib.inf
!else
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
index 43cd8d94e1..1623c44cd8 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
+++
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
@@ -19,6 +19,38 @@
# Also all values will have a PCD assigned so that they can be used in the
system, and
# the FlashMap edit tool can be used to change the values here, without
effecting the code.
# This requires all code to only use the PCD tokens to recover the values.
+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
+
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset =
0x00000000 # Flash addr (0xFF840000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize =
0x00300000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset =
0x00300000 # Flash addr (0xFF8A0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize =
0x00100000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset =
0x00400000 # Flash addr (0xFF910000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize =
0x00100000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset =
0x00500000 # Flash addr (0xFFE00000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize =
0x00100000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset =
0x00600000 # Flash addr (0xFF9A0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =
0x00600000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset =
0x00C00000 # Flash addr (0xFF800000)
+SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
= 0x0007C000 #
+
+!else
+
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset =
0x00000000 # Flash addr (0xFF840000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize =
0x00500000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset =
0x00500000 # Flash addr (0xFF8A0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize =
0x00100000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset =
0x00600000 # Flash addr (0xFF910000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize =
0x00100000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset =
0x00700000 # Flash addr (0xFFE00000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize =
0x00200000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset =
0x00900000 # Flash addr (0xFF9A0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =
0x00300000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset =
0x00C00000 # Flash addr (0xFF800000)
+SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
= 0x0007C000 #
+
+!endif
+

[FD.Platform]
BaseAddress = 0xFF000000 |
gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress
@@ -27,27 +59,27 @@ ErasePolarity = 1
BlockSize = 0x10000
NumBlocks = 0x100

-0x00000000|0x00500000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|gMinPlatfor
mPkgT
+okenSpaceGuid.PcdFlashFvAdvancedSize

gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|gMinPlatformP
kgTokenSpaceGuid.PcdFlashFvAdvancedSize
FV = FvAdvanced

-0x00500000|0x00100000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|gMinPlatform
PkgT
+okenSpaceGuid.PcdFlashFvSecuritySize

gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|gMinPlatformPk
gTokenSpaceGuid.PcdFlashFvSecuritySize
FV = FvSecurity

-0x00600000|0x00100000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|gMinPlatform
PkgTok
+enSpaceGuid.PcdFlashFvOsBootSize

gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|gMinPlatformPkg
TokenSpaceGuid.PcdFlashFvOsBootSize
FV = FvOsBoot

-0x00700000|0x00200000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|gMinPlatformPk
gToken
+SpaceGuid.PcdFlashFvFspUSize

gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|gMinPlatformPkgTo
kenSpaceGuid.PcdFlashFvFspUSize
FV = FvLateSiliconCompressed

-0x00900000|0x00300000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|gMinPlatfor
mPkgT
+okenSpaceGuid.PcdFlashFvUefiBootSize

gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|gMinPlatformPk
gTokenSpaceGuid.PcdFlashFvUefiBootSize
FV = FvUefiBoot

-0x00C00000|0x0007C000
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|gEfiM
deMo
+dulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiM
deModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
#NV_VARIABLE_STORE
DATA = {
@@ -303,6 +335,19 @@ FILE DRIVER = db90bb7e-e4ba-4f07-96d6-
b7076713bd2c {

INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf

+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
+
+FILE DRIVER = 81339b04-fa8c-4be0-9ca7-916fc5319eb5 {
+ SECTION DXE_DEPEX_EXP = {FALSE}
+ SECTION PE32 =
+$(PLATFORM_BOARD_PACKAGE)/Features/LinuxBoot/LinuxBinaries/linux.
efi
+}
+
+FILE FREEFORM = 16b60e5d-f1c5-42f0-9b34-08C81C430473 {
+ SECTION RAW =
+$(PLATFORM_BOARD_PACKAGE)/Features/LinuxBoot/LinuxBinaries/initrd.
cpio.
+xz
+}
+
+!endif
+

[FV.FvUefiBoot]
FvAlignment = 16
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.d
sc
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.
dsc
index 36a29c8d68..ff27252233 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.d
sc
+++
b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig
+++ .dsc
@@ -51,7 +51,14 @@

gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|TRUE

+ gPlatformTokenSpaceGuid.PcdLinuxBootEnable|FALSE
+
+!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
+ gPlatformTokenSpaceGuid.PcdFastBoot|TRUE
+!else
gPlatformTokenSpaceGuid.PcdFastBoot|FALSE
+!endif
+
!if gPlatformTokenSpaceGuid.PcdFastBoot == TRUE
gIpmiFeaturePkgTokenSpaceGuid.PcdIpmiFeatureEnable|FALSE
gPlatformTokenSpaceGuid.PcdUpdateConsoleInBds|FALSE
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/L
i
nuxKernel.inf
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/L
i
nuxKernel.inf
new file mode 100644
index 0000000000..0e197ecb68
--- /dev/null
+++
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries
+++ /LinuxKernel.inf
@@ -0,0 +1,17 @@
+## @file
+#
+# Copyright (c) 2021, American Megatrends International LLC.<BR> # #
+SPDX-License-Identifier: BSD-2-Clause-Patent # ##
+
+[Defines]
+ INF_VERSION = 1.27
+ BASE_NAME = LinuxKernel
+ FILE_GUID = 81339b04-fa8c-4be0-9ca7-916fc5319eb5
+ MODULE_TYPE = UEFI_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries.common.AARCH64]
+ PE32|linux.efi|*
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/i
ni
trd.cpio.xz
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/i
n
itrd.cpio.xz
new file mode 100644
index
0000000000000000000000000000000000000000..01d633b27e8ea9b17084fc911
d0c8cc43a4170a9
GIT binary patch
literal 16
KcmZQzKm`B*5C8!H

literal 0
HcmV?d00001

diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/l
in
ux.efi
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBinaries/l
i
nux.efi
new file mode 100644
index
0000000000000000000000000000000000000000..01d633b27e8ea9b17084fc911
d0c8cc43a4170a9
GIT binary patch
literal 16
KcmZQzKm`B*5C8!H

literal 0
HcmV?d00001

diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.c
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.c
new file mode 100644
index 0000000000..682047cef0
--- /dev/null
+++ b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.c
@@ -0,0 +1,412 @@
+/** @file
+
+Copyright (c) 2021, American Megatrends International LLC. All rights
+reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <PiDxe.h>
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/MemoryAllocationLib.h> #include
+<Library/UefiBootServicesTableLib.h>
+#include <Guid/DxeServices.h>
+#include <Library/DxeServicesTableLib.h> #include <Library/UefiLib.h>
+#include <Protocol/FirmwareVolume2.h> #include
<Protocol/LoadedImage.h>
+#include <Guid/MemoryTypeInformation.h> #include <Pi/PiDxeCis.h>
+#include <Pi/PiHob.h> #include <Library/PcdLib.h> #include
+<Library/DxeServicesLib.h> #include "LinuxBoot.h"
+
+//16b60e5d-f1c5-42f0-9b34-08C81C430473
+#define LINUX_BOOT_INITRD_GUID \
+ { \
+ 0x16b60e5d, 0xf1c5, 0x42f0, {0x9b, 0x34, 0x08, 0xc8, 0x1c, 0x43,
+0x04, 0x73} \
+ }
+
+#define LINUX_BOOT_KERNEL_GUID \
+ { \
+ 0x81339b04, 0xfa8c, 0x4be0, {0x9c, 0xa7, 0x91, 0x6f, 0xc5, 0x31,
+0x9e, 0xb5} \
+ }
+
+
+EFI_STATUS
+EFIAPI
+LoadLinuxCheckKernelSetup (
+ IN VOID *KernelSetup,
+ IN UINTN KernelSetupSize
+ );
+
+VOID*
+EFIAPI
+LoadLinuxAllocateKernelSetupPages (
+ IN UINTN Pages
+ );
+
+EFI_STATUS
+EFIAPI
+LoadLinuxInitializeKernelSetup (
+ IN VOID *KernelSetup
+ );
+
+VOID*
+EFIAPI
+LoadLinuxAllocateKernelPages (
+ IN VOID *KernelSetup,
+ IN UINTN Pages
+ );
+
+EFI_STATUS
+EFIAPI
+LoadLinuxSetCommandLine (
+ IN OUT VOID *KernelSetup,
+ IN CHAR8 *CommandLine
+ );
+
+EFI_STATUS
+EFIAPI
+LoadLinux (
+ IN VOID *Kernel,
+ IN OUT VOID *KernelSetup
+ );
+
+VOID*
+EFIAPI
+LoadLinuxAllocateInitrdPages (
+ IN VOID *KernelSetup,
+ IN UINTN Pages
+ );
+
+EFI_GUID gLinuxBootInitrdFileGuid = LINUX_BOOT_INITRD_GUID;
+
+EFI_GUID gLinuxBootKernelFileGuid = LINUX_BOOT_KERNEL_GUID;
+
+//-------------------------------------------------------------------
+--
+------
+
+/**
+ Dump some hexadecimal data to the screen.
+
+ @note Function taken from
+ ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.c in EDKII
+
+ @param[in] Indent How many spaces to indent the output.
+ @param[in] Offset The offset of the printing.
+ @param[in] DataSize The size in bytes of UserData.
+ @param[in] UserData The data to print out.
+**/
+static
+VOID
+DumpHex (
+ IN UINTN Indent,
+ IN UINTN Offset,
+ IN UINTN DataSize,
+ IN VOID *UserData
+ )
+{
+ UINT8 *Data;
+ CHAR8 Val[50];
+ CHAR8 Str[20];
+ UINT8 TempByte;
+ UINTN Size;
+ UINTN Index;
+ CHAR8 Hex[] = {
+ '0', '1', '2', '3', '4', '5', '6', '7',
+ '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
+ };
+
+ DEBUG((DEBUG_INFO, "%*a 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
0E 0F\n", Indent, ""));
+ DEBUG((DEBUG_INFO, "%*a ------------------------------------------------
\n", Indent, ""));
+
+ Data = UserData;
+ while (DataSize != 0) {
+ Size = 16;
+ if (Size > DataSize) {
+ Size = DataSize;
+ }
+
+ for (Index = 0; Index < Size; Index += 1) {
+ TempByte = Data[Index];
+ Val[Index * 3 + 0] = Hex[TempByte >> 4];
+ Val[Index * 3 + 1] = Hex[TempByte & 0xF];
+ Val[Index * 3 + 2] = (CHAR8) ((Index == 7) ? '-' : ' ');
+ Str[Index] = (CHAR8) ((TempByte < ' ' || TempByte > 'z') ? '.' :
TempByte);
+ }
+
+ Val[Index * 3] = 0;
+ Str[Index] = 0;
+ DEBUG((DEBUG_INFO, "%*a%08X: %-48a %a\n", Indent, "", Offset,
+ Val, Str));
+
+ Data += Size;
+ Offset += Size;
+ DataSize -= Size;
+ }
+}
+
+
+/**
+ * This function completes a minimal amount of the necessary BDS
+functions to prepare
+ * for booting the kernel.
+ *
+ * @param None
+ *
+ * @retval EFI_SUCCESS Successfully completed remaining tasks
+ * @return EFI_ERROR Could not complete BDS tasks
+ */
+EFI_STATUS
+CompleteBdsTasks (
+ VOID
+)
+{
+
+ return EFI_SUCCESS;
+}
+
+/**
+ * This function will load and launch the Linux kernel from a BIOS FV.
+ *
+ * @note This function is not intended to return. Any exiting from this
function indicates
+ * a problem loading or launching the kernel.
+ *
+ * @param None
+ *
+ * @return EFI_ERROR Any error code
+ */
+EFI_STATUS
+LoadAndLaunchKernel (
+ VOID
+)
+{
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage = NULL;
+ EFI_STATUS Status;
+ EFI_HANDLE KernelHandle = NULL;
+ VOID *KernelBuffer = NULL;
+ VOID *KernelFfsBuffer = NULL;
+ UINTN KernelFfsSize = 0;
+ VOID *InitrdData = NULL;
+ VOID *InitrdBuffer = NULL;
+ UINTN InitrdSize = 0;
+ struct BootParams *BootParams = NULL;
+ struct BootParams *HandoverParams = NULL;
+ UINT32 StartOffset = 0;
+ UINT32 KernelLength = 0;
+ UINT8 *Temp;
+ UINT8 CmdLine[] = " ";
+
+ DEBUG((DEBUG_INFO, "LoadAndLaunchKernel Entry\n"));
+
+ ///
+ /// Kernel load and preparation
+ ///
+ DEBUG((DEBUG_INFO, "Preparing the kernel...\n"));
+
+ // Retrieve the kernel from the firmware volume
+ Status = GetSectionFromAnyFv(
+ &gLinuxBootKernelFileGuid,
+ EFI_SECTION_PE32,
+ 0,
+ &KernelFfsBuffer,
+ &KernelFfsSize
+ );
+
+ DEBUG((DEBUG_INFO, "Status %r\n",Status));
+ DEBUG((DEBUG_INFO, "KernelFfsBuffer %x\n",KernelFfsBuffer));
+ DEBUG((DEBUG_INFO, "KernelFfsSize %x\n",KernelFfsSize));
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "Could not retrieve kernel; %r.\n", Status));
+ goto FatalError;
+ }
+
+ DEBUG((DEBUG_INFO, "Loaded kernel to buffer at 0x%p with size
0x%X.\n", KernelFfsBuffer, KernelFfsSize));
+ DEBUG((DEBUG_INFO, "Printing first 0x%X bytes:\n",
+ MIN(KernelFfsSize, 0x100)));
+
+ DumpHex(2, 0, MIN(0x100, KernelFfsSize), KernelFfsBuffer);
+
+ // Create a LoadImage protocol for the kernel
+ Status = gBS->LoadImage(TRUE, gImageHandle, NULL,
+ KernelFfsBuffer,
KernelFfsSize, &KernelHandle);
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "Could not create LoadImage for kernel
+ %r\n",
Status));
+ goto FatalError;
+ }
+
+ // Get the new LoadedImage protocol to retrieve information about
+ the
kernel
+ Status = gBS->HandleProtocol(KernelHandle,
&gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "Could not get kernel LoadedImage
+ protocol;
%r\n", Status));
+ goto FatalError;
+ }
+
+ DEBUG((DEBUG_INFO, "Kernel LoadedImage information:\n"));
+ DEBUG((DEBUG_INFO, " ImageBase = 0x%p\n", LoadedImage-
ImageBase));
+ DEBUG((DEBUG_INFO, " ImageSize = 0x%p\n",
+ LoadedImage->ImageSize));
+
+ // Verify the kernel boot parameters from the LoadedImage and
+ allocate
an initalization buffer once verified
+ BootParams = (struct BootParams*) LoadedImage->ImageBase;
+
+ Status = LoadLinuxCheckKernelSetup((VOID *) BootParams,
+ sizeof(struct
BootParams));
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "LoadLinuxCheckKernelSetup failed;
+ %r.\n",
Status));
+ goto FatalError;
+ }
+
+ HandoverParams =
LoadLinuxAllocateKernelSetupPages(EFI_SIZE_TO_PAGES(KERNEL_SETUP_SI
ZE));
+ if (HandoverParams == NULL) {
+ DEBUG((DEBUG_ERROR, "Could not allocate memory for kernel
handover parameters.\n"));
+ goto FatalError;
+ }
+ DEBUG((DEBUG_INFO, "Handover parameters allocated at 0x%p\n",
+ HandoverParams));
+
+ gBS->CopyMem(&HandoverParams->Hdr, &BootParams->Hdr,
sizeof(struct
+ SetupHeader));
+
+ Status = LoadLinuxInitializeKernelSetup(HandoverParams);
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "Unable to initialize the handover
+ parameters;
%r.\n", Status));
+ goto FatalError;
+ }
+
+ // Allocate space for the kernel and copy it into the new buffer
+ KernelBuffer = LoadLinuxAllocateKernelPages(HandoverParams,
EFI_SIZE_TO_PAGES(HandoverParams->Hdr.InitSize));
+ if (KernelBuffer == NULL) {
+ DEBUG((DEBUG_ERROR, "Unable to allocate memory for kernel.\n"));
+ goto FatalError;
+ }
+
+ StartOffset = (HandoverParams->Hdr.SetupSecs + 1) * 512;
+ KernelLength = (UINT32) (KernelFfsSize - StartOffset);
+ Temp = (UINT8 *) LoadedImage->ImageBase;
+
+ DEBUG((DEBUG_INFO, "Kernel starts at offset 0x%X with length
+ 0x%X\n", StartOffset, KernelLength));
+
+ gBS->CopyMem(KernelBuffer, (Temp + StartOffset), KernelLength);
+ DEBUG((DEBUG_INFO, "First 0x%X bytes of new kernel buffer
+ contents:\n", MIN(0x100, KernelLength)));
+
+ DumpHex(2, 0, MIN(0x100, KernelLength), KernelBuffer);
+
+ // Prepare the command line
+ Status = LoadLinuxSetCommandLine(HandoverParams, (UINT8 *)
&CmdLine);
+ if (EFI_ERROR (Status)) {
+ DEBUG((EFI_D_INFO, "Unable to set linux command line; %r.\n",
Status));
+ goto FatalError;
+ }
+
+ HandoverParams->Hdr.Code32Start = (UINT32)(UINTN) KernelBuffer;
+ HandoverParams->Hdr.LoaderId = 0x21;
+
+ DEBUG((DEBUG_INFO, "Kernel loaded.\n"));
+
+ //
+ // Initrd load and preparation
+ //
+ DEBUG((DEBUG_INFO, "Preparing the initrd...\n"));
+
+ // Retrieve the initrd from the firmware volume
+ Status = GetSectionFromAnyFv(
+ &gLinuxBootInitrdFileGuid,
+ EFI_SECTION_RAW,
+ 0,
+ &InitrdBuffer,
+ &InitrdSize
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "Could not retrieve initrd; %r.\n", Status));
+ goto FatalError;
+ }
+
+ DEBUG((DEBUG_INFO, "Loaded initrd to buffer at 0x%p with size
0x%X.\n", InitrdBuffer, InitrdSize));
+ DEBUG((DEBUG_INFO, "Printing first 0x%X bytes:\n", MIN(0x100,
InitrdSize)));
+ DumpHex(2, 0, MIN(0x100, InitrdSize), InitrdBuffer);
+
+ // Allocate the initrd for the kernel and copy it in
+ InitrdData = LoadLinuxAllocateInitrdPages(HandoverParams,
EFI_SIZE_TO_PAGES(InitrdSize));
+ if (InitrdData == NULL) {
+ DEBUG((DEBUG_ERROR, "Unable to allocate memory for initrd.\n"));
+ goto FatalError;
+ }
+
+ gBS->CopyMem(InitrdData, InitrdBuffer, InitrdSize);
+
+ HandoverParams->Hdr.RamDiskStart = (UINT32)(UINTN) InitrdData;
+ HandoverParams->Hdr.RamDiskLen = (UINT32) InitrdSize;
+
+ DEBUG((DEBUG_INFO, "Initrd loaded.\n"));
+ DEBUG((DEBUG_INFO, "Printing first 0x%X bytes of initrd
+ buffer:\n",
MIN(0x100, InitrdSize)));
+ DumpHex(2, 0, MIN(0x100, InitrdSize), InitrdData);
+
+ // General cleanup before launching the kernel
+ gBS->FreePool(InitrdBuffer);
+ InitrdBuffer = NULL;
+
+ gBS->UnloadImage(KernelHandle);
+ gBS->FreePool(KernelFfsBuffer);
+ KernelFfsBuffer = NULL;
+
+ DEBUG((DEBUG_ERROR, "Launching the kernel\n"));
+
+
+ //
+ // Signal the EFI_EVENT_GROUP_READY_TO_BOOT event.
+ //
+ EfiSignalEventReadyToBoot();
+
+
+ // Launch the kernel
+ Status = LoadLinux(KernelBuffer, HandoverParams);
+
+ ///
+ /// LoadLinux should never return if the kernel boots. Anything
+ past here
is an error scenario
+ ///
+ DEBUG((DEBUG_ERROR, "ERROR: LoadLinux has returned with status;
+ %r.\n", Status));
+
+FatalError:
+ // Free everything
+ if (InitrdData != NULL) gBS->FreePages((EFI_PHYSICAL_ADDRESS)
InitrdData, EFI_SIZE_TO_PAGES(InitrdSize));
+ if (KernelBuffer != NULL) gBS->FreePages((EFI_PHYSICAL_ADDRESS)
KernelBuffer, EFI_SIZE_TO_PAGES(HandoverParams->Hdr.InitSize));
+ if (HandoverParams != NULL) gBS->FreePages((EFI_PHYSICAL_ADDRESS)
HandoverParams, EFI_SIZE_TO_PAGES(KERNEL_SETUP_SIZE));
+ if (InitrdBuffer != NULL) gBS->FreePool(InitrdBuffer);
+ if (KernelHandle != NULL) gBS->UnloadImage(KernelHandle);
+ if (KernelFfsBuffer != NULL) gBS->FreePool(KernelFfsBuffer);
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ * This is the main function for this feature. This will handle
+finding and launching
+ * the Linux kernel.
+ *
+ * @note In general, this function will never return to BDS. The
LINUXBOOT_ALLOW_RETURN_TO_BDS
+ * token will allow you to return to BDS if the kernel fails to launch for
some reason.
+ *
+ * @param None
+ *
+ * @retval None
+ */
+
+EFI_STATUS
+LinuxBootStart (
+ VOID
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ // Finish BDS and then try to launch the kernel
+ //Status = CompleteBdsTasks();
+
+ if (!EFI_ERROR(Status)) {
+ LoadAndLaunchKernel();
+ }
+
+ DEBUG((DEBUG_ERROR, "-----------------------------------\n"));
+ DEBUG((DEBUG_ERROR, " ERROR: Kernel failed to launch.\n"));
+ DEBUG((DEBUG_ERROR, "-----------------------------------\n"));
+ return Status;
+}
+
+//-------------------------------------------------------------------
+--
+------
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.h
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.h
new file mode 100644
index 0000000000..ebbcd6bfd8
--- /dev/null
+++
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.h
@@ -0,0 +1,185 @@
+/** @file
+Copyright (c) 2021, American Megatrends International LLC. All rights
+reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent **/
+
+#ifndef __LINUX_BOOT_PRIVATE__H__
+#define __LINUX_BOOT_PRIVATE__H__
+#ifdef __cplusplus
+extern "C" {
+#endif // #ifdef __cplusplus
+
+//-------------------------------------------------------------------
+--
+------
+
+//#include <Token.h>
+
+#define BOOTSIG 0x1FE
+#define SETUP_HDR 0x53726448 /* 0x53726448 == "HdrS" */
+
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3
+#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#pragma pack(1)
+
+struct SetupHeader {
+ UINT8 SetupSecs; // Sectors for setup code
+ UINT16 Rootflags;
+ UINT32 SysSize;
+ UINT16 RamSize;
+ UINT16 VideoMode;
+ UINT16 RootDev;
+ UINT16 Signature; // Boot signature
+ UINT16 Jump;
+ UINT32 Header;
+ UINT16 Version;
+ UINT16 SuSwitch;
+ UINT16 SetupSeg;
+ UINT16 StartSys;
+ UINT16 KernelVer;
+ UINT8 LoaderId;
+ UINT8 LoadFlags;
+ UINT16 MoveSize;
+ UINT32 Code32Start; // Start of code loaded high
+ UINT32 RamDiskStart; // Start of initial ramdisk
+ UINT32 RamDiskLen; // Length of initial ramdisk
+ UINT32 BootSectkludge;
+ UINT16 HeapEnd;
+ UINT8 ExtLoaderVer; // Extended boot loader version
+ UINT8 ExtLoaderType; // Extended boot loader ID
+ UINT32 CmdLinePtr; // 32-bit pointer to the kernel command line
+ UINT32 RamDiskMax; // Highest legal initrd address
+ UINT32 KernelAlignment; // Physical addr alignment required for
+kernel
+ UINT8 RelocatableKernel; // Whether kernel is relocatable or not
+ UINT8 MinAlignment;
+ UINT16 XloadFlags;
+ UINT32 CmdlineSize;
+ UINT32 HardwareSubarch;
+ UINT64 HardwareSubarchData;
+ UINT32 PayloadOffset;
+ UINT32 PayloadLength;
+ UINT64 SetupData;
+ UINT64 PrefAddress;
+ UINT32 InitSize;
+ UINT32 HandoverOffset;
+};
+
+struct EfiInfo {
+ UINT32 EfiLoaderSignature;
+ UINT32 EfiSystab;
+ UINT32 EfiMemdescSize;
+ UINT32 EfiMemdescVersion;
+ UINT32 EfiMemMap;
+ UINT32 EfiMemMapSize;
+ UINT32 EfiSystabHi;
+ UINT32 EfiMemMapHi;
+};
+
+struct E820Entry {
+ UINT64 Addr; // start of memory segment
+ UINT64 Size; // size of memory segment
+ UINT32 Type; // type of memory segment
+};
+
+struct ScreenInfo {
+ UINT8 OrigX; // 0x00
+ UINT8 OrigY; // 0x01
+ UINT16 ExtMemK; // 0x02
+ UINT16 OrigVideoPage; // 0x04
+ UINT8 OrigVideoMode; // 0x06
+ UINT8 OrigVideoCols; // 0x07
+ UINT8 Flags; // 0x08
+ UINT8 Unused2; // 0x09
+ UINT16 OrigVideoEgaBx;// 0x0a
+ UINT16 Unused3; // 0x0c
+ UINT8 OrigVideoLines; // 0x0e
+ UINT8 OrigVideoIsVGA; // 0x0f
+ UINT16 OrigVideoPoints;// 0x10
+
+ // VESA graphic mode -- linear frame buffer
+ UINT16 LfbWidth; // 0x12
+ UINT16 LfbHeight; // 0x14
+ UINT16 LfbDepth; // 0x16
+ UINT32 LfbBase; // 0x18
+ UINT32 LfbSize; // 0x1c
+ UINT16 ClMagic, ClOffset; // 0x20
+ UINT16 LfbLineLength; // 0x24
+ UINT8 RedSize; // 0x26
+ UINT8 RedPos; // 0x27
+ UINT8 GreenSize; // 0x28
+ UINT8 GreenPos; // 0x29
+ UINT8 BlueSize; // 0x2a
+ UINT8 BluePos; // 0x2b
+ UINT8 RsvdSize; // 0x2c
+ UINT8 RsvdPos; // 0x2d
+ UINT16 VesaPmSeg; // 0x2e
+ UINT16 VesaPmOff; // 0x30
+ UINT16 Pages; // 0x32
+ UINT16 VesaAttributes; // 0x34
+ UINT32 Capabilities; // 0x36
+ UINT8 Reserved[6]; // 0x3a
+};
+
+struct BootParams {
+ struct ScreenInfo ScreenInfo;
+ UINT8 ApmBiosInfo[0x14];
+ UINT8 Pad2[4];
+ UINT64 TbootAddr;
+ UINT8 IstInfo[0x10];
+ UINT8 Pad3[16];
+ UINT8 Hd0Info[16];
+ UINT8 Hd1Info[16];
+ UINT8 SysDescTable[0x10];
+ UINT8 OlpcOfwHeader[0x10];
+ UINT8 Pad4[128];
+ UINT8 EdidInfo[0x80];
+ struct EfiInfo EfiInfo;
+ UINT32 AltMemK;
+ UINT32 Scratch;
+ UINT8 E820Entries;
+ UINT8 EddBufEntries;
+ UINT8 EddMbrSigBufEntries;
+ UINT8 Pad6[6];
+ struct SetupHeader Hdr;
+ UINT8 Pad7[0x290-0x1f1-sizeof(struct SetupHeader)];
+ UINT32 EddMbrSigBuffer[16];
+ struct E820Entry E820Map[128];
+ UINT8 Pad8[48];
+ UINT8 EddBuf[0x1ec];
+ UINT8 Pad9[276];
+};
+#pragma pack ()
+
+//-------------------------------------------------------------------
+--
+------
+
+#ifndef MIN
+#define MIN(x,y) ((x) < (y) ? (x) : (y))
+#endif // #ifndef MIN
+
+#define KERNEL_SETUP_SIZE 16384
+
+//-------------------------------------------------------------------
+--
+------
+
+///
+/// Function prototypes from Bds module /// VOID ConnectEverything();
+VOID RecoverTheMemoryAbove4Gb(); VOID
SignalAllDriversConnectedEvent();
+VOID SignalProtocolEvent(IN EFI_GUID *ProtocolGuid);
+
+#if LINUXBOOT_SIGNAL_EXITPMAUTH == 1
+VOID SignalExitPmAuthProtocolEvent(VOID);
+#endif // #if LINUXBOOT_SIGNAL_EXITPMAUTH == 1
+
+typedef VOID (BDS_CONTROL_FLOW_FUNCTION)();
+
+//-------------------------------------------------------------------
+--
+------
+
+/****** DO NOT WRITE BELOW THIS LINE *******/ #ifdef __cplusplus }
+#endif // #ifdef __cplusplus #endif // #ifndef
+__LINUX_BOOT_PRIVATE__H__
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.inf
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.inf
new file mode 100644
index 0000000000..5c09e5d317
--- /dev/null
+++
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBoot.inf
@@ -0,0 +1,40 @@
+## @file
+#
+# Copyright (c) 2021, American Megatrends International LLC.<BR> # #
+SPDX-License-Identifier: BSD-2-Clause-Patent # ##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ VERSION_STRING = 1.0
+ BASE_NAME = LinuxBoot
+ FILE_GUID = 74a41ddc-fac5-4787-afad-d81ee30a8b63 #
{0x74a41ddc, 0xfac5, 0x4787, {0xaf, 0xad, 0xd8, 0x1e, 0xe3, 0x0a,
0x8b, 0x63}}
+ MODULE_TYPE = DXE_DRIVER
+ LIBRARY_CLASS = LinuxBootLib|DXE_DRIVER
+[Sources]
+ LinuxBoot.c
+ LinuxBoot.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ DxeServicesLib
+ BaseMemoryLib
+ DebugLib
+ UefiRuntimeServicesTableLib
+ UefiBootServicesTableLib
+ UefiLib
+ LoadLinuxLib
+
+[Guids]
+
+[Protocols]
+ gEfiLoadedImageProtocolGuid
+
+[Pcd]
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.c
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.c
new file mode 100644
index 0000000000..2e5e44db6c
--- /dev/null
+++
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull
+++ .c
@@ -0,0 +1,36 @@
+/** @file
+
+Copyright (c) 2021, American Megatrends International LLC. All rights
+reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <PiDxe.h>
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+
+/**
+ * This is the main function for this feature. This will handle
+finding and launching
+ * the Linux kernel.
+ *
+ * @note In general, this function will never return to BDS. The
LINUXBOOT_ALLOW_RETURN_TO_BDS
+ * token will allow you to return to BDS if the kernel fails to launch for
some reason.
+ *
+ * @param None
+ *
+ * @retval None
+ */
+
+EFI_STATUS
+LinuxBootStart (
+ VOID
+ )
+{
+
+ return EFI_SUCCESS;
+}
+
+
diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.i
n
f
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull.i
nf
new file mode 100644
index 0000000000..e292be9671
--- /dev/null
+++
b/Platform/Intel/PurleyOpenBoardPkg/Features/LinuxBoot/LinuxBootNull
+++ .inf
@@ -0,0 +1,25 @@
+## @file
+#
+# Copyright (c) 2021, American Megatrends International LLC.<BR> # #
+SPDX-License-Identifier: BSD-2-Clause-Patent # ##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ VERSION_STRING = 1.0
+ BASE_NAME = LinuxBoot
+ FILE_GUID = 0551B6D3-0594-4B02-AF42-5A9C7515CEC8
+ MODULE_TYPE = DXE_DRIVER
+ LIBRARY_CLASS = LinuxBootLib|DXE_DRIVER
+[Sources]
+ LinuxBootNull.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ DxeServicesLib
\ No newline at end of file
diff --git a/Platform/Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec
b/Platform/Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec
index 4dcec5430b..0c1ab318b8 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec
@@ -49,6 +49,8 @@

gPlatformTokenSpaceGuid.PcdUpdateConsoleInBds|TRUE|BOOLEAN|0x300
00035 +
gPlatformTokenSpaceGuid.PcdLinuxBootEnable|FALSE|BOOLEAN|0x300000
36+ [PcdsDynamicEx]
gPlatformTokenSpaceGuid.PcdDfxAdvDebugJumper|FALSE|BOOLEAN|0x60
00001D diff --git
a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c
b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c
index b3b8ceba6f..bd0509ab10 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c
+++
b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatf
+++ ormPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c
@@ -2,6 +2,7 @@
This file include all platform action which can be customized by IBV/OEM.
Copyright (c) 2017, Intel Corporation. All rights
reserved.<BR>+Copyright (c) 2021, American Megatrends International LLC.<BR> SPDX-License-Identifier:
BSD-2-Clause-Patent **/@@ -31,6 +32,12 @@ BOOLEAN
gPPRequireUIConfirm;
extern UINTN mBootMenuOptionNumber;
+EFI_STATUS+LinuxBootStart (+ VOID+ );++
GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH
gUsbClassKeyboardDevicePath = { { {@@ -1268,6 +1275,8 @@
PlatformBootManagerAfterConsole (
LocalBootMode = gBootMode; DEBUG ((DEBUG_INFO, "Current local
bootmode - %x\n", LocalBootMode)); + LinuxBootStart();+ // // Go the
different platform policy with different boot mode // Notes: this part code
can be change with the table policydiff --git
a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLi
b.inf
b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLi
b.inf
index 5790743565..21ac65257c 100644
---
a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatfor
mPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLi
b.inf
+++
b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatf
+++
ormPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManage
rL
+++ ib.inf
@@ -2,6 +2,7 @@
# Component name for module DxePlatformBootManagerLib # # Copyright
(c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>+#
Copyright (c) 2021, American Megatrends International LLC.<BR> # #
SPDX-License-
Identifier: BSD-2-Clause-Patent #@@ -40,6 +41,7 @@
PerformanceLib TimerLib Tcg2PhysicalPresenceLib+ LinuxBootLib
[Packages] MdePkg/MdePkg.decdiff --git a/Platform/Intel/Readme.md
b/Platform/Intel/Readme.md
index 06c5f32b1e..a34784ccb8 100644
--- a/Platform/Intel/Readme.md
+++ b/Platform/Intel/Readme.md
@@ -87,6 +87,11 @@ A UEFI firmware implementation using MinPlatformPkg
is constructed using the fol

----------------------------------------|-----------------------------
---------------|------
------------------------|--------------------| | Mt. Olympus | Purley
| PurleyOpenBoardPkg | BoardMtOlympus | +| Machine Name
| Supported Chipsets | BoardPkg | Board Name |+-
---------------------------------------|--------------------------------------------|--------
----------------------|--------------------|+| TiogaPass | Purley
| PurleyOpenBoardPkg | BoardTiogaPass |++ #### Simics | Machine
Name | Supported Chipsets | BoardPkg |
Board Name |@@ -250,6 +255,12 @@ return back to the minimum
platform caller.
| | | | build settings, environment variables.
| | | |---build_board.py: Optional board-specific pre-build,
| | | build, post-build and clean functions.+ | |
|------PurleyOpenBoardPkg+ | | | |------BoardTiogaPass+ |
| | |---build_config.cfg: BoardTiogaPass specific+ | | |
| build settings, environment variables.+ | | | |---
build_board.py: Optional board-specific pre-build,+ | | |
build, post-build and clean functions. | | | | | |---
---SimicsOpenBoardPkg | | | |------BoardX58Ich10@@ -292,6
+303,18 @@ For PurleyOpenBoardPkg
"bld cache-consume" Consume a cache of binary files from the specified
directory, BINARY_CACHE_PATH is empty, used "BinCache" as default path.
+For PurleyOpenBoardPkg (TiogaPass)+1. Open command window, go to the
workspace directory, e.g. c:\Edk2Workspace.+2. Type "cd edk2-
platforms\Platform\Intel\PurleyOpenBoardPkg\BoardTiogaPass".+3. Type
"GitEdk2MinBoardTiogaPass.bat" to setup GIT environment.+4. Type "bld"
to build Purley BoardTiogaPass board UEFI firmware image, "bld release" for
release build, "bld clean" to+ remove intermediate files."bld cache-
produce" Generate a cache of binary files in the specified directory,+ "bld
cache-consume" Consume a cache of binary files from the specified
directory, BINARY_CACHE_PATH is empty,+ used "BinCache" as default
path. +5. Final BIOS image will be
Build\PurleyOpenBoardPkg\BoardTiagoPass\DEBUG_VS2015x86\FV\PLATFO
RM.fd or +
Build\PurleyOpenBoardPkg\BoardTiagoPass\RELEASE_VS2015x86\FV\PLATF
ORM.fd, depending on bld batch script input.+6. This BIOS image needs to be
merged with SPS FW + ### **Known limitations**
**KabylakeOpenBoardPkg**@@ -307,6 +330,25 @@ For PurleyOpenBoardPkg
2. This firmware project does not build with the GCC compiler. 3. The
validated version of iASL compiler that can build MinPurley is
20180629. Older versions may generate ACPI build errors.
+**PurleyOpenBoardPkg Tioga Pass **+1. This firmware project has only
been tested on the Tioga Pass hardware.+2. This firmware project build
has only been tested using the Microsoft Visual Studio 2015 build
tools.+3. This firmware project does not build with the GCC
compiler.+4. The validated version of iASL compiler that can build
MinPurley is 20180629. Older versions may generate ACPI build errors.+5. Installed and booted to UEFI Windows 2016 on M.2 NVME slot+6.
Installed and booted to UEFI Windows 2019 on M.2 NVME slot and with
SATA HDD.+7. Installed and booted to UEFI RHEL 7.3 on SATA HDD+8.
Installed and booted to Ubuntu 18.04 on M.2 NVME slot.+9. Verified
Mellanox card detection during POST and OS+10. LINUX Boot Support (PcdLinuxBootEnable
needs to be enabled)++1. Follow directions on
https://nam12.safelinks.protection.outlook.com/?url=http%3A%2F%2Fosresearch.net%2FBuilding%2F&;data=04%7C01%7Cmanickavasakamk%40ami.com%7C3a64470864e64ee9f28d08d95260d55c%7C27e97857e15f486cb58e86c2b3040f93%7C1%7C0%7C637631398142258756%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=ylzkAVWRzAtPBLq%2FFLqn1i4Y%2Fa0o%2FjR%2B7GpsfWI6OCk%3D&amp;reserved=0 to compile the heads kernel and initrd for
qemu-system_x86_64 +2. Copy the following built files +(1)
initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz +(2)
bzimage to LinuxBootPkg/LinuxBinaries/linux.efi+++
**SimicsOpenBoardPkg** 1. This firmware project has only been tested
booting to Microsoft Windows 10 x64 and Ubuntu 17.10 with AHCI mode.
--
2.25.0.windows.1


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Re: [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in ResetVector

Yao, Jiewen
 

Hey
I am not sure why Min did not response to my latest email.
I did give suggestion in my previous comment.

=====
CcWorkArea.Type = 0;
InitCcWorkAreaSev(); // set Type=1 if SEV
InitCcWorkAreaTdx(); // set Type=2 if TDX
=====

That is option 1.

Thank you
Yao Jiewen

-----Original Message-----
From: Xu, Min M <min.m.xu@intel.com>
Sent: Thursday, July 29, 2021 7:54 PM
To: Brijesh Singh <brijesh.singh@amd.com>; Yao, Jiewen
<jiewen.yao@intel.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Justen, Jordan L
<jordan.l.justen@intel.com>; Erdem Aktas <erdemaktas@google.com>; James
Bottomley <jejb@linux.ibm.com>; Tom Lendacky <thomas.lendacky@amd.com>
Subject: RE: [edk2-devel] [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in
ResetVector

On July 29, 2021 6:08 PM, Brijesh Singh wrote:
On 7/29/21 1:07 AM, Xu, Min M wrote:
On July 29, 2021 12:29 PM, Brijesh Singh wrote:
On 7/28/21 9:44 PM, Xu, Min M wrote:
Jiewen & Singh

From the discussion I am thinking we have below rules to follow to
the design the structure of TEE_WORK_AREA:
1. Design should be flexible but not too complicated 2. Reuse the
current SEV_ES_WORK_AREA (PcdSevEsWorkAreaBase) as
TEE_WORK_AREA 3.
TEE_WORK_AREA should be initialized to all-0 at the beginning of
ResetVecotr 4. Reduce the changes to exiting code if possible

So I try to make below conclusions below: (Please review) 1.
SEV_ES_WORK_AREA is used as the TEE_WORK_AREA by both TDX and
SEV,
maybe in the future it can be used by other CC technologies.

2. In MEMFD, add below initial value. So that TEE_WORK_AREA is
guaranteed to be cleared in legacy guest. In TDX this memory region
is initialized to be all-0 by host VMM. In SEV the memory region is
cleared as well.
0x00B000|0x001000
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpa
ce
Guid.PcdSevEsWorkAreaSize
DATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
Hmm, I thought the contents of the data pages are controlled by the host
VMM.
If the backing pages are not zero filled then there is no guarantee
that memory will be zero.  To verify it:

1. I applied your above change in OvmfPkgX86.fdt. I modified the DATA
values from 0x00 -> 0xCC

2. Modified the SecMain.c to dump the SevEsWorkArea on entry

And dump does not contain the 0xcc.

And to confirm further,  I attached to the qemu with the GDB before
the booting the OVMF, and modified the SevEsWorkArea with some
garbage number  and this time the dump printed garbage value I put
through the debugger.

In summary, the OVMF to zero the workarea memory on the entry and
we
cannot rely on the DATA={0x00, 0x00...} to zero the CCWorkArea.
So in legacy guest, CCWorkArea is cleared to all-0 without the
DATA={0x00,0x00...}, right?

Okay, maybe I was not able to communicate it correctly.

The run I did is for the legacy guest. For the legacy guest, the contents of the
CCWorkArea may *not* be always zero even when you use the DATA={0x00,
0x00...}.

Currently, Qemu uses zero filled backing pages, so we will get a zero filled
CCWorkArea; but nothing says that a backing page *must* be zero.
Another VMM may choose to do things differently. In summary, the OVMF
reset vector code must zero  the CCWorkArea  before calling SEV or TDX
probes.
Ah, I see.
In current CheckSevFeatures, byte[SEV_ES_WORK_AREA] is cleared to0.
Then its values is set based on the result of SEV probe.

There is a bug here. CheckTdxFeatures does the similar work and it sets the
WORK_AREA to 2. If CheckSevFeatures is called after CheckTdxFeatures, then
WORK_AREA is cleared and it is set to 0 because it is not SEV. The value is
override.

I think there are 2 options:
Option 1:
Neither CheckTdxFeatures nor CheckSevFeatures should clear WORK_AREA.
Instead
It should be cleared to 0 outside and before these 2 calls. So in Main16 after
TransitionFromReal16To32BitFlat WORK_AREA is cleared to 0. In Tdx guest this
WORK_AREA
is initialized to 0 by host VMM.

Option 2:
Another option is to figure out a mechanism that only one CheckXXXFeatures is
called.
Since there are 2 entry point in Main.asm: Main16 and Main32.
In Main16 CheckSevFeatures is called after TransitionFromReal16To32BitFlat.
(eax should
be saved because it is used in SetCr3ForPageTables64)
In Main32 CheckTdxFeatures is called after ReloadFlat32.

What's your opinion?


Re: [PATCH V3 06/10] OvmfPkg: Add AmdSev.asm in ResetVector

Min Xu
 

On July 29, 2021 6:08 PM, Brijesh Singh wrote:
On 7/29/21 1:07 AM, Xu, Min M wrote:
On July 29, 2021 12:29 PM, Brijesh Singh wrote:
On 7/28/21 9:44 PM, Xu, Min M wrote:
Jiewen & Singh

From the discussion I am thinking we have below rules to follow to
the design the structure of TEE_WORK_AREA:
1. Design should be flexible but not too complicated 2. Reuse the
current SEV_ES_WORK_AREA (PcdSevEsWorkAreaBase) as
TEE_WORK_AREA 3.
TEE_WORK_AREA should be initialized to all-0 at the beginning of
ResetVecotr 4. Reduce the changes to exiting code if possible

So I try to make below conclusions below: (Please review) 1.
SEV_ES_WORK_AREA is used as the TEE_WORK_AREA by both TDX and
SEV,
maybe in the future it can be used by other CC technologies.

2. In MEMFD, add below initial value. So that TEE_WORK_AREA is
guaranteed to be cleared in legacy guest. In TDX this memory region
is initialized to be all-0 by host VMM. In SEV the memory region is
cleared as well.
0x00B000|0x001000
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpa
ce
Guid.PcdSevEsWorkAreaSize
DATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
Hmm, I thought the contents of the data pages are controlled by the host
VMM.
If the backing pages are not zero filled then there is no guarantee
that memory will be zero.  To verify it:

1. I applied your above change in OvmfPkgX86.fdt. I modified the DATA
values from 0x00 -> 0xCC

2. Modified the SecMain.c to dump the SevEsWorkArea on entry

And dump does not contain the 0xcc.

And to confirm further,  I attached to the qemu with the GDB before
the booting the OVMF, and modified the SevEsWorkArea with some
garbage number  and this time the dump printed garbage value I put
through the debugger.

In summary, the OVMF to zero the workarea memory on the entry and
we
cannot rely on the DATA={0x00, 0x00...} to zero the CCWorkArea.
So in legacy guest, CCWorkArea is cleared to all-0 without the
DATA={0x00,0x00...}, right?

Okay, maybe I was not able to communicate it correctly.

The run I did is for the legacy guest. For the legacy guest, the contents of the
CCWorkArea may *not* be always zero even when you use the DATA={0x00,
0x00...}.

Currently, Qemu uses zero filled backing pages, so we will get a zero filled
CCWorkArea; but nothing says that a backing page *must* be zero.
Another VMM may choose to do things differently. In summary, the OVMF
reset vector code must zero  the CCWorkArea  before calling SEV or TDX
probes.
Ah, I see.
In current CheckSevFeatures, byte[SEV_ES_WORK_AREA] is cleared to0.
Then its values is set based on the result of SEV probe.

There is a bug here. CheckTdxFeatures does the similar work and it sets the
WORK_AREA to 2. If CheckSevFeatures is called after CheckTdxFeatures, then
WORK_AREA is cleared and it is set to 0 because it is not SEV. The value is override.

I think there are 2 options:
Option 1:
Neither CheckTdxFeatures nor CheckSevFeatures should clear WORK_AREA. Instead
It should be cleared to 0 outside and before these 2 calls. So in Main16 after
TransitionFromReal16To32BitFlat WORK_AREA is cleared to 0. In Tdx guest this WORK_AREA
is initialized to 0 by host VMM.

Option 2:
Another option is to figure out a mechanism that only one CheckXXXFeatures is called.
Since there are 2 entry point in Main.asm: Main16 and Main32.
In Main16 CheckSevFeatures is called after TransitionFromReal16To32BitFlat. (eax should
be saved because it is used in SetCr3ForPageTables64)
In Main32 CheckTdxFeatures is called after ReloadFlat32.

What's your opinion?

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