Re: ArmVirt and Self-Updating Code
Ard Biesheuvel
On Thu, 22 Jul 2021 at 16:54, Bret Barkelew <Bret.Barkelew@...> wrote:
"Mapping" implies that the MMU is on, but this code boots with the MMU off. Unlike x86, ARM does not define any physical address ranges that are guaranteed to be backed by DRAM, so a portable image either needs to be fully position independent, or carry the metadata it needs to relocate itself as it is invoked. No. The binary it applies the Relocations to is documented to be the Standalone MM core, but in fact SecCore is located:It is not spawned by the normal world code that runs UEFI. It is a secure world component that runs in a completely different execution context (TrustZone). The code does run with the MMU enabled from the start, but running from an a priori fixed offset was considered to be a security hazard, so we added self relocation support. The alternative would have been to add metadata to the StMmCore component that can be interpreted by the secure world component that loads it, but this would go beyond any existing specs, and make portability more problematic. 2) Why does Standalone MM (self-)relocation locate SecCore? Should it not already have been relocated with the code from ArmPlatformPkg? Is Standalone MM embedded into ARM SecCore?No and no. Standalone MM has nothing to do with the code that runs as part of UEFI itself. ArmPlatformPkg is completely separate from StandaloneMmPkg. 3) Why is SecCore the only module relocated? Are all others guaranteed to be "properly" loaded?SecCore contains a PE/COFF loader, so all subsequent modules are loaded normally. This is similar to the ArmVirtQemuKernel self-relocating SEC module, which only relocates itself in this manner, and relies on standard PE/COFF metadata for loading other modules. 4) Is there maybe some high-level documented about the ARM boot flow? It seems to be significantly different from the x86 routes quite vastly.”trustedfirmware.org may have some useful documentation.
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Re: [staging/edk2-redfish-client Tools PATCH 6/6] RedfishClientPkg/Redfish-Profile-Simulator: Add requirements
Nickle Wang
Reviewed-by:
Nickle Wang <nickle.wang@...>
Thanks,
Nickle
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Sent: Thursday, July 22, 2021 14:08 To: devel@edk2.groups.io <devel@edk2.groups.io> Cc: Wang, Nickle (HPS SW) <nickle.wang@...>; Liming Gao <gaoliming@...> Subject: [staging/edk2-redfish-client Tools PATCH 6/6] RedfishClientPkg/Redfish-Profile-Simulator: Add requirements add requirements.txt for the required python module
Signed-off-by: Abner Chang <abner.chang@...> Cc: Nickle Wang <nickle.wang@...> Cc: Liming Gao <gaoliming@...> --- .../Tools/Redfish-Profile-Simulator/requirements.txt | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt new file mode 100644 index 0000000000..88807d87c2 --- /dev/null +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt @@ -0,0 +1,2 @@ +flask==1.1.1 +pyOpenSSL -- 2.17.1
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Re: [staging/edk2-redfish-client Tools PATCH 5/6] RedfishClientPkg/Redfish-Profile-Simulator: Add ETAG on memory resource
Nickle Wang
Reviewed-by:
Nickle Wang <nickle.wang@...>
Thanks,
Nickle
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Sent: Thursday, July 22, 2021 14:08 To: devel@edk2.groups.io <devel@edk2.groups.io> Cc: Wang, Nickle (HPS SW) <nickle.wang@...>; Liming Gao <gaoliming@...> Subject: [staging/edk2-redfish-client Tools PATCH 5/6] RedfishClientPkg/Redfish-Profile-Simulator: Add ETAG on memory resource Add ETAG support on Memory resource.
Signed-off-by: Abner Chang <abner.chang@...> Cc: Nickle Wang <nickle.wang@...> Cc: Liming Gao <gaoliming@...> --- .../Redfish-Profile-Simulator/v1sim/systems.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py index 690101fb10..de4b839aeb 100644 --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py @@ -18,6 +18,7 @@ from .resource import RfResource, RfCollection from .storage import RfSimpleStorageCollection, RfSmartStorage import flask import json +import hashlib from collections import OrderedDict class RfSystemsCollection(RfCollection): @@ -142,13 +143,25 @@ class RfMemoryCollection(RfCollection): self.res_data["Members"].append({"@odata.id":newMemoryUrl}) post_data["@odata.id"] = newMemoryUrl + + md5 = hashlib.md5() + md5.update(json.dumps(post_data).encode("utf-8")) + etag_str = 'W/"' + md5.hexdigest() + '"' + post_data["@odata.etag"] = etag_str self.elements[str(newMemoryIdx)] = post_data resp = flask.Response(json.dumps(post_data,indent=4)) resp.headers["Location"] = newMemoryUrl + resp.headers["ETag"] = etag_str + return 0, 200, None, resp def patch_memory(self, Idx, patch_data): + md5 = hashlib.md5() + md5.update(json.dumps(patch_data).encode("utf-8")) + etag_str = 'W/"' + md5.hexdigest() + '"' + patch_data["@odata.etag"] = etag_str + self.elements[str(Idx)] = {**self.elements[str(Idx)], **patch_data} resp = flask.Response(json.dumps(self.elements[str(Idx)],indent=4)) return 0, 200, None, resp -- 2.17.1
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Re: [staging/edk2-redfish-client Tools PATCH 4/6] RedfishClientPkg/Redfish-Profile-Simulator: HTTP methods on Memory Collection
Nickle Wang
Reviewed-by:
Nickle Wang <nickle.wang@...>
Thanks,
Nickle
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Sent: Thursday, July 22, 2021 14:08 To: devel@edk2.groups.io <devel@edk2.groups.io> Cc: Wang, Nickle (HPS SW) <nickle.wang@...>; Liming Gao <gaoliming@...> Subject: [staging/edk2-redfish-client Tools PATCH 4/6] RedfishClientPkg/Redfish-Profile-Simulator: HTTP methods on Memory Collection Add POST and PATCH methods on Memory collection and resource.
Signed-off-by: Abner Chang <abner.chang@...> Cc: Nickle Wang <nickle.wang@...> Cc: Liming Gao <gaoliming@...> --- .../v1sim/redfishURIs.py | 25 +++++++++++ .../v1sim/systems.py | 43 +++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py index 3c912f7ce1..35d3794cc6 100644 --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py @@ -1,6 +1,7 @@ # # Copyright Notice: # Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> +# (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR> # SPDX-License-Identifier: BSD-2-Clause-Patent # # Copyright Notice: @@ -308,6 +309,30 @@ def rfApi_SimpleServer(root, versions, host="127.0.0.1", port=5000, cert="", key else: return err_string, status_code + @app.route("/redfish/v1/Systems/<string:system_id>/Memory", methods=['POST']) + @auth.rfAuthRequired + def rf_computer_memory_post(system_id): + print ("in POST memory collection") + rdata = json.loads(request.data,object_pairs_hook=OrderedDict) + print("rdata:{}".format(rdata)) + rc, status_code, err_string, resp = root.components['Systems'].get_element(system_id).components['Memory'].post_resource(rdata) + if rc == 0: + return resp, status_code + else: + return err_string, status_code + + @app.route("/redfish/v1/Systems/<string:system_id>/Memory/<string:MemoryIdx>", methods=['PATCH']) + @auth.rfAuthRequired + def rf_computer_memory_patch(system_id, MemoryIdx): + print ("in PATCH memory[%s] resource" % MemoryIdx) + rdata = json.loads(request.data,object_pairs_hook=OrderedDict) + print("rdata:{}".format(rdata)) + rc, status_code, err_string, resp = root.components['Systems'].get_element(system_id).components['Memory'].patch_memory(MemoryIdx, rdata) + if rc == 0: + return resp, status_code + else: + return err_string, status_code + def resolve_path(service, path): parts = path.split('/') result = service diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py index b8b3788054..690101fb10 100644 --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py @@ -2,6 +2,7 @@ # Copyright Notice: # # Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> +# (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR> # SPDX-License-Identifier: BSD-2-Clause-Patent # # Copyright Notice: @@ -123,9 +124,50 @@ class RfSystemObj(RfResource): # subclass Logs Collection class RfMemoryCollection(RfCollection): + def final_init_processing(self, base_path, rel_path): + self.maxIdx = self.res_data["Members@..."] + def element_type(self): return RfMemory + def post_resource(self, post_data): + print("Members@...:{}".format(self.res_data["Members@..."])) + print("Members:{}".format(self.res_data["Members"])) + print("post_data:{}".format(post_data)) + + self.res_data["Members@..."] = self.res_data["Members@..."] + 1 + self.maxIdx = self.maxIdx + 1 + newMemoryIdx = self.maxIdx + newMemoryUrl = self.res_data["@odata.id"] + "/" + str(newMemoryIdx) + self.res_data["Members"].append({"@odata.id":newMemoryUrl}) + + post_data["@odata.id"] = newMemoryUrl + self.elements[str(newMemoryIdx)] = post_data + + resp = flask.Response(json.dumps(post_data,indent=4)) + resp.headers["Location"] = newMemoryUrl + return 0, 200, None, resp + + def patch_memory(self, Idx, patch_data): + self.elements[str(Idx)] = {**self.elements[str(Idx)], **patch_data} + resp = flask.Response(json.dumps(self.elements[str(Idx)],indent=4)) + return 0, 200, None, resp + + def get_memory(self, Idx): + return json.dumps(self.elements[Idx],indent=4) + + def delete_memory(self, Idx): + print("in delete_memory") + + resp = flask.Response(json.dumps(self.elements[Idx],indent=4)) + + self.elements.pop(Idx) + self.res_data["Members@..."] = self.res_data["Members@..."] - 1 + + newMemoryUrl = self.res_data["@odata.id"] + "/" + str(Idx) + self.res_data["Members"].remove({"@odata.id":newMemoryUrl}) + return 0, 200, None, resp + class RfMemory(RfResource): pass @@ -267,3 +309,4 @@ class RfBootOptionCollection(RfCollection): return 0, 200, None, resp class RfBootOption(RfResource): + pass -- 2.17.1
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Re: ArmVirt and Self-Updating Code
Bret Barkelew
Expanding audience to the full dev list… See below…
- Bret
From: Thomas Abraham
Sent: Wednesday, July 7, 2021 11:07 PM To: Bret Barkelew; Ard Biesheuvel (TianoCore); Lindholm, Leif; Laszlo Ersek; Marvin Häuser; Sami Mujawar Cc: nd Subject: [EXTERNAL] RE: ArmVirt and Self-Updating Code
+ Sami
From: Bret Barkelew <Bret.Barkelew@...>
All,
Marvin asked me a question on the UEFI Talkbox Discord that’s a little beyond my ken…
“There is self-relocating code in ArmVirtPkg: According to comments in the ASM, it seems like this is for Linux-based RAM boot (I saw further stuff for KVM, so it makes sense I guess?). It seems unfortunate it cannot be mapped into a known address range so that self-relocation is not necessary, but that's out of my scope to understand.
“Now, StandaloneMmPkg has similar (self-)relocation code too: https://github.com/tianocore/edk2/blob/17143c4837393d42c484b42d1789b85b2cff1aaf/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c#L379-L386 Because I cannot find such elsewhere, I assume it must be for the same ARM virtualised environment as above. The binary it applies the Relocations to is documented to be the Standalone MM core, but in fact SecCore is located:
“This yields the following questions to me: 1) What even invokes Standalone MM on ARM? It is documented it is spawned during SEC, but I could not find any actual invocation. 2) Why does Standalone MM (self-)relocation locate SecCore? Should it not already have been relocated with the code from ArmPlatformPkg? Is Standalone MM embedded into ARM SecCore? 3) Why is SecCore the only module relocated? Are all others guaranteed to be "properly" loaded? 4) Is there maybe some high-level documented about the ARM boot flow? It seems to be significantly different from the x86 routes quite vastly.”
Hoping that one of you could get me closer to an answer for him. Also happy to take this to the greater mailing list, but thought I’d avoid churn.
Thanks in advance! - Bret
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Re: [PATCH v1 6/6] UefiPayloadPkg: LinuxBoot: use a text format for the configuration block.
Cheng-Chieh Huang <chengchieh@...>
Here is the documentation: https://github.com/osresearch/kexec-load/blob/main/README.md
On Thu, Jul 22, 2021 at 1:09 AM Marvin Häuser <mhaeuser@...> wrote:
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Cancelled Event: TianoCore Design Meeting - APAC/NAMO - Friday, July 23, 2021
#cal-cancelled
devel@edk2.groups.io Calendar <noreply@...>
Cancelled: TianoCore Design Meeting - APAC/NAMO This event has been cancelled. When: Where: Organizer: Ray Ni ray.ni@... Description: TOPIC
For more info, see here: https://www.tianocore.org/design-meeting/ Microsoft Teams meetingJoin on your computer or mobile appClick here to join the meeting Join with a video conferencing deviceteams@... Video Conference ID: 119 715 416 0
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[PATCH 3/3] IntelSiliconPkg: Add IgdOpRegion30.h to support IGD OpRegion v3.0
Digant H Solanki
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3426
- There are many OpRegion fields obsoleted in MBOX1 - MBOX2 is re-purposed for Backlight related fields for dual LFP. - Backlight related fields moved to MBOX2 from MBOX3 and some fields are obsoleted in MBOX3. Signed-off-by: Digant H Solanki <digant.h.solanki@...> Cc: Ray Ni <ray.ni@...> Cc: Rangasai V Chaganty <rangasai.v.chaganty@...> Cc: Ashraf Ali S <ashraf.ali.s@...> --- Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion30.h | 101 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion30.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion30.h new file mode 100644 index 0000000000..c9948ab55f --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion30.h @@ -0,0 +1,101 @@ +/** @file + IGD OpRegion definition from Intel Integrated Graphics Device OpRegion + Specification based on version 3.0. + + Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _IGD_OPREGION_3_0_H_ +#define _IGD_OPREGION_3_0_H_ + +#include "IgdOpRegion.h" + +#define IGD_OPREGION_HEADER_MBOX2_VER_3_0 BIT5 + +#pragma pack(1) +/// +/// OpRegion Mailbox 1 - Public ACPI Methods +/// Offset 0x100, Size 0x100 +/// +typedef struct { + UINT32 DRDY; ///< Offset 0x100 Driver Readiness + UINT32 CSTS; ///< Offset 0x104 Status + UINT32 CEVT; ///< Offset 0x108 Current Event + UINT8 RM11[0x14]; ///< Offset 0x10C Reserved Must be Zero + UINT32 DIDL[8]; ///< Offset 0x120 Supported Display Devices ID List + UINT32 CPDL[8]; ///< Offset 0x140 obsolete + UINT32 CADL[8]; ///< Offset 0x160 obsolete + UINT32 NADL[8]; ///< Offset 0x180 obsolete + UINT32 ASLP; ///< Offset 0x1A0 ASL Sleep Time Out + UINT32 TIDX; ///< Offset 0x1A4 obsolete + UINT32 CHPD; ///< Offset 0x1A8 obsolete + UINT32 CLID; ///< Offset 0x1AC Current Lid State Indicator + UINT32 CDCK; ///< Offset 0x1B0 Current Docking State Indicator + UINT32 SXSW; ///< Offset 0x1B4 obsolete + UINT32 EVTS; ///< Offset 0x1B8 obsolete + UINT32 CNOT; ///< Offset 0x1BC obsolete + UINT32 NRDY; ///< Offset 0x1C0 Driver Status + UINT8 DID2[0x1C]; ///< Offset 0x1C4 Extended Supported Devices ID List (DOD) + UINT8 CPD2[0x1C]; ///< Offset 0x1E0 obsolete + UINT8 RM12[4]; ///< Offset 0x1FC - 0x1FF Reserved Must be zero +} IGD_OPREGION_MBOX1_VER_3_0; + +/// +/// OpRegion Mailbox 2 - Backlight communication +/// Offset 0x200, Size 0x100 +/// +typedef struct { + UINT32 BCL1; ///< Offset 0x200 Backlight Brightness for LFP1 + UINT32 BCL2; ///< Offset 0x204 Backlight Brightness for LFP2 + UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1 + UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2 + UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1 + UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2 +} IGD_OPREGION_MBOX2_VER_3_0; + +/// +/// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support +/// Offset 0x300, Size 0x100 +/// +typedef struct { + UINT32 ARDY; ///< Offset 0x300 obsolete + UINT32 ASLC; ///< Offset 0x304 obsolete + UINT32 TCHE; ///< Offset 0x308 obsolete + UINT32 ALSI; ///< Offset 0x30C obsolete + UINT32 BCLP; ///< Offset 0x310 obsoleted in ver 3.0, moved to Mailbox 2. + UINT32 PFIT; ///< Offset 0x314 obsolete + UINT32 CBLV; ///< Offset 0x318 obsoleted in ver 3.0, moved to Mailbox 2. + UINT16 BCLM[0x14]; ///< Offset 0x31C obsoleted in ver 3.0, moved to Mailbox 2. + UINT32 CPFM; ///< Offset 0x344 obsolete + UINT32 EPFM; ///< Offset 0x348 obsolete + UINT8 PLUT[0x4A]; ///< Offset 0x34C obsolete + UINT32 PFMB; ///< Offset 0x396 obsolete + UINT32 CCDV; ///< Offset 0x39A obsolete + UINT32 PCFT; ///< Offset 0x39E obsolete + UINT32 SROT; ///< Offset 0x3A2 obsolete + UINT32 IUER; ///< Offset 0x3A6 obsolete + UINT64 FDSS; ///< Offset 0x3AA obsolete + UINT32 FDSP; ///< Offset 0x3B2 obsolete + UINT32 STAT; ///< Offset 0x3B6 obsolete + UINT64 RVDA; ///< Offset 0x3BA Physical address of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB. + UINT32 RVDS; ///< Offset 0x3C2 Size of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB. + UINT8 VRSR; ///< Offset 0x3C6 Video RAM Self Refresh + UINT64 DLHP; ///< Offset 0x3C7 Dual LFP Hinge Alignment Parameters + UINT8 RM32[0x31]; ///< Offset 0x3CF - 0x3FF Reserved Must be zero. +} IGD_OPREGION_MBOX3_VER_3_0; + +/// +/// IGD OpRegion Structure +/// +typedef struct { + IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100) + IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100) + IGD_OPREGION_MBOX2_VER_3_0 MBox2; ///< Mailbox 2: Backlight communication (Offset 0x200, Size 0x100) + IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100) + IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800) + IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400) +} IGD_OPREGION_STRUCTURE_VER_3_0; +#pragma pack() + +#endif -- 2.30.2.windows.1
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Re: [edk2-platform][PATCH v1 1/1] Platform/RaspberryPi/RPi4: Fix
non-standard ACPI HIDs
Ard Biesheuvel
On Wed, 21 Jul 2021 at 22:39, Andrei Warkentin <awarkentin@...> wrote:
Pushed as d549e39ca1a9..194269223294 Thanks all, ________________________________
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Re: RFC: EXT4 filesystem driver
Marvin Häuser <mhaeuser@...>
On 22.07.21 01:12, Pedro Falcato wrote:
EXT4 (fourth extended filesystem) is a filesystem developed for LinuxWhile I personally don't like it's outside of the EDK II core, I kind of get it. However I would strongly suggest to choose a more general package name, like "LinuxFsPkg", or "NixFsPkg", or maybe even just "FileSystemPkg" (and move FAT over some day?). Imagine someone wants to import BTRFS next year, should it really be "BtrfsPkg"? I understand it follows the "FatPkg" convention, but I feel like people forget FatPkg was special as to its awkward license before Microsoft allowed a change a few years ago. Maintainers.txt already has the concept of different Reviewers per subfolder, maybe it could be extended a little to have a common EDK II contributor to officially maintain the package, but have you be a Maintainer or something like a Reviewer+ to your driver? Or you could maintain the entire package of course. Current limitations:I may be alone, but I strongly object. One of our projects (OpenCore) has a disgusting way of writing files because the FAT32 driver in Aptio IV firmwares may corrupt the filesystem when resizing files. To be honest, it may corrupt with other usages too and we never noticed, because basically we wrote the code to require the least amount of (complex) FS operations. The issue with EDK II is, there is a lot of own code and a lot of users, but little testing. By that I do not mean that developers do not test their code, but that nobody sits down and performs all sorts of FS manipulations in all sorts of orders and closely observes the result for regression-testing. Users will not really test it either, as UEFI to them should just somehow boot to Windows. If at least the code was shared with a codebase that is known-trusted (e.g. the Linux kernel itself), that'd be much easier to trust, but realistically this is not going to happen. My point is, if a company like AMI cannot guarantee writing does not damage the FS for a very simple FS, how do you plan to guarantee yours doesn't for a much more complex FS? I'd rather have only one simple FS type that supports writing for most use-cases (e.g. logging). At the very least I would beg you to have a PCD to turn write support off - if it will be off by default, that'd be great of course. :) Was there any discussion yet as to why write support is needed in the first place you could point me to? Thanks for your work! Best regards, Marvin The driver's handling of unclean unmounting through forced shutdown is unclear.
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Re: [PATCH 1/1] MdePkg: add definition of LINUX_EFI_INITRD_MEDIA_GUID
Ard Biesheuvel
On Wed, 21 Jul 2021 at 20:04, Kinney, Michael D <michael.d.kinney@...> wrote:
This is really the firmware/loader's problem. In the ARM / RISC-V world, the distinction between firmware and pre-OS loader is not as clear cut, and for instance, U-boot in EFI mode can either boot the kernel directly (and expose the initrd via this method), or invoke GRUB as an EFI app using LoadImage/StartImage, in which case GRUB can load the kernel and/or initrd via whichever interface it desires. It is therefore also the platform FW's problem to decide which initrd goes with which kernel - it is highly platform dependent whether a certain initrd is compatible with only a single kernel, or can be combined with any kernel (e.g., when the kernel has all drivers builtin, and the initrd only contains the user space)
The consumer of the protocol is the EFI stub loader in Linux, i.e., the OS loader that is built into the OS kernel. It is the agent that calls ExitBootServices(), and it indeed consumes the protocol beforehand. In summary, I think it should be sufficient to describe the consumer's expectations with respect to the API. I don't think it makes sense to be normative about how platform firmware or intermediate loaders keep track of which file to expose, as long as it complies with the consumer's requirements.
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Re: [PATCH v4 10/11] OvmfPkg: add BlobVerifierLibSevHashes
Dov Murik
Here's the diff from the v3 of this patch. It's supposed to catch
toggle quoted messageShow quoted text
more cases of bad length fields overflowing the reserved MEMFD space or the declared length of the table. diff --git a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c index 797d63d18067..372ae6f469e7 100644 --- a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c +++ b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c @@ -94,7 +94,7 @@ VerifyBlob ( ) { CONST GUID *Guid; - INT32 Len; + INT32 Remaining; HASH_TABLE *Entry; if (mHashesTable == NULL || mHashesTableSize == 0) { @@ -111,9 +111,13 @@ VerifyBlob ( return EFI_ACCESS_DENIED; } - for (Entry = mHashesTable, Len = 0; - Len < (INT32)mHashesTableSize; - Len += Entry->Len, + // + // Remaining is INT32 to catch underflow in case Entry->Len has a + // very high UINT16 value + // + for (Entry = mHashesTable, Remaining = mHashesTableSize; + Remaining >= sizeof *Entry && Remaining >= Entry->Len; + Remaining -= Entry->Len, Entry = (HASH_TABLE *)((UINT8 *)Entry + Entry->Len)) { UINTN EntrySize; EFI_STATUS Status; @@ -125,7 +129,7 @@ VerifyBlob ( DEBUG ((DEBUG_INFO, "%a: Found GUID %g in table\n", __FUNCTION__, Guid)); - EntrySize = Entry->Len - sizeof (Entry->Guid) - sizeof (Entry->Len); + EntrySize = Entry->Len - sizeof Entry->Guid - sizeof Entry->Len; if (EntrySize != SHA256_DIGEST_SIZE) { DEBUG ((DEBUG_ERROR, "%a: Hash has the wrong size %d != %d\n", __FUNCTION__, EntrySize, SHA256_DIGEST_SIZE)); @@ -161,7 +165,8 @@ VerifyBlob ( This function always returns success, even if the table can't be found. The subsequent VerifyBlob calls will fail if no table was found. - @retval RETURN_SUCCESS The verifier tables were set up correctly + @retval RETURN_SUCCESS The hashes table is set up correctly, or there is no + hashes table **/ RETURN_STATUS EFIAPI @@ -175,15 +180,9 @@ BlobVerifierLibSevHashesConstructor ( mHashesTable = NULL; mHashesTableSize = 0; - if (Ptr == NULL || Size == 0) { - return RETURN_SUCCESS; - } - - if (!CompareGuid (&Ptr->Guid, &SEV_HASH_TABLE_GUID)) { - return RETURN_SUCCESS; - } - - if (Ptr->Len < (sizeof Ptr->Guid + sizeof Ptr->Len)) { + if (Ptr == NULL || Size < sizeof *Ptr || + !CompareGuid (&Ptr->Guid, &SEV_HASH_TABLE_GUID) || + Ptr->Len < sizeof *Ptr || Ptr->Len > Size) { return RETURN_SUCCESS; }
On 22/07/2021 11:43, Dov Murik wrote:
Add an implementation for BlobVerifierLib that locates the SEV hashes
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[PATCH v4 02/11] OvmfPkg/AmdSev: use GenericQemuLoadImageLib in AmdSev builds
Dov Murik
Newer kernels support efistub and therefore don't need all the legacy
stuff in X86QemuLoadImageLib, which are harder to secure. Specifically the verification of kernel/initrd/cmdline blobs will be added only to the GenericQemuLoadImageLib implementation, so use that for SEV builds. Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: Dov Murik <dovmurik@...> Reviewed-by: Brijesh Singh <brijesh.singh@...> --- OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 1d487befae08..a2f1324c40a6 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -368,7 +368,7 @@ [LibraryClasses.common.DXE_DRIVER] PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf=0D MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf=0D QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf= =0D - QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib= .inf=0D + QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoad= ImageLib.inf=0D !if $(TPM_ENABLE) =3D=3D TRUE=0D Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibTcg/Tpm12DeviceLibTcg.i= nf=0D Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.in= f=0D --=20 2.25.1
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[PATCH v4 10/11] OvmfPkg: add BlobVerifierLibSevHashes
Dov Murik
Add an implementation for BlobVerifierLib that locates the SEV hashes
table and verifies that the calculated hashes of the kernel, initrd, and cmdline blobs indeed match the expected hashes stated in the hashes table. If there's a missing hash or a hash mismatch then EFI_ACCESS_DENIED is returned which will cause a failure to load a kernel image. Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Co-developed-by: James Bottomley <jejb@...> Signed-off-by: James Bottomley <jejb@...> Signed-off-by: Dov Murik <dovmurik@...> --- OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes.inf | 37 ++++ OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c | 199 +++++++= +++++++++++++ 2 files changed, 236 insertions(+) diff --git a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes.inf b= /OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes.inf new file mode 100644 index 000000000000..76ca0b8154ce --- /dev/null +++ b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes.inf @@ -0,0 +1,37 @@ +## @file=0D +#=0D +# Blob verifier library that uses SEV hashes table. The hashes table hol= ds the=0D +# allowed hashes of the kernel, initrd, and cmdline blobs.=0D +#=0D +# Copyright (C) 2021, IBM Corp=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 1.29=0D + BASE_NAME =3D BlobVerifierLibSevHashes=0D + FILE_GUID =3D 59e713b5-eff3-46a7-8d8b-46f4c004ad7b= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D BlobVerifierLib=0D + CONSTRUCTOR =3D BlobVerifierLibSevHashesConstructor=0D +=0D +[Sources]=0D + BlobVerifierSevHashes.c=0D +=0D +[Packages]=0D + CryptoPkg/CryptoPkg.dec=0D + MdePkg/MdePkg.dec=0D + OvmfPkg/OvmfPkg.dec=0D +=0D +[LibraryClasses]=0D + BaseCryptLib=0D + BaseMemoryLib=0D + DebugLib=0D + PcdLib=0D +=0D +[FixedPcd]=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize=0D diff --git a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c b/Ovmf= Pkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c new file mode 100644 index 000000000000..372ae6f469e7 --- /dev/null +++ b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierSevHashes.c @@ -0,0 +1,199 @@ +/** @file=0D +=0D + Blob verifier library that uses SEV hashes table. The hashes table hold= s the=0D + allowed hashes of the kernel, initrd, and cmdline blobs.=0D +=0D + Copyright (C) 2021, IBM Corporation=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#include <Library/BaseCryptLib.h>=0D +#include <Library/BaseLib.h>=0D +#include <Library/BaseMemoryLib.h>=0D +#include <Library/DebugLib.h>=0D +#include <Library/BlobVerifierLib.h>=0D +=0D +/**=0D + The SEV Hashes table must be in encrypted memory and has the table=0D + and its entries described by=0D +=0D + <GUID>|UINT16 <len>|<data>=0D +=0D + With the whole table GUID being 9438d606-4f22-4cc9-b479-a793d411fd21=0D +=0D + The current possible table entries are for the kernel, the initrd=0D + and the cmdline:=0D +=0D + 4de79437-abd2-427f-b835-d5b172d2045b kernel=0D + 44baf731-3a2f-4bd7-9af1-41e29169781d initrd=0D + 97d02dd8-bd20-4c94-aa78-e7714d36ab2a cmdline=0D +=0D + The size of the entry is used to identify the hash, but the=0D + expectation is that it will be 32 bytes of SHA-256.=0D +**/=0D +=0D +#define SEV_HASH_TABLE_GUID \=0D + (GUID) { 0x9438d606, 0x4f22, 0x4cc9, { 0xb4, 0x79, 0xa7, 0x93, 0xd4, 0x1= 1, 0xfd, 0x21 } }=0D +#define SEV_KERNEL_HASH_GUID \=0D + (GUID) { 0x4de79437, 0xabd2, 0x427f, { 0xb8, 0x35, 0xd5, 0xb1, 0x72, 0xd= 2, 0x04, 0x5b } }=0D +#define SEV_INITRD_HASH_GUID \=0D + (GUID) { 0x44baf731, 0x3a2f, 0x4bd7, { 0x9a, 0xf1, 0x41, 0xe2, 0x91, 0x6= 9, 0x78, 0x1d } }=0D +#define SEV_CMDLINE_HASH_GUID \=0D + (GUID) { 0x97d02dd8, 0xbd20, 0x4c94, { 0xaa, 0x78, 0xe7, 0x71, 0x4d, 0x3= 6, 0xab, 0x2a } }=0D +=0D +STATIC CONST EFI_GUID mSevKernelHashGuid =3D SEV_KERNEL_HASH_GUID;=0D +STATIC CONST EFI_GUID mSevInitrdHashGuid =3D SEV_INITRD_HASH_GUID;=0D +STATIC CONST EFI_GUID mSevCmdlineHashGuid =3D SEV_CMDLINE_HASH_GUID;=0D +=0D +#pragma pack (1)=0D +typedef struct {=0D + GUID Guid;=0D + UINT16 Len;=0D + UINT8 Data[];=0D +} HASH_TABLE;=0D +#pragma pack ()=0D +=0D +STATIC HASH_TABLE *mHashesTable;=0D +STATIC UINT16 mHashesTableSize;=0D +=0D +STATIC=0D +CONST GUID*=0D +FindBlobEntryGuid (=0D + IN CONST CHAR16 *BlobName=0D + )=0D +{=0D + if (StrCmp (BlobName, L"kernel") =3D=3D 0) {=0D + return &mSevKernelHashGuid;=0D + } else if (StrCmp (BlobName, L"initrd") =3D=3D 0) {=0D + return &mSevInitrdHashGuid;=0D + } else if (StrCmp (BlobName, L"cmdline") =3D=3D 0) {=0D + return &mSevCmdlineHashGuid;=0D + } else {=0D + return NULL;=0D + }=0D +}=0D +=0D +/**=0D + Verify blob from an external source.=0D +=0D + @param[in] BlobName The name of the blob=0D + @param[in] Buf The data of the blob=0D + @param[in] BufSize The size of the blob in bytes=0D +=0D + @retval EFI_SUCCESS The blob was verified successfully.=0D + @retval EFI_ACCESS_DENIED The blob could not be verified, and theref= ore=0D + should be considered non-secure.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +VerifyBlob (=0D + IN CONST CHAR16 *BlobName,=0D + IN CONST VOID *Buf,=0D + IN UINT32 BufSize=0D + )=0D +{=0D + CONST GUID *Guid;=0D + INT32 Remaining;=0D + HASH_TABLE *Entry;=0D +=0D + if (mHashesTable =3D=3D NULL || mHashesTableSize =3D=3D 0) {=0D + DEBUG ((DEBUG_ERROR,=0D + "%a: Verifier called but no hashes table discoverd in MEMFD\n",=0D + __FUNCTION__));=0D + return EFI_ACCESS_DENIED;=0D + }=0D +=0D + Guid =3D FindBlobEntryGuid (BlobName);=0D + if (Guid =3D=3D NULL) {=0D + DEBUG ((DEBUG_ERROR, "%a: Unknown blob name \"%s\"\n", __FUNCTION__,=0D + BlobName));=0D + return EFI_ACCESS_DENIED;=0D + }=0D +=0D + //=0D + // Remaining is INT32 to catch underflow in case Entry->Len has a=0D + // very high UINT16 value=0D + //=0D + for (Entry =3D mHashesTable, Remaining =3D mHashesTableSize;=0D + Remaining >=3D sizeof *Entry && Remaining >=3D Entry->Len;=0D + Remaining -=3D Entry->Len,=0D + Entry =3D (HASH_TABLE *)((UINT8 *)Entry + Entry->Len)) {=0D + UINTN EntrySize;=0D + EFI_STATUS Status;=0D + UINT8 Hash[SHA256_DIGEST_SIZE];=0D +=0D + if (!CompareGuid (&Entry->Guid, Guid)) {=0D + continue;=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "%a: Found GUID %g in table\n", __FUNCTION__, Guid= ));=0D +=0D + EntrySize =3D Entry->Len - sizeof Entry->Guid - sizeof Entry->Len;=0D + if (EntrySize !=3D SHA256_DIGEST_SIZE) {=0D + DEBUG ((DEBUG_ERROR, "%a: Hash has the wrong size %d !=3D %d\n",=0D + __FUNCTION__, EntrySize, SHA256_DIGEST_SIZE));=0D + return EFI_ACCESS_DENIED;=0D + }=0D +=0D + //=0D + // Calculate the buffer's hash and verify that it is identical to the= =0D + // expected hash table entry=0D + //=0D + Sha256HashAll (Buf, BufSize, Hash);=0D +=0D + if (CompareMem (Entry->Data, Hash, EntrySize) =3D=3D 0) {=0D + Status =3D EFI_SUCCESS;=0D + DEBUG ((DEBUG_INFO, "%a: Hash comparison succeeded for \"%s\"\n",=0D + __FUNCTION__, BlobName));=0D + } else {=0D + Status =3D EFI_ACCESS_DENIED;=0D + DEBUG ((DEBUG_ERROR, "%a: Hash comparison failed for \"%s\"\n",=0D + __FUNCTION__, BlobName));=0D + }=0D + return Status;=0D + }=0D +=0D + DEBUG ((DEBUG_ERROR, "%a: Hash GUID %g not found in table\n", __FUNCTION= __,=0D + Guid));=0D + return EFI_ACCESS_DENIED;=0D +}=0D +=0D +/**=0D + Locate the SEV hashes table.=0D +=0D + This function always returns success, even if the table can't be found. = The=0D + subsequent VerifyBlob calls will fail if no table was found.=0D +=0D + @retval RETURN_SUCCESS The hashes table is set up correctly, or there = is no=0D + hashes table=0D +**/=0D +RETURN_STATUS=0D +EFIAPI=0D +BlobVerifierLibSevHashesConstructor (=0D + VOID=0D + )=0D +{=0D + HASH_TABLE *Ptr =3D (void *)(UINTN)FixedPcdGet64 (PcdQemuHashTableBase);= =0D + UINT32 Size =3D FixedPcdGet32 (PcdQemuHashTableSize);=0D +=0D + mHashesTable =3D NULL;=0D + mHashesTableSize =3D 0;=0D +=0D + if (Ptr =3D=3D NULL || Size < sizeof *Ptr ||=0D + !CompareGuid (&Ptr->Guid, &SEV_HASH_TABLE_GUID) ||=0D + Ptr->Len < sizeof *Ptr || Ptr->Len > Size) {=0D + return RETURN_SUCCESS;=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "%a: Found injected hashes table in secure location\= n",=0D + __FUNCTION__));=0D +=0D + mHashesTable =3D (HASH_TABLE *)Ptr->Data;=0D + mHashesTableSize =3D Ptr->Len - sizeof Ptr->Guid - sizeof Ptr->Len;=0D +=0D + DEBUG ((DEBUG_VERBOSE, "%a: mHashesTable=3D0x%p, Size=3D%u\n", __FUNCTIO= N__,=0D + mHashesTable, mHashesTableSize));=0D +=0D + return RETURN_SUCCESS;=0D +}=0D --=20 2.25.1
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[PATCH v4 04/11] OvmfPkg: add library class BlobVerifierLib with null implementation
Dov Murik
BlobVerifierLib will be used to verify blobs fetching them from QEMU's
firmware config (fw_cfg) in platforms that enable such verification. The null implementation BlobVerifierLibNull treats all blobs as valid. Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: Dov Murik <dovmurik@...> Reviewed-by: Tom Lendacky <thomas.lendacky@...> --- OvmfPkg/OvmfPkg.dec | 3 ++ OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf | 24 +++++++++++++ OvmfPkg/Include/Library/BlobVerifierLib.h | 38 +++++++++++++= +++++++ OvmfPkg/Library/BlobVerifierLib/BlobVerifierNull.c | 33 +++++++++++++= ++++ 4 files changed, 98 insertions(+) diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index 6ae733f6e39f..f82228d69cc2 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -23,6 +23,9 @@ [LibraryClasses] ## @libraryclass Access bhyve's firmware control interface.=0D BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h=0D =0D + ## @libraryclass Verify blobs read from the VMM=0D + BlobVerifierLib|Include/Library/BlobVerifierLib.h=0D +=0D ## @libraryclass Loads and boots a Linux kernel image=0D #=0D LoadLinuxLib|Include/Library/LoadLinuxLib.h=0D diff --git a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf b/Ovmf= Pkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf new file mode 100644 index 000000000000..850d398e65a4 --- /dev/null +++ b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf @@ -0,0 +1,24 @@ +## @file=0D +#=0D +# Null implementation of the blob verifier library.=0D +#=0D +# Copyright (C) 2021, IBM Corp=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 1.29=0D + BASE_NAME =3D BlobVerifierLibNull=0D + FILE_GUID =3D b1b5533e-e01a-43bb-9e54-414f00ca036e= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D BlobVerifierLib=0D +=0D +[Sources]=0D + BlobVerifierNull.c=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + OvmfPkg/OvmfPkg.dec=0D diff --git a/OvmfPkg/Include/Library/BlobVerifierLib.h b/OvmfPkg/Include/Li= brary/BlobVerifierLib.h new file mode 100644 index 000000000000..db122684f76c --- /dev/null +++ b/OvmfPkg/Include/Library/BlobVerifierLib.h @@ -0,0 +1,38 @@ +/** @file=0D +=0D + Blob verification library=0D +=0D + This library class allows verifiying whether blobs from external sources= =0D + (such as QEMU's firmware config) are trusted.=0D +=0D + Copyright (C) 2021, IBM Corporation=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#ifndef BLOB_VERIFIER_LIB_H__=0D +#define BLOB_VERIFIER_LIB_H__=0D +=0D +#include <Uefi/UefiBaseType.h>=0D +#include <Base.h>=0D +=0D +/**=0D + Verify blob from an external source.=0D +=0D + @param[in] BlobName The name of the blob=0D + @param[in] Buf The data of the blob=0D + @param[in] BufSize The size of the blob in bytes=0D +=0D + @retval EFI_SUCCESS The blob was verified successfully.=0D + @retval EFI_ACCESS_DENIED The blob could not be verified, and theref= ore=0D + should be considered non-secure.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +VerifyBlob (=0D + IN CONST CHAR16 *BlobName,=0D + IN CONST VOID *Buf,=0D + IN UINT32 BufSize=0D + );=0D +=0D +#endif=0D diff --git a/OvmfPkg/Library/BlobVerifierLib/BlobVerifierNull.c b/OvmfPkg/L= ibrary/BlobVerifierLib/BlobVerifierNull.c new file mode 100644 index 000000000000..975d4dd52f80 --- /dev/null +++ b/OvmfPkg/Library/BlobVerifierLib/BlobVerifierNull.c @@ -0,0 +1,33 @@ +/** @file=0D +=0D + Null implementation of the blob verifier library.=0D +=0D + Copyright (C) 2021, IBM Corporation=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#include <Library/BaseLib.h>=0D +#include <Library/BlobVerifierLib.h>=0D +=0D +/**=0D + Verify blob from an external source.=0D +=0D + @param[in] BlobName The name of the blob=0D + @param[in] Buf The data of the blob=0D + @param[in] BufSize The size of the blob in bytes=0D +=0D + @retval EFI_SUCCESS The blob was verified successfully.=0D + @retval EFI_ACCESS_DENIED The blob could not be verified, and theref= ore=0D + should be considered non-secure.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +VerifyBlob (=0D + IN CONST CHAR16 *BlobName,=0D + IN CONST VOID *Buf,=0D + IN UINT32 BufSize=0D + )=0D +{=0D + return EFI_SUCCESS;=0D +}=0D --=20 2.25.1
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[PATCH v4 11/11] OvmfPkg/AmdSev: Enforce hash verification of kernel blobs
Dov Murik
In the AmdSevX64 build, use BlobVerifierLibSevHashes to enforce
verification of hashes of the kernel/initrd/cmdline blobs fetched from firmware config. This allows for secure (measured) boot of SEV guests with QEMU's -kernel/-initrd/-append switches (with the corresponding QEMU support for injecting the hashes table into initial measured guest memory). Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: Dov Murik <dovmurik@...> Reviewed-by: Tom Lendacky <thomas.lendacky@...> --- OvmfPkg/AmdSev/AmdSevX64.dsc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index b2cc96cc5a97..c01599ea354f 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -173,7 +173,7 @@ [LibraryClasses] LockBoxLib|OvmfPkg/Library/LockBoxLib/LockBoxBaseLib.inf=0D CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf=0D FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltL= ib.inf=0D - BlobVerifierLib|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf= =0D + BlobVerifierLib|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes= .inf=0D =0D !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE=0D PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDeb= ug/PeCoffExtraActionLibDebug.inf=0D @@ -696,7 +696,7 @@ [Components] }=0D OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf {=0D <LibraryClasses>=0D - NULL|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf=0D + NULL|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibSevHashes.inf=0D }=0D OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf=0D OvmfPkg/Virtio10Dxe/Virtio10.inf=0D --=20 2.25.1
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[PATCH v4 03/11] OvmfPkg: PlatformBootManagerLibGrub: Allow executing kernel via fw_cfg
Dov Murik
From: James Bottomley <jejb@...>
Support QEMU's -kernel option. Create a QemuKernel.c for PlatformBootManagerLibGrub which is an exact copy of the file PlatformBootManagerLib/QemuKernel.c . Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: James Bottomley <jejb@...> Reviewed-by: Brijesh Singh <brijesh.singh@...> --- OvmfPkg/AmdSev/AmdSevX64.dsc = | 1 + OvmfPkg/Library/PlatformBootManagerLibGrub/PlatformBootManagerLibGrub.inf = | 2 ++ OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h = | 11 +++++++++++ OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.c = | 5 +++++ OvmfPkg/Library/{PlatformBootManagerLib =3D> PlatformBootManagerLibGrub}/Q= emuKernel.c | 0 5 files changed, 19 insertions(+) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index a2f1324c40a6..aefdcf881c99 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -281,6 +281,7 @@ [LibraryClasses.common.PEIM] CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuE= xceptionHandlerLib.inf=0D MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf=0D QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf= =0D + QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoad= ImageLib.inf=0D PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf=0D QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf=0D =0D diff --git a/OvmfPkg/Library/PlatformBootManagerLibGrub/PlatformBootManager= LibGrub.inf b/OvmfPkg/Library/PlatformBootManagerLibGrub/PlatformBootManage= rLibGrub.inf index 9a806d17ec45..5f6f73d18470 100644 --- a/OvmfPkg/Library/PlatformBootManagerLibGrub/PlatformBootManagerLibGrub= .inf +++ b/OvmfPkg/Library/PlatformBootManagerLibGrub/PlatformBootManagerLibGrub= .inf @@ -23,6 +23,7 @@ [Defines] =0D [Sources]=0D BdsPlatform.c=0D + QemuKernel.c=0D PlatformData.c=0D BdsPlatform.h=0D =0D @@ -46,6 +47,7 @@ [LibraryClasses] BootLogoLib=0D DevicePathLib=0D PciLib=0D + QemuLoadImageLib=0D UefiLib=0D PlatformBmPrintScLib=0D Tcg2PhysicalPresenceLib=0D diff --git a/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h b/Ovm= fPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h index 748c63081920..f1d3a2906c00 100644 --- a/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h +++ b/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h @@ -172,4 +172,15 @@ PlatformInitializeConsole ( IN PLATFORM_CONSOLE_CONNECT_ENTRY *PlatformConsole=0D );=0D =0D +/**=0D + Loads and boots UEFI Linux via the FwCfg interface.=0D +=0D + @retval EFI_NOT_FOUND - The Linux kernel was not found=0D +=0D +**/=0D +EFI_STATUS=0D +TryRunningQemuKernel (=0D + VOID=0D + );=0D +=0D #endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_=0D diff --git a/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.c b/Ovm= fPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.c index 5c92d4fc2b09..7cceeea4879c 100644 --- a/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.c +++ b/OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.c @@ -1315,6 +1315,11 @@ PlatformBootManagerAfterConsole ( //=0D Tcg2PhysicalPresenceLibProcessRequest (NULL);=0D =0D + //=0D + // Process QEMU's -kernel command line option=0D + //=0D + TryRunningQemuKernel ();=0D +=0D //=0D // Perform some platform specific connect sequence=0D //=0D diff --git a/OvmfPkg/Library/PlatformBootManagerLib/QemuKernel.c b/OvmfPkg/= Library/PlatformBootManagerLibGrub/QemuKernel.c similarity index 100% copy from OvmfPkg/Library/PlatformBootManagerLib/QemuKernel.c copy to OvmfPkg/Library/PlatformBootManagerLibGrub/QemuKernel.c --=20 2.25.1
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[PATCH v4 06/11] ArmVirtPkg: add BlobVerifierLibNull to DSC
Dov Murik
This prepares the ground for calling VerifyBlob() in
QemuKernelLoaderFsDxe. Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Leif Lindholm <leif@...> Cc: Sami Mujawar <sami.mujawar@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: Dov Murik <dovmurik@...> --- ArmVirtPkg/ArmVirtQemu.dsc | 5 ++++- ArmVirtPkg/ArmVirtQemuKernel.dsc | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index 7ef5e7297bc7..bf8bb1ec9578 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -440,7 +440,10 @@ [Components.common] NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf=0D NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf=0D }=0D - OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf=0D + OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf {=0D + <LibraryClasses>=0D + NULL|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf=0D + }=0D =0D #=0D # Networking stack=0D diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKerne= l.dsc index a542fcb157e9..af34cb47a12d 100644 --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc @@ -376,7 +376,10 @@ [Components.common] NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf=0D NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf=0D }=0D - OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf=0D + OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf {=0D + <LibraryClasses>=0D + NULL|OvmfPkg/Library/BlobVerifierLib/BlobVerifierLibNull.inf=0D + }=0D =0D #=0D # Networking stack=0D --=20 2.25.1
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[PATCH v4 09/11] OvmfPkg/AmdSev: reserve MEMFD space for for firmware config hashes
Dov Murik
From: James Bottomley <jejb@...>
Split the existing 4KB page reserved for SEV launch secrets into two parts: first 3KB for SEV launch secrets and last 1KB for firmware config hashes. The area of the firmware config hashes will be attested (measured) by the PSP and thus the untrusted VMM can't pass in different files from what the guest owner allows. Declare this in the Reset Vector table using GUID 7255371f-3a3b-4b04-927b-1da6efa8d454 and a uint32_t table of a base and size value (similar to the structure used to declare the launch secret block). Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Co-developed-by: Dov Murik <dovmurik@...> Signed-off-by: Dov Murik <dovmurik@...> Signed-off-by: James Bottomley <jejb@...> Reviewed-by: Tom Lendacky <thomas.lendacky@...> Reviewed-by: Brijesh Singh <brijesh.singh@...> --- OvmfPkg/OvmfPkg.dec | 6 ++++++ OvmfPkg/AmdSev/AmdSevX64.fdf | 5 ++++- OvmfPkg/ResetVector/ResetVector.inf | 2 ++ OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 20 ++++++++++++++++++++ OvmfPkg/ResetVector/ResetVector.nasmb | 2 ++ 5 files changed, 34 insertions(+), 1 deletion(-) diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index f82228d69cc2..2ab27f0c73c2 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -324,6 +324,12 @@ [PcdsFixedAtBuild] gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42=0D gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43=0D =0D + ## The base address and size of a hash table confirming allowed=0D + # parameters to be passed in via the Qemu firmware configuration=0D + # device=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48=0D +=0D [PcdsDynamic, PcdsDynamicEx]=0D gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2=0D gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x1= 0=0D diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf index 9977b0f00a18..0a89749700c3 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.fdf +++ b/OvmfPkg/AmdSev/AmdSevX64.fdf @@ -59,9 +59,12 @@ [FD.MEMFD] 0x00B000|0x001000=0D gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpaceGuid.P= cdSevEsWorkAreaSize=0D =0D -0x00C000|0x001000=0D +0x00C000|0x000C00=0D gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGu= id.PcdSevLaunchSecretSize=0D =0D +0x00CC00|0x000400=0D +gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid= .PcdQemuHashTableSize=0D +=0D 0x00D000|0x001000=0D gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecGhcbBackupSize=0D =0D diff --git a/OvmfPkg/ResetVector/ResetVector.inf b/OvmfPkg/ResetVector/Rese= tVector.inf index dc38f68919cd..d028c92d8cfa 100644 --- a/OvmfPkg/ResetVector/ResetVector.inf +++ b/OvmfPkg/ResetVector/ResetVector.inf @@ -47,3 +47,5 @@ [Pcd] [FixedPcd]=0D gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase=0D gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase=0D + gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize=0D diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVe= ctor/Ia16/ResetVectorVtf0.asm index 9c0b5853a46f..7ec3c6e980c3 100644 --- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm @@ -47,7 +47,27 @@ TIMES (15 - ((guidedStructureEnd - guidedStructureStart = + 15) % 16)) DB 0 ;=0D guidedStructureStart:=0D =0D +; SEV Hash Table Block=0D ;=0D +; This describes the guest ram area where the hypervisor should=0D +; install a table describing the hashes of certain firmware configuration= =0D +; device files that would otherwise be passed in unchecked. The current=0D +; use is for the kernel, initrd and command line values, but others may be= =0D +; added. The data format is:=0D +;=0D +; base physical address (32 bit word)=0D +; table length (32 bit word)=0D +;=0D +; GUID (SEV FW config hash block): 7255371f-3a3b-4b04-927b-1da6efa8d454=0D +;=0D +sevFwHashBlockStart:=0D + DD SEV_FW_HASH_BLOCK_BASE=0D + DD SEV_FW_HASH_BLOCK_SIZE=0D + DW sevFwHashBlockEnd - sevFwHashBlockStart=0D + DB 0x1f, 0x37, 0x55, 0x72, 0x3b, 0x3a, 0x04, 0x4b=0D + DB 0x92, 0x7b, 0x1d, 0xa6, 0xef, 0xa8, 0xd4, 0x54=0D +sevFwHashBlockEnd:=0D +=0D ; SEV Secret block=0D ;=0D ; This describes the guest ram area where the hypervisor should=0D diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/Re= setVector.nasmb index 5fbacaed5f9d..8d0bab02f8cb 100644 --- a/OvmfPkg/ResetVector/ResetVector.nasmb +++ b/OvmfPkg/ResetVector/ResetVector.nasmb @@ -88,5 +88,7 @@ %define SEV_ES_AP_RESET_IP FixedPcdGet32 (PcdSevEsWorkAreaBase)=0D %define SEV_LAUNCH_SECRET_BASE FixedPcdGet32 (PcdSevLaunchSecretBase)=0D %define SEV_LAUNCH_SECRET_SIZE FixedPcdGet32 (PcdSevLaunchSecretSize)=0D + %define SEV_FW_HASH_BLOCK_BASE FixedPcdGet32 (PcdQemuHashTableBase)=0D + %define SEV_FW_HASH_BLOCK_SIZE FixedPcdGet32 (PcdQemuHashTableSize)=0D %include "Ia16/ResetVectorVtf0.asm"=0D =0D --=20 2.25.1
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[PATCH v4 08/11] OvmfPkg/AmdSev/SecretPei: build hob for full page
Dov Murik
Round up the size of the SEV launch secret area to a whole page, as
required by BuildMemoryAllocationHob. This will allow the secret area defined in the MEMFD to take less than a whole 4KB page. Cc: Ard Biesheuvel <ardb+tianocore@...> Cc: Jordan Justen <jordan.l.justen@...> Cc: Ashish Kalra <ashish.kalra@...> Cc: Brijesh Singh <brijesh.singh@...> Cc: Erdem Aktas <erdemaktas@...> Cc: James Bottomley <jejb@...> Cc: Jiewen Yao <jiewen.yao@...> Cc: Min Xu <min.m.xu@...> Cc: Tom Lendacky <thomas.lendacky@...> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3457 Signed-off-by: Dov Murik <dovmurik@...> Reviewed-by: Tom Lendacky <thomas.lendacky@...> Reviewed-by: Brijesh Singh <brijesh.singh@...> --- OvmfPkg/AmdSev/SecretPei/SecretPei.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/OvmfPkg/AmdSev/SecretPei/SecretPei.c b/OvmfPkg/AmdSev/SecretPe= i/SecretPei.c index ad491515dd5d..db94c26b54d1 100644 --- a/OvmfPkg/AmdSev/SecretPei/SecretPei.c +++ b/OvmfPkg/AmdSev/SecretPei/SecretPei.c @@ -4,6 +4,7 @@ Copyright (C) 2020 James Bottomley, IBM Corporation.=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D **/=0D +#include <Base.h>=0D #include <PiPei.h>=0D #include <Library/HobLib.h>=0D #include <Library/PcdLib.h>=0D @@ -17,7 +18,7 @@ InitializeSecretPei ( {=0D BuildMemoryAllocationHob (=0D PcdGet32 (PcdSevLaunchSecretBase),=0D - PcdGet32 (PcdSevLaunchSecretSize),=0D + ALIGN_VALUE (PcdGet32 (PcdSevLaunchSecretSize), EFI_PAGE_SIZE),=0D EfiBootServicesData=0D );=0D =0D --=20 2.25.1
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