Date   

[PATCH v3 2/3] Acpi: Install Acpi tables for Cloud hypervisor

Jianyong Wu
 

There is no device like Fw-cfg in Qemu in Cloud Hypervisor, so a specific
Acpi handler is introduced here.

The handler implemented here is in a very simple way:
1. acquire the RSDP from the PCD variable in the top ".dsc";
2. get the XSDT address from RSDP structure;
3. get the ACPI tables following the XSDT structure and install them
one by one;
4. get DSDT address from FADT and install DSDT table.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
---
ArmVirtPkg/ArmVirtPkg.dec | 6 +
.../CloudHvAcpiPlatformDxe.inf | 47 ++++++
.../CloudHvAcpiPlatformDxe/CloudHvAcpi.c | 141 ++++++++++++++++++
3 files changed, 194 insertions(+)
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index bf82f7f1f3f2..4e4d758015bc 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -66,6 +66,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
#
gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}|VOID*|0x00000007

+ ##
+ # This is the physical address of Rsdp which is the core struct of Acpi.
+ # Cloud Hypervisor has no other way to pass Rsdp address to the guest except use a PCD.
+ #
+ gArmVirtTokenSpaceGuid.PcdCloudHvAcpiRsdpBaseAddress|0x0|UINT64|0x00000005
+
[PcdsDynamic]
#
# Whether to force disable ACPI, regardless of the fw_cfg settings
diff --git a/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
new file mode 100644
index 000000000000..01de76486686
--- /dev/null
+++ b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
@@ -0,0 +1,47 @@
+## @file
+# ACPI Platform Driver for Cloud Hypervisor
+#
+# Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CloudHvgAcpiPlatform
+ FILE_GUID = 6c76e407-73f2-dc1c-938f-5d6c4691ea93
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = CloudHvAcpiPlatformEntryPoint
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+ VALID_ARCHITECTURES = AARCH64
+#
+
+[Sources]
+ CloudHvAcpi.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ OvmfPkg/OvmfPkg.dec
+ ArmVirtPkg/ArmVirtPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ MemoryAllocationLib
+ OrderedCollectionLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Pcd]
+ gArmVirtTokenSpaceGuid.PcdCloudHvAcpiRsdpBaseAddress
+
+[Depex]
+ gEfiAcpiTableProtocolGuid
diff --git a/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
new file mode 100644
index 000000000000..0f1a50d63cd6
--- /dev/null
+++ b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
@@ -0,0 +1,141 @@
+/** @file
+ Install Acpi tables for Cloud Hypervisor
+
+ Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <IndustryStandard/Acpi63.h>
+#include <Protocol/AcpiTable.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/DebugLib.h>
+
+/**
+ Find Acpi table Protocol and return it
+**/
+STATIC
+EFI_ACPI_TABLE_PROTOCOL *
+FindAcpiTableProtocol (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID**)&AcpiTable
+ );
+ ASSERT_EFI_ERROR (Status);
+ return AcpiTable;
+}
+
+/** Install Acpi tables for Cloud Hypervisor
+
+ @param [in] AcpiProtocol Acpi Protocol which is used to install Acpi talbles
+
+ @return EFI_SUCCESS The table was successfully inserted.
+ @return EFI_INVALID_PARAMETER Either AcpiTableBuffer is NULL, TableKey is NULL, or AcpiTableBufferSize
+ and the size field embedded in the ACPI table pointed to by AcpiTableBuffer
+ are not in sync.
+ @return EFI_OUT_OF_RESOURCES Insufficient resources exist to complete the request.
+ @retval EFI_ACCESS_DENIED The table signature matches a table already
+ present in the system and platform policy
+ does not allow duplicate tables of this type.
+**/
+EFI_STATUS
+EFIAPI
+InstallCloudHvAcpiTables (
+ IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
+ )
+{
+ UINTN InstalledKey, TableSize, AcpiTableLength;
+ UINT64 RsdpPtr, XsdtPtr, TableOffset, AcpiTablePtr, DsdtPtr = ~0;
+ EFI_STATUS Status = EFI_SUCCESS;
+ BOOLEAN GotFacp = FALSE;
+
+ RsdpPtr = PcdGet64 (PcdCloudHvAcpiRsdpBaseAddress);
+ XsdtPtr = ((EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER *) RsdpPtr)->XsdtAddress;
+ AcpiTableLength = ((EFI_ACPI_COMMON_HEADER *) XsdtPtr)->Length;
+ TableOffset = sizeof (EFI_ACPI_DESCRIPTION_HEADER);
+
+ while (!EFI_ERROR(Status)
+ && (TableOffset < AcpiTableLength))
+ {
+ AcpiTablePtr = *(UINT64 *) (XsdtPtr + TableOffset);
+ TableSize = ((EFI_ACPI_COMMON_HEADER *) AcpiTablePtr)->Length;
+
+ //
+ // Install ACPI tables from XSDT
+ //
+ Status = AcpiProtocol->InstallAcpiTable (
+ AcpiProtocol,
+ (VOID *)(UINT64)AcpiTablePtr,
+ TableSize,
+ &InstalledKey
+ );
+
+ TableOffset += sizeof (UINT64);
+
+ //
+ // Get DSDT from FADT
+ //
+ if (!GotFacp
+ && !AsciiStrnCmp ((CHAR8 *) &((EFI_ACPI_COMMON_HEADER *) AcpiTablePtr)->Signature, "FACP", 4))
+ {
+ DsdtPtr = ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) AcpiTablePtr)->XDsdt;
+ GotFacp = TRUE;
+ }
+ }
+
+ if (DsdtPtr == ~0) {
+ DEBUG ((DEBUG_ERROR, "%a: no DSDT found\n", __FUNCTION__));
+ ASSERT (FALSE);
+ CpuDeadLoop ();
+ }
+
+ //
+ // Install DSDT table
+ //
+ TableSize = ((EFI_ACPI_COMMON_HEADER *) DsdtPtr)->Length;
+ Status = AcpiProtocol->InstallAcpiTable (
+ AcpiProtocol,
+ (VOID *)(UINT64) DsdtPtr,
+ TableSize,
+ &InstalledKey
+ );
+
+ return Status;
+}
+
+/** Entry point for Cloud Hypervisor Platform Dxe
+
+ @param [in] ImageHandle Handle for this image.
+ @param [in] SystemTable Pointer to the EFI system table.
+
+ @return EFI_SUCCESS The table was successfully inserted.
+ @return EFI_INVALID_PARAMETER Either AcpiTableBuffer is NULL, TableKey is NULL, or AcpiTableBufferSize
+ and the size field embedded in the ACPI table pointed to by AcpiTableBuffer
+ are not in sync.
+ @return EFI_OUT_OF_RESOURCES Insufficient resources exist to complete the request.
+ @retval EFI_ACCESS_DENIED The table signature matches a table already
+ present in the system and platform policy
+ does not allow duplicate tables of this type.
+**/
+EFI_STATUS
+EFIAPI
+CloudHvAcpiPlatformEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = InstallCloudHvAcpiTables (FindAcpiTableProtocol ());
+ return Status;
+}
--
2.17.1


[PATCH v3 0/3] Enable Cloud Hypervisor support in edk2

Jianyong Wu
 

Cloud Hypervisor is an open source Virtual Machine Monitor (VMM) that
runs on top of KVM. Cloud Hypervisor is implemented in Rust and is based
on the rust-vmm crates. See [1] to find more.

To support UEFI, Cloud Hypervisor is introduced here.
There are 2 parts to be considered to do this enablement, that is:
1. specific ACPI service implementation compared with qemu, there is no
device like Fw-cfg, so we have no elegant way to get the RSDP address.
A specific ACPI implementation is introduced here.

2. build configuration file for Cloud Hypervisor

Change log:

v2 to v3:
(1) reuse qemu's memory initialization lib as they are in nearly the same
memory laout.
(2) split Acpi implemetation into PlatformHasAcpi and
InstallAcpiTable.
(3) remove lots of dependencies from qemu like "*Fwcfg*" lib.
(4) lots of code cleanup work to let it more approach to edk2 code
style.

[1] https://github.com/cloud-hypervisor/cloud-hypervisor

Jianyong Wu (3):
Acpi: reimplement PlatformHasAcpi for Cloud Hypervisor
Acpi: Install Acpi tables for Cloud hypervisor
ArmVirtCloudHv: support Cloud Hypervisor in edk2

ArmVirtPkg/ArmVirtPkg.dec | 6 +
ArmVirtPkg/ArmVirtCloudHv.dsc | 397 ++++++++++++++++++
ArmVirtPkg/ArmVirtCloudHv.fdf | 274 ++++++++++++
.../CloudHvAcpiPlatformDxe.inf | 47 +++
.../CloudHvHasAcpiDtDxe.inf | 43 ++
.../CloudHvAcpiPlatformDxe/CloudHvAcpi.c | 140 ++++++
.../CloudHvHasAcpiDtDxe.c | 69 +++
7 files changed, 976 insertions(+)
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c

--
2.17.1


[PATCH v3 3/3] ArmVirtCloudHv: support Cloud Hypervisor in edk2

Jianyong Wu
 

Cloud Hypervisor is KVM based VMM and is implemented in rust. Just like
other VMMs it needs UEFI support to let ACPI work. That is why
Cloud Hypervisor is introduced here.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
---
ArmVirtPkg/ArmVirtCloudHv.dsc | 397 ++++++++++++++++++++++++++++++++++
ArmVirtPkg/ArmVirtCloudHv.fdf | 274 +++++++++++++++++++++++
2 files changed, 671 insertions(+)
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc
create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
new file mode 100644
index 000000000000..0d811971aad7
--- /dev/null
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -0,0 +1,397 @@
+#
+# Copyright (c) 2021, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmVirtCloudHv
+ PLATFORM_GUID = DFFED32B-DFFE-D32B-DFFE-D32BDFFED32B
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/ArmVirtCloudHv-$(ARCH)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = DEBUG|RELEASE|NOOPT
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = ArmVirtPkg/ArmVirtCloudHv.fdf
+
+ #
+ # Defines for default states. These can be changed on the command line.
+ # -D FLAG=VALUE
+ #
+ DEFINE TTY_TERMINAL = FALSE
+ DEFINE SECURE_BOOT_ENABLE = FALSE
+ DEFINE TPM2_ENABLE = FALSE
+ DEFINE TPM2_CONFIG_ENABLE = FALSE
+
+!include ArmVirtPkg/ArmVirt.dsc.inc
+
+[LibraryClasses.common]
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+ # Virtio Support
+ VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
+ VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
+
+ ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
+
+ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+ PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+ FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
+ QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+ PciPcdProducerLib|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
+ PciHostBridgeLib|ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf
+ PciHostBridgeUtilityLib|ArmVirtPciHostBridgeUtilityLib/ArmVirtPciHostBridgeUtilityLib.inf
+
+!if $(TPM2_ENABLE) == TRUE
+ Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf
+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+!else
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+!endif
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses.common.PEIM]
+ ArmVirtMemInfoLib|ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf
+
+!if $(TPM2_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+ ResetSystemLib|MdeModulePkg/Library/PeiResetSystemLib/PeiResetSystemLib.inf
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2DeviceLibDTpm.inf
+!endif
+
+[LibraryClasses.common.DXE_DRIVER]
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+
+[BuildOptions]
+!include NetworkPkg/NetworkBuildOptions.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+ ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
+ # It could be set FALSE to save size.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+
+ gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|$(TPM2_ENABLE)
+
+[PcdsFixedAtBuild.common]
+!if $(ARCH) == AARCH64
+ gArmTokenSpaceGuid.PcdVFPEnabled|1
+!endif
+
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x4007c000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+
+ # Rsdp base address in Cloud Hypervisor
+ gArmVirtTokenSpaceGuid.PcdCloudHvAcpiRsdpBaseAddress|0x40200000
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x4000000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x40000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
+!if $(NETWORK_TLS_ENABLE) == TRUE
+ #
+ # The cumulative and individual VOLATILE variable size limits should be set
+ # high enough for accommodating several and/or large CA certificates.
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x80000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVolatileVariableSize|0x40000
+!endif
+
+ # Size of the region used by UEFI in permanent memory (Reserved 64MB)
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
+
+ #
+ # ARM PrimeCell
+ #
+
+ ## PL011 - Serial Terminal
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
+
+ ## Default Terminal Type
+ ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
+
+ # System Memory Base -- fixed at 0x4000_0000
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000
+
+ # initial location of the device tree blob passed by Cloud Hypervisor -- base of DRAM
+ gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x40000000
+
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+
+ #
+ # The maximum physical I/O addressability of the processor, set with
+ # BuildCpuHob().
+ #
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
+
+ #
+ # Enable the non-executable DXE stack. (This gets set up by DxeIpl)
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot
+ gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
+!endif
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|3
+ gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize|0x20000
+
+[PcdsFixedAtBuild.AARCH64]
+ # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point,
+ # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the
+ # presence of the 32-bit entry point anyway (because many AARCH64 systems
+ # don't have 32-bit addressable physical RAM), and the additional allocations
+ # below 4 GB needlessly fragment the memory map. So expose the 64-bit entry
+ # point only, for entry point versions >= 3.0.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
+
+[PcdsDynamicDefault.common]
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
+
+ ## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI
+ # enumeration to complete before installing ACPI tables.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
+
+ # System Memory Size -- 1 MB initially, actual size will be fetched from DT
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x00100000
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
+
+ #
+ # ARM General Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
+
+ ## PL031 RealTimeClock
+ gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
+
+ # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this
+ # PCD and PcdPciDisableBusEnumeration above have not been assigned yet
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF
+
+ gArmTokenSpaceGuid.PcdPciIoTranslation|0
+
+ #
+ # TPM2 support
+ #
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0
+!if $(TPM2_ENABLE) == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0
+!endif
+
+[PcdsDynamicHii]
+ gArmVirtTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gArmVirtVariableGuid|0x0|FALSE|NV,BS
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ #
+ # PEI Phase modules
+ #
+ ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+ MdeModulePkg/Core/Pei/PeiMain.inf
+ MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+ ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+ ArmPkg/Drivers/CpuPei/CpuPei.inf
+
+ MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+
+!if $(TPM2_ENABLE) == TRUE
+ MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf {
+ <LibraryClasses>
+ ResetSystemLib|ArmVirtPkg/Library/ArmVirtPsciResetSystemPeiLib/ArmVirtPsciResetSystemPeiLib.inf
+ }
+!endif
+
+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ }
+
+ #
+ # DXE
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ }
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+
+ #
+ # Architectural Protocols
+ #
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ # don't use unaligned CopyMem () on the UEFI varstore NOR flash region
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ }
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
+ <LibraryClasses>
+ NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
+!if $(TPM2_ENABLE) == TRUE
+ NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf
+!endif
+ }
+ SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+ OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf
+!else
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+!endif
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf {
+ <LibraryClasses>
+ NULL|ArmVirtPkg/Library/ArmVirtPL031FdtClientLib/ArmVirtPL031FdtClientLib.inf
+ }
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf {
+ <LibraryClasses>
+ NULL|ArmVirtPkg/Library/ArmVirtTimerFdtClientLib/ArmVirtTimerFdtClientLib.inf
+ }
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ #
+ # Status Code Routing
+ #
+ MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+
+ #
+ # Platform Driver
+ #
+ ArmVirtPkg/VirtioFdtDxe/VirtioFdtDxe.inf
+ ArmVirtPkg/FdtClientDxe/FdtClientDxe.inf
+ ArmVirtPkg/HighMemDxe/HighMemDxe.inf
+ OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
+ OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
+ OvmfPkg/VirtioNetDxe/VirtioNet.inf
+ OvmfPkg/VirtioRngDxe/VirtioRng.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs
+ #
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ FatPkg/EnhancedFatDxe/Fat.inf
+ MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf
+ OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf
+
+ #
+ # Bds
+ #
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf {
+ <LibraryClasses>
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ MdeModulePkg/Logo/LogoDxe.inf
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+
+ #
+ # SCSI Bus and Disk Driver
+ #
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+
+ #
+ # PCI support
+ #
+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
+ <LibraryClasses>
+ NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ }
+ MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf {
+ <LibraryClasses>
+ NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ }
+ OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
+ OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
+ OvmfPkg/Virtio10Dxe/Virtio10.inf
+
+ #
+ # ACPI Support
+ #
+ ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
+[Components.AARCH64]
+ MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+ ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf {
+ <LibraryClasses>
+ NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ }
diff --git a/ArmVirtPkg/ArmVirtCloudHv.fdf b/ArmVirtPkg/ArmVirtCloudHv.fdf
new file mode 100644
index 000000000000..47243113409b
--- /dev/null
+++ b/ArmVirtPkg/ArmVirtCloudHv.fdf
@@ -0,0 +1,274 @@
+#
+# Copyright (c) 2021, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[Defines]
+!if $(FD_SIZE_IN_MB) == 2
+ DEFINE FVMAIN_COMPACT_SIZE = 0x1ff000
+!endif
+!if $(FD_SIZE_IN_MB) == 3
+ DEFINE FVMAIN_COMPACT_SIZE = 0x2ff000
+!endif
+
+[FD.CLOUDHV_EFI]
+BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # cloud-hypervisor assigns 0 - 0x8000000 for a BootROM
+Size = $(FD_SIZE)|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize = 0x00001000
+NumBlocks = $(FD_NUM_BLOCKS)
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+#
+# UEFI has trouble dealing with FVs that reside at physical address 0x0.
+# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the
+# real FV at offset 0x1000
+#
+0x00000000|0x00001000
+DATA = {
+!if $(ARCH) == AARCH64
+ 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM
+!else
+ 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM
+!endif
+}
+
+0x00001000|$(FVMAIN_COMPACT_SIZE)
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+!include VarStore.fdf.inc
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+FvNameGuid = 2A88A00E-E267-C8BF-0E80-AE1BD504ED90
+BlockSize = 0x40
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 16 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+ INF ArmVirtPkg/VirtioFdtDxe/VirtioFdtDxe.inf
+ INF ArmVirtPkg/FdtClientDxe/FdtClientDxe.inf
+ INF ArmVirtPkg/HighMemDxe/HighMemDxe.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+!endif
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ #
+ # Multiple Console IO support
+ #
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf
+ INF OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf
+
+ #
+ # Status Code Routing
+ #
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+
+ #
+ # Platform Driver
+ #
+ INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
+ INF OvmfPkg/VirtioNetDxe/VirtioNet.inf
+ INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
+ INF OvmfPkg/VirtioRngDxe/VirtioRng.inf
+
+ #
+ # UEFI application (Shell Embedded Boot Loader)
+ #
+ INF ShellPkg/Application/Shell/Shell.inf
+ INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
+ INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf
+ INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf
+
+ #
+ # Bds
+ #
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+
+ #
+ # SCSI Bus and Disk Driver
+ #
+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+
+ #
+ # ACPI Support
+ #
+ INF ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
+!if $(ARCH) == AARCH64
+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+ INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+ INF ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
+
+ #
+ # EBC support
+ #
+ INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+!endif
+
+ #
+ # PCI support
+ #
+ INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+ INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+ INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
+ INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
+ INF OvmfPkg/Virtio10Dxe/Virtio10.inf
+
+ #
+ # TPM2 support
+ #
+!if $(TPM2_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
+!if $(TPM2_CONFIG_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
+!endif
+!endif
+
+ #
+ # TianoCore logo (splash screen)
+ #
+ INF MdeModulePkg/Logo/LogoDxe.inf
+
+ #
+ # Ramdisk support
+ #
+ INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf
+
+[FV.FVMAIN_COMPACT]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+ INF MdeModulePkg/Core/Pei/PeiMain.inf
+ INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+ INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+ INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+ INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+!if $(TPM2_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf
+ INF OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
+ INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
+!endif
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ }
+
+!include ArmVirtRules.fdf.inc
--
2.17.1


[PATCH v3 1/3] Acpi: reimplement PlatformHasAcpi for Cloud Hypervisor

Jianyong Wu
 

The current implementation of PlatformHasAcpiDt is not a common
library and is on behalf of qemu. So give a specific version for
Cloud Hypervisor here.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
---
.../CloudHvHasAcpiDtDxe.inf | 43 ++++++++++++
.../CloudHvHasAcpiDtDxe.c | 69 +++++++++++++++++++
2 files changed, 112 insertions(+)
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c

diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
new file mode 100644
index 000000000000..eb63a4136545
--- /dev/null
+++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
@@ -0,0 +1,43 @@
+## @file
+# Decide whether the firmware should expose an ACPI- and/or a Device Tree-based
+# hardware description to the operating system.
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+ INF_VERSION = 1.25
+ BASE_NAME = CloudHvPlatformHasAcpiDtDxe
+ FILE_GUID = 71fe72f9-6dc1-199d-5054-13b4200ee88d
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = PlatformHasAcpiDt
+
+[Sources]
+ CloudHvHasAcpiDtDxe.c
+
+[Packages]
+ ArmVirtPkg/ArmVirtPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ PcdLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Guids]
+ gEdkiiPlatformHasAcpiGuid ## SOMETIMES_PRODUCES ## PROTOCOL
+ gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
+
+[Pcd]
+ gArmVirtTokenSpaceGuid.PcdForceNoAcpi
+
+[Depex]
+ gEfiVariableArchProtocolGuid
diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c
new file mode 100644
index 000000000000..48a446c68a45
--- /dev/null
+++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c
@@ -0,0 +1,69 @@
+/** @file
+ Decide whether the firmware should expose an ACPI- and/or a Device Tree-based
+ hardware description to the operating system.
+
+ Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Guid/PlatformHasAcpi.h>
+#include <Guid/PlatformHasDeviceTree.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+EFI_STATUS
+EFIAPI
+PlatformHasAcpiDt (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // If we fail to install any of the necessary protocols below, the OS will be
+ // unbootable anyway (due to lacking hardware description), so tolerate no
+ // errors here.
+ //
+ if (MAX_UINTN == MAX_UINT64 &&
+ !PcdGetBool (PcdForceNoAcpi))
+ {
+ Status = gBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEdkiiPlatformHasAcpiGuid,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ goto Failed;
+ }
+
+ return Status;
+ }
+
+ //
+ // Expose the Device Tree otherwise.
+ //
+ Status = gBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEdkiiPlatformHasDeviceTreeGuid,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ goto Failed;
+ }
+
+ return Status;
+
+Failed:
+ ASSERT_EFI_ERROR (Status);
+ CpuDeadLoop ();
+ //
+ // Keep compilers happy.
+ //
+ return Status;
+}
--
2.17.1


[PATCH 1/1] BaseTools: Remove non-ascii character of StructurePcd comment

Yuwei Chen
 

Currently, the ConvertFceToStructurePcd.py tool generate
StructurePcd dsc file with comments from UNI file including
non-ascii character. Following DSC spec, there should not have
non-ascii character in DSC file. This patch removes the non-ascii
character when adding the comment and changes the circle R to (R).

Signed-off-by: Yuwei Chen <yuwei.chen@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
---
BaseTools/Scripts/ConvertFceToStructurePcd.py | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Scripts/ConvertFceToStructurePcd.py b/BaseTools/Scripts/ConvertFceToStructurePcd.py
index 2052db8c4b69..2baabf2dd521 100644
--- a/BaseTools/Scripts/ConvertFceToStructurePcd.py
+++ b/BaseTools/Scripts/ConvertFceToStructurePcd.py
@@ -284,7 +284,15 @@ class Config(object):
line=x.split('\n')[0]
comment_list = value_re.findall(line) # the string \\... in "Q...." line
comment_list[0] = comment_list[0].replace('//', '')
- comment = comment_list[0].strip()
+ comment_ori = comment_list[0].strip()
+ comment = ""
+ for each in comment_ori:
+ if each != " " and "\x21" > each or each > "\x7E":
+ if bytes(each, 'utf-16') == b'\xff\xfe\xae\x00':
+ each = '(R)'
+ else:
+ each = ""
+ comment += each
line=value_re.sub('',line) #delete \\... in "Q...." line
list1=line.split(' ')
value=self.value_parser(list1)
--
2.27.0.windows.1


Re: [PATCH v2 4/8] ShellPkg: Acpiview: IORT parser update for IORT Rev E.b spec

Gao, Zhichao
 

Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>

Thanks,
Zhichao

-----Original Message-----
From: Sami Mujawar <sami.mujawar@arm.com>
Sent: Thursday, June 17, 2021 5:56 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <sami.mujawar@arm.com>; Alexei.Fedorov@arm.com;
steven.price@arm.com; Lorenzo.Pieralisi@arm.com;
Matteo.Carlini@arm.com; Ben.Adderson@arm.com; Ni, Ray
<ray.ni@intel.com>; Gao, Zhichao <zhichao.gao@intel.com>; nd@arm.com
Subject: [PATCH v2 4/8] ShellPkg: Acpiview: IORT parser update for IORT Rev
E.b spec

Bugzilla: 3458 - Add support IORT Rev E.b specification updates
(https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
(https://developer.arm.com/documentation/den0049/)
introduces the following updates, collectively including the updates and
errata fixes to Rev E and Rev E.a:
- increments the IORT table revision to 3.
- updates the node definition to add an 'Identifier' field.
- adds definition of node type 6 - Reserved Memory Range node.
- adds definition for Memory Range Descriptors.
- adds flag to indicate PRI support for root complexes.
- adds flag to indicate if the root complex supports forwarding
of PASID information on translated transactions to the SMMU.

Therefore, update the IORT parser to:
- parse the Identifier field.
- parse Reserved Memory Range node.
- parse Memory Range Descriptors.
- add validations to check that the physical range base
and size of the Memory Range Descriptor is 64KB aligned.
- add validation to check that the ID mapping count is
set to 1.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- No code change since v1. Re-sending with v2 series. [SAMI]

ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c |
196 +++++++++++++++++++-
1 file changed, 191 insertions(+), 5 deletions(-)

diff --git
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
index
fcecaff5134256497bda87241f339076897c3ece..1507dd3a4d79e61024b0c5526e
21ffdacb782251 100644
---
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortPars
+++ er.c
@@ -5,10 +5,12 @@
SPDX-License-Identifier: BSD-2-Clause-Patent

@par Reference(s):
- - IO Remapping Table, Platform Design Document, Revision D, March 2018
+ - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
+ (https://developer.arm.com/documentation/den0049/)

@par Glossary:
- Ref - Reference
+ - Desc - Descriptor
**/

#include <IndustryStandard/IoRemappingTable.h>
@@ -36,6 +38,9 @@ STATIC CONST UINT32* PmuInterruptOffset;

STATIC CONST UINT32* ItsCount;

+STATIC CONST UINT32* RmrMemDescCount;
+STATIC CONST UINT32* RmrMemDescOffset;
+
/**
This function validates the ID Mapping array count for the ITS node.

@@ -100,6 +105,72 @@ ValidateItsIdArrayReference (
}
}

+/**
+ This function validates that the address or length is 64K aligned.
+
+ @param [in] Ptr Pointer to the start of the field data.
+ @param [in] Context Pointer to context specific information e.g. this
+ could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+Validate64KAlignment (
+ IN UINT8* Ptr,
+ IN VOID* Context
+ )
+{
+ UINT64 Address;
+ Address = *(UINT64*)Ptr;
+ if ((Address & (SIZE_64KB - 1)) != 0) {
+ IncrementErrorCount ();
+ Print (L"\nERROR: Value must be 64K aligned.");
+ }
+}
+
+/**
+ This function validates that the RMR memory range descriptor count.
+
+ @param [in] Ptr Pointer to the start of the field data.
+ @param [in] Context Pointer to context specific information e.g. this
+ could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateRmrMemDescCount (
+ IN UINT8* Ptr,
+ IN VOID* Context
+ )
+{
+ if (*(UINT32*)Ptr == 0) {
+ IncrementErrorCount ();
+ Print (L"\nERROR: Memory Range Descriptor count must be >=1.");
+ }
+}
+
+/**
+ This function validates the ID Mapping array count for the Reserved
+ Memory Range (RMR) node.
+
+ @param [in] Ptr Pointer to the start of the field data.
+ @param [in] Context Pointer to context specific information e.g. this
+ could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateRmrIdMappingCount (
+ IN UINT8* Ptr,
+ IN VOID* Context
+ )
+{
+ if (*(UINT32*)Ptr != 1) {
+ IncrementErrorCount ();
+ Print (L"\nERROR: IORT ID Mapping count must be set to 1.");
+ }
+}
+
/**
Helper Macro for populating the IORT Node header in the ACPI_PARSER
array.

@@ -113,7 +184,7 @@ ValidateItsIdArrayReference (
{ L"Type", 1, 0, L"%d", NULL, (VOID**)&IortNodeType, NULL, NULL }, \
{ L"Length", 2, 1, L"%d", NULL, (VOID**)&IortNodeLength, NULL, NULL }, \
{ L"Revision", 1, 3, L"%d", NULL, NULL, NULL, NULL }, \
- { L"Reserved", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, \
+ { L"Identifier", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, \
{ L"Number of ID mappings", 4, 8, L"%d", NULL, \
(VOID**)&IortIdMappingCount, ValidateIdMappingCount, NULL }, \
{ L"Reference to ID Array", 4, 12, L"0x%x", NULL, \
@@ -253,6 +324,29 @@ STATIC CONST ACPI_PARSER IortNodePmcgParser[]
= {
{L"Page 1 Base Address", 8, 32, L"0x%lx", NULL, NULL, NULL, NULL} };

+/**
+ An ACPI_PARSER array describing the IORT RMR node.
+**/
+STATIC CONST ACPI_PARSER IortNodeRmrParser[] = {
+ PARSE_IORT_NODE_HEADER (ValidateRmrIdMappingCount, NULL),
+ {L"Flags", 4, 16, L"0x%x", NULL, NULL, NULL, NULL},
+ {L"Memory Range Desc count", 4, 20, L"%d", NULL,
+ (VOID**)&RmrMemDescCount, ValidateRmrMemDescCount, NULL},
+ {L"Memory Range Desc Ref", 4, 24, L"0x%x", NULL,
+ (VOID**)&RmrMemDescOffset, NULL, NULL} };
+
+/**
+ An ACPI_PARSER array describing the IORT RMR Memory Range Descriptor.
+**/
+STATIC CONST ACPI_PARSER IortNodeRmrMemRangeDescParser[] = {
+ {L"Physical Range offset", 8, 0, L"0x%lx", NULL, NULL,
Validate64KAlignment,
+ NULL},
+ {L"Physical Range length", 8, 8, L"0x%lx", NULL, NULL,
Validate64KAlignment,
+ NULL},
+ {L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL} };
+
/**
This function parses the IORT Node Id Mapping array.

@@ -601,9 +695,93 @@ DumpIortNodePmcg (
);
}

+/**
+ This function parses the IORT RMR Node Memory Range Descriptor array.
+
+ @param [in] Ptr Pointer to the start of the Memory Range Descriptor
+ array.
+ @param [in] Length Length of the buffer.
+ @param [in] DescCount Memory Range Descriptor count.
+**/
+STATIC
+VOID
+DumpIortNodeRmrMemRangeDesc (
+ IN UINT8* Ptr,
+ IN UINT32 Length,
+ IN UINT32 DescCount
+ )
+{
+ UINT32 Index;
+ UINT32 Offset;
+ CHAR8 Buffer[40]; // Used for AsciiName param of ParseAcpi
+
+ Index = 0;
+ Offset = 0;
+
+ while ((Index < DescCount) &&
+ (Offset < Length)) {
+ AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "Mem range Descriptor [%d]",
+ Index
+ );
+ Offset += ParseAcpi (
+ TRUE,
+ 4,
+ Buffer,
+ Ptr + Offset,
+ Length - Offset,
+ PARSER_PARAMS (IortNodeRmrMemRangeDescParser)
+ );
+ Index++;
+ }
+}
+
+/**
+ This function parses the IORT RMR node.
+
+ @param [in] Ptr Pointer to the start of the buffer.
+ @param [in] Length Length of the buffer.
+ @param [in] MappingCount The ID Mapping count.
+ @param [in] MappingOffset The offset of the ID Mapping array
+ from the start of the IORT table.
+**/
+STATIC
+VOID
+DumpIortNodeRmr (
+ IN UINT8* Ptr,
+ IN UINT16 Length,
+ IN UINT32 MappingCount,
+ IN UINT32 MappingOffset
+)
+{
+ ParseAcpi (
+ TRUE,
+ 2,
+ "RMR Node",
+ Ptr,
+ Length,
+ PARSER_PARAMS (IortNodeRmrParser)
+ );
+
+ DumpIortNodeIdMappings (
+ Ptr + MappingOffset,
+ Length - MappingOffset,
+ MappingCount
+ );
+
+ DumpIortNodeRmrMemRangeDesc (
+ Ptr + (*RmrMemDescOffset),
+ Length - (*RmrMemDescOffset),
+ *RmrMemDescCount
+ );
+}
+
/**
This function parses the ACPI IORT table.
- When trace is enabled this function parses the IORT table and traces the
ACPI fields.
+ When trace is enabled this function parses the IORT table and traces
+ the ACPI fields.

This function also parses the following nodes:
- ITS Group
@@ -612,6 +790,7 @@ DumpIortNodePmcg (
- SMMUv1/2
- SMMUv3
- PMCG
+ - RMR

This function also performs validation of the ACPI table fields.

@@ -753,9 +932,16 @@ ParseAcpiIort (
*IortNodeLength,
*IortIdMappingCount,
*IortIdMappingOffset
- );
+ );
+ break;
+ case EFI_ACPI_IORT_TYPE_RMR:
+ DumpIortNodeRmr (
+ NodePtr,
+ *IortNodeLength,
+ *IortIdMappingCount,
+ *IortIdMappingOffset
+ );
break;
-
default:
IncrementErrorCount ();
Print (L"ERROR: Unsupported IORT Node type = %d\n", *IortNodeType);
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


Re: [PATCH v2 3/8] ShellPkg: Acpiview: Abbreviate field names to preserve alignment

Gao, Zhichao
 

Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>

Thanks,
Zhichao

-----Original Message-----
From: Sami Mujawar <sami.mujawar@arm.com>
Sent: Thursday, June 17, 2021 5:56 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <sami.mujawar@arm.com>; Alexei.Fedorov@arm.com;
Matteo.Carlini@arm.com; Ben.Adderson@arm.com; Ni, Ray
<ray.ni@intel.com>; Gao, Zhichao <zhichao.gao@intel.com>; nd@arm.com
Subject: [PATCH v2 3/8] ShellPkg: Acpiview: Abbreviate field names to
preserve alignment

Some field names in the IORT table parser were longer than the
OUTPUT_FIELD_COLUMN_WIDTH plus indentation, resulting in loss of the
output print alignment. Therefore, abbreviate the field names.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- No code change since v1. Re-sending with v2 series. [SAMI]

ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c |
13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)

diff --git
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
index
f7447947b2308d35d4d2890373778f0fd2f97f9e..fcecaff5134256497bda87241f3
39076897c3ece 100644
---
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortPars
+++ er.c
@@ -1,11 +1,14 @@
/** @file
IORT table parser

- Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+ Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

@par Reference(s):
- - IO Remapping Table, Platform Design Document, Revision D, March 2018
+ - IO Remapping Table, Platform Design Document, Revision D, March
+ 2018
+
+ @par Glossary:
+ - Ref - Reference
**/

#include <IndustryStandard/IoRemappingTable.h>
@@ -144,15 +147,15 @@ STATIC CONST ACPI_PARSER
IortNodeSmmuV1V2Parser[] = {
{L"Span", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL},
{L"Model", 4, 32, L"%d", NULL, NULL, NULL, NULL},
{L"Flags", 4, 36, L"0x%x", NULL, NULL, NULL, NULL},
- {L"Reference to Global Interrupt Array", 4, 40, L"0x%x", NULL, NULL, NULL,
+ {L"Global Interrupt Array Ref", 4, 40, L"0x%x", NULL, NULL, NULL,
NULL},
{L"Number of context interrupts", 4, 44, L"%d", NULL,
(VOID**)&InterruptContextCount, NULL, NULL},
- {L"Reference to Context Interrupt Array", 4, 48, L"0x%x", NULL,
+ {L"Context Interrupt Array Ref", 4, 48, L"0x%x", NULL,
(VOID**)&InterruptContextOffset, NULL, NULL},
{L"Number of PMU Interrupts", 4, 52, L"%d", NULL,
(VOID**)&PmuInterruptCount, NULL, NULL},
- {L"Reference to PMU Interrupt Array", 4, 56, L"0x%x", NULL,
+ {L"PMU Interrupt Array Ref", 4, 56, L"0x%x", NULL,
(VOID**)&PmuInterruptOffset, NULL, NULL},

// Interrupt Array
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


Re: [PATCH v2 2/8] MdePkg: IORT header update for IORT Rev E.b spec

Gao, Zhichao
 

Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>

Thanks,
Zhichao

-----Original Message-----
From: Sami Mujawar <sami.mujawar@arm.com>
Sent: Thursday, June 17, 2021 5:56 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar <sami.mujawar@arm.com>; Alexei.Fedorov@arm.com;
ardb+tianocore@kernel.org; Matteo.Carlini@arm.com;
Ben.Adderson@arm.com; steven.price@arm.com;
Lorenzo.Pieralisi@arm.com; Kinney, Michael D
<michael.d.kinney@intel.com>; gaoliming@byosoft.com.cn; Liu, Zhiguang
<zhiguang.liu@intel.com>; Ni, Ray <ray.ni@intel.com>; Gao, Zhichao
<zhichao.gao@intel.com>; nd@arm.com
Subject: [PATCH v2 2/8] MdePkg: IORT header update for IORT Rev E.b spec

Bugzilla: 3458 - Add support IORT Rev E.b specification updates
(https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
(https://developer.arm.com/documentation/den0049/)
introduces the following updates, collectively including the updates and
errata fixes to Rev E and Rev E.a:
- increments the IORT table revision to 3.
- updates the node definition to add an 'Identifier' field.
- adds definition of node type 6 - Reserved Memory Range node.
- adds definition for Memory Range Descriptors.
- adds flag to indicate PRI support for root complexes.
- adds flag to indicate if the root complex supports forwarding
of PASID information on translated transactions to the SMMU.

Therefore, update the IORT header file to reflect these changes.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- Set EFI_ACPI_IO_REMAPPING_TABLE_REVISION to Rev 0 as [SAMI]
setting to Rev 3 will break existing platforms. The
problem is that existing code would not be populating
the Identifier field in the nodes. This can lead to
non-unique values in the Identifier field.

MdePkg/Include/IndustryStandard/IoRemappingTable.h | 67
++++++++++++++++++--
1 file changed, 60 insertions(+), 7 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
index
731217441438a00dd5ff0bedf2010598d48d6dbf..a9817252d8cec17f82cb1a4ced
12186cdf58713a 100644
--- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
+++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
@@ -1,12 +1,19 @@
/** @file
- ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
-
-
http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_I
O_Remapping_Table.pdf
+ ACPI IO Remapping Table (IORT) definitions.

Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
- Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2021, Arm Limited. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Reference(s):
+ - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
+ (https://developer.arm.com/documentation/den0049/)
+
+ @par Glossary:
+ - Ref : Reference
+ - Mem : Memory
+ - Desc : Descriptor
**/

#ifndef IO_REMAPPING_TABLE_H_
@@ -14,7 +21,9 @@

#include <IndustryStandard/Acpi.h>

-#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
+#define EFI_ACPI_IO_REMAPPING_TABLE_REV0 0x0
+#define EFI_ACPI_IO_REMAPPING_TABLE_REV3 0x3
+#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION
+EFI_ACPI_IO_REMAPPING_TABLE_REV0

#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
@@ -22,6 +31,7 @@
#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
#define EFI_ACPI_IORT_TYPE_PMCG 0x5
+#define EFI_ACPI_IORT_TYPE_RMR 0x6

#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0

@@ -55,7 +65,16 @@
#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2

#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
-#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
+#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED BIT0
+
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED 0x0
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED BIT1
+
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED
0x0
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED BIT2
+
+#define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED 0x0
+#define EFI_ACPI_IORT_RMR_REMAP_PERMITTED BIT0

#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0

@@ -89,7 +108,7 @@ typedef struct {
UINT8 Type;
UINT16 Length;
UINT8 Revision;
- UINT32 Reserved;
+ UINT32 Identifier;
UINT32 NumIdMappings;
UINT32 IdReference;
} EFI_ACPI_6_0_IO_REMAPPING_NODE;
@@ -198,6 +217,40 @@ typedef struct {
//EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
OverflowInterruptMsiMapping[1];
} EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;

+///
+/// Memory Range Descriptor.
+///
+typedef struct {
+ /// Base address of Reserved Memory Range,
+ /// aligned to a page size of 64K.
+ UINT64 Base;
+
+ /// Length of the Reserved Memory range.
+ /// Must be a multiple of the page size of 64K.
+ UINT64 Length;
+
+ /// Reserved, must be zero.
+ UINT32 Reserved;
+} EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC;
+
+///
+/// Node type 6: Reserved Memory Range (RMR) node /// typedef struct {
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
+
+ /// RMR flags
+ UINT32 Flags;
+
+ /// Memory range descriptor count.
+ UINT32 NumMemRangeDesc;
+
+ /// Offset of the memory range descriptor array.
+ UINT32 MemRangeDescRef;
+// EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1];
+// EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC
MemRangeDesc[1];
+} EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE;
+
#pragma pack()

#endif
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


Re: [EXTERNAL] Re: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification: EFI_MM_COMMUNICATE_HEADER Update

Wu, Hao A
 

Hello Kun and Bret, sorry for the delayed response.

 

I think I agree with the approach mentioned by Bret below: “deprecate, break builds, fix code, move forward”.

If we just modify the structure, it is likely that platform drivers that consumes EFI_(S)MM_COMMUNICATE_HEADER may not be aware of the change and potentially consuming data at wrong offset.

A build failure can be an indication to platform owners that certain drivers should be reviewed upon a checklist mentioned in this patch.

 

Best Regards,

Hao Wu

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Bret Barkelew via groups.io
Sent: Thursday, June 24, 2021 11:27 AM
To: devel@edk2.groups.io; kuqin12@...; Wu, Hao A <hao.a.wu@...>
Cc: Kinney, Michael D <michael.d.kinney@...>; Liming Gao <gaoliming@...>; Liu, Zhiguang <zhiguang.liu@...>; Andrew Fish <afish@...>; Laszlo Ersek <lersek@...>; Lindholm, Leif <leif@...>; Michael Kubacki <Michael.Kubacki@...>
Subject: Re: [EXTERNAL] Re: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification: EFI_MM_COMMUNICATE_HEADER Update

 

Yeah, the only other thought I had for moving forwards quickly (i.e. hackily) is to define a new GUID that just means “I use an updated header configuration” since the EFI_GUID field comes first and is a well-understood size.

 

I would prefer the “deprecate, break builds, fix code, move forward” approach.

 

- Bret

 

From: Kun Qin via groups.io
Sent: Wednesday, June 23, 2021 5:53 PM
To: Wu, Hao A; devel@edk2.groups.io
Cc: Kinney, Michael D; Liming Gao; Liu, Zhiguang; Andrew Fish; Laszlo Ersek; Lindholm, Leif; Bret Barkelew; Michael Kubacki
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification: EFI_MM_COMMUNICATE_HEADER Update

 

Hi Hao,

We have been circulating different ideas internally about how to enforce
a warning around this change.

There is an idea of deprecating the old structure and replacing it with
a newly defined EFI_MM_COMMUNICATE_HEADER_V2. That way all consumers
will be enforced to update their implementation and (hopefully) inspect
the compatibility accordingly. In addition, we could add other fields
such as signature and/or header version number for further extensibility.

If there are code instances that uses "sizeof(EFI_GUID) + sizeof(UINTN)"
in lieu of OFFSET_OF, this implementation is essentially decoupled from
the structure definition. So compiler might not be able to help. In that
case, runtime protections such as pool guard or stack guard might be useful.

Please let me know if you think header structure V2 is an idea worth to try.

Thanks,
Kun

On 06/15/2021 18:15, Wu, Hao A wrote:
> Thanks Kun,
>
> I am a little concerned on whether there will be other missing cases that are not covered by this patch series.
>
> I am also wondering is there any detection can be made to warn the cases that code modification should be made after this structure update.
> Otherwise, it will be the burden for the platform owners to review the platform codes following your guide mentioned in this patch.
>
> Hoping others can provide some inputs on this.
>
> Best Regards,
> Hao Wu
>
>> -----Original Message-----
>> From: Kun Qin <kuqin12@...>
>> Sent: Wednesday, June 16, 2021 4:51 AM
>> To: Wu, Hao A <hao.a.wu@...>; devel@edk2.groups.io
>> Cc: Kinney, Michael D <michael.d.kinney@...>; Liming Gao
>> <gaoliming@...>; Liu, Zhiguang <zhiguang.liu@...>;
>> Andrew Fish <afish@...>; Laszlo Ersek <lersek@...>; Leif
>> Lindholm <leif@...>
>> Subject: Re: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification:
>> EFI_MM_COMMUNICATE_HEADER Update
>>
>> Hi Hao,
>>
>> Sorry that I missed comments for this patch earlier. You are correct. I only
>> inspected SmmLockBoxPeiLib. The PEI instance handled mode switch with
>> ```OFFSET_OF ``` function. But DXE instance still have a few use cases that will
>> be impacted.
>>
>> I will update this read me file and add a code change patch for this library in
>> v2. Thanks for pointing this out.
>>
>> Regards,
>> Kun
>>
>> On 06/11/2021 00:46, Wu, Hao A wrote:
>>>> -----Original Message-----
>>>> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Kun
>>>> Qin
>>>> Sent: Thursday, June 10, 2021 9:43 AM
>>>> To: devel@edk2.groups.io
>>>> Cc: Kinney, Michael D <michael.d.kinney@...>; Liming Gao
>>>> <gaoliming@...>; Liu, Zhiguang <zhiguang.liu@...>;
>>>> Andrew Fish <afish@...>; Laszlo Ersek <lersek@...>; Leif
>>>> Lindholm <leif@...>
>>>> Subject: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification:
>>>> EFI_MM_COMMUNICATE_HEADER Update
>>>>
>>>> REF: https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3430&amp;data=04%7C01%7CBret.Barkelew%40microsoft.com%7Ca480819ff5e84e12239f08d936aa7bc5%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637600928127681913%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=483mG24s%2Bp0xSF90Wf%2Fmh2TN1atrIQa5mOrLyEPCTuE%3D&amp;reserved=0
>>>>
>>>> This change includes specification update markdown file that
>>>> describes the proposed PI Specification v1.7 Errata A in detail and
>>>> potential impact to the existing codebase.
>>>>
>>>> Cc: Michael D Kinney <michael.d.kinney@...>
>>>> Cc: Liming Gao <gaoliming@...>
>>>> Cc: Zhiguang Liu <zhiguang.liu@...>
>>>> Cc: Andrew Fish <afish@...>
>>>> Cc: Laszlo Ersek <lersek@...>
>>>> Cc: Leif Lindholm <leif@...>
>>>>
>>>> Signed-off-by: Kun Qin <kuqin12@...>
>>>> ---
>>>>    BZ3430-SpecChange.md | 88 ++++++++++++++++++++
>>>>    1 file changed, 88 insertions(+)
>>>>
>>>> diff --git a/BZ3430-SpecChange.md b/BZ3430-SpecChange.md new file
>>>> mode
>>>> 100644 index 000000000000..33a1ffda447b
>>>> --- /dev/null
>>>> +++ b/BZ3430-SpecChange.md
>>>> @@ -0,0 +1,88 @@
>>>> +# Title: Change MessageLength Field of
>> EFI_MM_COMMUNICATE_HEADER
>>>> to
>>>> +UINT64
>>>> +
>>>> +## Status: Draft
>>>> +
>>>> +## Document: UEFI Platform Initialization Specification Version 1.7
>>>> +Errata A
>>>> +
>>>> +## License
>>>> +
>>>> +SPDX-License-Identifier: CC-BY-4.0
>>>> +
>>>> +## Submitter: [TianoCore Community](https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.tianocore.org%2F&amp;data=04%7C01%7CBret.Barkelew%40microsoft.com%7Ca480819ff5e84e12239f08d936aa7bc5%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637600928127681913%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=eRu4We7iSzuwrsS9MqIO2iqLxXHZ6CpUkInVpty554c%3D&amp;reserved=0)
>>>> +
>>>> +## Summary of the change
>>>> +
>>>> +Change the `MessageLength` Field of
>> `EFI_MM_COMMUNICATE_HEADER`
>>>> from UINTN to UINT64 to remove architecture dependency:
>>>> +
>>>> +```c
>>>> +typedef struct {
>>>> +  EFI_GUID  HeaderGuid;
>>>> +  UINT64    MessageLength;
>>>> +  UINT8     Data[ANYSIZE_ARRAY];
>>>> +} EFI_MM_COMMUNICATE_HEADER;
>>>> +```
>>>> +
>>>> +## Benefits of the change
>>>> +
>>>> +In PI Spec v1.7 Errata A, Vol.4, Sec 5.7 MM Communication Protocol,
>>>> +the
>>>> MessageLength field of `EFI_MM_COMMUNICATE_HEADER` (also
>> defined as
>>>> `EFI_SMM_COMMUNICATE_HEADER`) is defined as type UINTN.
>>>> +
>>>> +But this structure, as a generic definition, could be used for both
>>>> +PEI and
>>>> DXE MM communication. Thus for a system that supports PEI MM launch,
>>>> but operates PEI in 32bit mode and MM foundation in 64bit, the
>>>> current `EFI_MM_COMMUNICATE_HEADER` definition will cause
>> structure
>>>> parse error due to UINTN used.
>>>> +
>>>> +## Impact of the change
>>>> +
>>>> +This change will impact the known structure consumers including:
>>>> +
>>>> +```bash
>>>> +MdeModulePkg/Core/PiSmmCore/PiSmmIpl
>>>> +MdeModulePkg/Application/SmiHandlerProfileInfo
>>>> +MdeModulePkg/Application/MemoryProfileInfo
>>>> +```
>>>> +
>>>> +For consumers that are not using
>>>> `OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)`, but performing
>> explicit
>>>> addition such as the existing
>>>>
>> MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
>>>> c, one will need to change code implementation to match new structure
>>>> definition. Otherwise, the code compiled on IA32 architecture will
>>>> experience structure field dereference error.
>>>> +
>>>> +User who currently uses UINTN local variables as place holder of
>>>> MessageLength will need to use caution to make cast from UINTN to
>>>> UINT64 and vice versa. It is recommended to use `SafeUint64ToUintn`
>>>> for such operations when the value is indeterministic.
>>>> +
>>>> +Note: MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib is
>> also
>>>> consuming this structure, but it handled this size discrepancy
>>>> internally. If this
>>>
>>>
>>> Hello Kun,
>>>
>>> Sorry for a question.
>>> I am not sure why the current codes in file SmmLockBoxDxeLib.c will work
>> properly after the UINTN -> UINT64 change.
>>>
>>> For example:
>>> LockBoxGetSmmCommBuffer():
>>>     MinimalSizeNeeded = sizeof (EFI_GUID) +
>>>                         sizeof (UINTN) +
>>>                         MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_SAVE),
>>>                              MAX (sizeof
>> (EFI_SMM_LOCK_BOX_PARAMETER_SET_ATTRIBUTES),
>>>                                   MAX (sizeof
>> (EFI_SMM_LOCK_BOX_PARAMETER_UPDATE),
>>>                                        MAX (sizeof
>> (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE),
>>>                                             sizeof
>>> (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE_ALL_IN_PLACE)))));
>>>
>>> SaveLockBox():
>>>     UINT8                           TempCommBuffer[sizeof(EFI_GUID) + sizeof(UINTN)
>> + sizeof(EFI_SMM_LOCK_BOX_PARAMETER_SAVE)];
>>>
>>> Is the series missed changes for SmmLockBoxDxeLib or I got something
>> wrong?
>>>
>>> Best Regards,
>>> Hao Wu
>>>
>>>
>>>> potential spec change is not applied, all applicable PEI MM
>>>> communicate callers will need to use the same routine as that of
>>>> SmmLockBoxPeiLib to invoke a properly populated
>>>> EFI_MM_COMMUNICATE_HEADER to be used in X64 MM foundation.
>>>> +
>>>> +## Detailed description of the change [normative updates]
>>>> +
>>>> +### Specification Changes
>>>> +
>>>> +1. In PI Specification v1.7 Errata A: Vol. 4 Page-91, the definition
>>>> +of
>>>> `EFI_MM_COMMUNICATE_HEADER` should be changed from current:
>>>> +
>>>> +```c
>>>> +typedef struct {
>>>> +  EFI_GUID  HeaderGuid;
>>>> +  UINTN     MessageLength;
>>>> +  UINT8     Data[ANYSIZE_ARRAY];
>>>> +} EFI_MM_COMMUNICATE_HEADER;
>>>> +```
>>>> +
>>>> +to:
>>>> +
>>>> +```c
>>>> +typedef struct {
>>>> +  EFI_GUID  HeaderGuid;
>>>> +  UINT64    MessageLength;
>>>> +  UINT8     Data[ANYSIZE_ARRAY];
>>>> +} EFI_MM_COMMUNICATE_HEADER;
>>>> +```
>>>> +
>>>> +### Code Changes
>>>> +
>>>> +1. Remove the explicit calculation of the offset of `Data` in
>>>> `EFI_MM_COMMUNICATE_HEADER`. Thus applicable calculations of
>>>> `sizeof(EFI_GUID) + sizeof(UINTN)` should be replaced with
>>>> `OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)` or similar
>> alternatives.
>>>> These calculations are identified in:
>>>> +
>>>> +```bash
>>>>
>> +MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
>>>> c
>>>> +MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
>>>> +```
>>>> +
>>>> +1. Resolve potentially mismatched type between `UINTN` and `UINT64`.
>>>> This would occur when `MessageLength` or its derivitive are used for
>>>> local calculation with existing `UINTN` typed variables. Code change
>>>> regarding this perspective is per case evaluation: if the variables
>>>> involved are all deterministic values, and there is no overflow or
>>>> underflow risk, a cast operation (from `UINTN` to `UINT64`) can be
>>>> safely used. Otherwise, the calculation will be performed in `UINT64`
>>>> bitwidth and then convert to `UINTN` using `SafeUint64*` and
>>>> `SafeUint64ToUintn`, respectively. These operations are identified in:
>>>> +
>>>> +```bash
>>>> +MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
>>>>
>> +MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
>>>> c
>>>> +MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
>>>> +```
>>>> +
>>>> +1. After all above changes applied and specification updated,
>>>> `MdePkg/Include/Protocol/MmCommunication.h` will need to be
>> updated
>>>> to match new definition that includes the field type update.
>>>> --
>>>> 2.31.1.windows.1
>>>>
>>>>
>>>>
>>>>
>>>>
>>>



 


Re: [EXTERNAL] Re: [edk2-devel] [PATCH v2] NetworkPkg:UEFIPXEBC

Sivaraman Nainar
 

Hello Maciej:

I have applied the recommended rules in the git config and still the patches are generated with End of line encodings.

I will try to fix that and send the patch again.

Thanks
Siva

-----Original Message-----
From: Rabeda, Maciej <maciej.rabeda@linux.intel.com>
Sent: Friday, June 25, 2021 8:06 PM
To: devel@edk2.groups.io; emergingsiva@gmail.com
Cc: Sivaraman Nainar <sivaramann@ami.com>
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH v2] NetworkPkg:UEFIPXEBC


**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

Hi Siva,

I am fine with the patch per se, but I still have problems applying it.
Have you tried following my suggestions from our meeting?

Thanks,
Maciej

On 24-Jun-21 09:33, INDIA\sivaramann wrote:
Issue on the PxeBcDhcp4CallBack() functions of UEFIPXEBC Driver.
In this function any non allowed events are recieved as input it will
exit in beginning itself. But the switch case handling the default and
Dhcp4SendRequest which is not reachable.

Signed-off-by: Sivaraman <sivaramann@ami.com>
---
NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
index fb63cf61a9..e85176f9bb 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
@@ -1256,19 +1256,10 @@ PxeBcDhcp4CallBack (


//

// Cache the DHCPv4 discover packet to mode data directly.

- // It need to check SendGuid as well as Dhcp4SendRequest.

+ // It need to check SendGuid.

//

CopyMem (&Mode->DhcpDiscover.Dhcpv4, &Packet->Dhcp4,
Packet->Length);



- case Dhcp4SendRequest:

- if (Packet->Length > PXEBC_DHCP4_PACKET_MAX_SIZE) {

- //

- // If the to be sent packet exceeds the maximum length, abort the DHCP process.

- //

- Status = EFI_ABORTED;

- break;

- }

-

if (Mode->SendGUID) {

//

// Send the system Guid instead of the MAC address as the hardware address if required.

@@ -1332,6 +1323,7 @@ PxeBcDhcp4CallBack (
break;



default:

+ ASSERT (FALSE);

break;

}


-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


回复: [edk2-devel] [PATCH v3 8/8] MdeModulePkg: Use SecureBootVariableLib in PlatformVarCleanupLib.

gaoliming
 

Greg:
Yes. You can submit another BZ for code optimization.

Thanks
Liming

-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Grzegorz
Bernacki
发送时间: 2021年6月25日 13:46
收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn
抄送: Sunny Wang <Sunny.Wang@arm.com>; leif@nuviainc.com;
ardb+tianocore@kernel.org; Samer El-Haj-Mahmoud
<Samer.El-Haj-Mahmoud@arm.com>; Marcin Wojtas <mw@semihalf.com>;
upstream@semihalf.com; Yao, Jiewen <jiewen.yao@intel.com>; Wang, Jian J
<jian.j.wang@intel.com>; Xu, Min M <min.m.xu@intel.com>; Laszlo Ersek
<lersek@redhat.com>; Sami Mujawar <Sami.Mujawar@arm.com>;
afish@apple.com; ray.ni@intel.com; jordan.l.justen@intel.com;
rebecca@bsdio.com; grehan@freebsd.org; Thomas Abraham
<thomas.abraham@arm.com>; chasel.chiu@intel.com;
nathaniel.l.desimone@intel.com; eric.dong@intel.com;
michael.d.kinney@intel.com; zailiang.sun@intel.com; yi.qian@intel.com;
graeme@nuviainc.com; Radosław Biernacki <rad@semihalf.com>; Pete
Batard <pete@akeo.ie>
主题: Re: [edk2-devel] [PATCH v3 8/8] MdeModulePkg: Use
SecureBootVariableLib in PlatformVarCleanupLib.

Hi Liming,
Adding support for DXE_DRIVER and UEFI_APPLICATION to AuthVariableLib
causes problem with PlatformSecureLib and VariablePolicyLib which does
not support that modules. I don't want to change to many modules just
to remove one function in PlatformVarCleanupLib. As I wrote before I
think that the best solution would be to leave PlatformVarCleanupLib
unchanged. What do you think?

thanks,
greg

czw., 24 cze 2021 o 02:59 gaoliming <gaoliming@byosoft.com.cn> napisał(a):

I agree that AuthVariableLib can support UEFI_DRIVER, DXE_DRIVER and
UEFI_APPLICATION. There is no limitation for this library.

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Grzegorz
Bernacki
发送时间: 2021年6月23日 18:39
收件人: devel@edk2.groups.io; Sunny Wang <Sunny.Wang@arm.com>
抄送: gaoliming@byosoft.com.cn; leif@nuviainc.com;
ardb+tianocore@kernel.org; Samer El-Haj-Mahmoud
<Samer.El-Haj-Mahmoud@arm.com>; Marcin Wojtas
<mw@semihalf.com>;
upstream@semihalf.com; Yao, Jiewen <jiewen.yao@intel.com>; Wang,
Jian J
<jian.j.wang@intel.com>; Xu, Min M <min.m.xu@intel.com>; Laszlo Ersek
<lersek@redhat.com>; Sami Mujawar <Sami.Mujawar@arm.com>;
afish@apple.com; ray.ni@intel.com; jordan.l.justen@intel.com;
rebecca@bsdio.com; grehan@freebsd.org; Thomas Abraham
<thomas.abraham@arm.com>; chasel.chiu@intel.com;
nathaniel.l.desimone@intel.com; eric.dong@intel.com;
michael.d.kinney@intel.com; zailiang.sun@intel.com; yi.qian@intel.com;
graeme@nuviainc.com; Radosław Biernacki <rad@semihalf.com>; Pete
Batard <pete@akeo.ie>
主题: Re: [edk2-devel] [PATCH v3 8/8] MdeModulePkg: Use
SecureBootVariableLib in PlatformVarCleanupLib.

Hi,

AuthVariableLib must support DXE_DRIVER and UEFI_APPLICATION.
Adding
it leads to errors for libraries which are used by AuthVariableLib and
which does not support DXE_DRIVER or UEFI_APPLICATION. This changes
causes a lot of minor changes in another libraries.
The whole problem exists because I wanted to remove a duplicate of
CreateTimeBasedPayload() from PlatformVarCleanupLib. I just leave it
there. This module is not used anyway. I think it can be safely
removed, but I don't want this change to be a part of this patchset.
thanks,
greg

śr., 23 cze 2021 o 05:33 Sunny Wang <Sunny.Wang@arm.com>
napisał(a):

Hi Greg,
Why can't we make AuthVariableLib support DXE_DRIVER?

Best Regards,
Sunny Wang

-----Original Message-----
From: Grzegorz Bernacki <gjb@semihalf.com>
Sent: Monday, June 21, 2021 5:59 PM
To: devel@edk2.groups.io; Grzegorz Bernacki <gjb@semihalf.com>
Cc: gaoliming@byosoft.com.cn; leif@nuviainc.com;
ardb+tianocore@kernel.org; Samer El-Haj-Mahmoud
<Samer.El-Haj-Mahmoud@arm.com>; Sunny Wang
<Sunny.Wang@arm.com>;
Marcin Wojtas <mw@semihalf.com>; upstream@semihalf.com; Yao,
Jiewen
<jiewen.yao@intel.com>; Wang, Jian J <jian.j.wang@intel.com>; Xu, Min
M
<min.m.xu@intel.com>; Laszlo Ersek <lersek@redhat.com>; Sami
Mujawar
<Sami.Mujawar@arm.com>; afish@apple.com; ray.ni@intel.com;
jordan.l.justen@intel.com; rebecca@bsdio.com; grehan@freebsd.org;
Thomas Abraham <thomas.abraham@arm.com>; chasel.chiu@intel.com;
nathaniel.l.desimone@intel.com; eric.dong@intel.com;
michael.d.kinney@intel.com; zailiang.sun@intel.com; yi.qian@intel.com;
graeme@nuviainc.com; Radosław Biernacki <rad@semihalf.com>; Pete
Batard <pete@akeo.ie>
Subject: Re: [edk2-devel] [PATCH v3 8/8] MdeModulePkg: Use
SecureBootVariableLib in PlatformVarCleanupLib.

Hi,

I moved CreateTimeBasedPayload() to AuthVariableLib, but then I
cannot
use it in SecureBootConfigDxe, cause AuthVariableLib does not support
DXE_DRIVER.
So:
- having that function only in AuthVariableLib does not work
- having that function only in SecureBootVariableLib, causes a lot of
changes in platform DSCs files and also causes MdeModulePkg to be
depended on SecurityPkg

Right now I tend to roll back the changes related to
CreateTimeBasedPayload() and just let the modules to have its own copy
of that function. What do you think?
thanks,
greg

pt., 18 cze 2021 o 10:03 Grzegorz Bernacki via groups.io
<gjb=semihalf.com@groups.io> napisał(a):

Hi,

Thanks for the comment, I will move that function to AuthVariableLib.
greg

czw., 17 cze 2021 o 04:35 gaoliming <gaoliming@byosoft.com.cn>
napisał(a):

Grzegorz:
MdeModulePkg is generic base package. It should not depend on
SecurityPkg.

I agree CreateTimeBasedPayload() is the generic API. It can be
shared in
the different modules.
I propose to add it into MdeModulePkg AuthVariableLib.

Thanks
Liming
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表
Grzegorz
Bernacki
发送时间: 2021年6月14日 17:43
收件人: devel@edk2.groups.io
抄送: leif@nuviainc.com; ardb+tianocore@kernel.org;
Samer.El-Haj-Mahmoud@arm.com; sunny.Wang@arm.com;
mw@semihalf.com; upstream@semihalf.com;
jiewen.yao@intel.com;
jian.j.wang@intel.com; min.m.xu@intel.com; lersek@redhat.com;
sami.mujawar@arm.com; afish@apple.com; ray.ni@intel.com;
jordan.l.justen@intel.com; rebecca@bsdio.com;
grehan@freebsd.org;
thomas.abraham@arm.com; chasel.chiu@intel.com;
nathaniel.l.desimone@intel.com; gaoliming@byosoft.com.cn;
eric.dong@intel.com; michael.d.kinney@intel.com;
zailiang.sun@intel.com;
yi.qian@intel.com; graeme@nuviainc.com; rad@semihalf.com;
pete@akeo.ie;
Grzegorz Bernacki <gjb@semihalf.com>
主题: [edk2-devel] [PATCH v3 8/8] MdeModulePkg: Use
SecureBootVariableLib in PlatformVarCleanupLib.

This commits removes CreateTimeBasedPayload() function from
PlatformVarCleanupLib and uses exactly the same function from
SecureBootVariableLib.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
---
MdeModulePkg/Library/PlatformVarCleanupLib/PlatformVarCleanupLib.inf |
2 +
MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanup.h
| 1 +
MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanupLib.c
| 84 --------------------
3 files changed, 3 insertions(+), 84 deletions(-)

diff --git
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatformVarCleanupLib.inf
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatformVarCleanupLib.inf
index 8d5db826a0..493d03e1d8 100644
---
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatformVarCleanupLib.inf
+++
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatformVarCleanupLib.inf
@@ -34,6 +34,7 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
+ SecurityPkg/SecurityPkg.dec

[LibraryClasses]
UefiBootServicesTableLib
@@ -44,6 +45,7 @@
PrintLib
MemoryAllocationLib
HiiLib
+ SecureBootVariableLib

[Guids]
gEfiIfrTianoGuid ##
SOMETIMES_PRODUCES ##
GUID
diff --git
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanup.h
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanup.h
index c809a7086b..94fbc7d2a4 100644
---
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanup.h
+++
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanup.h
@@ -18,6 +18,7 @@ SPDX-License-Identifier:
BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h>
#include <Library/HiiLib.h>
#include <Library/PlatformVarCleanupLib.h>
+#include <Library/SecureBootVariableLib.h>

#include <Protocol/Variable.h>
#include <Protocol/VarCheck.h>
diff --git
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanupLib.c
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanupLib.c
index 3875d614bb..204f1e00ad 100644
---
a/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanupLib.c
+++
b/MdeModulePkg/Library/PlatformVarCleanupLib/PlatVarCleanupLib.c
@@ -319,90 +319,6 @@ DestroyUserVariableNode (
}
}

-/**
- Create a time based data payload by concatenating the
EFI_VARIABLE_AUTHENTICATION_2
- descriptor with the input data. NO authentication is required in
this
function.
-
- @param[in, out] DataSize On input, the size of Data
buffer in
bytes.
- On output, the size
of
data
returned in Data
- buffer in bytes.
- @param[in, out] Data On input, Pointer to
data
buffer to
be wrapped or
- pointer to NULL to
wrap
an
empty payload.
- On output, Pointer to
the new
payload date buffer allocated from pool,
- it's caller's
responsibility
to free
the memory after using it.
-
- @retval EFI_SUCCESS Create time based
payload
successfully.
- @retval EFI_OUT_OF_RESOURCES There are not
enough
memory
resourses to create time based payload.
- @retval EFI_INVALID_PARAMETER The parameter is
invalid.
- @retval Others Unexpected error
happens.
-
-**/
-EFI_STATUS
-CreateTimeBasedPayload (
- IN OUT UINTN *DataSize,
- IN OUT UINT8 **Data
- )
-{
- EFI_STATUS Status;
- UINT8 *NewData;
- UINT8 *Payload;
- UINTN PayloadSize;
- EFI_VARIABLE_AUTHENTICATION_2 *DescriptorData;
- UINTN DescriptorSize;
- EFI_TIME Time;
-
- if (Data == NULL || DataSize == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // At user physical presence, the variable does not need to be
signed
but
the
- // parameters to the SetVariable() call still need to be prepared
as
authenticated
- // variable. So we create EFI_VARIABLE_AUTHENTICATED_2
descriptor
without certificate
- // data in it.
- //
- Payload = *Data;
- PayloadSize = *DataSize;
-
- DescriptorSize = OFFSET_OF
(EFI_VARIABLE_AUTHENTICATION_2,
AuthInfo) + OFFSET_OF (WIN_CERTIFICATE_UEFI_GUID,
CertData);
- NewData = (UINT8 *) AllocateZeroPool (DescriptorSize +
PayloadSize);
- if (NewData == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- if ((Payload != NULL) && (PayloadSize != 0)) {
- CopyMem (NewData + DescriptorSize, Payload, PayloadSize);
- }
-
- DescriptorData = (EFI_VARIABLE_AUTHENTICATION_2 *)
(NewData);
-
- ZeroMem (&Time, sizeof (EFI_TIME));
- Status = gRT->GetTime (&Time, NULL);
- if (EFI_ERROR (Status)) {
- FreePool (NewData);
- return Status;
- }
- Time.Pad1 = 0;
- Time.Nanosecond = 0;
- Time.TimeZone = 0;
- Time.Daylight = 0;
- Time.Pad2 = 0;
- CopyMem (&DescriptorData->TimeStamp, &Time, sizeof
(EFI_TIME));
-
- DescriptorData->AuthInfo.Hdr.dwLength =
OFFSET_OF
(WIN_CERTIFICATE_UEFI_GUID, CertData);
- DescriptorData->AuthInfo.Hdr.wRevision = 0x0200;
- DescriptorData->AuthInfo.Hdr.wCertificateType =
WIN_CERT_TYPE_EFI_GUID;
- CopyGuid (&DescriptorData->AuthInfo.CertType,
&gEfiCertPkcs7Guid);
-
- if (Payload != NULL) {
- FreePool (Payload);
- }
-
- *DataSize = DescriptorSize + PayloadSize;
- *Data = NewData;
- return EFI_SUCCESS;
-}
-
/**
Create a counter based data payload by concatenating the
EFI_VARIABLE_AUTHENTICATION
descriptor with the input data. NO authentication is required
in
this
function.
--
2.25.1













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Re: [edk2-platforms][PATCH v4 39/41] KabylakeSiliconPkg: Identify flash regions by GUID

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
<rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 39/41] KabylakeSiliconPkg:
Identify flash regions by GUID

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates the code to identify flash regions by GUID and internally map the GUID
entries to values specific to KabylakeSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
| 106 ++++++++++++++-

Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiC
ommon.c | 140 ++++++++++++++++----
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
| 9 ++

Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.
h | 20 +--

Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/Bas
ePchSpiCommonLib.inf | 11 ++
5 files changed, 247 insertions(+), 39 deletions(-)

diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
index a3c9bbebeaa9..ccf63b216f70 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfigura
+++ tion.c
@@ -2,11 +2,14 @@
This file contains the tests for the SecureMemoryMapConfiguration bit

Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#include "HstiSiliconDxe.h"
+#include <Guid/FlashRegion.h>

typedef struct {
UINT64 Base;
@@ -100,6 +103,90 @@ MEMORY_RANGE
mNonLockableMemoryRange[NonLockableMemoryRangeMax] = { // 14.
SPI_BAR0 (BDF 0:31:5 + 0x10) };

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the
flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given
flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the
function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for
the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Check for overlaps in single range array

@@ -224,7 +311,7 @@ AcquireSpiBar0 (
{
UINT32 SpiBar0;
UINTN PchSpiBase;
-
+
//
// Init PCH spi reserved MMIO address.
//
@@ -270,7 +357,7 @@ ReleaseSpiBar0 (
Get the SPI region base and size, based on the enum type

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base
address which is listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address
which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n'
Base
@param[out] RegionSize The size for the Region 'n'

@@ -281,13 +368,20 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
GetRegionAddress (
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
+
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }

if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
@@ -484,7 +578,7 @@ CheckSecureMemoryMapConfiguration (
//
// Locate BIOS region size to update High bios base address
//
- GetRegionAddress (FlashRegionBios, &BaseAddress, &RegionSize);
+ GetRegionAddress (&gFlashRegionBiosGuid, &BaseAddress,
+ &RegionSize);
DEBUG ((DEBUG_INFO, "Bios Region Size %x:\n", RegionSize));
mLockableMemoryRange[LockableMemoryRangeHighBios].Base = SIZE_4GB
- RegionSize;
mLockableMemoryRange[LockableMemoryRangeLowDram].End =
(MmioRead32 (MmPciBase (0,SA_MC_DEV,SA_MC_FUN) + R_SA_TOLUD) &
B_SA_TOLUD_TOLUD_MASK) - 1; diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/S
piCommon.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/S
piCommon.c
index 58757a8cba39..d2eb8324bf58 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/S
piCommon.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/SpiCommon.c
@@ -2,10 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility
Interface.

Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
@@ -16,6 +19,90 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include
<Protocol/Spi.h> #include <Library/PchSpiCommonLib.h>

+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the
flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given
flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the
function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for
the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.

@@ -249,7 +336,7 @@ PchPmTimerStallRuntimeSafe (
Read data from the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing
the dada received.
@@ -263,7 +350,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -276,7 +363,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -289,7 +376,7 @@ SpiProtocolFlashRead (
Write data to the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the
data sent during the SPI cycle.
@@ -302,7 +389,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -315,7 +402,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -328,7 +415,7 @@ SpiProtocolFlashWrite (
Erase some area on the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.

@@ -340,7 +427,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -352,7 +439,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -407,7 +494,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -460,7 +547,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -495,7 +582,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -530,7 +617,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -543,7 +630,7 @@ SpiProtocolFlashReadStatus (
Get the SPI region base and size, based on the enum type

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base
address which is listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address
which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n'
Base
@param[out] RegionSize The size for the Region 'n'

@@ -555,17 +642,24 @@ EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;

SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);

+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -646,7 +740,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -704,7 +798,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -717,7 +811,7 @@ SpiProtocolReadCpuSoftStrap (
This function sends the programmed SPI command to the slave device.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is
listed in the Descriptor
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware
Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@@ -731,7 +825,7 @@ SpiProtocolReadCpuSoftStrap ( EFI_STATUS
SendSpiCmd (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -795,7 +889,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}

- Status = SpiProtocolGetRegionAddress (This, FlashRegionType,
&HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index bd12fa691d40..09826cdfdf39 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -2,6 +2,7 @@
# Component description file for Hsti Silicon Driver # # Copyright (c) 2017,
Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -86,6 +87,14 @@
[LibraryClasses] [Guids]
gEfiEndOfDxeEventGroupGuid
gSiMemoryPlatformDataGuid ## CONSUMES
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid

[Protocols]
gEfiDxeSmmReadyToLockProtocolGuid ## CONSUMES diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLi
b.h
b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLi
b.h
index d408289ea253..fd991de96016 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLi
b.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpi
+++ CommonLib.h
@@ -134,7 +134,7 @@ ReleaseSpiBar0 (
Read data from the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing
the dada received.
@@ -148,7 +148,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -158,7 +158,7 @@ SpiProtocolFlashRead (
Write data to the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the
data sent during the SPI cycle.
@@ -171,7 +171,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -181,7 +181,7 @@ SpiProtocolFlashWrite (
Erase some area on the flash part.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is
listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.

@@ -193,7 +193,7 @@ EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -286,7 +286,7 @@ SpiProtocolFlashReadStatus (
Get the SPI region base and size, based on the enum type

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base
address which is listed in the Descriptor.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n'
Base
@param[out] RegionSize The size for the Region 'n'

@@ -298,7 +298,7 @@ EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -353,7 +353,7 @@ SpiProtocolReadCpuSoftStrap (
This function sends the programmed SPI command to the slave device.

@param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is
listed in the Descriptor
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which
corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware
Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region
for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI
cycle.
@@ -367,7 +367,7 @@ SpiProtocolReadCpuSoftStrap ( EFI_STATUS
SendSpiCmd (
IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/B
asePchSpiCommonLib.inf
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/B
asePchSpiCommonLib.inf
index 51e2d25a7f8b..67176c879de5 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/B
asePchSpiCommonLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2017
- 2020 Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -28,3 +29,13 @@
[LibraryClasses]
IoLib
DebugLib
PchCycleDecodingLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 30/41] MinPlatformPkg: Remove SpiFlashCommonLibNull

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Dong, Eric <eric.dong@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 30/41] MinPlatformPkg:
Remove SpiFlashCommonLibNull

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library instance has moved to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---

Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashC
ommonLibNull.c | 101 --------------------

Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashC
ommonLibNull.inf | 29 ------
Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
| 98 -------------------
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec |
2 -
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc |
4 -
5 files changed, 234 deletions(-)

diff --git
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.c
b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.c
deleted file mode 100644
index 403b16a1b421..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/** @file
- Null Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On
output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On
output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be
erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block
to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.inf
b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.inf
deleted file mode 100644
index 75ef1cb921df..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlas
hCommonLibNull.inf
+++ /dev/null
@@ -1,29 +0,0 @@
-### @file
-# NULL instance of Spi Flash Common Library Class -# -# Copyright (c) 2017,
Intel Corporation. All rights reserved.<BR> -# -# SPDX-License-Identifier: BSD-2-
Clause-Patent -# -###
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SpiFlashCommonLibNull
- FILE_GUID = F35BBEE7-A681-443E-BB15-07AF9FABBDED
- VERSION_STRING = 1.0
- MODULE_TYPE = BASE
- LIBRARY_CLASS = SpiFlashCommonLib
-#
-# The following information is for reference only and not required by the build
tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[Sources]
- SpiFlashCommonLibNull.c
diff --git
a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
b/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 0c5e72258c2d..000000000000
--- a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h> -#include
<Library/UefiDriverEntryPoint.h> -#include
<Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On
output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On
output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be
erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block
to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 947431470a1f..8c6154099bf7 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -62,8 +62,6 @@ [LibraryClasses]
SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h

- SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
-
BoardInitLib|Include/Library/BoardInitLib.h
MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
SecBoardInitLib|Include/Library/SecBoardInitLib.h
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 15867eee4e61..d58ed0ee7eae 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -109,7 +109,6 @@ [LibraryClasses.common.DXE_DRIVER]

TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/TpmPlatformHierarchyLi
b/TpmPlatformHierarchyLib.inf

[LibraryClasses.common.DXE_SMM_DRIVER]
-
SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi
FlashCommonLibNull.inf

TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestP
ointCheckLib.inf
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/SmmTestPointLib.inf

@@ -118,7 +117,6 @@ [LibraryClasses.common.MM_STANDALONE]

MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAlloca
tionLib/StandaloneMmMemoryAllocationLib.inf

MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Standalo
neMmServicesTableLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-
SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi
FlashCommonLibNull.inf

StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoin
t/StandaloneMmDriverEntryPoint.inf

VariableReadLib|MinPlatformPkg/Library/SmmVariableReadLib/StandaloneMm
VariableReadLib.inf

VariableWriteLib|MinPlatformPkg/Library/SmmVariableWriteLib/StandaloneMm
VariableWriteLib.inf
@@ -159,8 +157,6 @@ [Components]


MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootM
anagerLib.inf

-
MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.
inf
-
MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf

MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrap
perHobProcessLib.inf

MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWra
pperPlatformSecLib.inf
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 15/41] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 15/41]
WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are
declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
| 4 +--

Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.in
f | 4 +--

Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapIncl
ude.fdf | 4 +--

Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/Pei
MultiBoardInitPreMemLib.inf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
| 36 ++++++++++----------

Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Flash
MapInclude.fdf | 4 +--

Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fd
f | 36 ++++++++++----------
7 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index a9687d93dee1..0a807ad84f4d 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec

[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
CONSUMES

[Sources]
BiosInfo.c
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.
inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.
inf
index 3233375d6568..537d507ed7d6 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.
inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/Policy
+++ InitDxe.inf
@@ -47,8 +47,8 @@ [Packages]

[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ##
CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
CONSUMES
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI
nclude.fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI
nclude.fdf
index f7aa730ae7d2..5895eebc5a79 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI
nclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashM
+++ apInclude.fdf
@@ -38,8 +38,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =
0x00170000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =
0x00490000 # Flash addr (0xFFDE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =
0x00070000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00500000
# Flash addr (0xFFE50000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00050000
#
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =
0x00500000 # Flash addr (0xFFE50000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
0x00050000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =
0x00550000 # Flash addr (0xFFEA0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =
0x000EA000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =
0x0063A000 # Flash addr (0xFFF8A000)
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/Pe
iMultiBoardInitPreMemLib.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/Pe
iMultiBoardInitPreMemLib.inf
index 2903bdacaebd..091d2118c7b3 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/Pe
iMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitL
+++ ib/PeiMultiBoardInitPreMemLib.inf
@@ -293,7 +293,7 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize

[FixedPcd]
gSiPkgTokenSpaceGuid.PcdMchBaseAddress ## CONSUMES
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 22fbfc99f0f0..8aea5aa475a0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.UpXtreme]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) |
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the
FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size
in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) |
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of
the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
#The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.UpXtreme]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase,
because macro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 SET
+gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize

#################################################################
###############
#
# Following are lists of FD Region layout which correspond to the locations of
different @@ -158,8 +158,8 @@ [FD.UpXtreme] # FSP_S Section FILE =
$(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd

-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.Pcd
FlashMicrocodeFvSize
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFl
ashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconP
+kgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkg
+TokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode

diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Fla
shMapInclude.fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Fla
shMapInclude.fdf
index e0db38194211..586e3488c2a7 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Fla
shMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf
+++ /FlashMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =
0x00190000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =
0x00320000 # Flash addr (0xFFB20000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =
0x00170000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00490000
# Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000B0000
#
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =
0x00490000 # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
0x000B0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =
0x00540000 # Flash addr (0xFFD40000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =
0x00070000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =
0x005B0000 # Flash addr (0xFFDB0000)
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
index 1ab8c137924e..f0601984338c 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk
+++ g.fdf
@@ -31,8 +31,8 @@ [FD.WhiskeylakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) |
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the
FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size
in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) |
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of
the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
#The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.WhiskeylakeURvp] # Set
FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because
macro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 SET
+gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize

#################################################################
###############
#
# Following are lists of FD Region layout which correspond to the locations of
different @@ -153,8 +153,8 @@ [FD.WhiskeylakeURvp]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPk
gTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory

-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.Pcd
FlashMicrocodeFvSize
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFl
ashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconP
+kgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkg
+TokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode

--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 31/41] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 31/41]
KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

This library now uses gPchSpiPpiGuid from IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---

Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSeria
lPortLibSpiFlash.inf | 1 +
1 file changed, 1 insertion(+)

diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe
rialPortLibSpiFlash.inf
b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe
rialPortLibSpiFlash.inf
index 31518fb40ba7..b959cd1f4612 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe
rialPortLibSpiFlash.inf
+++
b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe
rialPortLibSpiFlash.inf
@@ -32,6 +32,7 @@ [Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
MinPlatformPkg/MinPlatformPkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec

--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 25/41] MinPlatformPkg: Remove SpiFvbService modules

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Dong, Eric <eric.dong@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 25/41] MinPlatformPkg:
Remove SpiFvbService modules

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFvbServiceSmm and SpiFvbServiceStandaloneMm have moved to
IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c | 94 -
-
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
| 903 --------------------
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
| 271 ------

Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneM
m.c | 32 -

Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalM
m.c | 32 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
| 158 ----
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
| 22 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
| 68 --

Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneM
m.inf | 67 --
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 -
10 files changed, 1649 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
deleted file mode 100644
index 7f2678fa9e5a..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/**@file
- Defines data structure that is the volume header found.
- These data is intent to decouple FVB driver with FV header.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-#define FIRMWARE_BLOCK_SIZE 0x10000
-#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
-
-#define NV_STORAGE_BASE_ADDRESS
FixedPcdGet32(PcdFlashNvStorageVariableBase)
-#define SYSTEM_NV_BLOCK_NUM
((FixedPcdGet32(PcdFlashNvStorageVariableSize)+
FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) +
FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
- EFI_FV_BLOCK_MAP_ENTRY End[1];
-} EFI_FVB2_MEDIA_INFO;
-
-//
-// This data structure contains a template of all correct FV headers, which is
used to restore
-// Fv header if it's corrupted.
-//
-EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
- //
- // Systen NvStorage FVB
- //
- {
- NV_STORAGE_BASE_ADDRESS,
- {
- {0,}, //ZeroVector[16]
- EFI_SYSTEM_NV_DATA_FV_GUID,
- FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
- EFI_FVH_SIGNATURE,
- 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on
EFI_FVB_ATTRIBUTES_2
- sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof
(EFI_FV_BLOCK_MAP_ENTRY),
- 0, //CheckSum which will be calucated dynamically.
- 0, //ExtHeaderOffset
- {0,}, //Reserved[1]
- 2, //Revision
- {
- {
- SYSTEM_NV_BLOCK_NUM,
- FVB_MEDIA_BLOCK_SIZE,
- }
- }
- },
- {
- {
- 0,
- 0
- }
- }
- }
-};
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- )
-{
- UINTN Index;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
-
- for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof
(EFI_FVB2_MEDIA_INFO); Index++) {
- if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
- FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
-
- //
- // Update the checksum value of FV header.
- //
- FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader,
FvHeader->HeaderLength);
-
- *FvbInfo = FvHeader;
-
- DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
- DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
- DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)-
HeaderLength));
- DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)-
Checksum));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)-
BlockMap[0].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)-
BlockMap[0].Length));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)-
BlockMap[1].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n",
(*FvbInfo)->BlockMap[1].Length));
-
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
deleted file mode 100644
index 113c749d04ff..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
+++ /dev/null
@@ -1,903 +0,0 @@
-/** @file
- Common driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility
Specification.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-//
-// Global variable for this FVB driver which contains
-// the private data of all firmware volume block instances
-//
-FVB_GLOBAL mFvbModuleGlobal;
-
-//
-// This platform driver knows there are multiple FVs on FD.
-// Now we only provide FVs on Variable region and MicorCode region for
performance issue.
-//
-FV_INFO mPlatformFvBaseAddress[] = {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase),
FixedPcdGet32(PcdFlashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_INFO mPlatformDefaultBaseAddress[] = {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase),
FixedPcdGet32(PcdFlashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
- {
- {
- HARDWARE_DEVICE_PATH,
- HW_MEMMAP_DP,
- {
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
- }
- },
- EfiMemoryMappedIO,
- (EFI_PHYSICAL_ADDRESS) 0,
- (EFI_PHYSICAL_ADDRESS) 0,
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
- {
- {
- MEDIA_DEVICE_PATH,
- MEDIA_PIWG_FW_VOL_DP,
- {
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
- }
- },
- { 0 }
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-//
-// Template structure used when installing FVB protocol
-//
-EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
- FvbProtocolGetAttributes,
- FvbProtocolSetAttributes,
- FvbProtocolGetPhysicalAddress,
- FvbProtocolGetBlockSize,
- FvbProtocolRead,
- FvbProtocolWrite,
- FvbProtocolEraseBlocks,
- NULL
-};
-
-/**
- Get the EFI_FVB_ATTRIBUTES_2 of a FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
-
- @return Attributes of the FV identified by FvbInstance.
-
-**/
-EFI_FVB_ATTRIBUTES_2
-FvbGetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- return FvbInstance->FvHeader.Attributes;
-}
-
-/**
- Retrieves the starting address of an LBA in an FV. It also
- return a few other attribut of the FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Lba The logical block address
- @param[out] LbaAddress On output, contains the physical starting address
- of the Lba
- @param[out] LbaLength On output, contains the length of the block
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which
the
- number of consecutive blocks starting with Lba is
- returned. All blocks in this range have a size of
- BlockSize
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbGetLbaAddress (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- OUT UINTN *LbaAddress,
- OUT UINTN *LbaLength,
- OUT UINTN *NumOfBlocks
- )
-{
- UINT32 NumBlocks;
- UINT32 BlockLength;
- UINTN Offset;
- EFI_LBA StartLba;
- EFI_LBA NextLba;
- EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
-
- StartLba = 0;
- Offset = 0;
- BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
-
- //
- // Parse the blockmap of the FV to find which map entry the Lba belongs to
- //
- while (TRUE) {
- NumBlocks = BlockMap->NumBlocks;
- BlockLength = BlockMap->Length;
-
- if ( NumBlocks == 0 || BlockLength == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- NextLba = StartLba + NumBlocks;
-
- //
- // The map entry found
- //
- if (Lba >= StartLba && Lba < NextLba) {
- Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
- if (LbaAddress ) {
- *LbaAddress = FvbInstance->FvBase + Offset;
- }
-
- if (LbaLength ) {
- *LbaLength = BlockLength;
- }
-
- if (NumOfBlocks ) {
- *NumOfBlocks = (UINTN)(NextLba - Lba);
- }
- return EFI_SUCCESS;
- }
-
- StartLba = NextLba;
- Offset = Offset + NumBlocks * BlockLength;
- BlockMap++;
- }
-}
-
-/**
- Reads specified number of bytes into a buffer from the specified block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The logical block address to be read from
- @param[in] BlockOffset Offset into the block at which to begin
reading
- @param[in] NumBytes Pointer that on input contains the total size
of
- the buffer. On output, it contains the total number
- of bytes read
- @param[in] Buffer Pointer to a caller allocated buffer that will be
- used to hold the data read
-
-
- @retval EFI_SUCCESS The firmware volume was read successfully
and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary.
On output,
- NumBytes contains the total number of bytes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the
ReadDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning
correctly and
- could not be read
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,
Buffer are NULL
-
-**/
-EFI_STATUS
-FvbReadBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize = FALSE;
-
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength,
NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes = (UINT32) (LbaLength - BlockOffset);
- BadBufferSize = TRUE;
- }
-
- Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
Buffer);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-/**
- Writes specified number of bytes from the input buffer to the block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The starting logical block index to write to
- @param[in] BlockOffset Offset into the block at which to begin writing
- @param[in] NumBytes Pointer that on input contains the total size of
- the buffer. On output, it contains the total number
- of bytes actually written
- @param[in] Buffer Pointer to a caller allocated buffer that contains
- the source for the write
- @retval EFI_SUCCESS The firmware volume was written successfully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary.
On output,
- NumBytes contains the total number of bytes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly
and
- could not be written
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer
are NULL
-
-**/
-EFI_STATUS
-FvbWriteBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize = FALSE;
-
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength,
NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- //
- // Check if the FV is write enabled
- //
- Attributes = FvbGetVolumeAttributes (FvbInstance);
- if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Perform boundary checks and adjust NumBytes
- //
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes = (UINT32) (LbaLength - BlockOffset);
- BadBufferSize = TRUE;
- }
-
- Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset),
*NumBytes);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-
-
-/**
- Erases and initializes a firmware volume block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The logical block index to be erased
-
- @retval EFI_SUCCESS The erase request was successfully completed
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly
and
- could not be written. Firmware device may have been
- partially erased
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbEraseBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba
- )
-{
-
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
-
- //
- // Check if the FV is write enabled
- //
- Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Get the starting address of the block for erase.
- //
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength,
NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
-
- return Status;
-}
-
-/**
- Modifies the current settings of the firmware volume according to the
- input parameter, and returns the new setting of the volume
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Attributes On input, it is a pointer to
EFI_FVB_ATTRIBUTES_2
- containing the desired firmware volume settings.
- On successful return, it contains the new settings
- of the firmware volume
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_ACCESS_DENIED The volume setting is locked and cannot be
modified
- @retval EFI_INVALID_PARAMETER Instance not found, or The attributes
requested are
- in conflict with the capabilities as declared in the
- firmware volume header
-
-**/
-EFI_STATUS
-FvbSetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_ATTRIBUTES_2 OldAttributes;
- EFI_FVB_ATTRIBUTES_2 *AttribPtr;
- EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
- UINT32 Capabilities;
- UINT32 OldStatus, NewStatus;
-
- AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attributes);
- OldAttributes = *AttribPtr;
- Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
- OldStatus = OldAttributes & EFI_FVB2_STATUS;
- NewStatus = *Attributes & EFI_FVB2_STATUS;
-
- UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP | \
- EFI_FVB2_STICKY_WRITE | \
- EFI_FVB2_MEMORY_MAPPED | \
- EFI_FVB2_ERASE_POLARITY | \
- EFI_FVB2_READ_LOCK_CAP | \
- EFI_FVB2_WRITE_LOCK_CAP | \
- EFI_FVB2_ALIGNMENT;
-
- //
- // Some attributes of FV is read only can *not* be set
- //
- if ((OldAttributes & UnchangedAttributes) ^ (*Attributes &
UnchangedAttributes)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // If firmware volume is locked, no status bit can be updated
- //
- if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
- if ( OldStatus ^ NewStatus ) {
- return EFI_ACCESS_DENIED;
- }
- }
-
- //
- // Test read disable
- //
- if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
- if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test read enable
- //
- if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
- if (NewStatus & EFI_FVB2_READ_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write disable
- //
- if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
- if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write enable
- //
- if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
- if (NewStatus & EFI_FVB2_WRITE_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test lock
- //
- if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
- if (NewStatus & EFI_FVB2_LOCK_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
- *AttribPtr = (*AttribPtr) | NewStatus;
- *Attributes = *AttribPtr;
-
- return EFI_SUCCESS;
-}
-
-/**
- Check the integrity of firmware volume header
-
- @param[in] FvHeader A pointer to a firmware volume header
-
- @retval TRUE The firmware volume is consistent
- @retval FALSE The firmware volume has corrupted.
-
-**/
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
- )
-{
- if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
- if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid,
sizeof(EFI_GUID)) != 0 ) {
- return FALSE;
- }
- } else {
- if (CompareMem (&FvHeader->FileSystemGuid,
&gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
- return FALSE;
- }
- }
- if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
- (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
- (FvHeader->FvLength == ((UINTN) -1)) ||
- ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
- return FALSE;
- }
-
- if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != 0)
{
- return FALSE;
- }
-
- return TRUE;
-}
-
-//
-// FVB protocol APIs
-//
-
-/**
- Retrieves the physical address of the device.
-
- @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
- @param[out] Address Output buffer containing the address.
-
- retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- *Address = FvbInstance->FvBase;
-
- return EFI_SUCCESS;
-}
-
-/**
- Retrieve the size of a logical block
-
- @param[in] This Calling context
- @param[in] Lba Indicates which block to return the size for.
- @param[out] BlockSize A pointer to a caller allocated UINTN in which
- the size of the block is returned
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
- number of consecutive blocks starting with Lba is
- returned. All blocks in this range have a size of
- BlockSize
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks:
0x%x\n",
- Lba,
- BlockSize,
- NumOfBlocks)
- );
-
- return FvbGetLbaAddress (
- FvbInstance,
- Lba,
- NULL,
- BlockSize,
- NumOfBlocks
- );
-}
-
-/**
- Retrieves Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- *Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- DEBUG ((DEBUG_INFO,
- "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- return EFI_SUCCESS;
-}
-
-/**
- Sets Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_STATUS Status;
- EFI_FVB_INSTANCE *FvbInstance;
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- return Status;
-}
-
-/**
- The EraseBlock() function erases one or more blocks as denoted by the
- variable argument list. The entire parameter list of blocks must be verified
- prior to erasing any blocks. If a block is requested that does not exist
- within the associated firmware volume (it has a larger index than the last
- block of the firmware volume), the EraseBlock() function must return
- EFI_INVALID_PARAMETER without modifying the contents of the firmware
volume.
-
- @param[in] This Calling context
- @param[in] ... Starting LBA followed by Number of Lba to erase.
- a -1 to terminate the list.
-
- @retval EFI_SUCCESS The erase request was successfully completed
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be written. Firmware device may have been
- partially erased
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- UINTN NumOfBlocks;
- VA_LIST Args;
- EFI_LBA StartingLba;
- UINTN NumOfLba;
- EFI_STATUS Status;
-
- DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- NumOfBlocks = FvbInstance->NumOfBlocks;
-
- VA_START (Args, This);
-
- do {
- StartingLba = VA_ARG (Args, EFI_LBA);
- if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
- break;
- }
-
- NumOfLba = VA_ARG (Args, UINT32);
-
- //
- // Check input parameters
- //
- if (NumOfLba == 0) {
- VA_END (Args);
- return EFI_INVALID_PARAMETER;
- }
-
- if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
- return EFI_INVALID_PARAMETER;
- }
- } while ( 1 );
-
- VA_END (Args);
-
- VA_START (Args, This);
- do {
- StartingLba = VA_ARG (Args, EFI_LBA);
- if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
- break;
- }
-
- NumOfLba = VA_ARG (Args, UINT32);
-
- while ( NumOfLba > 0 ) {
- Status = FvbEraseBlock (FvbInstance, StartingLba);
- if ( EFI_ERROR(Status)) {
- VA_END (Args);
- return Status;
- }
- StartingLba ++;
- NumOfLba --;
- }
-
- } while ( 1 );
-
- VA_END (Args);
-
- return EFI_SUCCESS;
-}
-
-/**
- Writes data beginning at Lba:Offset from FV. The write terminates either
- when *NumBytes of data have been written, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size. On
- output, indicates the actual number of bytes written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was written successfully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On
output,
- NumBytes contains the total number of bytes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly
and
- could not be written
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer:
0x%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
-}
-
-/**
- Reads data beginning at Lba:Offset from FV. The Read terminates either
- when *NumBytes of data have been read, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size. On
- output, indicates the actual number of bytes written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was read successfully and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On
output,
- NumBytes contains the total number of bytes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly
and
- could not be read
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_STATUS Status;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
- Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
- DEBUG((DEBUG_INFO,
- "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return Status;
-}
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
deleted file mode 100644
index 016f19587c91..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility
Specification.
-
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include <Library/MmServicesTableLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Protocol/SmmFirmwareVolumeBlock.h>
-
-/**
- The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
- for each FV in the system.
-
- @param[in] FvbInstance The pointer to a FW volume instance structure,
- which contains the information about one FV.
-
- @retval VOID
-
-**/
-VOID
-InstallFvbProtocol (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_STATUS Status;
- EFI_HANDLE FvbHandle;
-
- ASSERT (FvbInstance != NULL);
- if (FvbInstance == NULL) {
- return;
- }
-
- CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof
(EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
-
- FvHeader = &FvbInstance->FvHeader;
- if (FvHeader == NULL) {
- return;
- }
-
- //
- // Set up the devicepath
- //
- DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for
0x%lx:\n", FvbInstance->FvBase));
- if (FvHeader->ExtHeaderOffset == 0) {
- //
- // FV does not contains extension header, then produce
MEMMAP_DEVICE_PATH
- //
- FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH),
&mFvMemmapDevicePathTemplate);
- if (FvbInstance->DevicePath == NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
MEMMAP_DEVICE_PATH failed\n"));
- return;
- }
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
MemMapDevPath.StartingAddress = FvbInstance->FvBase;
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
MemMapDevPath.EndingAddress = FvbInstance->FvBase + FvHeader-
FvLength - 1;
- } else {
- FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH),
&mFvPIWGDevicePathTemplate);
- if (FvbInstance->DevicePath == NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
FV_PIWG_DEVICE_PATH failed\n"));
- return;
- }
- CopyGuid (
- &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)-
FvDevPath.FvName,
- (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
- );
- }
-
- //
- // LocateDevicePath fails so install a new interface and device path
- //
- FvbHandle = NULL;
-
- Status = gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiSmmFirmwareVolumeBlockProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->FvbProtocol)
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiDevicePathProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->DevicePath)
- );
- ASSERT_EFI_ERROR (Status);
-}
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_STATUS Status;
- UINTN BufferSize;
- UINTN Idx;
- UINT32 MaxLbaSize;
- UINT32 BytesWritten;
- UINTN BytesErased;
-
- mPlatformFvBaseAddress[0].FvBase =
PcdGet32(PcdFlashNvStorageVariableBase);
- mPlatformFvBaseAddress[0].FvSize =
PcdGet32(PcdFlashNvStorageVariableSize);
- mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashFvMicrocodeBase);
- mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashFvMicrocodeSize);
- mPlatformDefaultBaseAddress[0].FvBase =
PcdGet32(PcdFlashNvStorageVariableBase);
- mPlatformDefaultBaseAddress[0].FvSize =
PcdGet32(PcdFlashNvStorageVariableSize);
- mPlatformDefaultBaseAddress[1].FvBase =
PcdGet32(PcdFlashFvMicrocodeBase);
- mPlatformDefaultBaseAddress[1].FvSize =
PcdGet32(PcdFlashFvMicrocodeSize);
-
- //
- // We will only continue with FVB installation if the
- // SPI is the active BIOS state
- //
- {
- //
- // Make sure all FVB are valid and/or fix if possible
- //
- for (Idx = 0;; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
-
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- BytesWritten = 0;
- BytesErased = 0;
- DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n",
FvHeader));
- Status = GetFvbInfo (BaseAddress, &FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.
GetFvbInfo Status %r\n", BaseAddress, Status));
- continue;
- }
- DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\n",
BaseAddress));
- //
- // Spi erase
- //
- BytesErased = (UINTN) FvHeader->BlockMap->Length;
- Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n",
Status));
- continue;
- }
- if (BytesErased != FvHeader->BlockMap->Length) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader->BlockMap-
Length\n"));
- DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n",
BytesErased, FvHeader->BlockMap->Length));
- continue;
- }
- BytesWritten = FvHeader->HeaderLength;
- Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten,
(UINT8*)FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status));
- continue;
- }
- if (BytesWritten != FvHeader->HeaderLength) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesWritten != HeaderLength\n"));
- DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength = 0x%X\n",
BytesWritten, FvHeader->HeaderLength));
- continue;
- }
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
- continue;
- }
- DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n",
BaseAddress));
- //
- // Clear cache for this range.
- //
- WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress,
FvHeader->BlockMap->Length);
- }
- }
-
- //
- // Calculate the total size for all firmware volume block instances
- //
- BufferSize = 0;
- for (Idx = 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
- continue;
- }
-
- BufferSize += (FvHeader->HeaderLength +
- sizeof (EFI_FVB_INSTANCE) -
- sizeof (EFI_FIRMWARE_VOLUME_HEADER)
- );
- }
-
- mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *)
AllocateRuntimeZeroPool (BufferSize);
- if (mFvbModuleGlobal.FvbInstance == NULL) {
- ASSERT (FALSE);
- return;
- }
-
- MaxLbaSize = 0;
- FvbInstance = mFvbModuleGlobal.FvbInstance;
- mFvbModuleGlobal.NumFv = 0;
-
- for (Idx = 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
- continue;
- }
-
- FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
- CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength);
-
- FvHeader = &(FvbInstance->FvHeader);
- FvbInstance->FvBase = (UINTN)BaseAddress;
-
- //
- // Process the block map for each FV
- //
- FvbInstance->NumOfBlocks = 0;
- for (PtrBlockMapEntry = FvHeader->BlockMap;
- PtrBlockMapEntry->NumBlocks != 0;
- PtrBlockMapEntry++) {
- //
- // Get the maximum size of a block.
- //
- if (MaxLbaSize < PtrBlockMapEntry->Length) {
- MaxLbaSize = PtrBlockMapEntry->Length;
- }
- FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
- }
-
- //
- // Add a FVB Protocol Instance
- //
- InstallFvbProtocol (FvbInstance);
- mFvbModuleGlobal.NumFv++;
-
- //
- // Move on to the next FvbInstance
- //
- FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) +
- FvHeader->HeaderLength +
- (sizeof (EFI_FVB_INSTANCE) - sizeof
(EFI_FIRMWARE_VOLUME_HEADER)));
-
- }
- }
-}
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.c
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.c
deleted file mode 100644
index 252c818d6551..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility
Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Standalone MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] MmSystemTable A pointer to the MM system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbStandaloneMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_MM_SYSTEM_TABLE *MmSystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditional
Mm.c
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditional
Mm.c
deleted file mode 100644
index 1c2dac70e3c6..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditional
Mm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility
Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Traditional MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbTraditionalMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
deleted file mode 100644
index e9d69e985814..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/** @file
- Common source definitions used in serial flash drivers
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_COMMON_H
-#define _SPI_FVB_SERVICE_COMMON_H
-
-#include <Guid/EventGroup.h>
-#include <Guid/FirmwareFileSystem2.h>
-#include <Guid/SystemNvDataGuid.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/FirmwareVolumeBlock.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/IoLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/HobLib.h>
-
-#include <Library/SpiFlashCommonLib.h>
-
-//
-// Define two helper macro to extract the Capability field or Status field in FVB
-// bit fields
-//
-#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP \
- )
-
-#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS |
EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
-
-#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
-
-typedef struct {
- UINT32 Signature;
- UINTN FvBase;
- UINTN NumOfBlocks;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
- EFI_FIRMWARE_VOLUME_HEADER FvHeader;
-} EFI_FVB_INSTANCE;
-
-typedef struct {
- EFI_FVB_INSTANCE *FvbInstance;
- UINT32 NumFv;
-} FVB_GLOBAL;
-
-//
-// Fvb Protocol instance data
-//
-#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol,
FVB_INSTANCE_SIGNATURE)
-
-typedef struct {
- MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_PIWG_DEVICE_PATH;
-
-typedef struct {
- MEMMAP_DEVICE_PATH MemMapDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_MEMMAP_DEVICE_PATH;
-
-typedef struct {
- UINT32 FvBase;
- UINT32 FvSize;
-} FV_INFO;
-
-//
-// Protocol APIs
-//
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- );
-
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
- );
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- );
-
-extern FVB_GLOBAL mFvbModuleGlobal;
-extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
-extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
-extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
-extern FV_INFO mPlatformFvBaseAddress[];
-extern FV_INFO mPlatformDefaultBaseAddress[];
-
-#endif
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
deleted file mode 100644
index 36af1130c8ee..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/** @file
- Definitions common to MM implementation in this driver.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_MM_H_
-#define _SPI_FVB_SERVICE_MM_H_
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- );
-
-#endif
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
deleted file mode 100644
index 10e51e11756f..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+++ /dev/null
@@ -1,68 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Runtime driver.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SpiFvbServiceSmm
- FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- PI_SPECIFICATION_VERSION = 1.10
- ENTRY_POINT = SpiFvbTraditionalMmInitialize
-
-#
-# The following information is for reference only and not required by the build
tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- PcdLib
- MemoryAllocationLib
- CacheMaintenanceLib
- BaseMemoryLib
- DebugLib
- BaseLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
- SpiFlashCommonLib
- MmServicesTableLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ##
CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ##
CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ##
CONSUMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceTraditionalMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.inf
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.inf
deleted file mode 100644
index 9f08d3673f41..000000000000
---
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalone
Mm.inf
+++ /dev/null
@@ -1,67 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Standalone MM driver.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x0001001B
- BASE_NAME = SpiFvbServiceStandaloneMm
- FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
- VERSION_STRING = 1.0
- MODULE_TYPE = MM_STANDALONE
- PI_SPECIFICATION_VERSION = 0x00010032
- ENTRY_POINT = SpiFvbStandaloneMmInitialize
-
-#
-# The following information is for reference only and not required by the build
tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- CacheMaintenanceLib
- DebugLib
- MemoryAllocationLib
- PcdLib
- MmServicesTableLib
- SpiFlashCommonLib
- StandaloneMmDriverEntryPoint
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ##
CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ##
CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ##
CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ##
CONSUMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceStandaloneMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 35cbd40abb05..15867eee4e61 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -159,8 +159,6 @@ [Components]


MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootM
anagerLib.inf

- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf

MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.
inf

MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 24/41] WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 24/41]
WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates WhiskeylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc |
7 +++++--
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf |
2 +-

Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.ds
c | 7 +++++--
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fd
f | 2 +-
4 files changed, 12 insertions(+), 6 deletions(-)

diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index ee2aedd978e0..e9c1751df9ba 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
-
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCom
monLib/SmmSpiFlashCommonLib.inf
+
+
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF
+ lashCommonLib.inf

#######################################
# Platform Package
@@ -395,6 +395,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf

+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -415,7 +419,6 @@ [Components.X64]

!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE

- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf

$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 8aea5aa475a0..ae0ba27c1f34 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -413,7 +413,7 @@ [FV.FvOsBootUncompact] !if
gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf

INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
dsc
index b69cc8deb0a0..e3cf99639620 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
dsc
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk
+++ g.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
-
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCom
monLib/SmmSpiFlashCommonLib.inf
+
+
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF
+ lashCommonLib.inf

#######################################
# Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf

+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -421,7 +425,6 @@ [Components.X64]

!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE

- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf

$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
index f0601984338c..414780eb05f1 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.
fdf
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk
+++ g.fdf
@@ -407,7 +407,7 @@ [FV.FvOsBootUncompact] !if
gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf

INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 17/41] KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
<rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 17/41] KabylakeSiliconPkg:
Use IntelSiliconPkg BIOS area and ucode PCDs

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are
declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---

Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.in
f | 4 ++--
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 10 +++-------
2 files changed, 5 insertions(+), 9 deletions(-)

diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.
inf
b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.
inf
index d3b4d9e318b8..3ca373a23c0a 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.
inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCp
+++ uPolicyLib.inf
@@ -45,8 +45,8 @@ [Ppis]
gSiPolicyPpiGuid ## CONSUMES

[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize

[Pcd]
gSiPkgTokenSpaceGuid.PcdSmmbaseSwSmi
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index 3881671757a3..5ff7b39ca60e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -63,7 +63,7 @@ [Guids]
gEfiCapsuleVendorGuid = {0x711c703f, 0xc285, 0x4b10, {0xa3, 0xb0, 0x36,
0xec, 0xbd, 0x3c, 0x8b, 0xe2}}
gEfiConsoleOutDeviceGuid = {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x46,
0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
##
-##
+##
##
gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac,
0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
gSmbiosCacheInfoHobGuid = {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36,
0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
@@ -264,7 +264,7 @@ [Protocols]
##
gEfiSmmVariableProtocolGuid = {0xed32d533, 0x99e6, 0x4209, {0x9c, 0xc0,
0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7}} ## -##
+##
##
gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac,
0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}

@@ -453,13 +453,9 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processor.
## Please refer to Processor BWG for detail.
##
-
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x1000
0001
-gSiPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002

gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x000100
28
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x3000
0004
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x3000
0005
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30
000006
+
##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection ##
value of the struct
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 16/41] CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
<rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 16/41] CoffeelakeSiliconPkg:
Use IntelSiliconPkg BIOS area and ucode PCDs

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are
declared in IntelSiliconPkg.dec.

The previous PCDs are removed from CoffeelakeSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---

Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.
inf | 4 ++--
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 5 -----
2 files changed, 2 insertions(+), 7 deletions(-)

diff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLi
b.inf
b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLi
b.inf
index f793432bf049..ca57b5b31e0a 100644
---
a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLi
b.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/Pei
+++ CpuPolicyLib.inf
@@ -48,8 +48,8 @@ [Ppis]
gSiPreMemPolicyPpiGuid ## CONSUMES

[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize

[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## Produces diff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
index 6cf894498d6b..5ea6fbb28411 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -474,13 +474,8 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processor.
## Please refer to Processor BWG for detail.
##
-
gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000
001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002

gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x000100
28
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x3000
0004
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x3000
0005
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30
000006

##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
--
2.28.0.windows.1



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Re: [edk2-platforms][PATCH v4 12/41] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Saturday, June 26, 2021 5:21 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Jeremy Soller <jeremy@system76.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v4 12/41]
KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are
declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
| 4 +--

Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclu
de.fdf | 4 +--
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
| 38 ++++++++++----------

Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapIncl
ude.fdf | 4 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
| 38 ++++++++++----------

Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconP
olicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +--
6 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index e5e40144a68a..6607ea6edfc3 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec

[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
CONSUMES

[Sources]
BiosInfo.c
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
index 6cb6d54f558f..ce809a277b6e 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMa
+++ pInclude.fdf
@@ -36,8 +36,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =
0x00140000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =
0x002E0000 # Flash addr (0xFFD00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =
0x000B0000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00390000
# Flash addr (0xFFDB0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000
#
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =
0x00390000 # Flash addr (0xFFDB0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =
0x00430000 # Flash addr (0xFFE50000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =
0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =
0x00490000 # Flash addr (0xFFEB0000)
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index bcd1ade72ba5..39432d21b8b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.GalagoPro3]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) |
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the
FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize
#The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) |
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address
of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
#The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -39,23 +39,23 @@ [FD.GalagoPro3]
DEFINE SIPKG_PEI_BIN = INF

# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase,
because macro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 SET
+gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gSiPkgTokenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gSiPkgTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize

#################################################################
###############
#
# Following are lists of FD Region layout which correspond to the locations of
different @@ -155,8 +155,8 @@ [FD.GalagoPro3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPk
gTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory

-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.Pcd
FlashMicrocodeFvSize
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFl
ashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconP
+kgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkg
+TokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode

diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapI
nclude.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapI
nclude.fdf
index b5e3f66ceafc..67649e867616 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapI
nclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/Flash
+++ MapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =
0x001E0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =
0x00370000 # Flash addr (0xFFB70000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =
0x00180000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x004F0000
# Flash addr (0xFFCF0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000
#
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =
0x004F0000 # Flash addr (0xFFCF0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =
0x00590000 # Flash addr (0xFFD90000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =
0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =
0x005F0000 # Flash addr (0xFFDF0000)
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index 6cdf4e2f9f1f..f003dda0ddfc 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.KabylakeRvp3]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) |
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the
FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize
#The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) |
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of
the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
#The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -39,23 +39,23 @@ [FD.KabylakeRvp3]
DEFINE SIPKG_PEI_BIN = INF

# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase,
because macro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase
to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 SET
+gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =
+$(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gSiPkgTokenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gSiPkgTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =
$(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) +
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize

#################################################################
###############
#
# Following are lists of FD Region layout which correspond to the locations of
different @@ -151,8 +151,8 @@ [FD.KabylakeRvp3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPk
gTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory

-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.Pcd
FlashMicrocodeFvSize
-
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFl
ashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconP
+kgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkg
+TokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode

diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilico
nPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilico
nPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
index 97ec70f611b1..8a99f7c59a49 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilico
nPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/Pe
+++ iSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -52,8 +52,8 @@ [Guids]

[Pcd]
gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompResistor ##
CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompTarget ##
CONSUMES
--
2.28.0.windows.1



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