Date   

[edk2-platforms][PATCH v3 27/41] KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla=
shCommon.c | 196 --------------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla=
shCommonSmmLib.c | 54 ------
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h=
| 98 ----------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpi=
FlashCommonLib.inf | 53 ------
4 files changed, 401 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashComm=
onLib/SpiFlashCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/Smm=
SpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 7ee7ffab5001..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S=
piFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <PchAccess.h>
-#include <Library/MmPciLib.h>
-#include <Protocol/Spi.h>
-
-
-PCH_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress =3D 0;
-UINTN mFlashAreaSize =3D 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the rea=
d.
- @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read=
.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the w=
rite.
- @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >=3D mFlashAreaBaseAddress);
-
- Offset =3D Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize);
-
- Status =3D EFI_SUCCESS;
- RemainingBytes =3D *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length =3D SECTOR_SIZE_4KB;
- } else {
- Length =3D RemainingBytes;
- }
- Status =3D mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -=3D Length;
- Offset +=3D Length;
- Buffer +=3D Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -=3D RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block=
to be erased.
- This library assume that caller garantee t=
hat the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
- On output, the actual number of bytes eras=
ed.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes !=3D NULL);
- if (NumBytes =3D=3D NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >=3D mFlashAreaBaseAddress);
-
- Offset =3D Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0);
- ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize);
-
- Status =3D EFI_SUCCESS;
- RemainingBytes =3D *NumBytes;
-
-
- Status =3D mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashComm=
onLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Libra=
ry/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 11133163d2d4..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S=
piFlashCommonSmmLib.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mFlashAreaBaseAddress;
-extern UINTN mFlashAreaSize;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UE=
FI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS f=
or now.
- It will ASSERT on error for debug versio=
n.
- @retval EFI_ERROR Please reference LocateProtocol for erro=
r code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdFlashAreaBaseAddress);
- mFlashAreaSize =3D (UINTN)PcdGet32 (PcdFlashAreaSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status =3D gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlas=
hCommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFl=
ashCommonLib.h
deleted file mode 100644
index 0c5e72258c2d..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommon=
Lib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the rea=
d.
- @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read=
.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the w=
rite.
- @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block=
to be erased.
- This library assume that caller garantee t=
hat the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
- On output, the actual number of bytes eras=
ed.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashComm=
onLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Lib=
rary/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index d712b9e5f769..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S=
mmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,53 +0,0 @@
-### @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION =3D 0x00010017
- BASE_NAME =3D SmmSpiFlashCommonLib
- FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE4=
7
- VERSION_STRING =3D 1.0
- MODULE_TYPE =3D DXE_SMM_DRIVER
- LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by th=
e build tools.
-#
-# VALID_ARCHITECTURES =3D IA32 X64
-#
-
-[LibraryClasses]
- PciLib
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
- MmPciLib
-
-[Packages]
- MdePkg/MdePkg.dec
- KabylakeSiliconPkg/SiPkg.dec
-
-[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosGuardEnable ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
- gSmmBiosGuardProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 26/41] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF=
lashCommon.c | 196 --------------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF=
lashCommonSmmLib.c | 54 ------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib=
.h | 98 ----------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmS=
piFlashCommonLib.inf | 51 -----
4 files changed, 399 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCo=
mmonLib/SpiFlashCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library=
/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 53711db6325f..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib=
/SpiFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <PchAccess.h>
-#include <Library/MmPciLib.h>
-#include <Protocol/Spi.h>
-
-
-PCH_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress =3D 0;
-UINTN mFlashAreaSize =3D 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the rea=
d.
- @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read=
.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the w=
rite.
- @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >=3D mFlashAreaBaseAddress);
-
- Offset =3D Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize);
-
- Status =3D EFI_SUCCESS;
- RemainingBytes =3D *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length =3D SECTOR_SIZE_4KB;
- } else {
- Length =3D RemainingBytes;
- }
- Status =3D mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -=3D Length;
- Offset +=3D Length;
- Buffer +=3D Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -=3D RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block=
to be erased.
- This library assume that caller garantee t=
hat the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
- On output, the actual number of bytes eras=
ed.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes !=3D NULL);
- if (NumBytes =3D=3D NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >=3D mFlashAreaBaseAddress);
-
- Offset =3D Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0);
- ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize);
-
- Status =3D EFI_SUCCESS;
- RemainingBytes =3D *NumBytes;
-
-
- Status =3D mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCo=
mmonLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/L=
ibrary/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 43c0218d85df..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib=
/SpiFlashCommonSmmLib.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mFlashAreaBaseAddress;
-extern UINTN mFlashAreaSize;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UE=
FI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS f=
or now.
- It will ASSERT on error for debug versio=
n.
- @retval EFI_ERROR Please reference LocateProtocol for erro=
r code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
- mFlashAreaSize =3D (UINTN)PcdGet32 (PcdBiosSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status =3D gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFl=
ashCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/S=
piFlashCommonLib.h
deleted file mode 100644
index 53c11bb59ac6..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashComm=
onLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the rea=
d.
- @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read=
.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the w=
rite.
- @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block=
to be erased.
- This library assume that caller garantee t=
hat the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
- On output, the actual number of bytes eras=
ed.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCo=
mmonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch=
/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index abc919867ca2..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib=
/SmmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,51 +0,0 @@
-## @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION =3D 0x00010017
- BASE_NAME =3D SmmSpiFlashCommonLib
- FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE4=
7
- VERSION_STRING =3D 1.0
- MODULE_TYPE =3D DXE_SMM_DRIVER
- LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by th=
e build tools.
-#
-# VALID_ARCHITECTURES =3D IA32 X64
-#
-
-[LibraryClasses]
- PciLib
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
- MmPciLib
-
-[Packages]
- MdePkg/MdePkg.dec
- CoffeelakeSiliconPkg/SiPkg.dec
-
-[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 25/41] MinPlatformPkg: Remove SpiFvbService modules

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

SpiFvbServiceSmm and SpiFvbServiceStandaloneMm have moved to
IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c =
| 94 --
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c =
| 903 --------------------
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c =
| 271 ------
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalon=
eMm.c | 32 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTradition=
alMm.c | 32 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h =
| 158 ----
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h =
| 22 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf =
| 68 --
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandalon=
eMm.inf | 67 --
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc =
| 2 -
10 files changed, 1649 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c =
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
deleted file mode 100644
index 7f2678fa9e5a..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/**@file
- Defines data structure that is the volume header found.
- These data is intent to decouple FVB driver with FV header.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-#define FIRMWARE_BLOCK_SIZE 0x10000
-#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
-
-#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVaria=
bleBase)
-#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVar=
iableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet3=
2(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
- EFI_FV_BLOCK_MAP_ENTRY End[1];
-} EFI_FVB2_MEDIA_INFO;
-
-//
-// This data structure contains a template of all correct FV headers, wh=
ich is used to restore
-// Fv header if it's corrupted.
-//
-EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] =3D {
- //
- // Systen NvStorage FVB
- //
- {
- NV_STORAGE_BASE_ADDRESS,
- {
- {0,}, //ZeroVector[16]
- EFI_SYSTEM_NV_DATA_FV_GUID,
- FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
- EFI_FVH_SIGNATURE,
- 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for deta=
ils on EFI_FVB_ATTRIBUTES_2
- sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENT=
RY),
- 0, //CheckSum which will be calucated dynamically.
- 0, //ExtHeaderOffset
- {0,}, //Reserved[1]
- 2, //Revision
- {
- {
- SYSTEM_NV_BLOCK_NUM,
- FVB_MEDIA_BLOCK_SIZE,
- }
- }
- },
- {
- {
- 0,
- 0
- }
- }
- }
-};
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- )
-{
- UINTN Index;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
-
- for (Index =3D 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI=
_FVB2_MEDIA_INFO); Index++) {
- if (mPlatformFvbMediaInfo[Index].BaseAddress =3D=3D FvBaseAddress) {
- FvHeader =3D &mPlatformFvbMediaInfo[Index].FvbInfo;
-
- //
- // Update the checksum value of FV header.
- //
- FvHeader->Checksum =3D CalculateCheckSum16 ( (UINT16 *) FvHeader, =
FvHeader->HeaderLength);
-
- *FvbInfo =3D FvHeader;
-
- DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
- DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
- DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLen=
gth));
- DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksu=
m));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)=
->BlockMap[0].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInf=
o)->BlockMap[0].Length));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)=
->BlockMap[1].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbI=
nfo)->BlockMap[1].Length));
-
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceCommon.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbSer=
viceCommon.c
deleted file mode 100644
index 113c749d04ff..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceComm=
on.c
+++ /dev/null
@@ -1,903 +0,0 @@
-/** @file
- Common driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-//
-// Global variable for this FVB driver which contains
-// the private data of all firmware volume block instances
-//
-FVB_GLOBAL mFvbModuleGlobal;
-
-//
-// This platform driver knows there are multiple FVs on FD.
-// Now we only provide FVs on Variable region and MicorCode region for p=
erformance issue.
-//
-FV_INFO mPlatformFvBaseAddress[] =3D {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet3=
2(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdF=
lashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_INFO mPlatformDefaultBaseAddress[] =3D {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet3=
2(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdF=
lashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate =3D {
- {
- {
- HARDWARE_DEVICE_PATH,
- HW_MEMMAP_DP,
- {
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
- }
- },
- EfiMemoryMappedIO,
- (EFI_PHYSICAL_ADDRESS) 0,
- (EFI_PHYSICAL_ADDRESS) 0,
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate =3D {
- {
- {
- MEDIA_DEVICE_PATH,
- MEDIA_PIWG_FW_VOL_DP,
- {
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
- }
- },
- { 0 }
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-//
-// Template structure used when installing FVB protocol
-//
-EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate =3D {
- FvbProtocolGetAttributes,
- FvbProtocolSetAttributes,
- FvbProtocolGetPhysicalAddress,
- FvbProtocolGetBlockSize,
- FvbProtocolRead,
- FvbProtocolWrite,
- FvbProtocolEraseBlocks,
- NULL
-};
-
-/**
- Get the EFI_FVB_ATTRIBUTES_2 of a FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
-
- @return Attributes of the FV identified by FvbInstance.
-
-**/
-EFI_FVB_ATTRIBUTES_2
-FvbGetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- return FvbInstance->FvHeader.Attributes;
-}
-
-/**
- Retrieves the starting address of an LBA in an FV. It also
- return a few other attribut of the FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Lba The logical block address
- @param[out] LbaAddress On output, contains the physical starting =
address
- of the Lba
- @param[out] LbaLength On output, contains the length of the bloc=
k
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in w=
hich the
- number of consecutive blocks starting with=
Lba is
- returned. All blocks in this range have a =
size of
- BlockSize
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbGetLbaAddress (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- OUT UINTN *LbaAddress,
- OUT UINTN *LbaLength,
- OUT UINTN *NumOfBlocks
- )
-{
- UINT32 NumBlocks;
- UINT32 BlockLength;
- UINTN Offset;
- EFI_LBA StartLba;
- EFI_LBA NextLba;
- EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
-
- StartLba =3D 0;
- Offset =3D 0;
- BlockMap =3D &(FvbInstance->FvHeader.BlockMap[0]);
-
- //
- // Parse the blockmap of the FV to find which map entry the Lba belong=
s to
- //
- while (TRUE) {
- NumBlocks =3D BlockMap->NumBlocks;
- BlockLength =3D BlockMap->Length;
-
- if ( NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- NextLba =3D StartLba + NumBlocks;
-
- //
- // The map entry found
- //
- if (Lba >=3D StartLba && Lba < NextLba) {
- Offset =3D Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLengt=
h);
- if (LbaAddress ) {
- *LbaAddress =3D FvbInstance->FvBase + Offset;
- }
-
- if (LbaLength ) {
- *LbaLength =3D BlockLength;
- }
-
- if (NumOfBlocks ) {
- *NumOfBlocks =3D (UINTN)(NextLba - Lba);
- }
- return EFI_SUCCESS;
- }
-
- StartLba =3D NextLba;
- Offset =3D Offset + NumBlocks * BlockLength;
- BlockMap++;
- }
-}
-
-/**
- Reads specified number of bytes into a buffer from the specified block=
.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTA=
NCE
- @param[in] Lba The logical block address to be =
read from
- @param[in] BlockOffset Offset into the block at which t=
o begin reading
- @param[in] NumBytes Pointer that on input contains t=
he total size of
- the buffer. On output, it contai=
ns the total number
- of bytes read
- @param[in] Buffer Pointer to a caller allocated bu=
ffer that will be
- used to hold the data read
-
-
- @retval EFI_SUCCESS The firmware volume was read suc=
cessfully and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boun=
dary. On output,
- NumBytes contains the total numb=
er of bytes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the Re=
adDisabled state
- @retval EFI_DEVICE_ERROR The block device is not function=
ing correctly and
- could not be read
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,=
Buffer are NULL
-
-**/
-EFI_STATUS
-FvbReadBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize =3D FALSE;
-
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes =3D=3D 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Attributes =3D FvbGetVolumeAttributes (FvbInstance);
-
- if ((Attributes & EFI_FVB2_READ_STATUS) =3D=3D 0) {
- return EFI_ACCESS_DENIED;
- }
-
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes =3D (UINT32) (LbaLength - BlockOffset);
- BadBufferSize =3D TRUE;
- }
-
- Status =3D SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes,=
Buffer);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-/**
- Writes specified number of bytes from the input buffer to the block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The starting logical block index to =
write to
- @param[in] BlockOffset Offset into the block at which to be=
gin writing
- @param[in] NumBytes Pointer that on input contains the t=
otal size of
- the buffer. On output, it contains t=
he total number
- of bytes actually written
- @param[in] Buffer Pointer to a caller allocated buffer=
that contains
- the source for the write
- @retval EFI_SUCCESS The firmware volume was written succ=
essfully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundar=
y. On output,
- NumBytes contains the total number o=
f bytes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteD=
isabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning =
correctly and
- could not be written
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buf=
fer are NULL
-
-**/
-EFI_STATUS
-FvbWriteBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize =3D FALSE;
-
- if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes =3D=3D 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- //
- // Check if the FV is write enabled
- //
- Attributes =3D FvbGetVolumeAttributes (FvbInstance);
- if ((Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Perform boundary checks and adjust NumBytes
- //
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes =3D (UINT32) (LbaLength - BlockOffset);
- BadBufferSize =3D TRUE;
- }
-
- Status =3D SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes=
, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status =3D SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset)=
, *NumBytes);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-
-
-/**
- Erases and initializes a firmware volume block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The logical block index to be erased
-
- @retval EFI_SUCCESS The erase request was successfully com=
pleted
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDis=
abled state
- @retval EFI_DEVICE_ERROR The block device is not functioning co=
rrectly and
- could not be written. Firmware device =
may have been
- partially erased
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbEraseBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba
- )
-{
-
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
-
- //
- // Check if the FV is write enabled
- //
- Attributes =3D FvbGetVolumeAttributes (FvbInstance);
-
- if( (Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Get the starting address of the block for erase.
- //
- Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Status =3D SpiFlashBlockErase (LbaAddress, &LbaLength);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status =3D SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
-
- return Status;
-}
-
-/**
- Modifies the current settings of the firmware volume according to the
- input parameter, and returns the new setting of the volume
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Attributes On input, it is a pointer to EFI_FVB=
_ATTRIBUTES_2
- containing the desired firmware volu=
me settings.
- On successful return, it contains th=
e new settings
- of the firmware volume
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_ACCESS_DENIED The volume setting is locked and can=
not be modified
- @retval EFI_INVALID_PARAMETER Instance not found, or The attribute=
s requested are
- in conflict with the capabilities as=
declared in the
- firmware volume header
-
-**/
-EFI_STATUS
-FvbSetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_ATTRIBUTES_2 OldAttributes;
- EFI_FVB_ATTRIBUTES_2 *AttribPtr;
- EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
- UINT32 Capabilities;
- UINT32 OldStatus, NewStatus;
-
- AttribPtr =3D (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Att=
ributes);
- OldAttributes =3D *AttribPtr;
- Capabilities =3D OldAttributes & EFI_FVB2_CAPABILITIES;
- OldStatus =3D OldAttributes & EFI_FVB2_STATUS;
- NewStatus =3D *Attributes & EFI_FVB2_STATUS;
-
- UnchangedAttributes =3D EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP | \
- EFI_FVB2_STICKY_WRITE | \
- EFI_FVB2_MEMORY_MAPPED | \
- EFI_FVB2_ERASE_POLARITY | \
- EFI_FVB2_READ_LOCK_CAP | \
- EFI_FVB2_WRITE_LOCK_CAP | \
- EFI_FVB2_ALIGNMENT;
-
- //
- // Some attributes of FV is read only can *not* be set
- //
- if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAt=
tributes)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // If firmware volume is locked, no status bit can be updated
- //
- if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
- if ( OldStatus ^ NewStatus ) {
- return EFI_ACCESS_DENIED;
- }
- }
-
- //
- // Test read disable
- //
- if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) =3D=3D 0) {
- if ((NewStatus & EFI_FVB2_READ_STATUS) =3D=3D 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test read enable
- //
- if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) =3D=3D 0) {
- if (NewStatus & EFI_FVB2_READ_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write disable
- //
- if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) =3D=3D 0) {
- if ((NewStatus & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write enable
- //
- if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) =3D=3D 0) {
- if (NewStatus & EFI_FVB2_WRITE_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test lock
- //
- if ((Capabilities & EFI_FVB2_LOCK_CAP) =3D=3D 0) {
- if (NewStatus & EFI_FVB2_LOCK_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- *AttribPtr =3D (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
- *AttribPtr =3D (*AttribPtr) | NewStatus;
- *Attributes =3D *AttribPtr;
-
- return EFI_SUCCESS;
-}
-
-/**
- Check the integrity of firmware volume header
-
- @param[in] FvHeader A pointer to a firmware volume header
-
- @retval TRUE The firmware volume is consistent
- @retval FALSE The firmware volume has corrupted.
-
-**/
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
- )
-{
- if (FvBase =3D=3D PcdGet32(PcdFlashNvStorageVariableBase)) {
- if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, =
sizeof(EFI_GUID)) !=3D 0 ) {
- return FALSE;
- }
- } else {
- if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2G=
uid, sizeof(EFI_GUID)) !=3D 0 ) {
- return FALSE;
- }
- }
- if ( (FvHeader->Revision !=3D EFI_FVH_REVISION) ||
- (FvHeader->Signature !=3D EFI_FVH_SIGNATURE) ||
- (FvHeader->FvLength =3D=3D ((UINTN) -1)) ||
- ((FvHeader->HeaderLength & 0x01 ) !=3D0) ) {
- return FALSE;
- }
-
- if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) =
!=3D 0) {
- return FALSE;
- }
-
- return TRUE;
-}
-
-//
-// FVB protocol APIs
-//
-
-/**
- Retrieves the physical address of the device.
-
- @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
- @param[out] Address Output buffer containing the address.
-
- retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- *Address =3D FvbInstance->FvBase;
-
- return EFI_SUCCESS;
-}
-
-/**
- Retrieve the size of a logical block
-
- @param[in] This Calling context
- @param[in] Lba Indicates which block to return the size for.
- @param[out] BlockSize A pointer to a caller allocated UINTN in which
- the size of the block is returned
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which=
the
- number of consecutive blocks starting with Lba=
is
- returned. All blocks in this range have a size=
of
- BlockSize
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x=
%x\n",
- Lba,
- BlockSize,
- NumOfBlocks)
- );
-
- return FvbGetLbaAddress (
- FvbInstance,
- Lba,
- NULL,
- BlockSize,
- NumOfBlocks
- );
-}
-
-/**
- Retrieves Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- *Attributes =3D FvbGetVolumeAttributes (FvbInstance);
-
- DEBUG ((DEBUG_INFO,
- "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- return EFI_SUCCESS;
-}
-
-/**
- Sets Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_STATUS Status;
- EFI_FVB_INSTANCE *FvbInstance;
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x=
\n",
- This,
- *Attributes)
- );
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- Status =3D FvbSetVolumeAttributes (FvbInstance, Attributes);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\=
n",
- This,
- *Attributes)
- );
-
- return Status;
-}
-
-/**
- The EraseBlock() function erases one or more blocks as denoted by the
- variable argument list. The entire parameter list of blocks must be ve=
rified
- prior to erasing any blocks. If a block is requested that does not ex=
ist
- within the associated firmware volume (it has a larger index than the =
last
- block of the firmware volume), the EraseBlock() function must return
- EFI_INVALID_PARAMETER without modifying the contents of the firmware v=
olume.
-
- @param[in] This Calling context
- @param[in] ... Starting LBA followed by Number of Lba to eras=
e.
- a -1 to terminate the list.
-
- @retval EFI_SUCCESS The erase request was successfully completed
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled =
state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctl=
y and
- could not be written. Firmware device may ha=
ve been
- partially erased
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- UINTN NumOfBlocks;
- VA_LIST Args;
- EFI_LBA StartingLba;
- UINTN NumOfLba;
- EFI_STATUS Status;
-
- DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- NumOfBlocks =3D FvbInstance->NumOfBlocks;
-
- VA_START (Args, This);
-
- do {
- StartingLba =3D VA_ARG (Args, EFI_LBA);
- if ( StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR ) {
- break;
- }
-
- NumOfLba =3D VA_ARG (Args, UINT32);
-
- //
- // Check input parameters
- //
- if (NumOfLba =3D=3D 0) {
- VA_END (Args);
- return EFI_INVALID_PARAMETER;
- }
-
- if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
- return EFI_INVALID_PARAMETER;
- }
- } while ( 1 );
-
- VA_END (Args);
-
- VA_START (Args, This);
- do {
- StartingLba =3D VA_ARG (Args, EFI_LBA);
- if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) {
- break;
- }
-
- NumOfLba =3D VA_ARG (Args, UINT32);
-
- while ( NumOfLba > 0 ) {
- Status =3D FvbEraseBlock (FvbInstance, StartingLba);
- if ( EFI_ERROR(Status)) {
- VA_END (Args);
- return Status;
- }
- StartingLba ++;
- NumOfLba --;
- }
-
- } while ( 1 );
-
- VA_END (Args);
-
- return EFI_SUCCESS;
-}
-
-/**
- Writes data beginning at Lba:Offset from FV. The write terminates eith=
er
- when *NumBytes of data have been written, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size=
. On
- output, indicates the actual number of bytes=
written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was written successf=
ully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. O=
n output,
- NumBytes contains the total number of by=
tes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisab=
led state
- @retval EFI_DEVICE_ERROR The block device is not functioning corr=
ectly and
- could not be written
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0=
x%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
-}
-
-/**
- Reads data beginning at Lba:Offset from FV. The Read terminates either
- when *NumBytes of data have been read, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size=
. On
- output, indicates the actual number of bytes=
written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was read successfull=
y and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On=
output,
- NumBytes contains the total number of by=
tes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabl=
ed state
- @retval EFI_DEVICE_ERROR The block device is not functioning corr=
ectly and
- could not be read
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_STATUS Status;
-
- FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
- Status =3D FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
- DEBUG((DEBUG_INFO,
- "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x=
%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return Status;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbService=
Mm.c
deleted file mode 100644
index 016f19587c91..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
-
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include <Library/MmServicesTableLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Protocol/SmmFirmwareVolumeBlock.h>
-
-/**
- The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
- for each FV in the system.
-
- @param[in] FvbInstance The pointer to a FW volume instance structur=
e,
- which contains the information about one FV.
-
- @retval VOID
-
-**/
-VOID
-InstallFvbProtocol (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_STATUS Status;
- EFI_HANDLE FvbHandle;
-
- ASSERT (FvbInstance !=3D NULL);
- if (FvbInstance =3D=3D NULL) {
- return;
- }
-
- CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI=
_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
-
- FvHeader =3D &FvbInstance->FvHeader;
- if (FvHeader =3D=3D NULL) {
- return;
- }
-
- //
- // Set up the devicepath
- //
- DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx=
:\n", FvbInstance->FvBase));
- if (FvHeader->ExtHeaderOffset =3D=3D 0) {
- //
- // FV does not contains extension header, then produce MEMMAP_DEVICE=
_PATH
- //
- FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRun=
timeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplat=
e);
- if (FvbInstance->DevicePath =3D=3D NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEM=
MAP_DEVICE_PATH failed\n"));
- return;
- }
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.S=
tartingAddress =3D FvbInstance->FvBase;
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.E=
ndingAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1;
- } else {
- FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRun=
timeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
- if (FvbInstance->DevicePath =3D=3D NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_=
PIWG_DEVICE_PATH failed\n"));
- return;
- }
- CopyGuid (
- &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvNam=
e,
- (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
- );
- }
-
- //
- // LocateDevicePath fails so install a new interface and device path
- //
- FvbHandle =3D NULL;
-
- Status =3D gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiSmmFirmwareVolumeBlockProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->FvbProtocol)
- );
- ASSERT_EFI_ERROR (Status);
-
- Status =3D gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiDevicePathProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->DevicePath)
- );
- ASSERT_EFI_ERROR (Status);
-}
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_STATUS Status;
- UINTN BufferSize;
- UINTN Idx;
- UINT32 MaxLbaSize;
- UINT32 BytesWritten;
- UINTN BytesErased;
-
- mPlatformFvBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVariabl=
eBase);
- mPlatformFvBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVariabl=
eSize);
- mPlatformFvBaseAddress[1].FvBase =3D PcdGet32(PcdFlashFvMicrocodeBase)=
;
- mPlatformFvBaseAddress[1].FvSize =3D PcdGet32(PcdFlashFvMicrocodeSize)=
;
- mPlatformDefaultBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVa=
riableBase);
- mPlatformDefaultBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVa=
riableSize);
- mPlatformDefaultBaseAddress[1].FvBase =3D PcdGet32(PcdFlashFvMicrocode=
Base);
- mPlatformDefaultBaseAddress[1].FvSize =3D PcdGet32(PcdFlashFvMicrocode=
Size);
-
- //
- // We will only continue with FVB installation if the
- // SPI is the active BIOS state
- //
- {
- //
- // Make sure all FVB are valid and/or fix if possible
- //
- for (Idx =3D 0;; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
- break;
- }
-
- BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- BytesWritten =3D 0;
- BytesErased =3D 0;
- DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvH=
eader));
- Status =3D GetFvbInfo (BaseAddress, &FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.=
GetFvbInfo Status %r\n", BaseAddress, Status));
- continue;
- }
- DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static dat=
a\n", BaseAddress));
- //
- // Spi erase
- //
- BytesErased =3D (UINTN) FvHeader->BlockMap->Length;
- Status =3D SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased=
);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", =
Status));
- continue;
- }
- if (BytesErased !=3D FvHeader->BlockMap->Length) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesErased !=3D FvHeader->BlockM=
ap->Length\n"));
- DEBUG ((DEBUG_INFO, " BytesErased =3D 0x%X\n Length =3D 0x%X\n=
", BytesErased, FvHeader->BlockMap->Length));
- continue;
- }
- BytesWritten =3D FvHeader->HeaderLength;
- Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UI=
NT8*)FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Statu=
s));
- continue;
- }
- if (BytesWritten !=3D FvHeader->HeaderLength) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D HeaderLength\n"=
));
- DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n HeaderLength =3D=
0x%X\n", BytesWritten, FvHeader->HeaderLength));
- continue;
- }
- Status =3D SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status=
));
- continue;
- }
- DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\=
n", BaseAddress));
- //
- // Clear cache for this range.
- //
- WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress=
, FvHeader->BlockMap->Length);
- }
- }
-
- //
- // Calculate the total size for all firmware volume block instances
- //
- BufferSize =3D 0;
- for (Idx =3D 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
- break;
- }
- BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHe=
ader));
- continue;
- }
-
- BufferSize +=3D (FvHeader->HeaderLength +
- sizeof (EFI_FVB_INSTANCE) -
- sizeof (EFI_FIRMWARE_VOLUME_HEADER)
- );
- }
-
- mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *) AllocateRunti=
meZeroPool (BufferSize);
- if (mFvbModuleGlobal.FvbInstance =3D=3D NULL) {
- ASSERT (FALSE);
- return;
- }
-
- MaxLbaSize =3D 0;
- FvbInstance =3D mFvbModuleGlobal.FvbInstance;
- mFvbModuleGlobal.NumFv =3D 0;
-
- for (Idx =3D 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
- break;
- }
- BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHe=
ader));
- continue;
- }
-
- FvbInstance->Signature =3D FVB_INSTANCE_SIGNATURE;
- CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLengt=
h);
-
- FvHeader =3D &(FvbInstance->FvHeader);
- FvbInstance->FvBase =3D (UINTN)BaseAddress;
-
- //
- // Process the block map for each FV
- //
- FvbInstance->NumOfBlocks =3D 0;
- for (PtrBlockMapEntry =3D FvHeader->BlockMap;
- PtrBlockMapEntry->NumBlocks !=3D 0;
- PtrBlockMapEntry++) {
- //
- // Get the maximum size of a block.
- //
- if (MaxLbaSize < PtrBlockMapEntry->Length) {
- MaxLbaSize =3D PtrBlockMapEntry->Length;
- }
- FvbInstance->NumOfBlocks +=3D PtrBlockMapEntry->NumBlocks;
- }
-
- //
- // Add a FVB Protocol Instance
- //
- InstallFvbProtocol (FvbInstance);
- mFvbModuleGlobal.NumFv++;
-
- //
- // Move on to the next FvbInstance
- //
- FvbInstance =3D (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance=
) +
- FvHeader->HeaderLength +
- (sizeof (EFI_FVB_INSTANCE) -=
sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
-
- }
- }
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceStandaloneMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Spi=
FvbServiceStandaloneMm.c
deleted file mode 100644
index 252c818d6551..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStan=
daloneMm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Standalone MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] MmSystemTable A pointer to the MM system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCE=
SS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbStandaloneMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_MM_SYSTEM_TABLE *MmSystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceTraditionalMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Sp=
iFvbServiceTraditionalMm.c
deleted file mode 100644
index 1c2dac70e3c6..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTrad=
itionalMm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Traditional MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCE=
SS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbTraditionalMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceCommon.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbSer=
viceCommon.h
deleted file mode 100644
index e9d69e985814..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceComm=
on.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/** @file
- Common source definitions used in serial flash drivers
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_COMMON_H
-#define _SPI_FVB_SERVICE_COMMON_H
-
-#include <Guid/EventGroup.h>
-#include <Guid/FirmwareFileSystem2.h>
-#include <Guid/SystemNvDataGuid.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/FirmwareVolumeBlock.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/IoLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/HobLib.h>
-
-#include <Library/SpiFlashCommonLib.h>
-
-//
-// Define two helper macro to extract the Capability field or Status fie=
ld in FVB
-// bit fields
-//
-#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP \
- )
-
-#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | =
EFI_FVB2_LOCK_STATUS)
-
-#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
-
-typedef struct {
- UINT32 Signature;
- UINTN FvBase;
- UINTN NumOfBlocks;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
- EFI_FIRMWARE_VOLUME_HEADER FvHeader;
-} EFI_FVB_INSTANCE;
-
-typedef struct {
- EFI_FVB_INSTANCE *FvbInstance;
- UINT32 NumFv;
-} FVB_GLOBAL;
-
-//
-// Fvb Protocol instance data
-//
-#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, F=
VB_INSTANCE_SIGNATURE)
-
-typedef struct {
- MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_PIWG_DEVICE_PATH;
-
-typedef struct {
- MEMMAP_DEVICE_PATH MemMapDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_MEMMAP_DEVICE_PATH;
-
-typedef struct {
- UINT32 FvBase;
- UINT32 FvSize;
-} FV_INFO;
-
-//
-// Protocol APIs
-//
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- );
-
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
- );
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- );
-
-extern FVB_GLOBAL mFvbModuleGlobal;
-extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
-extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
-extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
-extern FV_INFO mPlatformFvBaseAddress[];
-extern FV_INFO mPlatformDefaultBaseAddress[];
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceMm.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbService=
Mm.h
deleted file mode 100644
index 36af1130c8ee..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/** @file
- Definitions common to MM implementation in this driver.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_MM_H_
-#define _SPI_FVB_SERVICE_MM_H_
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- );
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceSmm.inf
deleted file mode 100644
index 10e51e11756f..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.=
inf
+++ /dev/null
@@ -1,68 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Runtime driver.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION =3D 0x00010017
- BASE_NAME =3D SpiFvbServiceSmm
- FILE_GUID =3D 68A10D85-6858-4402-B070-028B3EA2174=
7
- VERSION_STRING =3D 1.0
- MODULE_TYPE =3D DXE_SMM_DRIVER
- PI_SPECIFICATION_VERSION =3D 1.10
- ENTRY_POINT =3D SpiFvbTraditionalMmInitialize
-
-#
-# The following information is for reference only and not required by th=
e build tools.
-#
-# VALID_ARCHITECTURES =3D IA32 X64
-#
-
-[LibraryClasses]
- PcdLib
- MemoryAllocationLib
- CacheMaintenanceLib
- BaseMemoryLib
- DebugLib
- BaseLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
- SpiFlashCommonLib
- MmServicesTableLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONS=
UMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONS=
UMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONS=
UMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceTraditionalMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServ=
iceStandaloneMm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/S=
piFvbServiceStandaloneMm.inf
deleted file mode 100644
index 9f08d3673f41..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStan=
daloneMm.inf
+++ /dev/null
@@ -1,67 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Standalone MM d=
river.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION =3D 0x0001001B
- BASE_NAME =3D SpiFvbServiceStandaloneMm
- FILE_GUID =3D E6313655-8BD0-4EAB-B319-AD5E212CE6A=
B
- VERSION_STRING =3D 1.0
- MODULE_TYPE =3D MM_STANDALONE
- PI_SPECIFICATION_VERSION =3D 0x00010032
- ENTRY_POINT =3D SpiFvbStandaloneMmInitialize
-
-#
-# The following information is for reference only and not required by th=
e build tools.
-#
-# VALID_ARCHITECTURES =3D IA32 X64
-#
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- CacheMaintenanceLib
- DebugLib
- MemoryAllocationLib
- PcdLib
- MmServicesTableLib
- SpiFlashCommonLib
- StandaloneMmDriverEntryPoint
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONS=
UMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONS=
UMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONS=
UMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONS=
UMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceStandaloneMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/=
Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 35cbd40abb05..15867eee4e61 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -159,8 +159,6 @@ [Components]
=20
MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootMa=
nagerLib.inf
=20
- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNu=
ll.inf
=20
MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 24/41] WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates WhiskeylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc =
| 7 +++++--
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf =
| 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc =
| 7 +++++--
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf =
| 2 +-
4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg=
.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index ee2aedd978e0..e9c1751df9ba 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommon=
Lib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# Platform Package
@@ -395,6 +395,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -415,7 +419,6 @@ [Components.X64]
=20
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg=
.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 8aea5aa475a0..ae0ba27c1f34 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -413,7 +413,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenB=
oardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Open=
BoardPkg.dsc
index b69cc8deb0a0..e3cf99639620 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommon=
Lib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -421,7 +425,6 @@ [Components.X64]
=20
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenB=
oardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Open=
BoardPkg.fdf
index f0601984338c..414780eb05f1 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.fdf
@@ -407,7 +407,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 23/41] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 =
+++++--
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 =
+-
2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoard=
Pkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg=
.dsc
index 1adf63403450..758b966fee81 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -173,7 +173,7 @@ [LibraryClasses.X64]
!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
=20
[LibraryClasses.X64.DXE_SMM_DRIVER]
- SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCommonL=
ib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
!if $(TARGET) =3D=3D DEBUG
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S=
mmTestPointCheckLib.inf
!endif
@@ -297,6 +297,10 @@ [Components.X64]
!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#
# SmmAccess
#
@@ -326,7 +330,6 @@ [Components.X64]
NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.i=
nf
}
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoard=
Pkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg=
.fdf
index e3b2f048524c..b802c2167d06 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -434,7 +434,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.=
inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 22/41] SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates SimicsOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 6 ++-=
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg=
.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 93a7d1df55ae..a3c54a19739c 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -169,7 +169,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PCH_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashC=
ommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# PEI Components
@@ -288,6 +288,7 @@ [Components.X64]
$(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf
$(PCH_PKG)/Spi/Smm/PchSpiSmm.inf
$(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
!endif
=20
#####################################
@@ -295,9 +296,6 @@ [Components.X64]
#####################################
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
-!endif
=20
#######################################
# Board Package
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg=
.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 99bf60777553..1719513d3ac2 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -210,7 +210,7 @@ [FV.DXEFV]
=20
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
INF BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 21/41] KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates KabylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 ++=
+++--
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 7 ++=
+++--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 2 +-
4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.=
dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 302cb679b5eb..89be744a9038 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -228,7 +228,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommon=
Lib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# Platform Package
@@ -377,6 +377,10 @@ [Components.X64]
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -393,7 +397,6 @@ [Components.X64]
=20
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.=
fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 39432d21b8b5..239b6b720a6a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -401,7 +401,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.=
inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPk=
g.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 8523ab3f4fc1..f29393579c06 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -268,7 +268,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommon=
Lib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# Platform Package
@@ -456,6 +456,10 @@ [Components.X64]
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -472,7 +476,6 @@ [Components.X64]
=20
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPk=
g.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index f003dda0ddfc..23f9be5cf2a2 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -408,7 +408,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.=
inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 20/41] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates CometlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 =
+++++--
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 2 =
+-
2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoard=
Pkg.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg=
.dsc
index 44a1bd54d6e9..316100e9a599 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommon=
Lib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF=
lashCommonLib.inf
=20
#######################################
# Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
=20
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -421,7 +425,6 @@ [Components.X64]
=20
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
=20
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
=20
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoard=
Pkg.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg=
.fdf
index 6397d80d3895..e341285f4b1a 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -407,7 +407,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.in=
f
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
=20
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 19/41] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Removes the PCDs from SiPkg.dec since they are defined in
IntelSiliconPkg.dec.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 5 -----
1 file changed, 5 deletions(-)

diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/=
TigerlakeSiliconPkg/SiPkg.dec
index 0c0f2db1048d..37f61cc5ee18 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -837,15 +837,10 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processo=
r.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
gSiPkgTokenSpaceGuid.PcdTopMemoryCacheSize|0x0|UINT32|0x0001002A
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x3000000=
4
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x3000000=
5
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset|0x00000060|UINT32|0x3000001=
3
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000=
006
##
## The CPU Trace Hub's BARs base and size
##
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 18/41] SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

The previous PCDs are removed from Ich10Pkg.dec.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommo=
n.c | 2 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec =
| 6 ------
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchS=
piCommonLib.inf | 5 +++--
3 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommon=
Lib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiC=
ommonLib/SpiCommon.c
index 3e7dffedfbe9..f2907ef53bfc 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Spi=
Common.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Spi=
Common.c
@@ -69,7 +69,7 @@ SpiProtocolConstructor (
SpiInstance->WritePermis=
sion));
=20
//
- SpiInstance->TotalFlashSize =3D PcdGet32(PcdFlashAreaSize);
+ SpiInstance->TotalFlashSize =3D PcdGet32 (PcdBiosSize);
DEBUG ((DEBUG_INFO, "Total Flash Size : %0x\n", SpiInstance->TotalFlas=
hSize));
return EFI_SUCCESS;
}
diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/Si=
micsIch10Pkg/Ich10Pkg.dec
index 0eb2e5530c3a..8d395a8b4370 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
+++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
@@ -16,11 +16,5 @@ [Includes]
=20
[Ppis]
=20
-[Guids]
- gEfiPchTokenSpaceGuid =3D { 0x89a1b278, 0xa1a1, 0x4df7, { 0xb1, 0x37, =
0xde, 0x5a, 0xd7, 0xc4, 0x79, 0x13 } }
[Protocols]
gEfiSmmSpiProtocolGuid =3D {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0=
xb2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}}
-
-[PcdsFixedAtBuild]
- gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFFE00000|UINT32|0x1000=
0001
- gEfiPchTokenSpaceGuid.PcdFlashAreaSize|0x00200000|UINT32|0x10000002
\ No newline at end of file
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommon=
Lib/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate=
/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index df1da274a642..b5aa13c1c56d 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Bas=
ePchSpiCommonLib.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Bas=
ePchSpiCommonLib.inf
@@ -20,6 +20,7 @@ [Sources]
=20
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
=20
[LibraryClasses]
@@ -27,5 +28,5 @@ [LibraryClasses]
DebugLib
=20
[Pcd]
- gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
- gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 17/41] KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolic=
yLib.inf | 4 ++--
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec =
| 10 +++-------
2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib=
/PeiCpuPolicyLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCp=
uPolicyLib/PeiCpuPolicyLib.inf
index d3b4d9e318b8..3ca373a23c0a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpu=
PolicyLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpu=
PolicyLib.inf
@@ -45,8 +45,8 @@ [Ppis]
gSiPolicyPpiGuid ## CONSUMES
=20
[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
=20
[Pcd]
gSiPkgTokenSpaceGuid.PcdSmmbaseSwSmi
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/K=
abylakeSiliconPkg/SiPkg.dec
index 3881671757a3..5ff7b39ca60e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -63,7 +63,7 @@ [Guids]
gEfiCapsuleVendorGuid =3D {0x711c703f, 0xc285, 0x4b10, {0xa3, =
0xb0, 0x36, 0xec, 0xbd, 0x3c, 0x8b, 0xe2}}
gEfiConsoleOutDeviceGuid =3D {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, =
0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
##
-##=20
+##
##
gSmbiosProcessorInfoHobGuid =3D {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xa=
c, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
gSmbiosCacheInfoHobGuid =3D {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x3=
6, 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
@@ -264,7 +264,7 @@ [Protocols]
##
gEfiSmmVariableProtocolGuid =3D {0xed32d533, 0x99e6, 0x4209, {0x9c, 0x=
c0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7}}
##
-##=20
+##
##
gSmbiosProcessorInfoHobGuid =3D {0xe6d73d92, 0xff56, 0x4146, {0x=
af, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
=20
@@ -453,13 +453,9 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processo=
r.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x1000000=
1
-gSiPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x3000000=
4
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x3000000=
5
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000=
006
+
##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
## value of the struct
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 16/41] CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

The previous PCDs are removed from CoffeelakeSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPol=
icyLib.inf | 4 ++--
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec =
| 5 -----
2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyL=
ib/PeiCpuPolicyLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/P=
eiCpuPolicyLib/PeiCpuPolicyLib.inf
index f793432bf049..ca57b5b31e0a 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiC=
puPolicyLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiC=
puPolicyLib.inf
@@ -48,8 +48,8 @@ [Ppis]
gSiPreMemPolicyPpiGuid ## CONSUMES
=20
[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
=20
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## Produces
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel=
/CoffeelakeSiliconPkg/SiPkg.dec
index 6cf894498d6b..5ea6fbb28411 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -474,13 +474,8 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processo=
r.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x3000000=
4
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x3000000=
5
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000=
006
=20
##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 15/41] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf =
| 4 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDx=
e.inf | 4 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapIncl=
ude.fdf | 4 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/Pei=
MultiBoardInitPreMemLib.inf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf =
| 36 ++++++++++----------
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Flash=
MapInclude.fdf | 4 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf =
| 36 ++++++++++----------
7 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf=
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index a9687d93dee1..0a807ad84f4d 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
=20
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
=20
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/=
PolicyInitDxe.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyI=
nitDxe/PolicyInitDxe.inf
index 3233375d6568..537d507ed7d6 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyI=
nitDxe.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyI=
nitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
=20
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress =
## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/=
FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Inc=
lude/Fdf/FlashMapInclude.fdf
index f7aa730ae7d2..5895eebc5a79 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMa=
pInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMa=
pInclude.fdf
@@ -38,8 +38,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D =
0x00170000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D =
0x00490000 # Flash addr (0xFFDE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D =
0x00070000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00500000 # Flash addr (0xFFE50000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x00050000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00500000 # Flash addr (0xFFE50000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x00050000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D =
0x00550000 # Flash addr (0xFFEA0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =3D =
0x000EA000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D =
0x0063A000 # Flash addr (0xFFF8A000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/Boar=
dInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOpenB=
oardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index 2903bdacaebd..091d2118c7b3 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLi=
b/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLi=
b/PeiMultiBoardInitPreMemLib.inf
@@ -293,7 +293,7 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
=20
[FixedPcd]
gSiPkgTokenSpaceGuid.PcdMchBaseAddress ## CONSUMES
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg=
.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 22fbfc99f0f0..8aea5aa475a0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.UpXtreme]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAd=
dress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.UpXtreme]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase t=
o get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvO=
ffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -158,8 +158,8 @@ [FD.UpXtreme]
# FSP_S Section
FILE =3D $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Inclu=
de/Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Whisk=
eylakeURvp/Include/Fdf/FlashMapInclude.fdf
index e0db38194211..586e3488c2a7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/=
FlashMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/=
FlashMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D =
0x00190000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D =
0x00320000 # Flash addr (0xFFB20000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D =
0x00170000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00490000 # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000B0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00490000 # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000B0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D =
0x00540000 # Flash addr (0xFFD40000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D =
0x00070000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D =
0x005B0000 # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenB=
oardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Open=
BoardPkg.fdf
index 1ab8c137924e..f0601984338c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg=
.fdf
@@ -31,8 +31,8 @@ [FD.WhiskeylakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAd=
dress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.WhiskeylakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase t=
o get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvO=
ffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -153,8 +153,8 @@ [FD.WhiskeylakeURvp]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTo=
kenSpaceGuid.PcdFlashFvPostMemorySize
FV =3D FvPostMemory
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 14/41] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf =
| 8 ++---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapI=
nclude.fdf | 4 +--
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf =
| 38 ++++++++++----------
3 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b=
/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 66c8814c97bb..56da991ab544 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -39,8 +39,8 @@ [Packages]
BoardModulePkg/BoardModulePkg.dec
=20
[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CON=
SUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CON=
SUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CON=
SUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## CON=
SUMES
@@ -61,8 +61,8 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CON=
SUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CON=
SUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CON=
SUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CON=
SUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CON=
SUMES
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/F=
df/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeUR=
vp/Include/Fdf/FlashMapInclude.fdf
index b21ae6401f12..24e2a963ba64 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/Flas=
hMapInclude.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/Flas=
hMapInclude.fdf
@@ -37,8 +37,8 @@
## Build script checks the requirement.
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset =3D=
0x00800000 # Flash addr (0xFFC00000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize =3D=
0x00080000 # Keep 0x80000 or larger
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D=
0x00880000 # Flash addr (0xFFC80000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D=
0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case tha=
t this value change
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D=
0x00880000 # Flash addr (0xFFC80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D=
0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case tha=
t this value change
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D=
0x008F0000 # Flash addr (0xFFC00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D=
0x00080000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D=
0x00970000 # Flash addr (0xFFD70000)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoard=
Pkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg=
.fdf
index c1fd2be6af54..e3b2f048524c 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.TigerlakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAd=
dress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -41,23 +41,23 @@ [FD.TigerlakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase =
to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvO=
ffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset =3D 0x1000
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvO=
ffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMi=
crocodeOffset)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlas=
hMicrocodeOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgToken=
SpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFl=
ashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgToken=
SpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFl=
ashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgToken=
SpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFl=
ashFvFspSOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.=
PcdFlashMicrocodeOffset)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGu=
id.PcdFlashMicrocodeOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelSilic=
onPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpace=
Guid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelSilic=
onPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpace=
Guid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelSilic=
onPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpace=
Guid.PcdFlashFvFspSOffset)
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeOffset
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -153,8 +153,8 @@ [FD.TigerlakeURvp]
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|gBoardModuleTo=
kenSpaceGuid.PcdFlashFvFirmwareBinariesSize
FV =3D FvFwBinaries
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 13/41] SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8=
++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg=
.fdf.inc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.f=
df.inc
index 9c2436c3ad38..69a566307551 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.in=
c
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.in=
c
@@ -45,10 +45,10 @@
SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBas=
e =3D gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorking=
Base + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize =3D 0x1=
0000
=20
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress =3D 0xFFE00000
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaSize =3D 0x00200000
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress =3D $(FW_BASE_=
ADDRESS)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize =3D $(FW_SIZE)
=20
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gEfiPchTok=
enSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gEfiPchTokenSpace=
Guid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSili=
conPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSiliconPkgT=
okenSpaceGuid.PcdBiosSize
=20
DEFINE MEMFD_BASE_ADDRESS =3D 0x800000
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 12/41] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf =
| 4 +--
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclu=
de.fdf | 4 +--
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf =
| 38 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInc=
lude.fdf | 4 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf =
| 38 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilic=
onPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +--
6 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/=
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index e5e40144a68a..6607ea6edfc3 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
=20
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
=20
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/F=
lashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Inclu=
de/Fdf/FlashMapInclude.fdf
index 6cb6d54f558f..ce809a277b6e 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMap=
Include.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMap=
Include.fdf
@@ -36,8 +36,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D =
0x00140000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D =
0x002E0000 # Flash addr (0xFFD00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D =
0x000B0000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00390000 # Flash addr (0xFFDB0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000A0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00390000 # Flash addr (0xFFDB0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D =
0x00430000 # Flash addr (0xFFE50000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D =
0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D =
0x00490000 # Flash addr (0xFFEB0000)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.=
fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index bcd1ade72ba5..39432d21b8b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.GalagoPro3]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseA=
ddress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -39,23 +39,23 @@ [FD.GalagoPro3]
DEFINE SIPKG_PEI_BIN =3D INF
=20
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase =
to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase t=
o get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFv=
Offset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -155,8 +155,8 @@ [FD.GalagoPro3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTo=
kenSpaceGuid.PcdFlashFvPostMemorySize
FV =3D FvPostMemory
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf=
/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/I=
nclude/Fdf/FlashMapInclude.fdf
index b5e3f66ceafc..67649e867616 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashM=
apInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashM=
apInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D =
0x001E0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D =
0x00370000 # Flash addr (0xFFB70000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D =
0x00180000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x004F0000 # Flash addr (0xFFCF0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000A0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x004F0000 # Flash addr (0xFFCF0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D =
0x00590000 # Flash addr (0xFFD90000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D =
0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D =
0x005F0000 # Flash addr (0xFFDF0000)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPk=
g.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index 6cdf4e2f9f1f..f003dda0ddfc 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.KabylakeRvp3]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseA=
ddress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -39,23 +39,23 @@ [FD.KabylakeRvp3]
DEFINE SIPKG_PEI_BIN =3D INF
=20
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase =
to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase t=
o get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFv=
Offset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGui=
d.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -151,8 +151,8 @@ [FD.KabylakeRvp3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTo=
kenSpaceGuid.PcdFlashFvPostMemorySize
FV =3D FvPostMemory
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Libr=
ary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/In=
tel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpda=
teLib/PeiSiliconPolicyUpdateLib.inf
index 97ec70f611b1..8a99f7c59a49 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/Pei=
SiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/Pei=
SiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -52,8 +52,8 @@ [Guids]
=20
[Pcd]
gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompResistor ## CONSU=
MES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompTarget ## CONSU=
MES
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 11/41] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf =
| 4 +--
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapI=
nclude.fdf | 4 +--
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf =
| 36 ++++++++++----------
Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.=
inf | 4 +--
4 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b=
/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 9208aeda5d2a..6ca0ada751f6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
=20
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON=
SUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON=
SUMES
=20
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/F=
df/FlashMapInclude.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeUR=
vp/Include/Fdf/FlashMapInclude.fdf
index d9959a79d0bb..7d2f4b2c0cb2 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/Flas=
hMapInclude.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/Flas=
hMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D =
0x00190000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D =
0x00320000 # Flash addr (0xFFB20000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D =
0x00170000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00490000 # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000B0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D =
0x00490000 # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D =
0x000B0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D =
0x00540000 # Flash addr (0xFFD40000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D =
0x00070000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D =
0x005B0000 # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoard=
Pkg.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg=
.fdf
index 795cc0da75d8..6397d80d3895 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.CometlakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its var=
iety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAd=
dress #The base address of the FLASH Device.
-Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize =
#The size in bytes of the FLASH Device
+BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
AreaBaseAddress #The base address of the FLASH Device.
+Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBios=
Size #The size in bytes of the FLASH Device
ErasePolarity =3D 1
BlockSize =3D $(FLASH_BLOCK_SIZE)
NumBlocks =3D $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.CometlakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because ma=
cro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase t=
o get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenS=
paceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceG=
uid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvO=
ffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceG=
uid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgTo=
kenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgToken=
SpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSi=
liconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPk=
gTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid=
.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgT=
okenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgT=
okenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gInte=
lSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgToke=
nSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelS=
iliconPkgTokenSpaceGuid.PcdBiosSize
########################################################################=
########
#
# Following are lists of FD Region layout which correspond to the locati=
ons of different
@@ -153,8 +153,8 @@ [FD.CometlakeURvp]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTo=
kenSpaceGuid.PcdFlashFvPostMemorySize
FV =3D FvPostMemory
=20
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdF=
lashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFla=
shMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPk=
gTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgT=
okenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV =3D FvMicrocode
=20
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/Po=
licyInitDxe.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitD=
xe/PolicyInitDxe.inf
index 1d09b990b163..abb79c111e0b 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyIni=
tDxe.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyIni=
tDxe.inf
@@ -47,8 +47,8 @@ [Packages]
=20
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress =
## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =
## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =
## CONSUMES
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 10/41] IntelSiliconPkg: Add MM SPI FVB services

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Adds a Traditional MM and Standalone MM SPI FVB Service driver to
IntelSiliconPkg. These drivers produce the firmware volume block
protocol for SPI flash devices compliant with the Intel Serial
Flash Interface Compatibility Specification.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c =
| 94 ++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceC=
ommon.c | 903 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM=
m.c | 271 ++++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceS=
tandaloneMm.c | 32 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceT=
raditionalMm.c | 32 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceC=
ommon.h | 158 ++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM=
m.h | 22 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceS=
mm.inf | 68 ++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceS=
tandaloneMm.inf | 67 ++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc =
| 11 +
10 files changed, 1658 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Fv=
bInfo.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbIn=
fo.c
new file mode 100644
index 000000000000..7f2678fa9e5a
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
@@ -0,0 +1,94 @@
+/**@file
+ Defines data structure that is the volume header found.
+ These data is intent to decouple FVB driver with FV header.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+#define FIRMWARE_BLOCK_SIZE 0x10000
+#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
+
+#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVaria=
bleBase)
+#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVar=
iableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet3=
2(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
+ EFI_FV_BLOCK_MAP_ENTRY End[1];
+} EFI_FVB2_MEDIA_INFO;
+
+//
+// This data structure contains a template of all correct FV headers, wh=
ich is used to restore
+// Fv header if it's corrupted.
+//
+EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] =3D {
+ //
+ // Systen NvStorage FVB
+ //
+ {
+ NV_STORAGE_BASE_ADDRESS,
+ {
+ {0,}, //ZeroVector[16]
+ EFI_SYSTEM_NV_DATA_FV_GUID,
+ FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
+ EFI_FVH_SIGNATURE,
+ 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for deta=
ils on EFI_FVB_ATTRIBUTES_2
+ sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENT=
RY),
+ 0, //CheckSum which will be calucated dynamically.
+ 0, //ExtHeaderOffset
+ {0,}, //Reserved[1]
+ 2, //Revision
+ {
+ {
+ SYSTEM_NV_BLOCK_NUM,
+ FVB_MEDIA_BLOCK_SIZE,
+ }
+ }
+ },
+ {
+ {
+ 0,
+ 0
+ }
+ }
+ }
+};
+
+EFI_STATUS
+GetFvbInfo (
+ IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
+ OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
+ )
+{
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+
+ for (Index =3D 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI=
_FVB2_MEDIA_INFO); Index++) {
+ if (mPlatformFvbMediaInfo[Index].BaseAddress =3D=3D FvBaseAddress) {
+ FvHeader =3D &mPlatformFvbMediaInfo[Index].FvbInfo;
+
+ //
+ // Update the checksum value of FV header.
+ //
+ FvHeader->Checksum =3D CalculateCheckSum16 ( (UINT16 *) FvHeader, =
FvHeader->HeaderLength);
+
+ *FvbInfo =3D FvHeader;
+
+ DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
+ DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
+ DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLen=
gth));
+ DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksu=
m));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)=
->BlockMap[0].NumBlocks));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInf=
o)->BlockMap[0].Length));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)=
->BlockMap[1].NumBlocks));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbI=
nfo)->BlockMap[1].Length));
+
+ return EFI_SUCCESS;
+ }
+ }
+ return EFI_NOT_FOUND;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbS=
ervice/SpiFvbServiceCommon.c
new file mode 100644
index 000000000000..dab818e98087
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceCommon.c
@@ -0,0 +1,903 @@
+/** @file
+ Common driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+//
+// Global variable for this FVB driver which contains
+// the private data of all firmware volume block instances
+//
+FVB_GLOBAL mFvbModuleGlobal;
+
+//
+// This platform driver knows there are multiple FVs on FD.
+// Now we only provide FVs on Variable region and MicorCode region for p=
erformance issue.
+//
+FV_INFO mPlatformFvBaseAddress[] =3D {
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet3=
2(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdF=
lashMicrocodeFvSize)},
+ {0, 0}
+};
+
+FV_INFO mPlatformDefaultBaseAddress[] =3D {
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet3=
2(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdF=
lashMicrocodeFvSize)},
+ {0, 0}
+};
+
+FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate =3D {
+ {
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_MEMMAP_DP,
+ {
+ (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
+ (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
+ }
+ },
+ EfiMemoryMappedIO,
+ (EFI_PHYSICAL_ADDRESS) 0,
+ (EFI_PHYSICAL_ADDRESS) 0,
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+ }
+};
+
+FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate =3D {
+ {
+ {
+ MEDIA_DEVICE_PATH,
+ MEDIA_PIWG_FW_VOL_DP,
+ {
+ (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
+ (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
+ }
+ },
+ { 0 }
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+ }
+};
+
+//
+// Template structure used when installing FVB protocol
+//
+EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate =3D {
+ FvbProtocolGetAttributes,
+ FvbProtocolSetAttributes,
+ FvbProtocolGetPhysicalAddress,
+ FvbProtocolGetBlockSize,
+ FvbProtocolRead,
+ FvbProtocolWrite,
+ FvbProtocolEraseBlocks,
+ NULL
+};
+
+/**
+ Get the EFI_FVB_ATTRIBUTES_2 of a FV.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+
+ @return Attributes of the FV identified by FvbInstance.
+
+**/
+EFI_FVB_ATTRIBUTES_2
+FvbGetVolumeAttributes (
+ IN EFI_FVB_INSTANCE *FvbInstance
+ )
+{
+ return FvbInstance->FvHeader.Attributes;
+}
+
+/**
+ Retrieves the starting address of an LBA in an FV. It also
+ return a few other attribut of the FV.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+ @param[in] Lba The logical block address
+ @param[out] LbaAddress On output, contains the physical starting =
address
+ of the Lba
+ @param[out] LbaLength On output, contains the length of the bloc=
k
+ @param[out] NumOfBlocks A pointer to a caller allocated UINTN in w=
hich the
+ number of consecutive blocks starting with=
Lba is
+ returned. All blocks in this range have a =
size of
+ BlockSize
+
+ @retval EFI_SUCCESS Successfully returns
+ @retval EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbGetLbaAddress (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ OUT UINTN *LbaAddress,
+ OUT UINTN *LbaLength,
+ OUT UINTN *NumOfBlocks
+ )
+{
+ UINT32 NumBlocks;
+ UINT32 BlockLength;
+ UINTN Offset;
+ EFI_LBA StartLba;
+ EFI_LBA NextLba;
+ EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
+
+ StartLba =3D 0;
+ Offset =3D 0;
+ BlockMap =3D &(FvbInstance->FvHeader.BlockMap[0]);
+
+ //
+ // Parse the blockmap of the FV to find which map entry the Lba belong=
s to
+ //
+ while (TRUE) {
+ NumBlocks =3D BlockMap->NumBlocks;
+ BlockLength =3D BlockMap->Length;
+
+ if ( NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ NextLba =3D StartLba + NumBlocks;
+
+ //
+ // The map entry found
+ //
+ if (Lba >=3D StartLba && Lba < NextLba) {
+ Offset =3D Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLengt=
h);
+ if (LbaAddress ) {
+ *LbaAddress =3D FvbInstance->FvBase + Offset;
+ }
+
+ if (LbaLength ) {
+ *LbaLength =3D BlockLength;
+ }
+
+ if (NumOfBlocks ) {
+ *NumOfBlocks =3D (UINTN)(NextLba - Lba);
+ }
+ return EFI_SUCCESS;
+ }
+
+ StartLba =3D NextLba;
+ Offset =3D Offset + NumBlocks * BlockLength;
+ BlockMap++;
+ }
+}
+
+/**
+ Reads specified number of bytes into a buffer from the specified block=
.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTA=
NCE
+ @param[in] Lba The logical block address to be =
read from
+ @param[in] BlockOffset Offset into the block at which t=
o begin reading
+ @param[in] NumBytes Pointer that on input contains t=
he total size of
+ the buffer. On output, it contai=
ns the total number
+ of bytes read
+ @param[in] Buffer Pointer to a caller allocated bu=
ffer that will be
+ used to hold the data read
+
+
+ @retval EFI_SUCCESS The firmware volume was read suc=
cessfully and
+ contents are in Buffer
+ @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boun=
dary. On output,
+ NumBytes contains the total numb=
er of bytes returned
+ in Buffer
+ @retval EFI_ACCESS_DENIED The firmware volume is in the Re=
adDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not function=
ing correctly and
+ could not be read
+ @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,=
Buffer are NULL
+
+**/
+EFI_STATUS
+FvbReadBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ IN UINTN BlockOffset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+ BOOLEAN BadBufferSize =3D FALSE;
+
+ if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (*NumBytes =3D=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Attributes =3D FvbGetVolumeAttributes (FvbInstance);
+
+ if ((Attributes & EFI_FVB2_READ_STATUS) =3D=3D 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ if (BlockOffset > LbaLength) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (LbaLength < (*NumBytes + BlockOffset)) {
+ DEBUG ((DEBUG_INFO,
+ "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+ *NumBytes,
+ (UINT32)(LbaLength - BlockOffset))
+ );
+ *NumBytes =3D (UINT32) (LbaLength - BlockOffset);
+ BadBufferSize =3D TRUE;
+ }
+
+ Status =3D SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes,=
Buffer);
+
+ if (!EFI_ERROR (Status) && BadBufferSize) {
+ return EFI_BAD_BUFFER_SIZE;
+ } else {
+ return Status;
+ }
+}
+
+/**
+ Writes specified number of bytes from the input buffer to the block.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
+ @param[in] Lba The starting logical block index to =
write to
+ @param[in] BlockOffset Offset into the block at which to be=
gin writing
+ @param[in] NumBytes Pointer that on input contains the t=
otal size of
+ the buffer. On output, it contains t=
he total number
+ of bytes actually written
+ @param[in] Buffer Pointer to a caller allocated buffer=
that contains
+ the source for the write
+ @retval EFI_SUCCESS The firmware volume was written succ=
essfully
+ @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundar=
y. On output,
+ NumBytes contains the total number o=
f bytes
+ actually written
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteD=
isabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning =
correctly and
+ could not be written
+ @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buf=
fer are NULL
+
+**/
+EFI_STATUS
+FvbWriteBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ IN UINTN BlockOffset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+ BOOLEAN BadBufferSize =3D FALSE;
+
+ if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (*NumBytes =3D=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ //
+ // Check if the FV is write enabled
+ //
+ Attributes =3D FvbGetVolumeAttributes (FvbInstance);
+ if ((Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ //
+ // Perform boundary checks and adjust NumBytes
+ //
+ if (BlockOffset > LbaLength) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (LbaLength < (*NumBytes + BlockOffset)) {
+ DEBUG ((DEBUG_INFO,
+ "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+ *NumBytes,
+ (UINT32)(LbaLength - BlockOffset))
+ );
+ *NumBytes =3D (UINT32) (LbaLength - BlockOffset);
+ BadBufferSize =3D TRUE;
+ }
+
+ Status =3D SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes=
, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status =3D SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset)=
, *NumBytes);
+
+ if (!EFI_ERROR (Status) && BadBufferSize) {
+ return EFI_BAD_BUFFER_SIZE;
+ } else {
+ return Status;
+ }
+}
+
+
+
+/**
+ Erases and initializes a firmware volume block.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
+ @param[in] Lba The logical block index to be erased
+
+ @retval EFI_SUCCESS The erase request was successfully com=
pleted
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDis=
abled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning co=
rrectly and
+ could not be written. Firmware device =
may have been
+ partially erased
+ @retval EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbEraseBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba
+ )
+{
+
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+
+ //
+ // Check if the FV is write enabled
+ //
+ Attributes =3D FvbGetVolumeAttributes (FvbInstance);
+
+ if( (Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ //
+ // Get the starting address of the block for erase.
+ //
+ Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength=
, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Status =3D SpiFlashBlockErase (LbaAddress, &LbaLength);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status =3D SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
+
+ return Status;
+}
+
+/**
+ Modifies the current settings of the firmware volume according to the
+ input parameter, and returns the new setting of the volume
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+ @param[in] Attributes On input, it is a pointer to EFI_FVB=
_ATTRIBUTES_2
+ containing the desired firmware volu=
me settings.
+ On successful return, it contains th=
e new settings
+ of the firmware volume
+
+ @retval EFI_SUCCESS Successfully returns
+ @retval EFI_ACCESS_DENIED The volume setting is locked and can=
not be modified
+ @retval EFI_INVALID_PARAMETER Instance not found, or The attribute=
s requested are
+ in conflict with the capabilities as=
declared in the
+ firmware volume header
+
+**/
+EFI_STATUS
+FvbSetVolumeAttributes (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 OldAttributes;
+ EFI_FVB_ATTRIBUTES_2 *AttribPtr;
+ EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
+ UINT32 Capabilities;
+ UINT32 OldStatus, NewStatus;
+
+ AttribPtr =3D (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Att=
ributes);
+ OldAttributes =3D *AttribPtr;
+ Capabilities =3D OldAttributes & EFI_FVB2_CAPABILITIES;
+ OldStatus =3D OldAttributes & EFI_FVB2_STATUS;
+ NewStatus =3D *Attributes & EFI_FVB2_STATUS;
+
+ UnchangedAttributes =3D EFI_FVB2_READ_DISABLED_CAP | \
+ EFI_FVB2_READ_ENABLED_CAP | \
+ EFI_FVB2_WRITE_DISABLED_CAP | \
+ EFI_FVB2_WRITE_ENABLED_CAP | \
+ EFI_FVB2_LOCK_CAP | \
+ EFI_FVB2_STICKY_WRITE | \
+ EFI_FVB2_MEMORY_MAPPED | \
+ EFI_FVB2_ERASE_POLARITY | \
+ EFI_FVB2_READ_LOCK_CAP | \
+ EFI_FVB2_WRITE_LOCK_CAP | \
+ EFI_FVB2_ALIGNMENT;
+
+ //
+ // Some attributes of FV is read only can *not* be set
+ //
+ if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAt=
tributes)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If firmware volume is locked, no status bit can be updated
+ //
+ if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
+ if ( OldStatus ^ NewStatus ) {
+ return EFI_ACCESS_DENIED;
+ }
+ }
+
+ //
+ // Test read disable
+ //
+ if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) =3D=3D 0) {
+ if ((NewStatus & EFI_FVB2_READ_STATUS) =3D=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test read enable
+ //
+ if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) =3D=3D 0) {
+ if (NewStatus & EFI_FVB2_READ_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test write disable
+ //
+ if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) =3D=3D 0) {
+ if ((NewStatus & EFI_FVB2_WRITE_STATUS) =3D=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test write enable
+ //
+ if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) =3D=3D 0) {
+ if (NewStatus & EFI_FVB2_WRITE_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test lock
+ //
+ if ((Capabilities & EFI_FVB2_LOCK_CAP) =3D=3D 0) {
+ if (NewStatus & EFI_FVB2_LOCK_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ *AttribPtr =3D (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
+ *AttribPtr =3D (*AttribPtr) | NewStatus;
+ *Attributes =3D *AttribPtr;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Check the integrity of firmware volume header
+
+ @param[in] FvHeader A pointer to a firmware volume header
+
+ @retval TRUE The firmware volume is consistent
+ @retval FALSE The firmware volume has corrupted.
+
+**/
+BOOLEAN
+IsFvHeaderValid (
+ IN EFI_PHYSICAL_ADDRESS FvBase,
+ IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
+ )
+{
+ if (FvBase =3D=3D PcdGet32(PcdFlashNvStorageVariableBase)) {
+ if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, =
sizeof(EFI_GUID)) !=3D 0 ) {
+ return FALSE;
+ }
+ } else {
+ if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2G=
uid, sizeof(EFI_GUID)) !=3D 0 ) {
+ return FALSE;
+ }
+ }
+ if ( (FvHeader->Revision !=3D EFI_FVH_REVISION) ||
+ (FvHeader->Signature !=3D EFI_FVH_SIGNATURE) ||
+ (FvHeader->FvLength =3D=3D ((UINTN) -1)) ||
+ ((FvHeader->HeaderLength & 0x01 ) !=3D0) ) {
+ return FALSE;
+ }
+
+ if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) =
!=3D 0) {
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+//
+// FVB protocol APIs
+//
+
+/**
+ Retrieves the physical address of the device.
+
+ @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
+ @param[out] Address Output buffer containing the address.
+
+ retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ *Address =3D FvbInstance->FvBase;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Retrieve the size of a logical block
+
+ @param[in] This Calling context
+ @param[in] Lba Indicates which block to return the size for.
+ @param[out] BlockSize A pointer to a caller allocated UINTN in which
+ the size of the block is returned
+ @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which=
the
+ number of consecutive blocks starting with Lba=
is
+ returned. All blocks in this range have a size=
of
+ BlockSize
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumOfBlocks
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x=
%x\n",
+ Lba,
+ BlockSize,
+ NumOfBlocks)
+ );
+
+ return FvbGetLbaAddress (
+ FvbInstance,
+ Lba,
+ NULL,
+ BlockSize,
+ NumOfBlocks
+ );
+}
+
+/**
+ Retrieves Volume attributes. No polarity translations are done.
+
+ @param[in] This Calling context
+ @param[out] Attributes Output buffer which contains attributes
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ *Attributes =3D FvbGetVolumeAttributes (FvbInstance);
+
+ DEBUG ((DEBUG_INFO,
+ "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
+ This,
+ *Attributes)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets Volume attributes. No polarity translations are done.
+
+ @param[in] This Calling context
+ @param[out] Attributes Output buffer which contains attributes
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_STATUS Status;
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x=
\n",
+ This,
+ *Attributes)
+ );
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ Status =3D FvbSetVolumeAttributes (FvbInstance, Attributes);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\=
n",
+ This,
+ *Attributes)
+ );
+
+ return Status;
+}
+
+/**
+ The EraseBlock() function erases one or more blocks as denoted by the
+ variable argument list. The entire parameter list of blocks must be ve=
rified
+ prior to erasing any blocks. If a block is requested that does not ex=
ist
+ within the associated firmware volume (it has a larger index than the =
last
+ block of the firmware volume), the EraseBlock() function must return
+ EFI_INVALID_PARAMETER without modifying the contents of the firmware v=
olume.
+
+ @param[in] This Calling context
+ @param[in] ... Starting LBA followed by Number of Lba to eras=
e.
+ a -1 to terminate the list.
+
+ @retval EFI_SUCCESS The erase request was successfully completed
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled =
state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctl=
y and
+ could not be written. Firmware device may ha=
ve been
+ partially erased
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ UINTN NumOfBlocks;
+ VA_LIST Args;
+ EFI_LBA StartingLba;
+ UINTN NumOfLba;
+ EFI_STATUS Status;
+
+ DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ NumOfBlocks =3D FvbInstance->NumOfBlocks;
+
+ VA_START (Args, This);
+
+ do {
+ StartingLba =3D VA_ARG (Args, EFI_LBA);
+ if ( StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR ) {
+ break;
+ }
+
+ NumOfLba =3D VA_ARG (Args, UINT32);
+
+ //
+ // Check input parameters
+ //
+ if (NumOfLba =3D=3D 0) {
+ VA_END (Args);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
+ return EFI_INVALID_PARAMETER;
+ }
+ } while ( 1 );
+
+ VA_END (Args);
+
+ VA_START (Args, This);
+ do {
+ StartingLba =3D VA_ARG (Args, EFI_LBA);
+ if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) {
+ break;
+ }
+
+ NumOfLba =3D VA_ARG (Args, UINT32);
+
+ while ( NumOfLba > 0 ) {
+ Status =3D FvbEraseBlock (FvbInstance, StartingLba);
+ if ( EFI_ERROR(Status)) {
+ VA_END (Args);
+ return Status;
+ }
+ StartingLba ++;
+ NumOfLba --;
+ }
+
+ } while ( 1 );
+
+ VA_END (Args);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Writes data beginning at Lba:Offset from FV. The write terminates eith=
er
+ when *NumBytes of data have been written, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written. The write opertion does not include erase. This routine will
+ attempt to write only the specified bytes. If the writes do not stick,
+ it will return an error.
+
+ @param[in] This Calling context
+ @param[in] Lba Block in which to begin write
+ @param[in] Offset Offset in the block at which to begin write
+ @param[in,out] NumBytes On input, indicates the requested write size=
. On
+ output, indicates the actual number of bytes=
written
+ @param[in] Buffer Buffer containing source data for the write.
+
+ @retval EFI_SUCCESS The firmware volume was written successf=
ully
+ @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. O=
n output,
+ NumBytes contains the total number of by=
tes
+ actually written
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisab=
led state
+ @retval EFI_DEVICE_ERROR The block device is not functioning corr=
ectly and
+ could not be written
+ @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0=
x%x\n",
+ Lba,
+ Offset,
+ *NumBytes,
+ Buffer)
+ );
+
+ return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+}
+
+/**
+ Reads data beginning at Lba:Offset from FV. The Read terminates either
+ when *NumBytes of data have been read, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written. The write opertion does not include erase. This routine will
+ attempt to write only the specified bytes. If the writes do not stick,
+ it will return an error.
+
+ @param[in] This Calling context
+ @param[in] Lba Block in which to begin write
+ @param[in] Offset Offset in the block at which to begin write
+ @param[in,out] NumBytes On input, indicates the requested write size=
. On
+ output, indicates the actual number of bytes=
written
+ @param[in] Buffer Buffer containing source data for the write.
+
+ @retval EFI_SUCCESS The firmware volume was read successfull=
y and
+ contents are in Buffer
+ @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On=
output,
+ NumBytes contains the total number of by=
tes returned
+ in Buffer
+ @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabl=
ed state
+ @retval EFI_DEVICE_ERROR The block device is not functioning corr=
ectly and
+ could not be read
+ @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ EFI_STATUS Status;
+
+ FvbInstance =3D FVB_INSTANCE_FROM_THIS (This);
+ Status =3D FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x=
%x\n",
+ Lba,
+ Offset,
+ *NumBytes,
+ Buffer)
+ );
+
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi=
ce/SpiFvbServiceMm.c
new file mode 100644
index 000000000000..42a0828c6fae
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceMm.c
@@ -0,0 +1,271 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include <Library/MmServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Protocol/SmmFirmwareVolumeBlock.h>
+
+/**
+ The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
+ for each FV in the system.
+
+ @param[in] FvbInstance The pointer to a FW volume instance structur=
e,
+ which contains the information about one FV.
+
+ @retval VOID
+
+**/
+VOID
+InstallFvbProtocol (
+ IN EFI_FVB_INSTANCE *FvbInstance
+ )
+{
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+ EFI_STATUS Status;
+ EFI_HANDLE FvbHandle;
+
+ ASSERT (FvbInstance !=3D NULL);
+ if (FvbInstance =3D=3D NULL) {
+ return;
+ }
+
+ CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI=
_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
+
+ FvHeader =3D &FvbInstance->FvHeader;
+ if (FvHeader =3D=3D NULL) {
+ return;
+ }
+
+ //
+ // Set up the devicepath
+ //
+ DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx=
:\n", FvbInstance->FvBase));
+ if (FvHeader->ExtHeaderOffset =3D=3D 0) {
+ //
+ // FV does not contains extension header, then produce MEMMAP_DEVICE=
_PATH
+ //
+ FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRun=
timeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplat=
e);
+ if (FvbInstance->DevicePath =3D=3D NULL) {
+ DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEM=
MAP_DEVICE_PATH failed\n"));
+ return;
+ }
+ ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.S=
tartingAddress =3D FvbInstance->FvBase;
+ ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.E=
ndingAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1;
+ } else {
+ FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRun=
timeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
+ if (FvbInstance->DevicePath =3D=3D NULL) {
+ DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_=
PIWG_DEVICE_PATH failed\n"));
+ return;
+ }
+ CopyGuid (
+ &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvNam=
e,
+ (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
+ );
+ }
+
+ //
+ // LocateDevicePath fails so install a new interface and device path
+ //
+ FvbHandle =3D NULL;
+
+ Status =3D gMmst->MmInstallProtocolInterface (
+ &FvbHandle,
+ &gEfiSmmFirmwareVolumeBlockProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &(FvbInstance->FvbProtocol)
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status =3D gMmst->MmInstallProtocolInterface (
+ &FvbHandle,
+ &gEfiDevicePathProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &(FvbInstance->DevicePath)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ The function does the necessary initialization work for
+ Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+ VOID
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+ EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ UINTN Idx;
+ UINT32 MaxLbaSize;
+ UINT32 BytesWritten;
+ UINTN BytesErased;
+
+ mPlatformFvBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVariabl=
eBase);
+ mPlatformFvBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVariabl=
eSize);
+ mPlatformFvBaseAddress[1].FvBase =3D PcdGet32(PcdFlashMicrocodeFvBase)=
;
+ mPlatformFvBaseAddress[1].FvSize =3D PcdGet32(PcdFlashMicrocodeFvSize)=
;
+ mPlatformDefaultBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVa=
riableBase);
+ mPlatformDefaultBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVa=
riableSize);
+ mPlatformDefaultBaseAddress[1].FvBase =3D PcdGet32(PcdFlashMicrocodeFv=
Base);
+ mPlatformDefaultBaseAddress[1].FvSize =3D PcdGet32(PcdFlashMicrocodeFv=
Size);
+
+ //
+ // We will only continue with FVB installation if the
+ // SPI is the active BIOS state
+ //
+ {
+ //
+ // Make sure all FVB are valid and/or fix if possible
+ //
+ for (Idx =3D 0;; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
+ break;
+ }
+
+ BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ BytesWritten =3D 0;
+ BytesErased =3D 0;
+ DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvH=
eader));
+ Status =3D GetFvbInfo (BaseAddress, &FvHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.=
GetFvbInfo Status %r\n", BaseAddress, Status));
+ continue;
+ }
+ DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static dat=
a\n", BaseAddress));
+ //
+ // Spi erase
+ //
+ BytesErased =3D (UINTN) FvHeader->BlockMap->Length;
+ Status =3D SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased=
);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", =
Status));
+ continue;
+ }
+ if (BytesErased !=3D FvHeader->BlockMap->Length) {
+ DEBUG ((DEBUG_WARN, "ERROR - BytesErased !=3D FvHeader->BlockM=
ap->Length\n"));
+ DEBUG ((DEBUG_INFO, " BytesErased =3D 0x%X\n Length =3D 0x%X\n=
", BytesErased, FvHeader->BlockMap->Length));
+ continue;
+ }
+ BytesWritten =3D FvHeader->HeaderLength;
+ Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UI=
NT8*)FvHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Statu=
s));
+ continue;
+ }
+ if (BytesWritten !=3D FvHeader->HeaderLength) {
+ DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D HeaderLength\n"=
));
+ DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n HeaderLength =3D=
0x%X\n", BytesWritten, FvHeader->HeaderLength));
+ continue;
+ }
+ Status =3D SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status=
));
+ continue;
+ }
+ DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\=
n", BaseAddress));
+ //
+ // Clear cache for this range.
+ //
+ WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress=
, FvHeader->BlockMap->Length);
+ }
+ }
+
+ //
+ // Calculate the total size for all firmware volume block instances
+ //
+ BufferSize =3D 0;
+ for (Idx =3D 0; ; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
+ break;
+ }
+ BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHe=
ader));
+ continue;
+ }
+
+ BufferSize +=3D (FvHeader->HeaderLength +
+ sizeof (EFI_FVB_INSTANCE) -
+ sizeof (EFI_FIRMWARE_VOLUME_HEADER)
+ );
+ }
+
+ mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *) AllocateRunti=
meZeroPool (BufferSize);
+ if (mFvbModuleGlobal.FvbInstance =3D=3D NULL) {
+ ASSERT (FALSE);
+ return;
+ }
+
+ MaxLbaSize =3D 0;
+ FvbInstance =3D mFvbModuleGlobal.FvbInstance;
+ mFvbModuleGlobal.NumFv =3D 0;
+
+ for (Idx =3D 0; ; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBase=
Address[Idx].FvBase =3D=3D 0) {
+ break;
+ }
+ BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHe=
ader));
+ continue;
+ }
+
+ FvbInstance->Signature =3D FVB_INSTANCE_SIGNATURE;
+ CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLengt=
h);
+
+ FvHeader =3D &(FvbInstance->FvHeader);
+ FvbInstance->FvBase =3D (UINTN)BaseAddress;
+
+ //
+ // Process the block map for each FV
+ //
+ FvbInstance->NumOfBlocks =3D 0;
+ for (PtrBlockMapEntry =3D FvHeader->BlockMap;
+ PtrBlockMapEntry->NumBlocks !=3D 0;
+ PtrBlockMapEntry++) {
+ //
+ // Get the maximum size of a block.
+ //
+ if (MaxLbaSize < PtrBlockMapEntry->Length) {
+ MaxLbaSize =3D PtrBlockMapEntry->Length;
+ }
+ FvbInstance->NumOfBlocks +=3D PtrBlockMapEntry->NumBlocks;
+ }
+
+ //
+ // Add a FVB Protocol Instance
+ //
+ InstallFvbProtocol (FvbInstance);
+ mFvbModuleGlobal.NumFv++;
+
+ //
+ // Move on to the next FvbInstance
+ //
+ FvbInstance =3D (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance=
) +
+ FvHeader->HeaderLength +
+ (sizeof (EFI_FVB_INSTANCE) -=
sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
+
+ }
+ }
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceStandaloneMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/S=
piFvbService/SpiFvbServiceStandaloneMm.c
new file mode 100644
index 000000000000..252c818d6551
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceStandaloneMm.c
@@ -0,0 +1,32 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+ The driver Standalone MM entry point.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] MmSystemTable A pointer to the MM system table.
+
+ @retval EFI_SUCCESS This function always returns EFI_SUCCE=
SS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbStandaloneMmInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_MM_SYSTEM_TABLE *MmSystemTable
+ )
+{
+ FvbInitialize ();
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceTraditionalMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/=
SpiFvbService/SpiFvbServiceTraditionalMm.c
new file mode 100644
index 000000000000..1c2dac70e3c6
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceTraditionalMm.c
@@ -0,0 +1,32 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibi=
lity Specification.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+ The driver Traditional MM entry point.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable A pointer to the EFI system table.
+
+ @retval EFI_SUCCESS This function always returns EFI_SUCCE=
SS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbTraditionalMmInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ FvbInitialize ();
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceCommon.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbS=
ervice/SpiFvbServiceCommon.h
new file mode 100644
index 000000000000..e9d69e985814
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceCommon.h
@@ -0,0 +1,158 @@
+/** @file
+ Common source definitions used in serial flash drivers
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_COMMON_H
+#define _SPI_FVB_SERVICE_COMMON_H
+
+#include <Guid/EventGroup.h>
+#include <Guid/FirmwareFileSystem2.h>
+#include <Guid/SystemNvDataGuid.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/IoLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+
+#include <Library/SpiFlashCommonLib.h>
+
+//
+// Define two helper macro to extract the Capability field or Status fie=
ld in FVB
+// bit fields
+//
+#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
+ EFI_FVB2_READ_ENABLED_CAP | \
+ EFI_FVB2_WRITE_DISABLED_CAP | \
+ EFI_FVB2_WRITE_ENABLED_CAP | \
+ EFI_FVB2_LOCK_CAP \
+ )
+
+#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | =
EFI_FVB2_LOCK_STATUS)
+
+#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
+
+typedef struct {
+ UINT32 Signature;
+ UINTN FvBase;
+ UINTN NumOfBlocks;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
+ EFI_FIRMWARE_VOLUME_HEADER FvHeader;
+} EFI_FVB_INSTANCE;
+
+typedef struct {
+ EFI_FVB_INSTANCE *FvbInstance;
+ UINT32 NumFv;
+} FVB_GLOBAL;
+
+//
+// Fvb Protocol instance data
+//
+#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, F=
VB_INSTANCE_SIGNATURE)
+
+typedef struct {
+ MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevPath;
+} FV_PIWG_DEVICE_PATH;
+
+typedef struct {
+ MEMMAP_DEVICE_PATH MemMapDevPath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevPath;
+} FV_MEMMAP_DEVICE_PATH;
+
+typedef struct {
+ UINT32 FvBase;
+ UINT32 FvSize;
+} FV_INFO;
+
+//
+// Protocol APIs
+//
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumOfBlocks
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ );
+
+BOOLEAN
+IsFvHeaderValid (
+ IN EFI_PHYSICAL_ADDRESS FvBase,
+ IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
+ );
+
+EFI_STATUS
+GetFvbInfo (
+ IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
+ OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
+ );
+
+extern FVB_GLOBAL mFvbModuleGlobal;
+extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
+extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
+extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
+extern FV_INFO mPlatformFvBaseAddress[];
+extern FV_INFO mPlatformDefaultBaseAddress[];
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceMm.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi=
ce/SpiFvbServiceMm.h
new file mode 100644
index 000000000000..36af1130c8ee
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceMm.h
@@ -0,0 +1,22 @@
+/** @file
+ Definitions common to MM implementation in this driver.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_MM_H_
+#define _SPI_FVB_SERVICE_MM_H_
+
+/**
+ The function does the necessary initialization work for
+ Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+ VOID
+ );
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbSe=
rvice/SpiFvbServiceSmm.inf
new file mode 100644
index 000000000000..bf1306f00201
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceSmm.inf
@@ -0,0 +1,68 @@
+### @file
+# Component description file for the Serial Flash device Runtime driver.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION =3D 0x00010017
+ BASE_NAME =3D SpiFvbServiceSmm
+ FILE_GUID =3D 68A10D85-6858-4402-B070-028B3EA2174=
7
+ VERSION_STRING =3D 1.0
+ MODULE_TYPE =3D DXE_SMM_DRIVER
+ PI_SPECIFICATION_VERSION =3D 1.10
+ ENTRY_POINT =3D SpiFvbTraditionalMmInitialize
+
+#
+# The following information is for reference only and not required by th=
e build tools.
+#
+# VALID_ARCHITECTURES =3D IA32 X64
+#
+
+[LibraryClasses]
+ PcdLib
+ MemoryAllocationLib
+ CacheMaintenanceLib
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ SpiFlashCommonLib
+ MmServicesTableLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONS=
UMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONS=
UMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONS=
UMES
+
+[Sources]
+ FvbInfo.c
+ SpiFvbServiceCommon.h
+ SpiFvbServiceCommon.c
+ SpiFvbServiceMm.h
+ SpiFvbServiceMm.c
+ SpiFvbServiceTraditionalMm.c
+
+[Protocols]
+ gEfiDevicePathProtocolGuid ## PRODUCES
+ gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
+
+[Guids]
+ gEfiFirmwareFileSystem2Guid ## CONSUMES
+ gEfiSystemNvDataFvGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/Sp=
iFvbServiceStandaloneMm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash=
/SpiFvbService/SpiFvbServiceStandaloneMm.inf
new file mode 100644
index 000000000000..b66233968247
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbSer=
viceStandaloneMm.inf
@@ -0,0 +1,67 @@
+### @file
+# Component description file for the Serial Flash device Standalone MM d=
river.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION =3D 0x0001001B
+ BASE_NAME =3D SpiFvbServiceStandaloneMm
+ FILE_GUID =3D E6313655-8BD0-4EAB-B319-AD5E212CE6A=
B
+ VERSION_STRING =3D 1.0
+ MODULE_TYPE =3D MM_STANDALONE
+ PI_SPECIFICATION_VERSION =3D 0x00010032
+ ENTRY_POINT =3D SpiFvbStandaloneMmInitialize
+
+#
+# The following information is for reference only and not required by th=
e build tools.
+#
+# VALID_ARCHITECTURES =3D IA32 X64
+#
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ DebugLib
+ MemoryAllocationLib
+ PcdLib
+ MmServicesTableLib
+ SpiFlashCommonLib
+ StandaloneMmDriverEntryPoint
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONS=
UMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONS=
UMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONS=
UMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONS=
UMES
+
+[Sources]
+ FvbInfo.c
+ SpiFvbServiceCommon.h
+ SpiFvbServiceCommon.c
+ SpiFvbServiceMm.h
+ SpiFvbServiceMm.c
+ SpiFvbServiceStandaloneMm.c
+
+[Protocols]
+ gEfiDevicePathProtocolGuid ## PRODUCES
+ gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
+
+[Guids]
+ gEfiFirmwareFileSystem2Guid ## CONSUMES
+ gEfiSystemNvDataFvGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index d4e15100bfde..1e826a080f28 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -40,6 +40,9 @@ [LibraryClasses]
PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignment=
Lib/PeiGetVtdPmrAlignmentLib.inf
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasur=
ementLibNull.inf
MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFla=
shCommonLibNull.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiB=
ootServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEnt=
ryPoint.inf
=20
[LibraryClasses.common.PEIM]
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
=20
[LibraryClasses.common.DXE_SMM_DRIVER]
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAll=
ocationLib.inf
+ MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLi=
b.inf
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTabl=
eLib.inf
=20
+[LibraryClasses.common.MM_STANDALONE]
+ MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocati=
onLib/StandaloneMmMemoryAllocationLib.inf
+ MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Standal=
oneMmServicesTableLib.inf
+ StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoi=
nt/StandaloneMmDriverEntryPoint.inf
+
########################################################################=
###########################
#
# Components Section - list of the modules and components that will be p=
rocessed by compilation
@@ -86,6 +95,8 @@ [Components]
IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPc=
iDeviceSecurityDxe.inf
IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/Sam=
plePlatformDevicePolicyDxe.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.=
inf
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 09/41] IntelSiliconPkg: Add SmmSpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Adds the SMM instance of SpiFlashCommonLib. The code is based on
refactoring existing library instances into a consolidated version
with no functional impact.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCo=
mmonLib.c | 58 ++++++
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommo=
n.c | 209 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc =
| 5 +
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCo=
mmonLib.inf | 48 +++++
4 files changed, 320 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/S=
mmSpiFlashCommonLib.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlash=
CommonLib/SmmSpiFlashCommonLib.c
new file mode 100644
index 000000000000..7941b8f8720c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFl=
ashCommonLib.c
@@ -0,0 +1,58 @@
+/** @file
+ SMM Library instance of SPI Flash Common Library Class
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/SmmServicesTableLib.h>
+#include <Protocol/Spi.h>
+#include <Library/DebugLib.h>
+
+extern PCH_SPI_PROTOCOL *mSpiProtocol;
+
+extern UINTN mBiosAreaBaseAddress;
+extern UINTN mBiosSize;
+extern UINTN mBiosOffset;
+
+/**
+ The library constructuor.
+
+ The function does the necessary initialization work for this library
+ instance.
+
+ @param[in] ImageHandle The firmware allocated handle for the UE=
FI image.
+ @param[in] SystemTable A pointer to the EFI system table.
+
+ @retval EFI_SUCCESS The function always return EFI_SUCCESS f=
or now.
+ It will ASSERT on error for debug versio=
n.
+ @retval EFI_ERROR Please reference LocateProtocol for erro=
r code details.
+**/
+EFI_STATUS
+EFIAPI
+SmmSpiFlashCommonLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 BaseAddr;
+ UINT32 RegionSize;
+
+ mBiosAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
+ mBiosSize =3D (UINTN)PcdGet32 (PcdBiosSize);
+
+ //
+ // Locate the SMM SPI protocol.
+ //
+ Status =3D gSmst->SmmLocateProtocol (
+ &gPchSmmSpiProtocolGuid,
+ NULL,
+ (VOID **) &mSpiProtocol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAd=
dr, &RegionSize);
+ mBiosOffset =3D BaseAddr;
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/S=
piFlashCommon.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommon=
Lib/SpiFlashCommon.c
new file mode 100644
index 000000000000..daebaf8e5e33
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlash=
Common.c
@@ -0,0 +1,209 @@
+/** @file
+ Wrap PCH_SPI_PROTOCOL to provide some library level interfaces
+ for module use.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/SpiFlashCommonLib.h>
+#include <Library/IoLib.h>
+#include <Protocol/Spi.h>
+
+PCH_SPI_PROTOCOL *mSpiProtocol;
+
+//
+// Variables for boottime and runtime usage.
+//
+UINTN mBiosAreaBaseAddress =3D 0;
+UINTN mBiosSize =3D 0;
+UINTN mBiosOffset =3D 0;
+
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the rea=
d.
+ @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read=
.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
+ if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // This function is implemented specifically for those platforms
+ // at which the SPI device is memory mapped for read. So this
+ // function just do a memory copy for Spi Flash Read.
+ //
+ CopyMem (Buffer, (VOID *) Address, *NumBytes);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the w=
rite.
+ @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINTN Offset;
+ UINT32 Length;
+ UINT32 RemainingBytes;
+
+ ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL));
+ if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT (Address >=3D mBiosAreaBaseAddress);
+ if (Address < mBiosAreaBaseAddress) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Offset =3D Address - mBiosAreaBaseAddress;
+
+ ASSERT ((*NumBytes + Offset) <=3D mBiosSize);
+ if ((*NumBytes + Offset) > mBiosSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status =3D EFI_SUCCESS;
+ RemainingBytes =3D *NumBytes;
+
+
+ while (RemainingBytes > 0) {
+ if (RemainingBytes > SECTOR_SIZE_4KB) {
+ Length =3D SECTOR_SIZE_4KB;
+ } else {
+ Length =3D RemainingBytes;
+ }
+ Status =3D mSpiProtocol->FlashWrite (
+ mSpiProtocol,
+ FlashRegionBios,
+ (UINT32) Offset,
+ Length,
+ Buffer
+ );
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+ RemainingBytes -=3D Length;
+ Offset +=3D Length;
+ Buffer +=3D Length;
+ }
+
+ //
+ // Actual number of bytes written
+ //
+ *NumBytes -=3D RemainingBytes;
+
+ return Status;
+}
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block=
to be erased.
+ This library assume that caller garantee t=
hat the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
+ On output, the actual number of bytes eras=
ed.
+
+ @retval EFI_SUCCESS. Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ )
+{
+ EFI_STATUS Status;
+ UINTN Offset;
+ UINTN RemainingBytes;
+
+ ASSERT (NumBytes !=3D NULL);
+ if (NumBytes =3D=3D NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT (Address >=3D mBiosAreaBaseAddress);
+ if (Address < mBiosAreaBaseAddress) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Offset =3D Address - mBiosAreaBaseAddress;
+
+ ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0);
+ if ((*NumBytes % SECTOR_SIZE_4KB) !=3D 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT ((*NumBytes + Offset) <=3D mBiosSize);
+ if ((*NumBytes + Offset) > mBiosSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status =3D EFI_SUCCESS;
+ RemainingBytes =3D *NumBytes;
+
+
+ Status =3D mSpiProtocol->FlashErase (
+ mSpiProtocol,
+ FlashRegionBios,
+ (UINT32) Offset,
+ (UINT32) RemainingBytes
+ );
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index aeed452ed521..d4e15100bfde 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -59,6 +59,10 @@ [LibraryClasses.common.DXE_DRIVER]
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryA=
llocationLib.inf
=20
+[LibraryClasses.common.DXE_SMM_DRIVER]
+ MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAll=
ocationLib.inf
+ SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTabl=
eLib.inf
+
########################################################################=
###########################
#
# Components Section - list of the modules and components that will be p=
rocessed by compilation
@@ -95,6 +99,7 @@ [Components]
IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.in=
f
+ IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
=20
[BuildOptions]
*_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/S=
mmSpiFlashCommonLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFla=
shCommonLib/SmmSpiFlashCommonLib.inf
new file mode 100644
index 000000000000..f6a06351ace5
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFl=
ashCommonLib.inf
@@ -0,0 +1,48 @@
+## @file
+# SMM Library instance of Spi Flash Common Library Class
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION =3D 0x00010017
+ BASE_NAME =3D SmmSpiFlashCommonLib
+ FILE_GUID =3D 99721728-C39D-4600-BD38-71E8238FEEF=
2
+ VERSION_STRING =3D 1.0
+ MODULE_TYPE =3D DXE_SMM_DRIVER
+ LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER
+ CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor
+#
+# The following information is for reference only and not required by th=
e build tools.
+#
+# VALID_ARCHITECTURES =3D IA32 X64
+#
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ MemoryAllocationLib
+ SmmServicesTableLib
+ UefiLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+
+[Sources]
+ SmmSpiFlashCommonLib.c
+ SpiFlashCommon.c
+
+[Protocols]
+ gPchSmmSpiProtocolGuid ## CONSUMES
+
+[Depex.X64.DXE_SMM_DRIVER]
+ gPchSmmSpiProtocolGuid
--=20
2.28.0.windows.1


[edk2-platforms][PATCH v3 08/41] IntelSiliconPkg: Add SpiFlashCommonLib

Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

Adds the SpiFlashCommonLib interface to IntelSiliconPkg. The initial
library instance added in this change is the NULL instance.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashComm=
onLibNull.c | 101 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h =
| 98 +++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec =
| 4 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc =
| 1 +
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashComm=
onLibNull.inf | 28 ++++++
5 files changed, 232 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/=
SpiFlashCommonLibNull.c b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashC=
ommonLibNull/SpiFlashCommonLibNull.c
new file mode 100644
index 000000000000..c5f46829869c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlas=
hCommonLibNull.c
@@ -0,0 +1,101 @@
+/** @file
+ Null Library instance of SPI Flash Common Library Class
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/SpiFlashCommonLib.h>
+
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the rea=
d.
+ @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read=
.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the w=
rite.
+ @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block=
to be erased.
+ This library assume that caller guarantee =
that the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
+ On output, the actual number of bytes eras=
ed.
+
+ @retval EFI_SUCCESS. Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommon=
Lib.h b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
new file mode 100644
index 000000000000..ef62ba238d71
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
@@ -0,0 +1,98 @@
+/** @file
+ The header file includes the common header files, defines
+ internal structure and functions used by SpiFlashCommonLib.
+
+ Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SPI_FLASH_COMMON_LIB_H__
+#define __SPI_FLASH_COMMON_LIB_H__
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ );
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the rea=
d.
+ @param[in,out] NumBytes On input, the number of bytes to read. O=
n output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read=
.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the w=
rite.
+ @param[in,out] NumBytes On input, the number of bytes to write=
. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block=
to be erased.
+ This library assume that caller garantee t=
hat the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logic=
al block to be erased.
+ On output, the actual number of bytes eras=
ed.
+
+ @retval EFI_SUCCESS. Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ );
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 5c2c9cfbcaab..1a8290113fc9 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -46,6 +46,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
#
ReportCpuHobLib|Include/Library/ReportCpuHobLib.h
=20
+ ## @libraryclass Provides services to perform SPI flash actions
+ #
+ SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
+
[Guids]
## GUID for Package token space
# {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index 1092371d848e..aeed452ed521 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -94,6 +94,7 @@ [Components]
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaL=
ib.inf
IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+ IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.in=
f
=20
[BuildOptions]
*_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/=
SpiFlashCommonLibNull.inf b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlas=
hCommonLibNull/SpiFlashCommonLibNull.inf
new file mode 100644
index 000000000000..f2d9e4f21d4b
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlas=
hCommonLibNull.inf
@@ -0,0 +1,28 @@
+### @file
+# NULL instance of Spi Flash Common Library Class
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION =3D 0x00010017
+ BASE_NAME =3D SpiFlashCommonLibNull
+ FILE_GUID =3D F35BBEE7-A681-443E-BB15-07AF9FABBDE=
D
+ VERSION_STRING =3D 1.0
+ MODULE_TYPE =3D BASE
+ LIBRARY_CLASS =3D SpiFlashCommonLib
+#
+# The following information is for reference only and not required by th=
e build tools.
+#
+# VALID_ARCHITECTURES =3D IA32 X64
+#
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Sources]
+ SpiFlashCommonLibNull.c
--=20
2.28.0.windows.1

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