Date   

Re: [EXTERNAL] 回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

manickavasakam karpagavinayagam
 

Mike :

 

During PCI Bus enumeration, we need to skip SPI Controller (because of a silicon sighting) or else any SET variable asserts.

Also, need to skip a specific MLX card UEFI OPROM or else will see CPU exception.

 

We checked the PCIBUS driver code flow and there is no generic hooks to skip enumerating a device and to override the OPROM contents.

 

To avoid overriding the PCIBUS driver with platform instance, we can have PciBus Hooks at various places in PCIBUS driver to skip the device from enumeration, overriding the OPROM contents etc..

 

Ex : MdeModulePkg\Bus\Pci\PciBusDxe\PciLib.c PciScanBus()

 

        for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {

    TempReservedBusNum = 0;

    for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {

 

      //

      // Check to see whether a pci device is present

      //

      Status = PciDevicePresent (

                PciRootBridgeIo,

                &Pci,

                StartBusNumber,

                Device,

                Func

                );

 

      if (EFI_ERROR (Status) && Func == 0) {

        //

        // go to next device if there is no Function 0

        //

        break;

      }

 

      if (EFI_ERROR (Status)) {

        continue;

      }

 

     

      Status = PciOemPlatformHooks(&Pci, isPciSkipDevice, &Pci, &StartBusNumber, &Device, &Func);

      if(EFI_ERROR(Status))

      {

          if(Status==EFI_UNSUPPORTED){

              Status=EFI_SUCCESS;

          } else ASSERT_EFI_ERROR(Status);

      }

      else

      {

          DEBUG((DEBUG_INFO,"Device @ [B%X|D%X|F%X], VID=%X, DID=%X SKIPPED from enumeration.\n\n",

                  StartBusNumber, Device, Func,

                  Pci.Hdr.VendorId,Pci.Hdr.DeviceId));

          continue;

      }

     

      //

      // Get the PCI device information

      //

      Status = PciSearchDevice (

                Bridge,

                &Pci,

                StartBusNumber,

                Device,

                Func,

                &PciDevice

                );

 

      if (EFI_ERROR (Status)) {

        continue;

      }

 

Thank you

 

-Manic

 

From: Kinney, Michael D <michael.d.kinney@...>
Sent: Thursday, June 17, 2021 11:19 AM
To: devel@edk2.groups.io; Manickavasakam Karpagavinayagam <manickavasakamk@...>; gaoliming <gaoliming@...>; Ni, Ray <ray.ni@...>; Kinney, Michael D <michael.d.kinney@...>
Cc: Harikrishna Doppalapudi <Harikrishnad@...>
Subject: RE: [EXTERNAL]
回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Has the reason for the PciBusDxe override been discussed with the PciBusDxe maintainer?

 

What feature would need to be added to PciBusDxe to accommodate the use case?

 

Mike

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of manickavasakam karpagavinayagam
Sent: Thursday, June 17, 2021 7:56 AM
To: gaoliming <gaoliming@...>; devel@edk2.groups.io
Cc: DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>
Subject: Re: [EXTERNAL]
回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Liming :

 

Below email is the cover letter and this patch series has two changes. Sure next time, will add more comments in the cover letter also.

Please refer the attached email and it has information about the PCIBUS override changes. PCIBUS override is done based on the platform sighting and it can’t be generic.

 

Thank you

 

-Manic

 

From: gaoliming <gaoliming@...>
Sent: Wednesday, June 16, 2021 10:56 PM
To: devel@edk2.groups.io; Manickavasakam Karpagavinayagam <manickavasakamk@...>
Subject: [EXTERNAL]
回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

 

**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

 

Please follow https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format to update the commit message format.

 

And, for the override PciBus module, can you give more detail why need to override PciBus? Is it possible to update Edk2 MdeModulePkg PciBus to meet the platform requirement?

 

Thanks

Liming

发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 manickavasakam karpagavinayagam
发送时间: 2021617 7:05
收件人: devel@edk2.groups.io
主题: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Add BoardTiogaPass packages to support TiogaPass Platform Enabled Network, ISCSI,IPMI, SMBIOS, Performance Measurement
Remove AST2500 UEFI option ROM driver from PurleyOpenBoardPkg

AST2500 UEFI option ROM move to edk2-non-osi ASpeedGopBinPkg Update copyright headers

 

manickavasakam karpagavinayagam (2):

  PurleyOpenBoardPkg : Support for TiogaPass Platform

  PurleyOpenBoardPkg : Override generic PciBus Driver with Platform

    specific instance of PciBus driver.

 

.../IpmiFeaturePkg/GenericIpmi/Dxe/IpmiInit.c |    8 +-

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c        |  453 +-

.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c      |    3 +

.../BoardTiogaPass/CoreDxeInclude.dsc         |  168 +

.../BoardTiogaPass/CoreUefiBootInclude.fdf    |   82 +

.../BoardTiogaPass/GitEdk2MinTiogaPass.bat    |   93 +

.../BasePlatformHookLib/BasePlatformHookLib.c |  389 +

.../BasePlatformHookLib.inf                   |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.c       |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.inf     |   40 +

.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c   |   53 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.c      |   62 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf    |   41 +

.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c    |  120 +

.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c  |   37 +

.../Library/BoardInitLib/AllLanesEparam.c     |   44 +

.../Library/BoardInitLib/GpioTable.c          |  296 +

.../Library/BoardInitLib/IioBifur.c           |   70 +

.../BoardInitLib/PeiBoardInitPostMemLib.c     |   46 +

.../BoardInitLib/PeiBoardInitPostMemLib.inf   |   37 +

.../BoardInitLib/PeiBoardInitPreMemLib.c      |  112 +

.../BoardInitLib/PeiBoardInitPreMemLib.inf    |   69 +

.../Library/BoardInitLib/PeiTiogaPassDetect.c |   28 +

.../BoardInitLib/PeiTiogaPassInitLib.h        |   18 +

.../BoardInitLib/PeiTiogaPassInitPostMemLib.c |   86 +

.../BoardInitLib/PeiTiogaPassInitPreMemLib.c  |  638 ++

.../Library/BoardInitLib/UsbOC.c              |   46 +

.../Library/PeiReportFvLib/PeiReportFvLib.c   |  138 +

.../Library/PeiReportFvLib/PeiReportFvLib.inf |   51 +

.../BoardTiogaPass/OpenBoardPkg.dsc           |  245 +

.../BoardTiogaPass/OpenBoardPkg.fdf           |  600 ++

.../BoardTiogaPass/PlatformPkgBuildOption.dsc |   84 +

.../BoardTiogaPass/PlatformPkgConfig.dsc      |   58 +

.../BoardTiogaPass/PlatformPkgPcd.dsc         |  392 ++

.../BoardTiogaPass/StructureConfig.dsc        | 6236 +++++++++++++++++

.../BoardTiogaPass/__init__.py                |    0

.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat |  139 +

.../BoardTiogaPass/build_board.py             |  195 +

.../BoardTiogaPass/build_config.cfg           |   34 +

.../BoardTiogaPass/logo.txt                   |   10 +

.../BoardTiogaPass/postbuild.bat              |   96 +

.../BoardTiogaPass/prebuild.bat               |  213 +

.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf    |   10 +-

.../IpmiPlatformHookLib.inf                   |    6 +-

.../Include/Guid/PchRcVariable.h              |    6 +

.../Include/Guid/SetupVariable.h              |   15 +-

.../Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec |    1 +

.../Bus/Pci/PciBusDxe/ComponentName.c         |  170 +

.../Bus/Pci/PciBusDxe/ComponentName.h         |  146 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c   |  460 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |  396 ++

.../Bus/Pci/PciBusDxe/PciBusDxe.inf           |  112 +

.../Bus/Pci/PciBusDxe/PciBusDxe.uni           |   16 +

.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni      |   14 +

.../Bus/Pci/PciBusDxe/PciCommand.c            |  267 +

.../Bus/Pci/PciBusDxe/PciCommand.h            |  232 +

.../Bus/Pci/PciBusDxe/PciDeviceSupport.c      | 1056 +++

.../Bus/Pci/PciBusDxe/PciDeviceSupport.h      |  266 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.c     |  188 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.h     |   83 +

.../Bus/Pci/PciBusDxe/PciEnumerator.c         | 2210 ++++++

.../Bus/Pci/PciBusDxe/PciEnumerator.h         |  515 ++

.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c  | 2885 ++++++++  .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h  |  480 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c     |  484 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h     |  205 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c    | 2087 ++++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h    |  660 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c   | 1809 +++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h   |  179 +

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c   |  776 ++

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h   |  136 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.c    |   82 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.h    |   28 +

.../Bus/Pci/PciBusDxe/PciResourceSupport.c    | 2292 ++++++

.../Bus/Pci/PciBusDxe/PciResourceSupport.h    |  456 ++

.../Bus/Pci/PciBusDxe/PciRomTable.c           |  135 +

.../Bus/Pci/PciBusDxe/PciRomTable.h           |   48 +

Platform/Intel/build.cfg                      |    2 +

Platform/Intel/build_bios.py                  |    3 +-

80 files changed, 30278 insertions(+), 240 deletions(-)  create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

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Re: [RESEND PATCH v2] BaseTools: Add support for RISCV GOT/PLT relocations

Pete Batard
 

I agree that this is unlikely to be a consequence of the current patch.

I logged new BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3459

Regards,

/Pete

On 2021.06.17 05:44, Sunil V L wrote:
Hi Pete,
Thank you very much!.
On Wed, Jun 16, 2021 at 01:35:27PM +0100, Pete Batard wrote:
Sunil, Daniel, thanks for the patch.

I confirm that this addresses the 0x13 and 0x14 relocation issues that I was
seeing.

However, this patch appears to introduces new R_RISCV_PCREL_LO12_S
relocation errors that I was not seeing previously, so I still can't manage
to get a successful compilation.
It is not introduced by the patch but looks like one more new relocation
type is added by the latest tool chain you are using. Please raise a new
bug and I will add the support for it in next patch.
Thanks!
Sunil

Especially the stream of 0x13 and 0x14 relocation errors I was getting at
https://github.com/pbatard/ntfs-3g/runs/2278190652?check_suite_focus=true
has now switched to (tested on up to date Ubuntu with latest EDK2):

-------------------------------------------------------------------------
"GenFw" -e UEFI_DRIVER -o /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/OUTPUT/ntfs.efi /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
GenFw: ERROR 3000: Invalid
WriteSections64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
GenFw: ERROR 3000: Invalid
WriteSections64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
GenFw: ERROR 3000: Invalid
WriteSections64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
GenFw: ERROR 3000: Invalid
WriteRelocations64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
GenFw: ERROR 3000: Invalid
WriteRelocations64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
GenFw: ERROR 3000: Invalid
WriteRelocations64(): /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/DEBUG/ntfs.dll
unsupported ELF EM_RISCV64 relocation 0x19.
make: *** [GNUmakefile:553: /usr/src/ntfs-3g/Build/RELEASE_GCC5/RISCV64/uefi-driver/uefi_driver/OUTPUT/ntfs.efi]
Error 2
-------------------------------------------------------------------------

So, in effect, some of the earlier relocation errors appear to have morphed
into 0x19/R_RISCV_PCREL_LO12_S ones...

I can open a new bug for this issue if you prefer.

Regards,

/Pete

On 2021.06.15 03:26, Daniel Schaefer wrote:
Great commit message, thanks Sunil!
Maintainers, please take a look and let us know if there's any other
concern.
This patch lets us build the RISC-V platforms using modern toolchains
that are provided directly by the distributions, rather than building
your own from source.

Thanks,
Daniel
------------------------------------------------------------------------
*From:* Sunil V L <sunilvl@ventanamicro.com>
*Sent:* Friday, June 11, 2021 22:08
*To:* devel@edk2.groups.io <devel@edk2.groups.io>
*Cc:* Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>;
Schaefer, Daniel <daniel.schaefer@hpe.com>; Bob Feng
<bob.c.feng@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Yuwei
Chen <yuwei.chen@intel.com>; Heinrich Schuchardt <xypron.glpk@gmx.de>
*Subject:* Re: [RESEND PATCH v2] BaseTools: Add support for RISCV
GOT/PLT relocations
Hi,
    I just edited the commit message to indicate the module and CC the
    maintainers. Could I get the feedback please?
Thanks
Sunil

On Fri, Jun 11, 2021 at 07:35:03PM +0530, Sunil V L wrote:
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3096
<https://bugzilla.tianocore.org/show_bug.cgi?id=3096>

This patch adds support for R_RISCV_CALL_PLT and R_RISCV_GOT_HI20
relocations generated by PIE enabled compiler. This also needed
changes to R_RISCV_32 and R_RISCV_64 relocations as explained in
https://github.com/riscv/riscv-gnu-toolchain/issues/905#issuecomment-846682710
<https://github.com/riscv/riscv-gnu-toolchain/issues/905#issuecomment-846682710>

Changes in v2:
   - Addressed Daniel's comment on formatting

Testing:
1) Debian GCC 8.3.0 and booted sifive_u and QMEU virt models.
2) Debian 10.2.0 and booted QEMU virt model.
3) riscv-gnu-tool chain 9.2 and booted QEMU virt model.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>

Acked-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Tested-by: <daniel.schaefer@hpe.com>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
  BaseTools/Source/C/GenFw/Elf64Convert.c | 44 +++++++++++++++++++++----
  1 file changed, 38 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index d097db8632..d684318269 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -129,6 +129,8 @@ STATIC UINT32 mDebugOffset;
  STATIC UINT8       *mRiscVPass1Targ = NULL;
  STATIC Elf_Shdr    *mRiscVPass1Sym = NULL;
  STATIC Elf64_Half  mRiscVPass1SymSecIndex = 0;
+STATIC INT32       mRiscVPass1Offset;
+STATIC INT32       mRiscVPass1GotFixup;
  //
  // Initialization Function
@@ -479,11 +481,11 @@ WriteSectionRiscV64 (
      break;
    case R_RISCV_32:
-    *(UINT32 *)Targ = (UINT32)((UINT64)(*(UINT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
+    *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;
      break;
    case R_RISCV_64:
-    *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
+    *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;
      break;
    case R_RISCV_HI20:
@@ -533,6 +535,18 @@ WriteSectionRiscV64 (
      mRiscVPass1SymSecIndex = 0;
      break;
+  case R_RISCV_GOT_HI20:
+    Value = (Sym->st_value - Rel->r_offset);
+    mRiscVPass1Offset = RV_X(Value, 0, 12);
+    Value = RV_X(Value, 12, 20);
+    *(UINT32 *)Targ = (Value << 12) | (RV_X(*(UINT32*)Targ, 0, 12));
+
+    mRiscVPass1Targ = Targ;
+    mRiscVPass1Sym = SymShdr;
+    mRiscVPass1SymSecIndex = Sym->st_shndx;
+    mRiscVPass1GotFixup = 1;
+    break;
+
    case R_RISCV_PCREL_HI20:
      mRiscVPass1Targ = Targ;
      mRiscVPass1Sym = SymShdr;
@@ -545,11 +559,17 @@ WriteSectionRiscV64 (
      if (mRiscVPass1Targ != NULL && mRiscVPass1Sym != NULL && mRiscVPass1SymSecIndex != 0) {
        int i;
        Value2 = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));
-      Value = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
-      if(Value & (RISCV_IMM_REACH/2)) {
-        Value |= ~(RISCV_IMM_REACH-1);
+
+      if(mRiscVPass1GotFixup) {
+        Value = (UINT32)(mRiscVPass1Offset);
+      } else {
+        Value = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
+        if(Value & (RISCV_IMM_REACH/2)) {
+          Value |= ~(RISCV_IMM_REACH-1);
+        }
        }
        Value = Value - (UINT32)mRiscVPass1Sym->sh_addr + mCoffSectionsOffset[mRiscVPass1SymSecIndex];
+
        if(-2048 > (INT32)Value) {
          i = (((INT32)Value * -1) / 4096);
          Value2 -= i;
@@ -569,12 +589,21 @@ WriteSectionRiscV64 (
          }
        }
-      *(UINT32 *)Targ = (RV_X(Value, 0, 12) << 20) | (RV_X(*(UINT32*)Targ, 0, 20));
+      if(mRiscVPass1GotFixup) {
+        *(UINT32 *)Targ = (RV_X((UINT32)Value, 0, 12) << 20)
+                            | (RV_X(*(UINT32*)Targ, 0, 20));
+        /* Convert LD instruction to ADDI */
+        *(UINT32 *)Targ = ((*(UINT32 *)Targ & ~0x707f) | 0x13);
+      } else {
+        *(UINT32 *)Targ = (RV_X(Value, 0, 12) << 20) | (RV_X(*(UINT32*)Targ, 0, 20));
+      }
        *(UINT32 *)mRiscVPass1Targ = (RV_X(Value2, 0, 20)<<12) | (RV_X(*(UINT32 *)mRiscVPass1Targ, 0, 12));
      }
      mRiscVPass1Sym = NULL;
      mRiscVPass1Targ = NULL;
      mRiscVPass1SymSecIndex = 0;
+    mRiscVPass1Offset = 0;
+    mRiscVPass1GotFixup = 0;
      break;
    case R_RISCV_ADD64:
@@ -586,6 +615,7 @@ WriteSectionRiscV64 (
    case R_RISCV_GPREL_I:
    case R_RISCV_GPREL_S:
    case R_RISCV_CALL:
+  case R_RISCV_CALL_PLT:
    case R_RISCV_RVC_BRANCH:
    case R_RISCV_RVC_JUMP:
    case R_RISCV_RELAX:
@@ -1528,6 +1558,7 @@ WriteRelocations64 (
              case R_RISCV_GPREL_I:
              case R_RISCV_GPREL_S:
              case R_RISCV_CALL:
+            case R_RISCV_CALL_PLT:
              case R_RISCV_RVC_BRANCH:
              case R_RISCV_RVC_JUMP:
              case R_RISCV_RELAX:
@@ -1537,6 +1568,7 @@ WriteRelocations64 (
              case R_RISCV_SET16:
              case R_RISCV_SET32:
              case R_RISCV_PCREL_HI20:
+            case R_RISCV_GOT_HI20:
              case R_RISCV_PCREL_LO12_I:
                break;
--
2.25.1


[PATCH v1 1/1] MdeModulePkg/BdsDxe: Update BdsEntry to use Variable Policy

Kenneth Lautner
 

From: Ken Lautner <klautner@microsoft.com>

Changed BdsEntry.c to use Variable Policy instead of Variable Lock
as Variable Lock will be Deprecated eventually

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Kenneth Lautner <kenlautner3@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
---
MdeModulePkg/Universal/BdsDxe/Bds.h | 1 -
MdeModulePkg/Universal/BdsDxe/BdsDxe.inf | 4 +++-
MdeModulePkg/Universal/BdsDxe/BdsEntry.c | 20 +++++++++++++++-----
3 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/MdeModulePkg/Universal/BdsDxe/Bds.h b/MdeModulePkg/Universal/B=
dsDxe/Bds.h
index e7a9b5b4b7cb..84548041e861 100644
--- a/MdeModulePkg/Universal/BdsDxe/Bds.h
+++ b/MdeModulePkg/Universal/BdsDxe/Bds.h
@@ -17,7 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
=0D
#include <Protocol/Bds.h>=0D
#include <Protocol/LoadedImage.h>=0D
-#include <Protocol/VariableLock.h>=0D
#include <Protocol/DeferredImageLoad.h>=0D
=0D
#include <Library/UefiDriverEntryPoint.h>=0D
diff --git a/MdeModulePkg/Universal/BdsDxe/BdsDxe.inf b/MdeModulePkg/Univer=
sal/BdsDxe/BdsDxe.inf
index 9310b4dccb18..76ff6a0f5fc3 100644
--- a/MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+++ b/MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
@@ -50,6 +50,8 @@
BaseMemoryLib=0D
DebugLib=0D
UefiBootManagerLib=0D
+ VariablePolicyLib=0D
+ VariablePolicyHelperLib=0D
PlatformBootManagerLib=0D
PcdLib=0D
PrintLib=0D
@@ -77,7 +79,7 @@
[Protocols]=0D
gEfiBdsArchProtocolGuid ## PRODUCES=0D
gEfiSimpleTextInputExProtocolGuid ## CONSUMES=0D
- gEdkiiVariableLockProtocolGuid ## SOMETIMES_CONSUMES=0D
+ gEdkiiVariablePolicyProtocolGuid ## SOMETIMES_CONSUMES=0D
gEfiDeferredImageLoadProtocolGuid ## CONSUMES=0D
=0D
[FeaturePcd]=0D
diff --git a/MdeModulePkg/Universal/BdsDxe/BdsEntry.c b/MdeModulePkg/Univer=
sal/BdsDxe/BdsEntry.c
index 83b773a2fa5f..13c10bdc5bf8 100644
--- a/MdeModulePkg/Universal/BdsDxe/BdsEntry.c
+++ b/MdeModulePkg/Universal/BdsDxe/BdsEntry.c
@@ -15,6 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Bds.h"=0D
#include "Language.h"=0D
#include "HwErrRecSupport.h"=0D
+#include <Library/VariablePolicyHelperLib.h>=0D
=0D
#define SET_BOOT_OPTION_SUPPORT_KEY_COUNT(a, c) { \=0D
(a) =3D ((a) & ~EFI_BOOT_OPTION_SUPPORT_COUNT) | (((c) << LowBitSet3=
2 (EFI_BOOT_OPTION_SUPPORT_COUNT)) & EFI_BOOT_OPTION_SUPPORT_COUNT); \=0D
@@ -670,7 +671,7 @@ BdsEntry (
EFI_STATUS Status;=0D
UINT32 BootOptionSupport;=0D
UINT16 BootTimeOut;=0D
- EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock;=0D
+ EDKII_VARIABLE_POLICY_PROTOCOL *VariablePolicy;=0D
UINTN Index;=0D
EFI_BOOT_MANAGER_LOAD_OPTION LoadOption;=0D
UINT16 *BootNext;=0D
@@ -716,12 +717,21 @@ BdsEntry (
//=0D
// Mark the read-only variables if the Variable Lock protocol exists=0D
//=0D
- Status =3D gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (=
VOID **) &VariableLock);=0D
- DEBUG ((EFI_D_INFO, "[BdsDxe] Locate Variable Lock protocol - %r\n", Sta=
tus));=0D
+ Status =3D gBS->LocateProtocol(&gEdkiiVariablePolicyProtocolGuid, NULL, =
(VOID**)&VariablePolicy);=0D
+ DEBUG((DEBUG_INFO, "[BdsDxe] Locate Variable Policy protocol - %r\n", St=
atus));=0D
if (!EFI_ERROR (Status)) {=0D
for (Index =3D 0; Index < ARRAY_SIZE (mReadOnlyVariables); Index++) {=
=0D
- Status =3D VariableLock->RequestToLock (VariableLock, mReadOnlyVaria=
bles[Index], &gEfiGlobalVariableGuid);=0D
- ASSERT_EFI_ERROR (Status);=0D
+ Status =3D RegisterBasicVariablePolicy(=0D
+ VariablePolicy,=0D
+ &gEfiGlobalVariableGuid,=0D
+ mReadOnlyVariables[Index],=0D
+ VARIABLE_POLICY_NO_MIN_SIZE,=0D
+ VARIABLE_POLICY_NO_MAX_SIZE,=0D
+ VARIABLE_POLICY_NO_MUST_ATTR,=0D
+ VARIABLE_POLICY_NO_CANT_ATTR,=0D
+ VARIABLE_POLICY_TYPE_LOCK_NOW=0D
+ );=0D
+ ASSERT_EFI_ERROR(Status);=0D
}=0D
}=0D
=0D
--=20
2.31.1.windows.1


Re: [EXTERNAL] 回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Michael D Kinney
 

Has the reason for the PciBusDxe override been discussed with the PciBusDxe maintainer?

 

What feature would need to be added to PciBusDxe to accommodate the use case?

 

Mike

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of manickavasakam karpagavinayagam

Sent: Thursday, June 17, 2021 7:56 AM
To: gaoliming <gaoliming@...>; devel@edk2.groups.io
Cc: DOPPALAPUDI, HARIKRISHNA <harikrishnad@...>
Subject: Re: [EXTERNAL] 回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Liming :

 

Below email is the cover letter and this patch series has two changes. Sure next time, will add more comments in the cover letter also.

Please refer the attached email and it has information about the PCIBUS override changes. PCIBUS override is done based on the platform sighting and it can’t be generic.

 

Thank you

 

-Manic

 

From: gaoliming <gaoliming@...>
Sent: Wednesday, June 16, 2021 10:56 PM
To: devel@edk2.groups.io; Manickavasakam Karpagavinayagam <manickavasakamk@...>
Subject: [EXTERNAL]
回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

 

**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

 

Please follow https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format to update the commit message format.

 

And, for the override PciBus module, can you give more detail why need to override PciBus? Is it possible to update Edk2 MdeModulePkg PciBus to meet the platform requirement?

 

Thanks

Liming

发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 manickavasakam karpagavinayagam
发送时间: 2021617 7:05
收件人: devel@edk2.groups.io
主题: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Add BoardTiogaPass packages to support TiogaPass Platform Enabled Network, ISCSI,IPMI, SMBIOS, Performance Measurement
Remove AST2500 UEFI option ROM driver from PurleyOpenBoardPkg

AST2500 UEFI option ROM move to edk2-non-osi ASpeedGopBinPkg Update copyright headers

 

manickavasakam karpagavinayagam (2):

  PurleyOpenBoardPkg : Support for TiogaPass Platform

  PurleyOpenBoardPkg : Override generic PciBus Driver with Platform

    specific instance of PciBus driver.

 

.../IpmiFeaturePkg/GenericIpmi/Dxe/IpmiInit.c |    8 +-

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c        |  453 +-

.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c      |    3 +

.../BoardTiogaPass/CoreDxeInclude.dsc         |  168 +

.../BoardTiogaPass/CoreUefiBootInclude.fdf    |   82 +

.../BoardTiogaPass/GitEdk2MinTiogaPass.bat    |   93 +

.../BasePlatformHookLib/BasePlatformHookLib.c |  389 +

.../BasePlatformHookLib.inf                   |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.c       |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.inf     |   40 +

.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c   |   53 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.c      |   62 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf    |   41 +

.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c    |  120 +

.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c  |   37 +

.../Library/BoardInitLib/AllLanesEparam.c     |   44 +

.../Library/BoardInitLib/GpioTable.c          |  296 +

.../Library/BoardInitLib/IioBifur.c           |   70 +

.../BoardInitLib/PeiBoardInitPostMemLib.c     |   46 +

.../BoardInitLib/PeiBoardInitPostMemLib.inf   |   37 +

.../BoardInitLib/PeiBoardInitPreMemLib.c      |  112 +

.../BoardInitLib/PeiBoardInitPreMemLib.inf    |   69 +

.../Library/BoardInitLib/PeiTiogaPassDetect.c |   28 +

.../BoardInitLib/PeiTiogaPassInitLib.h        |   18 +

.../BoardInitLib/PeiTiogaPassInitPostMemLib.c |   86 +

.../BoardInitLib/PeiTiogaPassInitPreMemLib.c  |  638 ++

.../Library/BoardInitLib/UsbOC.c              |   46 +

.../Library/PeiReportFvLib/PeiReportFvLib.c   |  138 +

.../Library/PeiReportFvLib/PeiReportFvLib.inf |   51 +

.../BoardTiogaPass/OpenBoardPkg.dsc           |  245 +

.../BoardTiogaPass/OpenBoardPkg.fdf           |  600 ++

.../BoardTiogaPass/PlatformPkgBuildOption.dsc |   84 +

.../BoardTiogaPass/PlatformPkgConfig.dsc      |   58 +

.../BoardTiogaPass/PlatformPkgPcd.dsc         |  392 ++

.../BoardTiogaPass/StructureConfig.dsc        | 6236 +++++++++++++++++

.../BoardTiogaPass/__init__.py                |    0

.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat |  139 +

.../BoardTiogaPass/build_board.py             |  195 +

.../BoardTiogaPass/build_config.cfg           |   34 +

.../BoardTiogaPass/logo.txt                   |   10 +

.../BoardTiogaPass/postbuild.bat              |   96 +

.../BoardTiogaPass/prebuild.bat               |  213 +

.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf    |   10 +-

.../IpmiPlatformHookLib.inf                   |    6 +-

.../Include/Guid/PchRcVariable.h              |    6 +

.../Include/Guid/SetupVariable.h              |   15 +-

.../Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec |    1 +

.../Bus/Pci/PciBusDxe/ComponentName.c         |  170 +

.../Bus/Pci/PciBusDxe/ComponentName.h         |  146 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c   |  460 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |  396 ++

.../Bus/Pci/PciBusDxe/PciBusDxe.inf           |  112 +

.../Bus/Pci/PciBusDxe/PciBusDxe.uni           |   16 +

.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni      |   14 +

.../Bus/Pci/PciBusDxe/PciCommand.c            |  267 +

.../Bus/Pci/PciBusDxe/PciCommand.h            |  232 +

.../Bus/Pci/PciBusDxe/PciDeviceSupport.c      | 1056 +++

.../Bus/Pci/PciBusDxe/PciDeviceSupport.h      |  266 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.c     |  188 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.h     |   83 +

.../Bus/Pci/PciBusDxe/PciEnumerator.c         | 2210 ++++++

.../Bus/Pci/PciBusDxe/PciEnumerator.h         |  515 ++

.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c  | 2885 ++++++++  .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h  |  480 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c     |  484 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h     |  205 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c    | 2087 ++++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h    |  660 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c   | 1809 +++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h   |  179 +

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c   |  776 ++

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h   |  136 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.c    |   82 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.h    |   28 +

.../Bus/Pci/PciBusDxe/PciResourceSupport.c    | 2292 ++++++

.../Bus/Pci/PciBusDxe/PciResourceSupport.h    |  456 ++

.../Bus/Pci/PciBusDxe/PciRomTable.c           |  135 +

.../Bus/Pci/PciBusDxe/PciRomTable.h           |   48 +

Platform/Intel/build.cfg                      |    2 +

Platform/Intel/build_bios.py                  |    3 +-

80 files changed, 30278 insertions(+), 240 deletions(-)  create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [EXTERNAL] 回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

manickavasakam karpagavinayagam
 

Liming :

 

Below email is the cover letter and this patch series has two changes. Sure next time, will add more comments in the cover letter also.

Please refer the attached email and it has information about the PCIBUS override changes. PCIBUS override is done based on the platform sighting and it can’t be generic.

 

Thank you

 

-Manic

 

From: gaoliming <gaoliming@...>
Sent: Wednesday, June 16, 2021 10:56 PM
To: devel@edk2.groups.io; Manickavasakam Karpagavinayagam <manickavasakamk@...>
Subject: [EXTERNAL]
回复: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

 

**CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.**

 

Please follow https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format to update the commit message format.

 

And, for the override PciBus module, can you give more detail why need to override PciBus? Is it possible to update Edk2 MdeModulePkg PciBus to meet the platform requirement?

 

Thanks

Liming

发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 manickavasakam karpagavinayagam
发送时间: 2021617 7:05
收件人: devel@edk2.groups.io
主题: [edk2-devel] [edk2-platforms] [PATCH V1 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

 

Add BoardTiogaPass packages to support TiogaPass Platform Enabled Network, ISCSI,IPMI, SMBIOS, Performance Measurement
Remove AST2500 UEFI option ROM driver from PurleyOpenBoardPkg

AST2500 UEFI option ROM move to edk2-non-osi ASpeedGopBinPkg Update copyright headers

 

manickavasakam karpagavinayagam (2):

  PurleyOpenBoardPkg : Support for TiogaPass Platform

  PurleyOpenBoardPkg : Override generic PciBus Driver with Platform

    specific instance of PciBus driver.

 

.../IpmiFeaturePkg/GenericIpmi/Dxe/IpmiInit.c |    8 +-

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c        |  453 +-

.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c      |    3 +

.../BoardTiogaPass/CoreDxeInclude.dsc         |  168 +

.../BoardTiogaPass/CoreUefiBootInclude.fdf    |   82 +

.../BoardTiogaPass/GitEdk2MinTiogaPass.bat    |   93 +

.../BasePlatformHookLib/BasePlatformHookLib.c |  389 +

.../BasePlatformHookLib.inf                   |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.c       |   36 +

.../BoardAcpiLib/DxeBoardAcpiTableLib.inf     |   40 +

.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c   |   53 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.c      |   62 +

.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf    |   41 +

.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c    |  120 +

.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c  |   37 +

.../Library/BoardInitLib/AllLanesEparam.c     |   44 +

.../Library/BoardInitLib/GpioTable.c          |  296 +

.../Library/BoardInitLib/IioBifur.c           |   70 +

.../BoardInitLib/PeiBoardInitPostMemLib.c     |   46 +

.../BoardInitLib/PeiBoardInitPostMemLib.inf   |   37 +

.../BoardInitLib/PeiBoardInitPreMemLib.c      |  112 +

.../BoardInitLib/PeiBoardInitPreMemLib.inf    |   69 +

.../Library/BoardInitLib/PeiTiogaPassDetect.c |   28 +

.../BoardInitLib/PeiTiogaPassInitLib.h        |   18 +

.../BoardInitLib/PeiTiogaPassInitPostMemLib.c |   86 +

.../BoardInitLib/PeiTiogaPassInitPreMemLib.c  |  638 ++

.../Library/BoardInitLib/UsbOC.c              |   46 +

.../Library/PeiReportFvLib/PeiReportFvLib.c   |  138 +

.../Library/PeiReportFvLib/PeiReportFvLib.inf |   51 +

.../BoardTiogaPass/OpenBoardPkg.dsc           |  245 +

.../BoardTiogaPass/OpenBoardPkg.fdf           |  600 ++

.../BoardTiogaPass/PlatformPkgBuildOption.dsc |   84 +

.../BoardTiogaPass/PlatformPkgConfig.dsc      |   58 +

.../BoardTiogaPass/PlatformPkgPcd.dsc         |  392 ++

.../BoardTiogaPass/StructureConfig.dsc        | 6236 +++++++++++++++++

.../BoardTiogaPass/__init__.py                |    0

.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat |  139 +

.../BoardTiogaPass/build_board.py             |  195 +

.../BoardTiogaPass/build_config.cfg           |   34 +

.../BoardTiogaPass/logo.txt                   |   10 +

.../BoardTiogaPass/postbuild.bat              |   96 +

.../BoardTiogaPass/prebuild.bat               |  213 +

.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf    |   10 +-

.../IpmiPlatformHookLib.inf                   |    6 +-

.../Include/Guid/PchRcVariable.h              |    6 +

.../Include/Guid/SetupVariable.h              |   15 +-

.../Intel/PurleyOpenBoardPkg/OpenBoardPkg.dec |    1 +

.../Bus/Pci/PciBusDxe/ComponentName.c         |  170 +

.../Bus/Pci/PciBusDxe/ComponentName.h         |  146 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c   |  460 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |  396 ++

.../Bus/Pci/PciBusDxe/PciBusDxe.inf           |  112 +

.../Bus/Pci/PciBusDxe/PciBusDxe.uni           |   16 +

.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni      |   14 +

.../Bus/Pci/PciBusDxe/PciCommand.c            |  267 +

.../Bus/Pci/PciBusDxe/PciCommand.h            |  232 +

.../Bus/Pci/PciBusDxe/PciDeviceSupport.c      | 1056 +++

.../Bus/Pci/PciBusDxe/PciDeviceSupport.h      |  266 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.c     |  188 +

.../Bus/Pci/PciBusDxe/PciDriverOverride.h     |   83 +

.../Bus/Pci/PciBusDxe/PciEnumerator.c         | 2210 ++++++

.../Bus/Pci/PciBusDxe/PciEnumerator.h         |  515 ++

.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c  | 2885 ++++++++  .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h  |  480 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c     |  484 ++

.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h     |  205 +

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c    | 2087 ++++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h    |  660 ++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c   | 1809 +++++

.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h   |  179 +

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c   |  776 ++

.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h   |  136 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.c    |   82 +

.../Bus/Pci/PciBusDxe/PciPowerManagement.h    |   28 +

.../Bus/Pci/PciBusDxe/PciResourceSupport.c    | 2292 ++++++

.../Bus/Pci/PciBusDxe/PciResourceSupport.h    |  456 ++

.../Bus/Pci/PciBusDxe/PciRomTable.c           |  135 +

.../Bus/Pci/PciBusDxe/PciRomTable.h           |   48 +

Platform/Intel/build.cfg                      |    2 +

Platform/Intel/build_bios.py                  |    3 +-

80 files changed, 30278 insertions(+), 240 deletions(-)  create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c

create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

-The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [PATCH v2] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Ma, Maurice
 

Hi, Patrick,

The V2 patch addressed all previous comments.

However, when I try to test your patch and build with VS2019, it gave me compiling error as below:
w:\edk2\UefiPayloadPkg\UefiPayloadEntry\UefiPayloadEntry.c(140): warning C4244: '=': conversion from 'UINT64' to 'UINT32', possible loss of data
w:\edk2\UefiPayloadPkg\UefiPayloadEntry\UefiPayloadEntry.c(150): warning C4244: '=': conversion from 'UINT64' to 'UINT32', possible loss of data
Both are related to mTopOfLowerUsableDram calculation:
mTopOfLowerUsableDram = MemoryMapEntry->Base + MemoryMapEntry->Size;
I think we will need to add typecast to fix the build issue.

Thanks
Maurice

-----Original Message-----
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Sent: Thursday, June 17, 2021 5:25
To: devel@edk2.groups.io
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo
<guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [PATCH v2] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader
memrange parsing

Currently several DXE crash due to invalid memory resource settings.
The PciHostBridgeDxe which expects the MMCONF and PCI Aperature to be
EfiMemoryMappedIO, but currently those regions are (partly) mapped as
EfiReservedMemoryType.

coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or
"MMIO in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking the bootloader
provided memory ranges. Memory types of RAM, ACPI and ACPI NVS below
4 GiB are used to increment TOLUD and reserved memory ranges touching
TOLUD at the base are also assumed to be reserved DRAM, which increment
TOLUD.

Then mark everything reserved below TOLUD as EfiReservedMemoryType
and everything reserved above TOLUD as EfiMemoryMappedIO.

This fixes assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 190 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 197 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..1b2a674401 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,159 @@
#include "UefiPayloadEntry.h" +STATIC UINT32 mTopOfLowerUsableDram =
0;+ /** Callback function to build resource descriptor HOB This function
build a HOB based on the memory map entry info.+ It creates only
EFI_RESOURCE_MEMORY_MAPPED_IO and
EFI_RESOURCE_MEMORY_RESERVED+ resources.++ @param
MemoryMapEntry Memory map entry info got from bootloader.+
@param Params A pointer to ACPI_BOARD_INFO.++ @retval
EFI_SUCCESS Successfully build a HOB.+ @retval
EFI_INVALID_PARAMETER Invalid parameter
provided.+**/+EFI_STATUS+MemInfoCallbackMmio (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ EFI_PHYSICAL_ADDRESS Base;+ EFI_RESOURCE_TYPE
Type;+ UINT64 Size;+ EFI_RESOURCE_ATTRIBUTE_TYPE
Attribue;+ ACPI_BOARD_INFO *AcpiBoardInfo;++ AcpiBoardInfo =
(ACPI_BOARD_INFO *)Params;+ if (AcpiBoardInfo == NULL) {+ return
EFI_INVALID_PARAMETER;+ }++ //+ // Skip types already handled in
MemInfoCallback+ //+ if (MemoryMapEntry->Type == E820_RAM ||
MemoryMapEntry->Type == E820_ACPI) {+ return EFI_SUCCESS;+ }++ if
(MemoryMapEntry->Base == AcpiBoardInfo->PcieBaseAddress) {+ //+ //
MMCONF is always MMIO+ //+ Type =
EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else if (MemoryMapEntry->Base
< mTopOfLowerUsableDram) {+ //+ // It's in DRAM and thus must be
reserved+ //+ Type = EFI_RESOURCE_MEMORY_RESERVED;+ } else if
((MemoryMapEntry->Base < 0x100000000ULL) && (MemoryMapEntry-
Base >= mTopOfLowerUsableDram)) {+ //+ // It's not in DRAM, must be
MMIO+ //+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else {+
Type = EFI_RESOURCE_MEMORY_RESERVED;+ }++ Base =
MemoryMapEntry->Base;+ Size = MemoryMapEntry->Size;++ Attribue =
EFI_RESOURCE_ATTRIBUTE_PRESENT |+
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |+
EFI_RESOURCE_ATTRIBUTE_TESTED |+
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;++
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base,
Size);+ DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));++ if (MemoryMapEntry->Type ==
E820_UNUSABLE ||+ MemoryMapEntry->Type == E820_DISABLED) {+
BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);+ } else if
(MemoryMapEntry->Type == E820_PMEM) {+ BuildMemoryAllocationHob
(Base, Size, EfiPersistentMemory);+ }++ return EFI_SUCCESS;+}+++/**+
Callback function to find TOLUD (Top of Lower Usable DRAM)++ Estimate
where TOLUD (Top of Lower Usable DRAM) resides. The exact position+
would require platform specific code.++ @param MemoryMapEntry
Memory map entry info got from bootloader.+ @param Params Not
used for now.++ @retval EFI_SUCCESS Successfully updated
mTopOfLowerUsableDram.+**/+EFI_STATUS+FindToludCallback (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ //+ // This code assumes that the memory map on this x86
machine below 4GiB is continous+ // until TOLUD. In addition it assumes that
the bootloader provided memory tables have+ // no "holes" and thus the
first memory range not covered by e820 marks the end of+ // usable DRAM.
In addition it's assumed that every reserved memory region touching+ //
usable RAM is also covering DRAM, everything else that is marked reserved
thus must be+ // MMIO not detectable by bootloader/OS+ //++ //+ // Skip
memory types not RAM or reserved+ //+ if ((MemoryMapEntry->Type ==
E820_UNUSABLE) || (MemoryMapEntry->Type == E820_DISABLED) ||+
(MemoryMapEntry->Type == E820_PMEM)) {+ return EFI_SUCCESS;+ }++
//+ // Skip resources above 4GiB+ //+ if (MemoryMapEntry->Base >=
0x100000000ULL) {+ return EFI_SUCCESS;+ }++ if ((MemoryMapEntry-
Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI) ||+
(MemoryMapEntry->Type == E820_NVS)) {+ //+ // It's usable DRAM.
Update TOLUD.+ //+ if (mTopOfLowerUsableDram < (MemoryMapEntry-
Base + MemoryMapEntry->Size)) {+ mTopOfLowerUsableDram =
MemoryMapEntry->Base + MemoryMapEntry->Size;+ }+ } else {+ //+ //
It might be reserved DRAM or MMIO.+ //+ // If it touches usable DRAM at
Base assume it's DRAM as well,+ // as it could be bootloader installed tables,
TSEG, GTT, ...+ //+ if (mTopOfLowerUsableDram == MemoryMapEntry-
Base) {+ mTopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;+ }+ }++ return EFI_SUCCESS;+}+++/**+
Callback function to build resource descriptor HOB++ This function build a
HOB based on the memory map entry info.+ Only add
EFI_RESOURCE_SYSTEM_MEMORY. @param MemoryMapEntry
Memory map entry info got from bootloader. @param Params Not
used for now.@@ -28,7 +177,16 @@ MemInfoCallback (
UINT64 Size; EFI_RESOURCE_ATTRIBUTE_TYPE Attribue; - Type
= (MemoryMapEntry->Type == 1) ? EFI_RESOURCE_SYSTEM_MEMORY :
EFI_RESOURCE_MEMORY_RESERVED;+ //+ // Skip everything not known to
be usable DRAM.+ // It will be added later.+ //+ if ((MemoryMapEntry-
Type != E820_RAM) && (MemoryMapEntry->Type != E820_ACPI) &&+
(MemoryMapEntry->Type != E820_NVS)) {+ return
RETURN_SUCCESS;+ }++ Type = EFI_RESOURCE_SYSTEM_MEMORY; Base
= MemoryMapEntry->Base; Size = MemoryMapEntry->Size; @@ -40,7
+198,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE; - if (Base >=
BASE_4GB ) {+ if (Base >= BASE_4GB) { // Remove tested attribute to
avoid DXE core to dispatch driver to memory above 4GB Attribue &=
~EFI_RESOURCE_ATTRIBUTE_TESTED; }@@ -48,6 +206,12 @@
MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size); DEBUG ((DEBUG_INFO , "buildhob:
base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type)); + if
(MemoryMapEntry->Type == E820_ACPI) {+ BuildMemoryAllocationHob
(Base, Size, EfiACPIReclaimMemory);+ } else if (MemoryMapEntry->Type ==
E820_NVS) {+ BuildMemoryAllocationHob (Base, Size,
EfiACPIMemoryNVS);+ }+ return RETURN_SUCCESS; } @@ -236,8 +400,19
@@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo; //- // Parse
memory info and build memory HOBs+ // First find TOLUD+ //+ DEBUG
((DEBUG_INFO , "Guessing Top of Lower Usable DRAM:\n"));+ Status =
ParseMemoryInfo (FindToludCallback, NULL);+ if (EFI_ERROR(Status)) {+
return Status;+ }+ DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n",
mTopOfLowerUsableDram));++ //+ // Parse memory info and build memory
HOBs for Usable RAM //+ DEBUG ((DEBUG_INFO , "Building
ResourceDescriptorHobs for usable memory:\n")); Status =
ParseMemoryInfo (MemInfoCallback, NULL); if (EFI_ERROR(Status))
{ return Status;@@ -289,6 +464,15 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n")); } + //+ //
Parse memory info and build memory HOBs for reserved DRAM and MMIO+
//+ DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for reserved
memory:\n"));+ Status = ParseMemoryInfo (MemInfoCallbackMmio,
&AcpiBoardInfo);+ if (EFI_ERROR(Status)) {+ return Status;+ }+ // //
Parse platform specific information. //diff --git
a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..4fd50e47cd 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \ ((ActualSize) +
(((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))
++#define E820_RAM 1+#define E820_RESERVED 2+#define E820_ACPI
3+#define E820_NVS 4+#define E820_UNUSABLE 5+#define
E820_DISABLED 6+#define E820_PMEM 7+#define E820_UNDEFINED 8+
/** Auto-generated function that calls the library constructors for all of the
module's dependent libraries.--
2.30.2


Re: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Ma, Maurice
 

Hi, Patrick,

Thank you, I will take a look on the new patch!

Regards
Maurice

-----Original Message-----
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Sent: Thursday, June 17, 2021 6:21
To: Ma, Maurice <maurice.ma@intel.com>
Cc: devel@edk2.groups.io; Dong, Guo <guo.dong@intel.com>; You,
Benjamin <benjamin.you@intel.com>
Subject: Re: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader
memrange parsing

Hi Maurice,
I've implemented the requested changes. It now also accepts ACPI_NVS as
usable DRAM.

Thanks,
Patrick

On Thu, Jun 17, 2021 at 2:33 AM Ma, Maurice <maurice.ma@intel.com>
wrote:

Hi, Rudolph,

Thank you for submitting the patch. In general the approach looks good to
me.
Here I have several minor comments on your patch as listed below:

1. For global variable in module, could we add "m" prefix ? EX: Change
"TopOfLowerUsableDram" to "mTopOfLowerUsableDram" ?

2. Please rename "MemInfoCallbackMMIO" to "MemInfoCallbackMmio"
to follow naming convention.

3. Maybe we can add parentheses for some condition expressions to make
it easier to read.
EX: Change:
(MemoryMapEntry->Base < 0x100000000ULL && MemoryMapEntry-
Base >= TopOfLowerUsableDram)
To:
((MemoryMapEntry->Base < 0x100000000ULL) &&
(MemoryMapEntry->Base >= TopOfLowerUsableDram))

4. If we use "EFI_STATUS" for function status, then function return type
should match that.
EX: Use "EFI_SUCCESS" instead of "RETURN_SUCCESS ".

5. I think the new FindToludCallback() function will find the correct TOLUD
if ACPI NVS memory region is below ACPI RECLAIM memory.
However, if it is the other way around, the TOLUD calculation might be
incorrect. Should we consider both cases?
For example, given the memory map below, your patch will get TOLUM
= 0x1EB6C000. But the actual TOLUM should be 0x20000000.
Base Length E820 Type
MEM: 0000000000000000 00000000000A0000 1
MEM: 00000000000A0000 0000000000060000 2
MEM: 0000000000100000 000000001EA00000 1
MEM: 000000001EB00000 0000000000004000 2
MEM: 000000001EB04000 0000000000068000 3 (ACPI Reclaim)
MEM: 000000001EB6C000 0000000000008000 4 (ACPI NVS)
MEM: 000000001EB74000 000000000038C000 2
MEM: 000000001EF00000 0000000000100000 2
MEM: 000000001F000000 0000000001000000 2

Thanks
Maurice

-----Original Message-----
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Sent: Tuesday, June 15, 2021 6:23
To: devel@edk2.groups.io
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo
<guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader
memrange parsing

Currently several DXE crash due to invalid memory resource settings.
coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO
regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or
"MMIO in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking memory ranges
and
then mark everything reserved below TOLUD as DRAM and everything
reserved above TOLUD as MMIO.

This fixes several assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 187 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 194 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..d20e1a0862 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,162 @@
#include "UefiPayloadEntry.h" +STATIC UINT32 TopOfLowerUsableDram
=
0;+ /** Callback function to build resource descriptor HOB This
function
build a HOB based on the memory map entry info.+ It creates only
EFI_RESOURCE_MEMORY_MAPPED_IO and
EFI_RESOURCE_MEMORY_RESERVED+ resources.++ @param
MemoryMapEntry Memory map entry info got from bootloader.+
@param Params A pointer to ACPI_BOARD_INFO.++ @retval
RETURN_SUCCESS Successfully build a HOB.+ @retval
EFI_INVALID_PARAMETER Invalid parameter
provided.+**/+EFI_STATUS+MemInfoCallbackMMIO (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ EFI_PHYSICAL_ADDRESS Base;+
EFI_RESOURCE_TYPE
Type;+ UINT64 Size;+ EFI_RESOURCE_ATTRIBUTE_TYPE
Attribue;+ ACPI_BOARD_INFO *AcpiBoardInfo;++ AcpiBoardInfo
=
(ACPI_BOARD_INFO *)Params;+ if (AcpiBoardInfo == NULL) {+ return
EFI_INVALID_PARAMETER;+ }++ //+ // Skip types already handled in
MemInfoCallback+ //+ if (MemoryMapEntry->Type == E820_RAM ||
MemoryMapEntry->Type == E820_ACPI) {+ return
RETURN_SUCCESS;+ }++
if (MemoryMapEntry->Base == AcpiBoardInfo->PcieBaseAddress) {+
//+
// MMCONF is always MMIO+ //+ Type =
EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else if (MemoryMapEntry-
Base
< TopOfLowerUsableDram) {+ //+ // It's in DRAM and thus must be
reserved+ //+ Type = EFI_RESOURCE_MEMORY_RESERVED;+ } else if
(MemoryMapEntry->Base < 0x100000000ULL &&+ MemoryMapEntry-
Base >= TopOfLowerUsableDram) {+ //+ // It's not in DRAM, must be
MMIO+ //+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else {+
Type = EFI_RESOURCE_MEMORY_RESERVED;+ }++ Base =
MemoryMapEntry->Base;+ Size = MemoryMapEntry->Size;++ Attribue
=
EFI_RESOURCE_ATTRIBUTE_PRESENT |+
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |+
EFI_RESOURCE_ATTRIBUTE_TESTED
|+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;++
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size);+ DEBUG ((DEBUG_INFO ,
"buildhob:
base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));++
if (MemoryMapEntry->Type == E820_NVS) {+ BuildMemoryAllocationHob
(Base, Size, EfiACPIMemoryNVS);+ } else if
(MemoryMapEntry->Type == E820_UNUSABLE ||+ MemoryMapEntry-
Type == E820_DISABLED) {+ BuildMemoryAllocationHob (Base, Size,
EfiUnusableMemory);+ } else if (MemoryMapEntry->Type ==
E820_PMEM)
{+ BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);+ }++
return RETURN_SUCCESS;+}+++/**+ Callback function to find TOLUD
(Top
of Lower Usable DRAM)++ Estimate where TOLUD (Top of Lower Usable
DRAM) resides. The exact position+ would require platform specific
code.++
@param MemoryMapEntry Memory map entry info got from
bootloader.+ @param Params Not used for now.++ @retval
RETURN_SUCCESS Successfully updated
TopOfLowerUsableDram.+**/+EFI_STATUS+FindToludCallback (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ //+ // This code assumes that the memory map on
this x86 machine below 4GiB is continous+ // until TOLUD. In
addition it assumes that the bootloader provided memory tables have+
// no "holes" and thus the first memory range not covered by e820 marks
the end of+ // usable DRAM.
In addition it's assumed that every reserved memory region touching+
// usable RAM is also covering DRAM, everything else that is marked
reserved thus must be+ // MMIO not detectable by bootloader/OS+
//++ //+ // Skip memory types not RAM or reserved+ //+ if
(MemoryMapEntry->Type == E820_NVS || MemoryMapEntry->Type ==
E820_UNUSABLE ||+
MemoryMapEntry->Type == E820_DISABLED || MemoryMapEntry-
Type ==
E820_PMEM) {+ return RETURN_SUCCESS;+ }++ //+ // Skip resources
above 4GiB+ //+ if (MemoryMapEntry->Base >= 0x100000000ULL) {+
return RETURN_SUCCESS;+ }++ if ((MemoryMapEntry->Type ==
E820_RAM)
||+ (MemoryMapEntry->Type == E820_ACPI)) {+ //+ // It's usable
DRAM.
Update TOLUD.+ //+ if (TopOfLowerUsableDram <
(MemoryMapEntry-
Base + MemoryMapEntry->Size)) {+ TopOfLowerUsableDram =
MemoryMapEntry->Base + MemoryMapEntry->Size;+ }+ } else {+ //+
//
It might be reserved DRAM or MMIO.+ //+ // If it touches usable
DRAM at
Base assume it's DRAM as well,+ // as it could be bootloader installed
tables,
TSEG, GTT, ...+ //+ if (TopOfLowerUsableDram == MemoryMapEntry-
Base) {+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;+ }+ }++ return RETURN_SUCCESS;+}+++/**+
Callback function to build resource descriptor HOB++ This function build
a
HOB based on the memory map entry info.+ Only add
EFI_RESOURCE_SYSTEM_MEMORY. @param MemoryMapEntry
Memory map entry info got from bootloader. @param Params
Not
used for now.@@ -28,7 +180,15 @@ MemInfoCallback (
UINT64 Size; EFI_RESOURCE_ATTRIBUTE_TYPE Attribue; -
Type
= (MemoryMapEntry->Type == 1) ? EFI_RESOURCE_SYSTEM_MEMORY :
EFI_RESOURCE_MEMORY_RESERVED;+ //+ // Skip everything not
known to
be usable DRAM.+ // It will be added later.+ //+ if
(MemoryMapEntry-
Type != E820_RAM && MemoryMapEntry->Type != E820_ACPI) {+
return
RETURN_SUCCESS;+ }++ Type = EFI_RESOURCE_SYSTEM_MEMORY;
Base
= MemoryMapEntry->Base; Size = MemoryMapEntry->Size; @@ -40,7
+200,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE; - if (Base >=
BASE_4GB ) {+ if (Base >= BASE_4GB) { // Remove tested attribute to
avoid DXE core to dispatch driver to memory above 4GB Attribue &=
~EFI_RESOURCE_ATTRIBUTE_TESTED; }@@ -48,6 +208,10 @@
MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size); DEBUG ((DEBUG_INFO , "buildhob:
base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type)); + if
(MemoryMapEntry->Type == E820_ACPI) {+
BuildMemoryAllocationHob
(Base, Size, EfiACPIReclaimMemory);+ }+ return RETURN_SUCCESS; }
@@ -
236,7 +400,16 @@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo; //- //
Parse
memory info and build memory HOBs+ // First find TOLUD+ //+
Status = ParseMemoryInfo (FindToludCallback, NULL);+ if
(EFI_ERROR(Status)) {+ return Status;+ }+ DEBUG ((DEBUG_INFO ,
"Assuming TOLUD = 0x%x\n", TopOfLowerUsableDram));++ //+ // Parse
memory info and build memory
HOBs for Usable RAM // Status = ParseMemoryInfo (MemInfoCallback,
NULL); if (EFI_ERROR(Status)) {@@ -289,6 +462,14 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n")); } + //+
//
Parse memory info and build memory HOBs for reserved DRAM and
MMIO+
//+ Status = ParseMemoryInfo (MemInfoCallbackMMIO,
&AcpiBoardInfo);+
if (EFI_ERROR(Status)) {+ return Status;+ }+ // // Parse platform
specific
information. //diff --git
a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..35ea23d202 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \ ((ActualSize) +
(((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) -
1)))
++#define E820_RAM 1+#define E820_RESERVED 2+#define
E820_ACPI
3+#define E820_NVS 4+#define E820_UNUSABLE 5+#define
E820_DISABLED 6+#define E820_PMEM 7+#define E820_UNDEFINED
8+
/** Auto-generated function that calls the library constructors for all of
the
module's dependent libraries.--
2.30.2


Re: [PATCH v2 0/6] Secure Boot default keys

Min Xu
 

On 06/17/2021, Grzegorz Bernacki wrote:
Hi Min M,

Sure, I will send the test result after I make changes for the v4 version. Can
you please point me to a few mails with the test result table so I can copy the
format?
Please refer to https://edk2.groups.io/g/devel/message/74239
Just summarize the validation you do.

thanks,
greg
Thanks
Min


Re: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Patrick Rudolph
 

Hi Maurice,
I've implemented the requested changes. It now also accepts ACPI_NVS
as usable DRAM.

Thanks,
Patrick

On Thu, Jun 17, 2021 at 2:33 AM Ma, Maurice <maurice.ma@intel.com> wrote:

Hi, Rudolph,

Thank you for submitting the patch. In general the approach looks good to me.
Here I have several minor comments on your patch as listed below:

1. For global variable in module, could we add "m" prefix ? EX: Change "TopOfLowerUsableDram" to "mTopOfLowerUsableDram" ?

2. Please rename "MemInfoCallbackMMIO" to "MemInfoCallbackMmio" to follow naming convention.

3. Maybe we can add parentheses for some condition expressions to make it easier to read.
EX: Change:
(MemoryMapEntry->Base < 0x100000000ULL && MemoryMapEntry->Base >= TopOfLowerUsableDram)
To:
((MemoryMapEntry->Base < 0x100000000ULL) && (MemoryMapEntry->Base >= TopOfLowerUsableDram))

4. If we use "EFI_STATUS" for function status, then function return type should match that.
EX: Use "EFI_SUCCESS" instead of "RETURN_SUCCESS ".

5. I think the new FindToludCallback() function will find the correct TOLUD if ACPI NVS memory region is below ACPI RECLAIM memory.
However, if it is the other way around, the TOLUD calculation might be incorrect. Should we consider both cases?
For example, given the memory map below, your patch will get TOLUM = 0x1EB6C000. But the actual TOLUM should be 0x20000000.
Base Length E820 Type
MEM: 0000000000000000 00000000000A0000 1
MEM: 00000000000A0000 0000000000060000 2
MEM: 0000000000100000 000000001EA00000 1
MEM: 000000001EB00000 0000000000004000 2
MEM: 000000001EB04000 0000000000068000 3 (ACPI Reclaim)
MEM: 000000001EB6C000 0000000000008000 4 (ACPI NVS)
MEM: 000000001EB74000 000000000038C000 2
MEM: 000000001EF00000 0000000000100000 2
MEM: 000000001F000000 0000000001000000 2

Thanks
Maurice

-----Original Message-----
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Sent: Tuesday, June 15, 2021 6:23
To: devel@edk2.groups.io
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo
<guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader
memrange parsing

Currently several DXE crash due to invalid memory resource settings.
coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or
"MMIO in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking memory ranges and
then mark everything reserved below TOLUD as DRAM and everything
reserved above TOLUD as MMIO.

This fixes several assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 187 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 194 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..d20e1a0862 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,162 @@
#include "UefiPayloadEntry.h" +STATIC UINT32 TopOfLowerUsableDram =
0;+ /** Callback function to build resource descriptor HOB This function
build a HOB based on the memory map entry info.+ It creates only
EFI_RESOURCE_MEMORY_MAPPED_IO and
EFI_RESOURCE_MEMORY_RESERVED+ resources.++ @param
MemoryMapEntry Memory map entry info got from bootloader.+
@param Params A pointer to ACPI_BOARD_INFO.++ @retval
RETURN_SUCCESS Successfully build a HOB.+ @retval
EFI_INVALID_PARAMETER Invalid parameter
provided.+**/+EFI_STATUS+MemInfoCallbackMMIO (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ EFI_PHYSICAL_ADDRESS Base;+ EFI_RESOURCE_TYPE
Type;+ UINT64 Size;+ EFI_RESOURCE_ATTRIBUTE_TYPE
Attribue;+ ACPI_BOARD_INFO *AcpiBoardInfo;++ AcpiBoardInfo =
(ACPI_BOARD_INFO *)Params;+ if (AcpiBoardInfo == NULL) {+ return
EFI_INVALID_PARAMETER;+ }++ //+ // Skip types already handled in
MemInfoCallback+ //+ if (MemoryMapEntry->Type == E820_RAM ||
MemoryMapEntry->Type == E820_ACPI) {+ return RETURN_SUCCESS;+ }++
if (MemoryMapEntry->Base == AcpiBoardInfo->PcieBaseAddress) {+ //+
// MMCONF is always MMIO+ //+ Type =
EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else if (MemoryMapEntry->Base
< TopOfLowerUsableDram) {+ //+ // It's in DRAM and thus must be
reserved+ //+ Type = EFI_RESOURCE_MEMORY_RESERVED;+ } else if
(MemoryMapEntry->Base < 0x100000000ULL &&+ MemoryMapEntry-
Base >= TopOfLowerUsableDram) {+ //+ // It's not in DRAM, must be
MMIO+ //+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;+ } else {+
Type = EFI_RESOURCE_MEMORY_RESERVED;+ }++ Base =
MemoryMapEntry->Base;+ Size = MemoryMapEntry->Size;++ Attribue =
EFI_RESOURCE_ATTRIBUTE_PRESENT |+
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |+
EFI_RESOURCE_ATTRIBUTE_TESTED |+
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |+
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;++
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base,
Size);+ DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));++ if (MemoryMapEntry->Type == E820_NVS) {+
BuildMemoryAllocationHob (Base, Size, EfiACPIMemoryNVS);+ } else if
(MemoryMapEntry->Type == E820_UNUSABLE ||+ MemoryMapEntry-
Type == E820_DISABLED) {+ BuildMemoryAllocationHob (Base, Size,
EfiUnusableMemory);+ } else if (MemoryMapEntry->Type == E820_PMEM)
{+ BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);+ }++
return RETURN_SUCCESS;+}+++/**+ Callback function to find TOLUD (Top
of Lower Usable DRAM)++ Estimate where TOLUD (Top of Lower Usable
DRAM) resides. The exact position+ would require platform specific code.++
@param MemoryMapEntry Memory map entry info got from
bootloader.+ @param Params Not used for now.++ @retval
RETURN_SUCCESS Successfully updated
TopOfLowerUsableDram.+**/+EFI_STATUS+FindToludCallback (+ IN
MEMROY_MAP_ENTRY *MemoryMapEntry,+ IN VOID
*Params+ )+{+ //+ // This code assumes that the memory map on this x86
machine below 4GiB is continous+ // until TOLUD. In addition it assumes that
the bootloader provided memory tables have+ // no "holes" and thus the
first memory range not covered by e820 marks the end of+ // usable DRAM.
In addition it's assumed that every reserved memory region touching+ //
usable RAM is also covering DRAM, everything else that is marked reserved
thus must be+ // MMIO not detectable by bootloader/OS+ //++ //+ // Skip
memory types not RAM or reserved+ //+ if (MemoryMapEntry->Type ==
E820_NVS || MemoryMapEntry->Type == E820_UNUSABLE ||+
MemoryMapEntry->Type == E820_DISABLED || MemoryMapEntry->Type ==
E820_PMEM) {+ return RETURN_SUCCESS;+ }++ //+ // Skip resources
above 4GiB+ //+ if (MemoryMapEntry->Base >= 0x100000000ULL) {+
return RETURN_SUCCESS;+ }++ if ((MemoryMapEntry->Type == E820_RAM)
||+ (MemoryMapEntry->Type == E820_ACPI)) {+ //+ // It's usable DRAM.
Update TOLUD.+ //+ if (TopOfLowerUsableDram < (MemoryMapEntry-
Base + MemoryMapEntry->Size)) {+ TopOfLowerUsableDram =
MemoryMapEntry->Base + MemoryMapEntry->Size;+ }+ } else {+ //+ //
It might be reserved DRAM or MMIO.+ //+ // If it touches usable DRAM at
Base assume it's DRAM as well,+ // as it could be bootloader installed tables,
TSEG, GTT, ...+ //+ if (TopOfLowerUsableDram == MemoryMapEntry-
Base) {+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;+ }+ }++ return RETURN_SUCCESS;+}+++/**+
Callback function to build resource descriptor HOB++ This function build a
HOB based on the memory map entry info.+ Only add
EFI_RESOURCE_SYSTEM_MEMORY. @param MemoryMapEntry
Memory map entry info got from bootloader. @param Params Not
used for now.@@ -28,7 +180,15 @@ MemInfoCallback (
UINT64 Size; EFI_RESOURCE_ATTRIBUTE_TYPE Attribue; - Type
= (MemoryMapEntry->Type == 1) ? EFI_RESOURCE_SYSTEM_MEMORY :
EFI_RESOURCE_MEMORY_RESERVED;+ //+ // Skip everything not known to
be usable DRAM.+ // It will be added later.+ //+ if (MemoryMapEntry-
Type != E820_RAM && MemoryMapEntry->Type != E820_ACPI) {+ return
RETURN_SUCCESS;+ }++ Type = EFI_RESOURCE_SYSTEM_MEMORY; Base
= MemoryMapEntry->Base; Size = MemoryMapEntry->Size; @@ -40,7
+200,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE; - if (Base >=
BASE_4GB ) {+ if (Base >= BASE_4GB) { // Remove tested attribute to
avoid DXE core to dispatch driver to memory above 4GB Attribue &=
~EFI_RESOURCE_ATTRIBUTE_TESTED; }@@ -48,6 +208,10 @@
MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size); DEBUG ((DEBUG_INFO , "buildhob:
base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type)); + if
(MemoryMapEntry->Type == E820_ACPI) {+ BuildMemoryAllocationHob
(Base, Size, EfiACPIReclaimMemory);+ }+ return RETURN_SUCCESS; } @@ -
236,7 +400,16 @@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo; //- // Parse
memory info and build memory HOBs+ // First find TOLUD+ //+ Status =
ParseMemoryInfo (FindToludCallback, NULL);+ if (EFI_ERROR(Status)) {+
return Status;+ }+ DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n",
TopOfLowerUsableDram));++ //+ // Parse memory info and build memory
HOBs for Usable RAM // Status = ParseMemoryInfo (MemInfoCallback,
NULL); if (EFI_ERROR(Status)) {@@ -289,6 +462,14 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n")); } + //+ //
Parse memory info and build memory HOBs for reserved DRAM and MMIO+
//+ Status = ParseMemoryInfo (MemInfoCallbackMMIO, &AcpiBoardInfo);+
if (EFI_ERROR(Status)) {+ return Status;+ }+ // // Parse platform specific
information. //diff --git
a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..35ea23d202 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \ ((ActualSize) +
(((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))
++#define E820_RAM 1+#define E820_RESERVED 2+#define E820_ACPI
3+#define E820_NVS 4+#define E820_UNUSABLE 5+#define
E820_DISABLED 6+#define E820_PMEM 7+#define E820_UNDEFINED 8+
/** Auto-generated function that calls the library constructors for all of the
module's dependent libraries.--
2.30.2


Re: [PATCH v2 0/6] Secure Boot default keys

Grzegorz Bernacki
 

Hi Min M,

Sure, I will send the test result after I make changes for the v4
version. Can you please point me to a few mails with the test result
table so I can copy the format?
thanks,
greg

czw., 17 cze 2021 o 03:30 Xu, Min M <min.m.xu@intel.com> napisał(a):


On 06/14/2021 5:48 PM, Grzegorz Bernacki Wrote:
Hi Min M,

Please find log from tests of OvmfX64 built with VS2019 at:
https://drive.google.com/file/d/18w7s6GxIz3aeId22xABMib7I3JX7G9X1/view?u
sp=sharing
Usually we summarize the test in a table which is posted in the mail thread, so that
the test result is clear and easy to read. Also in this way the test result can be recorded in
the review thread. I am afraid the test log in the google drive cannot be accessed
one day.

thanks,
greg

pon., 7 cze 2021 o 09:29 Grzegorz Bernacki <gjb@semihalf.com> napisał(a):

Hi Min M,

I tested it with Ovmf. I will try other compiler and provide you logs soon.

thanks,
greg

pt., 4 cze 2021 o 10:17 Xu, Min M <min.m.xu@intel.com> napisał(a):

Grzegorz
Have you built this feature with different tool chains, such as
VS2017/VS2019/GCC5? And test it in IA32/X64/AARCH64?
Would you post your test result in the mail?
Thanks much!

-----Original Message-----
From: Grzegorz Bernacki <gjb@semihalf.com>
Sent: Tuesday, June 1, 2021 9:12 PM
To: devel@edk2.groups.io
Cc: leif@nuviainc.com; ardb+tianocore@kernel.org; Samer.El-Haj-
Mahmoud@arm.com; sunny.Wang@arm.com; mw@semihalf.com;
upstream@semihalf.com; Yao, Jiewen <jiewen.yao@intel.com>; Wang,
Jian J <jian.j.wang@intel.com>; Xu, Min M <min.m.xu@intel.com>;
lersek@redhat.com; Grzegorz Bernacki <gjb@semihalf.com>
Subject: [PATCH v2 0/6] Secure Boot default keys

This patchset adds support for initialization of default Secure
Boot variables based on keys content embedded in flash binary.
This feature is active only if Secure Boot is enabled and
DEFAULT_KEY is defined. The patchset consist also application to
enroll keys from default variables and secure boot menu change to allow
user to reset key content to default values.
Discussion on design can be found at:
https://edk2.groups.io/g/rfc/topic/82139806#600

I also added patch for RPi4 which enables this feature for that platform.

Changes since v1:
- change names:
SecBootVariableLib => SecureBootVariableLib
SecBootDefaultKeysDxe => SecureBootDefaultKeysDxe
SecEnrollDefaultKeysApp => EnrollFromDefaultKeysApp
- change name of function CheckSetupMode to GetSetupMode
- remove ShellPkg dependecy from EnrollFromDefaultKeysApp
- rebase to master

Grzegorz Bernacki (6):
[edk2]
SecurityPkg: Create library for setting Secure Boot variables.
SecurityPkg: Create include file for default key content.
SecurityPkg: Add SecureBootDefaultKeysDxe driver
SecurityPkg: Add EnrollFromDefaultKeys application.
SecurityPkg: Add new modules to Security package.
SecurityPkg: Add option to reset secure boot keys.
[edk2-platform]
Platform/RaspberryPi: Enable default Secure Boot variables
initialization

SecurityPkg/SecurityPkg.dec | 14 +
SecurityPkg/SecurityPkg.dsc | 5 +
SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.inf
| 47 +

SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.in
f
| 79 ++

SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfig
Dxe.inf | 2 +

SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureB
ootD
efaultKeysDxe.inf | 46 +
SecurityPkg/Include/Library/SecureBootVariableLib.h |
252 +++++

SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfig
NvData.h | 2 +

SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfig.
vfr | 6 +
SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.c
| 107 +++
SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.c
| 979 ++++++++++++++++++++

SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigI
mpl.c | 343 ++++---

SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootD
efaultKeysDxe.c | 69 ++

SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.un
i
| 16 +
SecurityPkg/SecureBootDefaultKeys.fdf.inc | 62
++

SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigS
trings.uni | 4 +

SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureB
ootD
efaultKeysDxe.uni | 17 +
17 files changed, 1862 insertions(+), 188 deletions(-) create
mode 100644
SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.inf
create mode 100644
SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.in
f
create mode 100644
SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureB
ootD
efaultKeysDxe.inf
create mode 100644
SecurityPkg/Include/Library/SecureBootVariableLib.h
create mode 100644
SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.c
create mode 100644
SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.c
create mode 100644
SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureB
ootD
efaultKeysDxe.c
create mode 100644
SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.un
i create mode 100644 SecurityPkg/SecureBootDefaultKeys.fdf.inc
create mode 100644
SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureB
ootD
efaultKeysDxe.uni

--
2.25.1



[PATCH v2] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Patrick Rudolph
 

Currently several DXE crash due to invalid memory resource settings.
The PciHostBridgeDxe which expects the MMCONF and PCI Aperature
to be EfiMemoryMappedIO, but currently those regions are (partly)
mapped as EfiReservedMemoryType.

coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or "MMIO
in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking the bootloader provided
memory ranges. Memory types of RAM, ACPI and ACPI NVS below 4 GiB are used
to increment TOLUD and reserved memory ranges touching TOLUD at the base
are also assumed to be reserved DRAM, which increment TOLUD.

Then mark everything reserved below TOLUD as EfiReservedMemoryType and
everything reserved above TOLUD as EfiMemoryMappedIO.

This fixes assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 190 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 197 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c b/UefiPaylo=
adPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..1b2a674401 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,159 @@
=0D
#include "UefiPayloadEntry.h"=0D
=0D
+STATIC UINT32 mTopOfLowerUsableDram =3D 0;=0D
+=0D
/**=0D
Callback function to build resource descriptor HOB=0D
=0D
This function build a HOB based on the memory map entry info.=0D
+ It creates only EFI_RESOURCE_MEMORY_MAPPED_IO and EFI_RESOURCE_MEMORY_R=
ESERVED=0D
+ resources.=0D
+=0D
+ @param MemoryMapEntry Memory map entry info got from bootloader=
.=0D
+ @param Params A pointer to ACPI_BOARD_INFO.=0D
+=0D
+ @retval EFI_SUCCESS Successfully build a HOB.=0D
+ @retval EFI_INVALID_PARAMETER Invalid parameter provided.=0D
+**/=0D
+EFI_STATUS=0D
+MemInfoCallbackMmio (=0D
+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,=0D
+ IN VOID *Params=0D
+ )=0D
+{=0D
+ EFI_PHYSICAL_ADDRESS Base;=0D
+ EFI_RESOURCE_TYPE Type;=0D
+ UINT64 Size;=0D
+ EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;=0D
+ ACPI_BOARD_INFO *AcpiBoardInfo;=0D
+=0D
+ AcpiBoardInfo =3D (ACPI_BOARD_INFO *)Params;=0D
+ if (AcpiBoardInfo =3D=3D NULL) {=0D
+ return EFI_INVALID_PARAMETER;=0D
+ }=0D
+=0D
+ //=0D
+ // Skip types already handled in MemInfoCallback=0D
+ //=0D
+ if (MemoryMapEntry->Type =3D=3D E820_RAM || MemoryMapEntry->Type =3D=3D =
E820_ACPI) {=0D
+ return EFI_SUCCESS;=0D
+ }=0D
+=0D
+ if (MemoryMapEntry->Base =3D=3D AcpiBoardInfo->PcieBaseAddress) {=0D
+ //=0D
+ // MMCONF is always MMIO=0D
+ //=0D
+ Type =3D EFI_RESOURCE_MEMORY_MAPPED_IO;=0D
+ } else if (MemoryMapEntry->Base < mTopOfLowerUsableDram) {=0D
+ //=0D
+ // It's in DRAM and thus must be reserved=0D
+ //=0D
+ Type =3D EFI_RESOURCE_MEMORY_RESERVED;=0D
+ } else if ((MemoryMapEntry->Base < 0x100000000ULL) && (MemoryMapEntry->B=
ase >=3D mTopOfLowerUsableDram)) {=0D
+ //=0D
+ // It's not in DRAM, must be MMIO=0D
+ //=0D
+ Type =3D EFI_RESOURCE_MEMORY_MAPPED_IO;=0D
+ } else {=0D
+ Type =3D EFI_RESOURCE_MEMORY_RESERVED;=0D
+ }=0D
+=0D
+ Base =3D MemoryMapEntry->Base;=0D
+ Size =3D MemoryMapEntry->Size;=0D
+=0D
+ Attribue =3D EFI_RESOURCE_ATTRIBUTE_PRESENT |=0D
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |=0D
+ EFI_RESOURCE_ATTRIBUTE_TESTED |=0D
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |=0D
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |=0D
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |=0D
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;=0D
+=0D
+ BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, =
Size);=0D
+ DEBUG ((DEBUG_INFO , "buildhob: base =3D 0x%lx, size =3D 0x%lx, type =3D=
0x%x\n", Base, Size, Type));=0D
+=0D
+ if (MemoryMapEntry->Type =3D=3D E820_UNUSABLE ||=0D
+ MemoryMapEntry->Type =3D=3D E820_DISABLED) {=0D
+ BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);=0D
+ } else if (MemoryMapEntry->Type =3D=3D E820_PMEM) {=0D
+ BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);=0D
+ }=0D
+=0D
+ return EFI_SUCCESS;=0D
+}=0D
+=0D
+=0D
+/**=0D
+ Callback function to find TOLUD (Top of Lower Usable DRAM)=0D
+=0D
+ Estimate where TOLUD (Top of Lower Usable DRAM) resides. The exact posi=
tion=0D
+ would require platform specific code.=0D
+=0D
+ @param MemoryMapEntry Memory map entry info got from bootloader=
.=0D
+ @param Params Not used for now.=0D
+=0D
+ @retval EFI_SUCCESS Successfully updated mTopOfLowerUsableDra=
m.=0D
+**/=0D
+EFI_STATUS=0D
+FindToludCallback (=0D
+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,=0D
+ IN VOID *Params=0D
+ )=0D
+{=0D
+ //=0D
+ // This code assumes that the memory map on this x86 machine below 4GiB =
is continous=0D
+ // until TOLUD. In addition it assumes that the bootloader provided memo=
ry tables have=0D
+ // no "holes" and thus the first memory range not covered by e820 marks =
the end of=0D
+ // usable DRAM. In addition it's assumed that every reserved memory regi=
on touching=0D
+ // usable RAM is also covering DRAM, everything else that is marked rese=
rved thus must be=0D
+ // MMIO not detectable by bootloader/OS=0D
+ //=0D
+=0D
+ //=0D
+ // Skip memory types not RAM or reserved=0D
+ //=0D
+ if ((MemoryMapEntry->Type =3D=3D E820_UNUSABLE) || (MemoryMapEntry->Type=
=3D=3D E820_DISABLED) ||=0D
+ (MemoryMapEntry->Type =3D=3D E820_PMEM)) {=0D
+ return EFI_SUCCESS;=0D
+ }=0D
+=0D
+ //=0D
+ // Skip resources above 4GiB=0D
+ //=0D
+ if (MemoryMapEntry->Base >=3D 0x100000000ULL) {=0D
+ return EFI_SUCCESS;=0D
+ }=0D
+=0D
+ if ((MemoryMapEntry->Type =3D=3D E820_RAM) || (MemoryMapEntry->Type =3D=
=3D E820_ACPI) ||=0D
+ (MemoryMapEntry->Type =3D=3D E820_NVS)) {=0D
+ //=0D
+ // It's usable DRAM. Update TOLUD.=0D
+ //=0D
+ if (mTopOfLowerUsableDram < (MemoryMapEntry->Base + MemoryMapEntry->Si=
ze)) {=0D
+ mTopOfLowerUsableDram =3D MemoryMapEntry->Base + MemoryMapEntry->Siz=
e;=0D
+ }=0D
+ } else {=0D
+ //=0D
+ // It might be reserved DRAM or MMIO.=0D
+ //=0D
+ // If it touches usable DRAM at Base assume it's DRAM as well,=0D
+ // as it could be bootloader installed tables, TSEG, GTT, ...=0D
+ //=0D
+ if (mTopOfLowerUsableDram =3D=3D MemoryMapEntry->Base) {=0D
+ mTopOfLowerUsableDram =3D MemoryMapEntry->Base + MemoryMapEntry->Siz=
e;=0D
+ }=0D
+ }=0D
+=0D
+ return EFI_SUCCESS;=0D
+}=0D
+=0D
+=0D
+/**=0D
+ Callback function to build resource descriptor HOB=0D
+=0D
+ This function build a HOB based on the memory map entry info.=0D
+ Only add EFI_RESOURCE_SYSTEM_MEMORY.=0D
=0D
@param MemoryMapEntry Memory map entry info got from bootloader=
.=0D
@param Params Not used for now.=0D
@@ -28,7 +177,16 @@ MemInfoCallback (
UINT64 Size;=0D
EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;=0D
=0D
- Type =3D (MemoryMapEntry->Type =3D=3D 1) ? EFI_RESOURCE_SYSTEM_MEMORY=
: EFI_RESOURCE_MEMORY_RESERVED;=0D
+ //=0D
+ // Skip everything not known to be usable DRAM.=0D
+ // It will be added later.=0D
+ //=0D
+ if ((MemoryMapEntry->Type !=3D E820_RAM) && (MemoryMapEntry->Type !=3D E=
820_ACPI) &&=0D
+ (MemoryMapEntry->Type !=3D E820_NVS)) {=0D
+ return RETURN_SUCCESS;=0D
+ }=0D
+=0D
+ Type =3D EFI_RESOURCE_SYSTEM_MEMORY;=0D
Base =3D MemoryMapEntry->Base;=0D
Size =3D MemoryMapEntry->Size;=0D
=0D
@@ -40,7 +198,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |=0D
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;=0D
=0D
- if (Base >=3D BASE_4GB ) {=0D
+ if (Base >=3D BASE_4GB) {=0D
// Remove tested attribute to avoid DXE core to dispatch driver to mem=
ory above 4GB=0D
Attribue &=3D ~EFI_RESOURCE_ATTRIBUTE_TESTED;=0D
}=0D
@@ -48,6 +206,12 @@ MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, =
Size);=0D
DEBUG ((DEBUG_INFO , "buildhob: base =3D 0x%lx, size =3D 0x%lx, type =3D=
0x%x\n", Base, Size, Type));=0D
=0D
+ if (MemoryMapEntry->Type =3D=3D E820_ACPI) {=0D
+ BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);=0D
+ } else if (MemoryMapEntry->Type =3D=3D E820_NVS) {=0D
+ BuildMemoryAllocationHob (Base, Size, EfiACPIMemoryNVS);=0D
+ }=0D
+=0D
return RETURN_SUCCESS;=0D
}=0D
=0D
@@ -236,8 +400,19 @@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;=0D
=0D
//=0D
- // Parse memory info and build memory HOBs=0D
+ // First find TOLUD=0D
+ //=0D
+ DEBUG ((DEBUG_INFO , "Guessing Top of Lower Usable DRAM:\n"));=0D
+ Status =3D ParseMemoryInfo (FindToludCallback, NULL);=0D
+ if (EFI_ERROR(Status)) {=0D
+ return Status;=0D
+ }=0D
+ DEBUG ((DEBUG_INFO , "Assuming TOLUD =3D 0x%x\n", mTopOfLowerUsableDram)=
);=0D
+=0D
+ //=0D
+ // Parse memory info and build memory HOBs for Usable RAM=0D
//=0D
+ DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for usable memory:=
\n"));=0D
Status =3D ParseMemoryInfo (MemInfoCallback, NULL);=0D
if (EFI_ERROR(Status)) {=0D
return Status;=0D
@@ -289,6 +464,15 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));=0D
}=0D
=0D
+ //=0D
+ // Parse memory info and build memory HOBs for reserved DRAM and MMIO=0D
+ //=0D
+ DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for reserved memor=
y:\n"));=0D
+ Status =3D ParseMemoryInfo (MemInfoCallbackMmio, &AcpiBoardInfo);=0D
+ if (EFI_ERROR(Status)) {=0D
+ return Status;=0D
+ }=0D
+=0D
//=0D
// Parse platform specific information.=0D
//=0D
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h b/UefiPaylo=
adPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..4fd50e47cd 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \=0D
((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((=
Alignment) - 1)))=0D
=0D
+=0D
+#define E820_RAM 1=0D
+#define E820_RESERVED 2=0D
+#define E820_ACPI 3=0D
+#define E820_NVS 4=0D
+#define E820_UNUSABLE 5=0D
+#define E820_DISABLED 6=0D
+#define E820_PMEM 7=0D
+#define E820_UNDEFINED 8=0D
+=0D
/**=0D
Auto-generated function that calls the library constructors for all of t=
he module's=0D
dependent libraries.=0D
--=20
2.30.2


Re: [PATCH v2 0/3] OvmfPkg: Use QemuKernelLoaderFs to read cmdline/initrd

Dov Murik
 

On 17/06/2021 15:01, Ard Biesheuvel wrote:
On Thu, 17 Jun 2021 at 11:12, Dov Murik <dovmurik@linux.ibm.com> wrote:

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3457

In order to support measured SEV boot with kernel/initrd/cmdline, we'd
like to have one place that reads those blobs; in the future we'll add
the measurement and verification in that place.

We already have a synthetic filesystem (QemuKernelLoaderFs) which holds
three files: "kernel", "initrd", and "cmdline". The kernel is indeed
read from this filesystem in LoadImage; but the cmdline (and the length
of initrd) are read from QemuFwCfgLib items.

This patch series modifies GenericQemuLoadImageLib to read cmdline (and
the initrd size) from the QemuKernelLoaderFs synthetic filesystem, thus
removing the dependency on QemuFwCfgLib.

Note that X86QemuLoadImageLib is not modified, because it contains a
QemuLoadLegacyImage() which reads other items of the QemuFwCfg which are
not available in QemuKernelLoaderFs. Since we don't want to support the
legacy boot path in the future measured SEV boot, we leave
X86QemuLoadImageLib as-is (except for a comment addition in patch 3) and
will force use for GenericQemuLoadImageLib in the measured SEV boot
implementation.

Relevant discussion threads start in:
https://edk2.groups.io/g/devel/message/76069

To test this on x86_64, I forced the use of GenericQemuLoadImageLib
using the following local patch:


diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 0a237a905866..46442b543bcf 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -404,7 +404,7 @@ [LibraryClasses.common.DXE_DRIVER]
PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
- QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
+ QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf # XXX don't commit this or someone will be mad
!if $(TPM_ENABLE) == TRUE
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibTcg/Tpm12DeviceLibTcg.inf
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf


I tested boot with QEMU and OVMF with the following QEMU arguments:

-kernel a
-kernel a -initrd b
-kernel a -cmdline c
-kernel a -initrd b -cmdline c

(and also without -kernel)


Code is at
https://github.com/confidential-containers-demo/edk2/tree/use-synthetic-fs-for-cmdline-v2

v2 changes:

- Add comment to header of X86QemuLoadImageLib.inf
- Clearer function names in GenericQemuLoadImageLib.c
- Fix coding style issues

v1: https://edk2.groups.io/g/devel/message/76265


Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>

Dov Murik (3):
Revert "OvmfPkg/QemuKernelLoaderFsDxe: don't expose kernel command
line"
OvmfPkg/GenericQemuLoadImageLib: Read cmdline from QemuKernelLoaderFs
OvmfPkg/X86QemuLoadImageLib: State fw_cfg dependency in file header

Please cc me on the entire series.
Sorry, my bad. Resent.

-Dov



OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf | 2 +-
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf | 3 +
OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c | 145 ++++++++++++++++++--
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c | 3 +
OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c | 11 +-
5 files changed, 147 insertions(+), 17 deletions(-)

--
2.25.1






[PATCH v2 3/3] OvmfPkg/X86QemuLoadImageLib: State fw_cfg dependency in file header

Dov Murik
 

Make it clear that X86QemuLoadImageLib relies on fw_cfg; prepare the
ground to add a warning about the incompatibility with boot verification
process.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>
Signed-off-by: Dov Murik <dovmurik@linux.ibm.com>
---
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf | 3 +++
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c | 3 +++
2 files changed, 6 insertions(+)

diff --git a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf b/=
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
index e1615badd2ba..c7ec041cb706 100644
--- a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
+++ b/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
@@ -2,6 +2,9 @@
# X86 specific implementation of QemuLoadImageLib library class interface=
=0D
# with support for loading mixed mode images and non-EFI stub images=0D
#=0D
+# Note that this implementation reads the cmdline (and possibly kernel, s=
etup=0D
+# data, and initrd in the legacy boot mode) from fw_cfg directly.=0D
+#=0D
# Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
diff --git a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c b/Ov=
mfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
index 1177582ab051..dc9018f4333b 100644
--- a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
+++ b/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
@@ -2,6 +2,9 @@
X86 specific implementation of QemuLoadImageLib library class interface=
=0D
with support for loading mixed mode images and non-EFI stub images=0D
=0D
+ Note that this implementation reads the cmdline (and possibly kernel, se=
tup=0D
+ data, and initrd in the legacy boot mode) from fw_cfg directly.=0D
+=0D
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>=0D
Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>=0D
=0D
--=20
2.25.1


[PATCH v2 2/3] OvmfPkg/GenericQemuLoadImageLib: Read cmdline from QemuKernelLoaderFs

Dov Murik
 

Remove the QemuFwCfgLib interface used to read the QEMU cmdline
(-append argument) and the initrd size. Instead, use the synthetic
filesystem QemuKernelLoaderFs which has three files: "kernel", "initrd",
and "cmdline".

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>
Signed-off-by: Dov Murik <dovmurik@linux.ibm.com>
---
OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf | 2 =
+-
OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c | 145 =
++++++++++++++++++--
2 files changed, 133 insertions(+), 14 deletions(-)

diff --git a/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLi=
b.inf b/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
index b262cb926a4d..f462fd6922cf 100644
--- a/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
+++ b/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
@@ -27,12 +27,12 @@ [LibraryClasses]
DebugLib=0D
MemoryAllocationLib=0D
PrintLib=0D
- QemuFwCfgLib=0D
UefiBootServicesTableLib=0D
=0D
[Protocols]=0D
gEfiDevicePathProtocolGuid=0D
gEfiLoadedImageProtocolGuid=0D
+ gEfiSimpleFileSystemProtocolGuid=0D
=0D
[Guids]=0D
gQemuKernelLoaderFsMediaGuid=0D
diff --git a/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLi=
b.c b/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c
index 114db7e8441f..f520456e3b24 100644
--- a/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c
+++ b/OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c
@@ -11,9 +11,9 @@
#include <Base.h>=0D
#include <Guid/QemuKernelLoaderFsMedia.h>=0D
#include <Library/DebugLib.h>=0D
+#include <Library/FileHandleLib.h>=0D
#include <Library/MemoryAllocationLib.h>=0D
#include <Library/PrintLib.h>=0D
-#include <Library/QemuFwCfgLib.h>=0D
#include <Library/QemuLoadImageLib.h>=0D
#include <Library/UefiBootServicesTableLib.h>=0D
#include <Protocol/DevicePath.h>=0D
@@ -30,6 +30,11 @@ typedef struct {
KERNEL_FILE_DEVPATH FileNode;=0D
EFI_DEVICE_PATH_PROTOCOL EndNode;=0D
} KERNEL_VENMEDIA_FILE_DEVPATH;=0D
+=0D
+typedef struct {=0D
+ VENDOR_DEVICE_PATH VenMediaNode;=0D
+ EFI_DEVICE_PATH_PROTOCOL EndNode;=0D
+} SINGLE_VENMEDIA_NODE_DEVPATH;=0D
#pragma pack ()=0D
=0D
STATIC CONST KERNEL_VENMEDIA_FILE_DEVPATH mKernelDevicePath =3D {=0D
@@ -51,6 +56,78 @@ STATIC CONST KERNEL_VENMEDIA_FILE_DEVPATH mKernelDeviceP=
ath =3D {
}=0D
};=0D
=0D
+STATIC CONST SINGLE_VENMEDIA_NODE_DEVPATH mQemuKernelLoaderFileSystemDevic=
ePath =3D {=0D
+ {=0D
+ {=0D
+ MEDIA_DEVICE_PATH, MEDIA_VENDOR_DP,=0D
+ { sizeof (VENDOR_DEVICE_PATH) }=0D
+ },=0D
+ QEMU_KERNEL_LOADER_FS_MEDIA_GUID=0D
+ }, {=0D
+ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,=0D
+ { sizeof (EFI_DEVICE_PATH_PROTOCOL) }=0D
+ }=0D
+};=0D
+=0D
+STATIC=0D
+EFI_STATUS=0D
+GetQemuKernelLoaderBlobSize (=0D
+ IN EFI_FILE_HANDLE Root,=0D
+ IN CHAR16 *FileName,=0D
+ OUT UINTN *Size=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ EFI_FILE_HANDLE FileHandle;=0D
+ UINT64 FileSize;=0D
+=0D
+ Status =3D Root->Open (Root, &FileHandle, FileName, EFI_FILE_MODE_READ, =
0);=0D
+ if (EFI_ERROR (Status)) {=0D
+ return Status;=0D
+ }=0D
+ Status =3D FileHandleGetSize (FileHandle, &FileSize);=0D
+ if (EFI_ERROR (Status)) {=0D
+ goto CloseFile;=0D
+ }=0D
+ *Size =3D FileSize;=0D
+ Status =3D EFI_SUCCESS;=0D
+CloseFile:=0D
+ FileHandle->Close (FileHandle);=0D
+ return Status;=0D
+}=0D
+=0D
+STATIC=0D
+EFI_STATUS=0D
+ReadWholeQemuKernelLoaderBlob (=0D
+ IN EFI_FILE_HANDLE Root,=0D
+ IN CHAR16 *FileName,=0D
+ IN UINTN Size,=0D
+ OUT VOID *Buffer=0D
+ )=0D
+{=0D
+ EFI_STATUS Status;=0D
+ EFI_FILE_HANDLE FileHandle;=0D
+ UINTN ReadSize;=0D
+=0D
+ Status =3D Root->Open (Root, &FileHandle, FileName, EFI_FILE_MODE_READ, =
0);=0D
+ if (EFI_ERROR (Status)) {=0D
+ return Status;=0D
+ }=0D
+ ReadSize =3D Size;=0D
+ Status =3D FileHandle->Read (FileHandle, &ReadSize, Buffer);=0D
+ if (EFI_ERROR (Status)) {=0D
+ goto CloseFile;=0D
+ }=0D
+ if (ReadSize !=3D Size) {=0D
+ Status =3D EFI_PROTOCOL_ERROR;=0D
+ goto CloseFile;=0D
+ }=0D
+ Status =3D EFI_SUCCESS;=0D
+CloseFile:=0D
+ FileHandle->Close (FileHandle);=0D
+ return Status;=0D
+}=0D
+=0D
/**=0D
Download the kernel, the initial ramdisk, and the kernel command line fr=
om=0D
QEMU's fw_cfg. The kernel will be instructed via its command line to loa=
d=0D
@@ -76,12 +153,16 @@ QemuLoadKernelImage (
OUT EFI_HANDLE *ImageHandle=0D
)=0D
{=0D
- EFI_STATUS Status;=0D
- EFI_HANDLE KernelImageHandle;=0D
- EFI_LOADED_IMAGE_PROTOCOL *KernelLoadedImage;=0D
- UINTN CommandLineSize;=0D
- CHAR8 *CommandLine;=0D
- UINTN InitrdSize;=0D
+ EFI_STATUS Status;=0D
+ EFI_HANDLE KernelImageHandle;=0D
+ EFI_LOADED_IMAGE_PROTOCOL *KernelLoadedImage;=0D
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;=0D
+ EFI_HANDLE FsVolumeHandle;=0D
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *FsProtocol;=0D
+ EFI_FILE_HANDLE Root;=0D
+ UINTN CommandLineSize;=0D
+ CHAR8 *CommandLine;=0D
+ UINTN InitrdSize;=0D
=0D
//=0D
// Load the image. This should call back into the QEMU EFI loader file s=
ystem.=0D
@@ -124,8 +205,38 @@ QemuLoadKernelImage (
);=0D
ASSERT_EFI_ERROR (Status);=0D
=0D
- QemuFwCfgSelectItem (QemuFwCfgItemCommandLineSize);=0D
- CommandLineSize =3D (UINTN)QemuFwCfgRead32 ();=0D
+ //=0D
+ // Open the Qemu Kernel Loader abstract filesystem (volume) which will b=
e=0D
+ // used to read the "initrd" and "cmdline" synthetic files.=0D
+ //=0D
+ DevicePathNode =3D (EFI_DEVICE_PATH_PROTOCOL *)&mQemuKernelLoaderFileSys=
temDevicePath;=0D
+ Status =3D gBS->LocateDevicePath (=0D
+ &gEfiSimpleFileSystemProtocolGuid,=0D
+ &DevicePathNode,=0D
+ &FsVolumeHandle=0D
+ );=0D
+ if (EFI_ERROR (Status)) {=0D
+ return Status;=0D
+ }=0D
+=0D
+ Status =3D gBS->HandleProtocol (=0D
+ FsVolumeHandle,=0D
+ &gEfiSimpleFileSystemProtocolGuid,=0D
+ (VOID **)&FsProtocol=0D
+ );=0D
+ if (EFI_ERROR (Status)) {=0D
+ return Status;=0D
+ }=0D
+=0D
+ Status =3D FsProtocol->OpenVolume (FsVolumeHandle, &Root);=0D
+ if (EFI_ERROR (Status)) {=0D
+ return Status;=0D
+ }=0D
+=0D
+ Status =3D GetQemuKernelLoaderBlobSize (Root, L"cmdline", &CommandLineSi=
ze);=0D
+ if (EFI_ERROR (Status)) {=0D
+ goto CloseRoot;=0D
+ }=0D
=0D
if (CommandLineSize =3D=3D 0) {=0D
KernelLoadedImage->LoadOptionsSize =3D 0;=0D
@@ -136,8 +247,11 @@ QemuLoadKernelImage (
goto UnloadImage;=0D
}=0D
=0D
- QemuFwCfgSelectItem (QemuFwCfgItemCommandLineData);=0D
- QemuFwCfgReadBytes (CommandLineSize, CommandLine);=0D
+ Status =3D ReadWholeQemuKernelLoaderBlob (Root, L"cmdline", CommandLin=
eSize,=0D
+ CommandLine);=0D
+ if (EFI_ERROR (Status)) {=0D
+ goto FreeCommandLine;=0D
+ }=0D
=0D
//=0D
// Verify NUL-termination of the command line.=0D
@@ -155,8 +269,10 @@ QemuLoadKernelImage (
KernelLoadedImage->LoadOptionsSize =3D (UINT32)((CommandLineSize - 1) =
* 2);=0D
}=0D
=0D
- QemuFwCfgSelectItem (QemuFwCfgItemInitrdSize);=0D
- InitrdSize =3D (UINTN)QemuFwCfgRead32 ();=0D
+ Status =3D GetQemuKernelLoaderBlobSize (Root, L"initrd", &InitrdSize);=0D
+ if (EFI_ERROR (Status)) {=0D
+ goto FreeCommandLine;=0D
+ }=0D
=0D
if (InitrdSize > 0) {=0D
//=0D
@@ -193,6 +309,7 @@ QemuLoadKernelImage (
}=0D
=0D
*ImageHandle =3D KernelImageHandle;=0D
+ Root->Close (Root);=0D
return EFI_SUCCESS;=0D
=0D
FreeCommandLine:=0D
@@ -201,6 +318,8 @@ FreeCommandLine:
}=0D
UnloadImage:=0D
gBS->UnloadImage (KernelImageHandle);=0D
+CloseRoot:=0D
+ Root->Close (Root);=0D
=0D
return Status;=0D
}=0D
--=20
2.25.1


[PATCH v2 1/3] Revert "OvmfPkg/QemuKernelLoaderFsDxe: don't expose kernel command line"

Dov Murik
 

This reverts commit efc52d67e1573ce174d301b52fa1577d552c8441.

Manually fixed conflicts in:
OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c

Note that besides re-exposing the kernel command line as a file in the
synthetic filesystem, we also revert back to AllocatePool instead of
AllocatePages.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>
Signed-off-by: Dov Murik <dovmurik@linux.ibm.com>
---
OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c b/OvmfPk=
g/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c
index b09ff6a3590d..c7ddd86f5c75 100644
--- a/OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c
+++ b/OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c
@@ -33,6 +33,7 @@
typedef enum {=0D
KernelBlobTypeKernel,=0D
KernelBlobTypeInitrd,=0D
+ KernelBlobTypeCommandLine,=0D
KernelBlobTypeMax=0D
} KERNEL_BLOB_TYPE;=0D
=0D
@@ -59,6 +60,11 @@ STATIC KERNEL_BLOB mKernelBlob[KernelBlobTypeMax] =3D {
{=0D
{ QemuFwCfgItemInitrdSize, QemuFwCfgItemInitrdData, },=0D
}=0D
+ }, {=0D
+ L"cmdline",=0D
+ {=0D
+ { QemuFwCfgItemCommandLineSize, QemuFwCfgItemCommandLineData, },=0D
+ }=0D
}=0D
};=0D
=0D
@@ -948,7 +954,7 @@ FetchBlob (
//=0D
// Read blob.=0D
//=0D
- Blob->Data =3D AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Blob->Size));=0D
+ Blob->Data =3D AllocatePool (Blob->Size);=0D
if (Blob->Data =3D=3D NULL) {=0D
DEBUG ((DEBUG_ERROR, "%a: failed to allocate %Ld bytes for \"%s\"\n",=
=0D
__FUNCTION__, (INT64)Blob->Size, Blob->Name));=0D
@@ -1083,8 +1089,7 @@ FreeBlobs:
while (BlobType > 0) {=0D
CurrentBlob =3D &mKernelBlob[--BlobType];=0D
if (CurrentBlob->Data !=3D NULL) {=0D
- FreePages (CurrentBlob->Data,=0D
- EFI_SIZE_TO_PAGES ((UINTN)CurrentBlob->Size));=0D
+ FreePool (CurrentBlob->Data);=0D
CurrentBlob->Size =3D 0;=0D
CurrentBlob->Data =3D NULL;=0D
}=0D
--=20
2.25.1


[RESEND] [PATCH v2 0/3] OvmfPkg: Use QemuKernelLoaderFs to read cmdline/initrd

Dov Murik
 

[resending due to missing recipients]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3457

In order to support measured SEV boot with kernel/initrd/cmdline, we'd
like to have one place that reads those blobs; in the future we'll add
the measurement and verification in that place.

We already have a synthetic filesystem (QemuKernelLoaderFs) which holds
three files: "kernel", "initrd", and "cmdline". The kernel is indeed
read from this filesystem in LoadImage; but the cmdline (and the length
of initrd) are read from QemuFwCfgLib items.

This patch series modifies GenericQemuLoadImageLib to read cmdline (and
the initrd size) from the QemuKernelLoaderFs synthetic filesystem, thus
removing the dependency on QemuFwCfgLib.

Note that X86QemuLoadImageLib is not modified, because it contains a
QemuLoadLegacyImage() which reads other items of the QemuFwCfg which are
not available in QemuKernelLoaderFs. Since we don't want to support the
legacy boot path in the future measured SEV boot, we leave
X86QemuLoadImageLib as-is (except for a comment addition in patch 3) and
will force use for GenericQemuLoadImageLib in the measured SEV boot
implementation.

Relevant discussion threads start in:
https://edk2.groups.io/g/devel/message/76069

To test this on x86_64, I forced the use of GenericQemuLoadImageLib
using the following local patch:


diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 0a237a905866..46442b543bcf 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -404,7 +404,7 @@ [LibraryClasses.common.DXE_DRIVER]
PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
- QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
+ QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf # XXX don't commit this or someone will be mad
!if $(TPM_ENABLE) == TRUE
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibTcg/Tpm12DeviceLibTcg.inf
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf


I tested boot with QEMU and OVMF with the following QEMU arguments:

-kernel a
-kernel a -initrd b
-kernel a -cmdline c
-kernel a -initrd b -cmdline c

(and also without -kernel)


Code is at
https://github.com/confidential-containers-demo/edk2/tree/use-synthetic-fs-for-cmdline-v2

v2 changes:

- Add comment to header of X86QemuLoadImageLib.inf
- Clearer function names in GenericQemuLoadImageLib.c
- Fix coding style issues

v1: https://edk2.groups.io/g/devel/message/76265


Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>

Dov Murik (3):
Revert "OvmfPkg/QemuKernelLoaderFsDxe: don't expose kernel command
line"
OvmfPkg/GenericQemuLoadImageLib: Read cmdline from QemuKernelLoaderFs
OvmfPkg/X86QemuLoadImageLib: State fw_cfg dependency in file header

OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf | 2 +-
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf | 3 +
OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c | 145 ++++++++++++++++++--
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c | 3 +
OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c | 11 +-
5 files changed, 147 insertions(+), 17 deletions(-)

--
2.25.1


Re: [PATCH v2 0/3] OvmfPkg: Use QemuKernelLoaderFs to read cmdline/initrd

Ard Biesheuvel
 

On Thu, 17 Jun 2021 at 11:12, Dov Murik <dovmurik@linux.ibm.com> wrote:

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3457

In order to support measured SEV boot with kernel/initrd/cmdline, we'd
like to have one place that reads those blobs; in the future we'll add
the measurement and verification in that place.

We already have a synthetic filesystem (QemuKernelLoaderFs) which holds
three files: "kernel", "initrd", and "cmdline". The kernel is indeed
read from this filesystem in LoadImage; but the cmdline (and the length
of initrd) are read from QemuFwCfgLib items.

This patch series modifies GenericQemuLoadImageLib to read cmdline (and
the initrd size) from the QemuKernelLoaderFs synthetic filesystem, thus
removing the dependency on QemuFwCfgLib.

Note that X86QemuLoadImageLib is not modified, because it contains a
QemuLoadLegacyImage() which reads other items of the QemuFwCfg which are
not available in QemuKernelLoaderFs. Since we don't want to support the
legacy boot path in the future measured SEV boot, we leave
X86QemuLoadImageLib as-is (except for a comment addition in patch 3) and
will force use for GenericQemuLoadImageLib in the measured SEV boot
implementation.

Relevant discussion threads start in:
https://edk2.groups.io/g/devel/message/76069

To test this on x86_64, I forced the use of GenericQemuLoadImageLib
using the following local patch:


diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 0a237a905866..46442b543bcf 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -404,7 +404,7 @@ [LibraryClasses.common.DXE_DRIVER]
PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
- QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
+ QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf # XXX don't commit this or someone will be mad
!if $(TPM_ENABLE) == TRUE
Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibTcg/Tpm12DeviceLibTcg.inf
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf


I tested boot with QEMU and OVMF with the following QEMU arguments:

-kernel a
-kernel a -initrd b
-kernel a -cmdline c
-kernel a -initrd b -cmdline c

(and also without -kernel)


Code is at
https://github.com/confidential-containers-demo/edk2/tree/use-synthetic-fs-for-cmdline-v2

v2 changes:

- Add comment to header of X86QemuLoadImageLib.inf
- Clearer function names in GenericQemuLoadImageLib.c
- Fix coding style issues

v1: https://edk2.groups.io/g/devel/message/76265


Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>

Dov Murik (3):
Revert "OvmfPkg/QemuKernelLoaderFsDxe: don't expose kernel command
line"
OvmfPkg/GenericQemuLoadImageLib: Read cmdline from QemuKernelLoaderFs
OvmfPkg/X86QemuLoadImageLib: State fw_cfg dependency in file header

Please cc me on the entire series.


OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf | 2 +-
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf | 3 +
OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.c | 145 ++++++++++++++++++--
OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c | 3 +
OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.c | 11 +-
5 files changed, 147 insertions(+), 17 deletions(-)

--
2.25.1






[PATCH v2 6/8] DynamicTablesPkg: IORT set reference to interrupt array if present

Sami Mujawar
 

The IORT generator is populating the reference field for Context and
PMU interrupts even if their count is zero.

Update the IORT generator to set the references only if the interrupt
count is not 0. Also add checks to ensure a valid reference token has
been provided.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- No code change since v1. Re-sending with v2 series. [SAMI]

DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c | 82 +++++++++++++-------
1 file changed, 55 insertions(+), 27 deletions(-)

diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
index bdf839eab25e2b84b40c50da38f2bf961cdc5f42..9ccf72594db378878d4e3abbafe98e749d9963da 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
@@ -1136,6 +1136,7 @@ AddSmmuV1V2Nodes (
EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT * ContextInterruptArray;
EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT * PmuInterruptArray;
UINT64 NodeLength;
+ UINT32 Offset;

ASSERT (Iort != NULL);

@@ -1178,47 +1179,74 @@ AddSmmuV1V2Nodes (
SmmuNode->GlobalInterruptArrayRef =
OFFSET_OF (EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, SMMU_NSgIrpt);

+ Offset = sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE);
// Context Interrupt
SmmuNode->NumContextInterrupts = NodeList->ContextInterruptCount;
- SmmuNode->ContextInterruptArrayRef =
- sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE);
- ContextInterruptArray =
- (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT*)((UINT8*)SmmuNode +
- sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE));
+ if (NodeList->ContextInterruptCount != 0) {
+ SmmuNode->ContextInterruptArrayRef = Offset;
+ ContextInterruptArray =
+ (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT*)((UINT8*)SmmuNode + Offset);
+ Offset += (NodeList->ContextInterruptCount *
+ sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT));
+ }

// PMU Interrupt
SmmuNode->NumPmuInterrupts = NodeList->PmuInterruptCount;
- SmmuNode->PmuInterruptArrayRef = SmmuNode->ContextInterruptArrayRef +
- (NodeList->ContextInterruptCount *
- sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT));
- PmuInterruptArray =
- (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT*)((UINT8*)SmmuNode +
- SmmuNode->PmuInterruptArrayRef);
+ if (NodeList->PmuInterruptCount != 0) {
+ SmmuNode->PmuInterruptArrayRef = Offset;
+ PmuInterruptArray =
+ (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT*)((UINT8*)SmmuNode + Offset);
+ }

SmmuNode->SMMU_NSgIrpt = NodeList->SMMU_NSgIrpt;
SmmuNode->SMMU_NSgIrptFlags = NodeList->SMMU_NSgIrptFlags;
SmmuNode->SMMU_NSgCfgIrpt = NodeList->SMMU_NSgCfgIrpt;
SmmuNode->SMMU_NSgCfgIrptFlags = NodeList->SMMU_NSgCfgIrptFlags;

- // Add Context Interrupt Array
- Status = AddSmmuInterruptArray (
- CfgMgrProtocol,
- ContextInterruptArray,
- SmmuNode->NumContextInterrupts,
- NodeList->ContextInterruptToken
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((
- DEBUG_ERROR,
- "ERROR: IORT: Failed to Context Interrupt Array. Status = %r\n",
- Status
- ));
- return Status;
+ if (NodeList->ContextInterruptCount != 0) {
+ if (NodeList->ContextInterruptToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Context Interrupt token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->ContextInterruptToken,
+ Status
+ ));
+ return Status;
+ }
+
+ // Add Context Interrupt Array
+ Status = AddSmmuInterruptArray (
+ CfgMgrProtocol,
+ ContextInterruptArray,
+ SmmuNode->NumContextInterrupts,
+ NodeList->ContextInterruptToken
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to Context Interrupt Array. Status = %r\n",
+ Status
+ ));
+ return Status;
+ }
}

// Add PMU Interrupt Array
- if ((SmmuNode->NumPmuInterrupts > 0) &&
- (NodeList->PmuInterruptToken != CM_NULL_TOKEN)) {
+ if (SmmuNode->NumPmuInterrupts != 0) {
+ if (NodeList->PmuInterruptToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid PMU Interrupt token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->PmuInterruptToken,
+ Status
+ ));
+ return Status;
+ }
+
Status = AddSmmuInterruptArray (
CfgMgrProtocol,
PmuInterruptArray,
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


[PATCH v2 8/8] DynamicTablesPkg: IORT generator updates for Rev E.b spec

Sami Mujawar
 

Bugzilla: 3458 - Add support IORT Rev E.b specification updates
(https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.b,
Feb 2021 (https://developer.arm.com/documentation/den0049/)
introduces the following updates, collectively including the
updates and errata fixes to Rev E and Rev E.a:
- increments the IORT table revision to 3.
- updates the node definition to add an 'Identifier' field.
- adds definition of node type 6 - Reserved Memory Range node.
- adds definition for Memory Range Descriptors.
- adds flag to indicate PRI support for root complexes.
- adds flag to indicate if the root complex supports forwarding
of PASID information on translated transactions to the SMMU.

Therefore, update the IORT generator to:
- increment IORT table revision count to 3.
- populate Identifier filed if revision is greater than 2.
- add support to populate Reserved Memory Range nodes and
the Memory range descriptors.
- add validation to check that the Identifier field is
unique.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- The macro EFI_ACPI_IO_REMAPPING_TABLE_REVISION was set to [SAMI]
Rev 0 as setting to Rev 3 will break existing platforms.
Therefore, set the max supported IORT generator revision
to 3.

DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c | 661 ++++++++++++++++++--
DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h | 5 +-
2 files changed, 624 insertions(+), 42 deletions(-)

diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
index 9ccf72594db378878d4e3abbafe98e749d9963da..9b687f0165e6136f2f24749d27dee27edaff1b31 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c
@@ -5,8 +5,8 @@
SPDX-License-Identifier: BSD-2-Clause-Patent

@par Reference(s):
- - IO Remapping Table, Platform Design Document,
- Document number: ARM DEN 0049D, Issue D, March 2018
+ - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
+ (https://developer.arm.com/documentation/den0049/)

**/

@@ -37,9 +37,11 @@ Requirements:
- EArmObjSmmuV1SmmuV2
- EArmObjSmmuV3
- EArmObjPmcg
+ - EArmObjRmr
- EArmObjGicItsIdentifierArray
- EArmObjIdMappingArray
- - EArmObjGicItsIdentifierArray
+ - EArmObjSmmuInterruptArray
+ - EArmObjMemoryRangeDescriptor
*/

/** This macro expands to a function that retrieves the ITS
@@ -96,6 +98,24 @@ GET_OBJECT_LIST (
CM_ARM_PMCG_NODE
);

+/** This macro expands to a function that retrieves the
+ RMR node information from the Configuration Manager.
+*/
+GET_OBJECT_LIST (
+ EObjNameSpaceArm,
+ EArmObjRmr,
+ CM_ARM_RMR_NODE
+ );
+
+/** This macro expands to a function that retrieves the
+ Memory Range Descriptor Array information from the Configuration Manager.
+*/
+GET_OBJECT_LIST (
+ EObjNameSpaceArm,
+ EArmObjMemoryRangeDescriptor,
+ CM_ARM_MEMORY_RANGE_DESCRIPTOR
+ );
+
/** This macro expands to a function that retrieves the
ITS Identifier Array information from the Configuration Manager.
*/
@@ -177,13 +197,16 @@ GetSizeofItsGroupNodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetItsGroupNodeSize (NodeList);
@@ -250,13 +273,16 @@ GetSizeofNamedComponentNodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetNamedComponentNodeSize (NodeList);
@@ -322,13 +348,16 @@ GetSizeofRootComplexNodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetRootComplexNodeSize (NodeList);
@@ -400,13 +429,16 @@ GetSizeofSmmuV1V2Nodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetSmmuV1V2NodeSize (NodeList);
@@ -471,13 +503,16 @@ GetSizeofSmmuV3Nodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetSmmuV3NodeSize (NodeList);
@@ -542,13 +577,16 @@ GetSizeofPmcgNodes (
(*NodeIndexer)->Token = NodeList->Token;
(*NodeIndexer)->Object = (VOID*)NodeList;
(*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
DEBUG ((
DEBUG_INFO,
- "IORT: Node Indexer = %p, Token = %p, Object = %p, Offset = 0x%x\n",
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
*NodeIndexer,
(*NodeIndexer)->Token,
(*NodeIndexer)->Object,
- (*NodeIndexer)->Offset
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
));

Size += GetPmcgNodeSize (NodeList);
@@ -558,6 +596,83 @@ GetSizeofPmcgNodes (
return Size;
}

+/** Returns the size of the RMR node.
+
+ @param [in] Node Pointer to RMR node.
+
+ @retval Size of the RMR node.
+**/
+STATIC
+UINT32
+GetRmrNodeSize (
+ IN CONST CM_ARM_RMR_NODE * Node
+ )
+{
+ ASSERT (Node != NULL);
+
+ /* Size of RMR node +
+ Size of ID mapping array +
+ Size of Memory Range Descriptor array
+ */
+ return (UINT32)(sizeof (EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE) +
+ (Node->IdMappingCount *
+ sizeof (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE)) +
+ (Node->MemRangeDescCount *
+ sizeof (EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC)));
+}
+
+/** Returns the total size required for the RMR nodes and
+ updates the Node Indexer.
+
+ This function calculates the size required for the node group
+ and also populates the Node Indexer array with offsets for the
+ individual nodes.
+
+ @param [in] NodeStartOffset Offset from the start of the
+ IORT where this node group starts.
+ @param [in] NodeList Pointer to RMR node list.
+ @param [in] NodeCount Count of the RMR nodes.
+ @param [in, out] NodeIndexer Pointer to the next Node Indexer.
+
+ @retval Total size of the RMR nodes.
+**/
+STATIC
+UINT64
+GetSizeofRmrNodes (
+ IN CONST UINT32 NodeStartOffset,
+ IN CONST CM_ARM_RMR_NODE * NodeList,
+ IN UINT32 NodeCount,
+ IN OUT IORT_NODE_INDEXER ** CONST NodeIndexer
+ )
+{
+ UINT64 Size;
+
+ ASSERT (NodeList != NULL);
+
+ Size = 0;
+ while (NodeCount-- != 0) {
+ (*NodeIndexer)->Token = NodeList->Token;
+ (*NodeIndexer)->Object = (VOID*)NodeList;
+ (*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset);
+ (*NodeIndexer)->Identifier = NodeList->Identifier;
+ DEBUG ((
+ DEBUG_INFO,
+ "IORT: Node Indexer = %p, Token = %p, Object = %p,"
+ " Offset = 0x%x, Identifier = 0x%x\n",
+ *NodeIndexer,
+ (*NodeIndexer)->Token,
+ (*NodeIndexer)->Object,
+ (*NodeIndexer)->Offset,
+ (*NodeIndexer)->Identifier
+ ));
+
+ Size += GetRmrNodeSize (NodeList);
+ (*NodeIndexer)++;
+ NodeList++;
+ }
+ return Size;
+}
+
/** Returns the offset of the Node referenced by the Token.

@param [in] NodeIndexer Pointer to node indexer array.
@@ -707,6 +822,7 @@ AddIdMappingArray (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the ITS Group
Nodes.
@@ -723,6 +839,7 @@ EFI_STATUS
AddItsGroupNodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_ITS_GROUP_NODE * NodeList,
@@ -759,11 +876,17 @@ AddItsGroupNodes (
// Populate the node header
ItsGroupNode->Node.Type = EFI_ACPI_IORT_TYPE_ITS_GROUP;
ItsGroupNode->Node.Length = (UINT16)NodeLength;
- ItsGroupNode->Node.Revision = 0;
- ItsGroupNode->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
ItsGroupNode->Node.NumIdMappings = 0;
ItsGroupNode->Node.IdReference = 0;

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ ItsGroupNode->Node.Revision = 0;
+ ItsGroupNode->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ ItsGroupNode->Node.Revision = 1;
+ ItsGroupNode->Node.Identifier = NodeList->Identifier;
+ }
+
// IORT specific data
ItsGroupNode->NumItsIdentifiers = NodeList->ItsIdCount;
ItsIds = (UINT32*)((UINT8*)ItsGroupNode +
@@ -814,6 +937,7 @@ AddItsGroupNodes (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the Named
Component Nodes.
@@ -830,6 +954,7 @@ EFI_STATUS
AddNamedComponentNodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_NAMED_COMPONENT_NODE * NodeList,
@@ -865,10 +990,16 @@ AddNamedComponentNodes (
// Populate the node header
NcNode->Node.Type = EFI_ACPI_IORT_TYPE_NAMED_COMP;
NcNode->Node.Length = (UINT16)NodeLength;
- NcNode->Node.Revision = 2;
- NcNode->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
NcNode->Node.NumIdMappings = NodeList->IdMappingCount;

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ NcNode->Node.Revision = 2;
+ NcNode->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ NcNode->Node.Revision = 4;
+ NcNode->Node.Identifier = NodeList->Identifier;
+ }
+
ObjectNameLength = AsciiStrLen (NodeList->ObjectName) + 1;
NcNode->Node.IdReference = (NodeList->IdMappingCount == 0) ?
0 : ((UINT32)(sizeof (EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE) +
@@ -899,8 +1030,19 @@ AddNamedComponentNodes (
return Status;
}

- if ((NodeList->IdMappingCount > 0) &&
- (NodeList->IdMappingToken != CM_NULL_TOKEN)) {
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
// Ids for Named Component
IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)NcNode +
NcNode->Node.IdReference);
@@ -938,6 +1080,7 @@ AddNamedComponentNodes (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the Root Complex
Nodes.
@@ -954,6 +1097,7 @@ EFI_STATUS
AddRootComplexNodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_ROOT_COMPLEX_NODE * NodeList,
@@ -987,12 +1131,18 @@ AddRootComplexNodes (
// Populate the node header
RcNode->Node.Type = EFI_ACPI_IORT_TYPE_ROOT_COMPLEX;
RcNode->Node.Length = (UINT16)NodeLength;
- RcNode->Node.Revision = 1;
- RcNode->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
RcNode->Node.NumIdMappings = NodeList->IdMappingCount;
RcNode->Node.IdReference = (NodeList->IdMappingCount == 0) ?
0 : sizeof (EFI_ACPI_6_0_IO_REMAPPING_RC_NODE);

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ RcNode->Node.Revision = 1;
+ RcNode->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ RcNode->Node.Revision = 3;
+ RcNode->Node.Identifier = NodeList->Identifier;
+ }
+
// Root Complex specific data
RcNode->CacheCoherent = NodeList->CacheCoherent;
RcNode->AllocationHints = NodeList->AllocationHints;
@@ -1005,8 +1155,19 @@ AddRootComplexNodes (
RcNode->Reserved1[1] = EFI_ACPI_RESERVED_BYTE;
RcNode->Reserved1[2] = EFI_ACPI_RESERVED_BYTE;

- if ((NodeList->IdMappingCount > 0) &&
- (NodeList->IdMappingToken != CM_NULL_TOKEN)) {
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
// Ids for Root Complex
IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)RcNode +
RcNode->Node.IdReference);
@@ -1107,6 +1268,7 @@ AddSmmuInterruptArray (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the SMMU v1/v2
Nodes.
@@ -1123,6 +1285,7 @@ EFI_STATUS
AddSmmuV1V2Nodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_SMMUV1_SMMUV2_NODE * NodeList,
@@ -1159,8 +1322,6 @@ AddSmmuV1V2Nodes (
// Populate the node header
SmmuNode->Node.Type = EFI_ACPI_IORT_TYPE_SMMUv1v2;
SmmuNode->Node.Length = (UINT16)NodeLength;
- SmmuNode->Node.Revision = 0;
- SmmuNode->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
SmmuNode->Node.NumIdMappings = NodeList->IdMappingCount;
SmmuNode->Node.IdReference = (NodeList->IdMappingCount == 0) ?
0 : (sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE) +
@@ -1169,6 +1330,14 @@ AddSmmuV1V2Nodes (
(NodeList->PmuInterruptCount *
sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT)));

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ SmmuNode->Node.Revision = 1;
+ SmmuNode->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ SmmuNode->Node.Revision = 3;
+ SmmuNode->Node.Identifier = NodeList->Identifier;
+ }
+
// SMMU v1/v2 specific data
SmmuNode->Base = NodeList->BaseAddress;
SmmuNode->Span = NodeList->Span;
@@ -1263,8 +1432,19 @@ AddSmmuV1V2Nodes (
}
}

- if ((NodeList->IdMappingCount > 0) &&
- (NodeList->IdMappingToken != CM_NULL_TOKEN)) {
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
// Ids for SMMU v1/v2 Node
IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)SmmuNode +
SmmuNode->Node.IdReference);
@@ -1300,6 +1480,7 @@ AddSmmuV1V2Nodes (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the SMMUv3 Nodes.
@param [in] NodeList Pointer to an array of SMMUv3 Node Objects.
@@ -1314,6 +1495,7 @@ EFI_STATUS
AddSmmuV3Nodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_SMMUV3_NODE * NodeList,
@@ -1346,12 +1528,18 @@ AddSmmuV3Nodes (
// Populate the node header
SmmuV3Node->Node.Type = EFI_ACPI_IORT_TYPE_SMMUv3;
SmmuV3Node->Node.Length = (UINT16)NodeLength;
- SmmuV3Node->Node.Revision = 2;
- SmmuV3Node->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
SmmuV3Node->Node.NumIdMappings = NodeList->IdMappingCount;
SmmuV3Node->Node.IdReference = (NodeList->IdMappingCount == 0) ?
0 : sizeof (EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE);

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ SmmuV3Node->Node.Revision = 2;
+ SmmuV3Node->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ SmmuV3Node->Node.Revision = 4;
+ SmmuV3Node->Node.Identifier = NodeList->Identifier;
+ }
+
// SMMUv3 specific data
SmmuV3Node->Base = NodeList->BaseAddress;
SmmuV3Node->Flags = NodeList->Flags;
@@ -1379,8 +1567,19 @@ AddSmmuV3Nodes (
SmmuV3Node->DeviceIdMappingIndex = NodeList->DeviceIdMappingIndex;
}

- if ((NodeList->IdMappingCount > 0) &&
- (NodeList->IdMappingToken != CM_NULL_TOKEN)) {
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
// Ids for SMMUv3 node
IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)SmmuV3Node +
SmmuV3Node->Node.IdReference);
@@ -1417,6 +1616,7 @@ AddSmmuV3Nodes (
@param [in] This Pointer to the table Generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
@param [in] Iort Pointer to IORT table structure.
@param [in] NodesStartOffset Offset for the start of the PMCG Nodes.
@param [in] NodeList Pointer to an array of PMCG Node Objects.
@@ -1431,6 +1631,7 @@ EFI_STATUS
AddPmcgNodes (
IN CONST ACPI_TABLE_GENERATOR * CONST This,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
IN CONST UINT32 NodesStartOffset,
IN CONST CM_ARM_PMCG_NODE * NodeList,
@@ -1465,12 +1666,18 @@ AddPmcgNodes (
// Populate the node header
PmcgNode->Node.Type = EFI_ACPI_IORT_TYPE_PMCG;
PmcgNode->Node.Length = (UINT16)NodeLength;
- PmcgNode->Node.Revision = 1;
- PmcgNode->Node.Reserved = EFI_ACPI_RESERVED_DWORD;
PmcgNode->Node.NumIdMappings = NodeList->IdMappingCount;
PmcgNode->Node.IdReference = (NodeList->IdMappingCount == 0) ?
0 : sizeof (EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE);

+ if (AcpiTableInfo->AcpiTableRevision < EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ PmcgNode->Node.Revision = 1;
+ PmcgNode->Node.Identifier = EFI_ACPI_RESERVED_DWORD;
+ } else {
+ PmcgNode->Node.Revision = 2;
+ PmcgNode->Node.Identifier = NodeList->Identifier;
+ }
+
// PMCG specific data
PmcgNode->Base = NodeList->BaseAddress;
PmcgNode->OverflowInterruptGsiv = NodeList->OverflowInterrupt;
@@ -1494,8 +1701,19 @@ AddPmcgNodes (
return Status;
}

- if ((NodeList->IdMappingCount > 0) &&
- (NodeList->IdMappingToken != CM_NULL_TOKEN)) {
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
// Ids for PMCG node
IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)PmcgNode +
PmcgNode->Node.IdReference);
@@ -1526,6 +1744,273 @@ AddPmcgNodes (
return EFI_SUCCESS;
}

+/** Update the Memory Range Descriptor Array.
+
+ This function retrieves the Memory Range Descriptor objects referenced by
+ MemRangeDescToken and updates the Memory Range Descriptor array.
+
+ @param [in] This Pointer to the table Generator.
+ @param [in] CfgMgrProtocol Pointer to the Configuration Manager
+ Protocol Interface.
+ @param [in] DescArray Pointer to an array of Memory Range
+ Descriptors.
+ @param [in] DescCount Number of Id Descriptors.
+ @param [in] DescToken Reference Token for retrieving the
+ Memory Range Descriptor Array.
+
+ @retval EFI_SUCCESS Table generated successfully.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object was not found.
+**/
+STATIC
+EFI_STATUS
+AddMemRangeDescArray (
+ IN CONST ACPI_TABLE_GENERATOR * CONST This,
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC * DescArray,
+ IN UINT32 DescCount,
+ IN CONST CM_OBJECT_TOKEN DescToken
+ )
+{
+ EFI_STATUS Status;
+ CM_ARM_MEMORY_RANGE_DESCRIPTOR * MemRangeDesc;
+ UINT32 MemRangeDescCount;
+
+ ASSERT (DescArray != NULL);
+
+ // Get the Id Mapping Array
+ Status = GetEArmObjMemoryRangeDescriptor (
+ CfgMgrProtocol,
+ DescToken,
+ &MemRangeDesc,
+ &MemRangeDescCount
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to get Memory Range Descriptor array. Status = %r\n",
+ Status
+ ));
+ return Status;
+ }
+
+ if (MemRangeDescCount < DescCount) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to get the required number of Memory"
+ " Range Descriptors.\n"
+ ));
+ return EFI_NOT_FOUND;
+ }
+
+ // Populate the Memory Range Descriptor array
+ while (DescCount-- != 0) {
+
+ DescArray->Base = MemRangeDesc->BaseAddress;
+ DescArray->Length = MemRangeDesc->Length;
+ DescArray->Reserved = EFI_ACPI_RESERVED_DWORD;
+
+ DescArray++;
+ MemRangeDesc++;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/** Update the RMR Node Information.
+
+ This function updates the RMR node information in the IORT table.
+
+ @param [in] This Pointer to the table Generator.
+ @param [in] CfgMgrProtocol Pointer to the Configuration Manager
+ Protocol Interface.
+ @param [in] AcpiTableInfo Pointer to the ACPI table info structure.
+ @param [in] Iort Pointer to IORT table structure.
+ @param [in] NodesStartOffset Offset for the start of the PMCG Nodes.
+ @param [in] NodeList Pointer to an array of PMCG Node Objects.
+ @param [in] NodeCount Number of PMCG Node Objects.
+
+ @retval EFI_SUCCESS Table generated successfully.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object was not found.
+**/
+STATIC
+EFI_STATUS
+AddRmrNodes (
+ IN CONST ACPI_TABLE_GENERATOR * CONST This,
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol,
+ IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo,
+ IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort,
+ IN CONST UINT32 NodesStartOffset,
+ IN CONST CM_ARM_RMR_NODE * NodeList,
+ IN UINT32 NodeCount
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE * RmrNode;
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE * IdMapArray;
+ EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC * MemRangeDescArray;
+ UINT64 NodeLength;
+
+ ASSERT (Iort != NULL);
+
+ RmrNode = (EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE*)((UINT8*)Iort +
+ NodesStartOffset);
+
+ while (NodeCount-- != 0) {
+ NodeLength = GetRmrNodeSize (NodeList);
+ if (NodeLength > MAX_UINT16) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: RMR Node length 0x%lx > MAX_UINT16. Status = %r\n",
+ NodeLength,
+ Status
+ ));
+ return Status;
+ }
+
+ if (NodeList->MemRangeDescCount == 0) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Memory Range Desc count = %d. Status = %r\n",
+ NodeList->MemRangeDescCount,
+ Status
+ ));
+ return Status;
+ }
+
+ if (NodeList->MemRangeDescToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Memory Range Descriptor token,"
+ " Token = 0x%x. Status = %r\n",
+ NodeList->MemRangeDescToken,
+ Status
+ ));
+ return Status;
+ }
+
+ // Populate the node header
+ RmrNode->Node.Type = EFI_ACPI_IORT_TYPE_RMR;
+ RmrNode->Node.Length = (UINT16)NodeLength;
+ RmrNode->Node.Revision = 1;
+ RmrNode->Node.Identifier = NodeList->Identifier;
+ RmrNode->Node.NumIdMappings = NodeList->IdMappingCount;
+ RmrNode->Node.IdReference = (NodeList->IdMappingCount == 0) ?
+ 0 : sizeof (EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE);
+
+ // RMR specific data
+ RmrNode->Flags = NodeList->Flags;
+ RmrNode->NumMemRangeDesc = NodeList->MemRangeDescCount;
+ RmrNode->MemRangeDescRef = (NodeList->MemRangeDescCount == 0) ?
+ 0 : (sizeof (EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE) +
+ (NodeList->IdMappingCount *
+ sizeof (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE)));
+
+ if (NodeList->IdMappingCount > 0) {
+ if (NodeList->IdMappingToken == CM_NULL_TOKEN) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Id Mapping token,"
+ " Token = 0x%x, Status =%r\n",
+ NodeList->IdMappingToken,
+ Status
+ ));
+ return Status;
+ }
+
+ // Ids for RMR node
+ IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE*)((UINT8*)RmrNode +
+ RmrNode->Node.IdReference);
+
+ Status = AddIdMappingArray (
+ This,
+ CfgMgrProtocol,
+ IdMapArray,
+ NodeList->IdMappingCount,
+ NodeList->IdMappingToken
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to add Id Mapping Array. Status = %r\n",
+ Status
+ ));
+ return Status;
+ }
+ }
+
+ // Memory Range Descriptors for RMR node
+ MemRangeDescArray = (EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC*)(
+ (UINT8*)RmrNode +
+ RmrNode->MemRangeDescRef
+ );
+
+ Status = AddMemRangeDescArray (
+ This,
+ CfgMgrProtocol,
+ MemRangeDescArray,
+ NodeList->MemRangeDescCount,
+ NodeList->MemRangeDescToken
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to Memory Range Descriptor Array. Status = %r\n",
+ Status
+ ));
+ return Status;
+ }
+
+ // Next RMR Node
+ RmrNode = (EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE*)((UINT8*)RmrNode +
+ RmrNode->Node.Length);
+ NodeList++;
+ } // RMR Node
+
+ return EFI_SUCCESS;
+}
+
+/** Validates that the IORT nodes Identifier are unique.
+
+ @param [in] NodeIndexer Pointer to the Node Indexer.
+ @param [in] NodeCount Number of IORT Nodes.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER Identifier field not unique.
+**/
+STATIC
+EFI_STATUS
+ValidateNodeIdentifiers (
+ IN CONST IORT_NODE_INDEXER * CONST NodeIndexer,
+ IN UINT32 NodeCount
+ )
+{
+ UINT32 IndexI;
+ UINT32 IndexJ;
+
+ for (IndexI = 0; IndexI < NodeCount; IndexI++) {
+ for (IndexJ = 0; IndexJ < NodeCount; IndexJ++) {
+ if ((IndexI != IndexJ) &&
+ (NodeIndexer[IndexI].Identifier == NodeIndexer[IndexJ].Identifier)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: UID %d of Token %p matches with that of Token %p.\n",
+ NodeIndexer[IndexI].Identifier,
+ NodeIndexer[IndexI].Token,
+ NodeIndexer[IndexJ].Token
+ ));
+ return EFI_INVALID_PARAMETER;
+ }
+ }// IndexJ
+ } // IndexI
+ return EFI_SUCCESS;
+}
+
/** Construct the IORT ACPI table.

This function invokes the Configuration Manager protocol interface
@@ -1570,6 +2055,7 @@ BuildIortTable (
UINT32 SmmuV1V2NodeCount;
UINT32 SmmuV3NodeCount;
UINT32 PmcgNodeCount;
+ UINT32 RmrNodeCount;

UINT32 ItsGroupOffset;
UINT32 NamedComponentOffset;
@@ -1577,6 +2063,7 @@ BuildIortTable (
UINT32 SmmuV1V2Offset;
UINT32 SmmuV3Offset;
UINT32 PmcgOffset;
+ UINT32 RmrOffset;

CM_ARM_ITS_GROUP_NODE * ItsGroupNodeList;
CM_ARM_NAMED_COMPONENT_NODE * NamedComponentNodeList;
@@ -1584,6 +2071,7 @@ BuildIortTable (
CM_ARM_SMMUV1_SMMUV2_NODE * SmmuV1V2NodeList;
CM_ARM_SMMUV3_NODE * SmmuV3NodeList;
CM_ARM_PMCG_NODE * PmcgNodeList;
+ CM_ARM_RMR_NODE * RmrNodeList;

EFI_ACPI_6_0_IO_REMAPPING_TABLE * Iort;
IORT_NODE_INDEXER * NodeIndexer;
@@ -1726,6 +2214,27 @@ BuildIortTable (
// Add the PMCG node count
IortNodeCount += PmcgNodeCount;

+ if (AcpiTableInfo->AcpiTableRevision >= EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ // Get the RMR node info
+ Status = GetEArmObjRmr (
+ CfgMgrProtocol,
+ CM_NULL_TOKEN,
+ &RmrNodeList,
+ &RmrNodeCount
+ );
+ if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to get RMR Node Info. Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+
+ // Add the RMR node count
+ IortNodeCount += RmrNodeCount;
+ }
+
// Allocate Node Indexer array
NodeIndexer = (IORT_NODE_INDEXER*)AllocateZeroPool (
(sizeof (IORT_NODE_INDEXER) *
@@ -1929,6 +2438,37 @@ BuildIortTable (
));
}

+ // RMR Nodes
+ if ((AcpiTableInfo->AcpiTableRevision >= EFI_ACPI_IO_REMAPPING_TABLE_REV3) &&
+ (RmrNodeCount > 0)) {
+ RmrOffset = (UINT32)TableSize;
+ // Size of RMR node list.
+ NodeSize = GetSizeofRmrNodes (
+ RmrOffset,
+ RmrNodeList,
+ RmrNodeCount,
+ &NodeIndexer
+ );
+ if (NodeSize > MAX_UINT32) {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Invalid Size of RMR Nodes. Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+ TableSize += NodeSize;
+
+ DEBUG ((
+ DEBUG_INFO,
+ " RmrNodeCount = %d\n" \
+ " RmrOffset = %d\n",
+ RmrNodeCount,
+ RmrOffset
+ ));
+ }
+
DEBUG ((
DEBUG_INFO,
"INFO: IORT:\n" \
@@ -1950,6 +2490,19 @@ BuildIortTable (
goto error_handler;
}

+ // Validate that the identifiers for the nodes are unique
+ if (AcpiTableInfo->AcpiTableRevision >= EFI_ACPI_IO_REMAPPING_TABLE_REV3) {
+ Status = ValidateNodeIdentifiers (Generator->NodeIndexer, IortNodeCount);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Node Identifier not unique. Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+ }
+
// Allocate the Buffer for IORT table
*Table = (EFI_ACPI_DESCRIPTION_HEADER*)AllocateZeroPool (TableSize);
if (*Table == NULL) {
@@ -1998,6 +2551,7 @@ BuildIortTable (
Status = AddItsGroupNodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
ItsGroupOffset,
ItsGroupNodeList,
@@ -2017,6 +2571,7 @@ BuildIortTable (
Status = AddNamedComponentNodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
NamedComponentOffset,
NamedComponentNodeList,
@@ -2036,6 +2591,7 @@ BuildIortTable (
Status = AddRootComplexNodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
RootComplexOffset,
RootComplexNodeList,
@@ -2055,6 +2611,7 @@ BuildIortTable (
Status = AddSmmuV1V2Nodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
SmmuV1V2Offset,
SmmuV1V2NodeList,
@@ -2074,6 +2631,7 @@ BuildIortTable (
Status = AddSmmuV3Nodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
SmmuV3Offset,
SmmuV3NodeList,
@@ -2093,6 +2651,7 @@ BuildIortTable (
Status = AddPmcgNodes (
This,
CfgMgrProtocol,
+ AcpiTableInfo,
Iort,
PmcgOffset,
PmcgNodeList,
@@ -2101,7 +2660,27 @@ BuildIortTable (
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
- "ERROR: IORT: Failed to add SMMUv3 Node. Status = %r\n",
+ "ERROR: IORT: Failed to add PMCG Node. Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+ }
+
+ if (RmrNodeCount > 0) {
+ Status = AddRmrNodes (
+ This,
+ CfgMgrProtocol,
+ AcpiTableInfo,
+ Iort,
+ RmrOffset,
+ RmrNodeList,
+ RmrNodeCount
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: IORT: Failed to add RMR Node. Status = %r\n",
Status
));
goto error_handler;
@@ -2184,11 +2763,11 @@ ACPI_IORT_GENERATOR IortGenerator = {
// Generator Description
L"ACPI.STD.IORT.GENERATOR",
// ACPI Table Signature
- EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_IO_REMAPPING_TABLE_SIGNATURE,
// ACPI Table Revision supported by this Generator
- EFI_ACPI_IO_REMAPPING_TABLE_REVISION,
+ EFI_ACPI_IO_REMAPPING_TABLE_REV3,
// Minimum supported ACPI Table Revision
- EFI_ACPI_IO_REMAPPING_TABLE_REVISION,
+ EFI_ACPI_IO_REMAPPING_TABLE_REV0,
// Creator ID
TABLE_GENERATOR_CREATOR_ID_ARM,
// Creator Revision
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h
index bbf8aaf9efa38a75626a49af6f380b1c8c1a0629..afe2089b1dc20ed671583e2a309cc1a46c3404c6 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2018, ARM Limited. All rights reserved.
+ Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -25,6 +25,9 @@ typedef struct IortNodeIndexer {
VOID * Object;
/// Node offset from the start of the IORT table
UINT32 Offset;
+
+ /// Unique identifier for the Node
+ UINT32 Identifier;
} IORT_NODE_INDEXER;

typedef struct AcpiIortGenerator {
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


[PATCH v2 2/8] MdePkg: IORT header update for IORT Rev E.b spec

Sami Mujawar
 

Bugzilla: 3458 - Add support IORT Rev E.b specification updates
(https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.b,
Feb 2021 (https://developer.arm.com/documentation/den0049/)
introduces the following updates, collectively including the
updates and errata fixes to Rev E and Rev E.a:
- increments the IORT table revision to 3.
- updates the node definition to add an 'Identifier' field.
- adds definition of node type 6 - Reserved Memory Range node.
- adds definition for Memory Range Descriptors.
- adds flag to indicate PRI support for root complexes.
- adds flag to indicate if the root complex supports forwarding
of PASID information on translated transactions to the SMMU.

Therefore, update the IORT header file to reflect these changes.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
v2:
- Set EFI_ACPI_IO_REMAPPING_TABLE_REVISION to Rev 0 as [SAMI]
setting to Rev 3 will break existing platforms. The
problem is that existing code would not be populating
the Identifier field in the nodes. This can lead to
non-unique values in the Identifier field.

MdePkg/Include/IndustryStandard/IoRemappingTable.h | 67 ++++++++++++++++++--
1 file changed, 60 insertions(+), 7 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
index 731217441438a00dd5ff0bedf2010598d48d6dbf..a9817252d8cec17f82cb1a4ced12186cdf58713a 100644
--- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
+++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
@@ -1,12 +1,19 @@
/** @file
- ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
-
- http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf
+ ACPI IO Remapping Table (IORT) definitions.

Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
- Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2021, Arm Limited. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Reference(s):
+ - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021
+ (https://developer.arm.com/documentation/den0049/)
+
+ @par Glossary:
+ - Ref : Reference
+ - Mem : Memory
+ - Desc : Descriptor
**/

#ifndef IO_REMAPPING_TABLE_H_
@@ -14,7 +21,9 @@

#include <IndustryStandard/Acpi.h>

-#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
+#define EFI_ACPI_IO_REMAPPING_TABLE_REV0 0x0
+#define EFI_ACPI_IO_REMAPPING_TABLE_REV3 0x3
+#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION EFI_ACPI_IO_REMAPPING_TABLE_REV0

#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
@@ -22,6 +31,7 @@
#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
#define EFI_ACPI_IORT_TYPE_PMCG 0x5
+#define EFI_ACPI_IORT_TYPE_RMR 0x6

#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0

@@ -55,7 +65,16 @@
#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2

#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
-#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
+#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED BIT0
+
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED 0x0
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED BIT1
+
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED 0x0
+#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED BIT2
+
+#define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED 0x0
+#define EFI_ACPI_IORT_RMR_REMAP_PERMITTED BIT0

#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0

@@ -89,7 +108,7 @@ typedef struct {
UINT8 Type;
UINT16 Length;
UINT8 Revision;
- UINT32 Reserved;
+ UINT32 Identifier;
UINT32 NumIdMappings;
UINT32 IdReference;
} EFI_ACPI_6_0_IO_REMAPPING_NODE;
@@ -198,6 +217,40 @@ typedef struct {
//EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
} EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;

+///
+/// Memory Range Descriptor.
+///
+typedef struct {
+ /// Base address of Reserved Memory Range,
+ /// aligned to a page size of 64K.
+ UINT64 Base;
+
+ /// Length of the Reserved Memory range.
+ /// Must be a multiple of the page size of 64K.
+ UINT64 Length;
+
+ /// Reserved, must be zero.
+ UINT32 Reserved;
+} EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC;
+
+///
+/// Node type 6: Reserved Memory Range (RMR) node
+///
+typedef struct {
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
+
+ /// RMR flags
+ UINT32 Flags;
+
+ /// Memory range descriptor count.
+ UINT32 NumMemRangeDesc;
+
+ /// Offset of the memory range descriptor array.
+ UINT32 MemRangeDescRef;
+// EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1];
+// EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC MemRangeDesc[1];
+} EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE;
+
#pragma pack()

#endif
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'

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