Date   

回复: [edk2-devel] [edk2-test][PATCH v2 1/1] uefi-sct/SctPkg: Not create event with TPL_HIGH_LEVEL

Gao Jie
 

Hi Sunny,

I believe the result with 13 passes should be tested *with* this fix, right?

I saw reviewed-by/Acked-by from Samer and Heinrich, will get this patch upstreamed soon.

Thanks
Barton

-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Sunny Wang
发送时间: 2021年6月14日 17:53
收件人: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; Heinrich Schuchardt <xypron.glpk@gmx.de>; devel@edk2.groups.io
抄送: G Edhaya Chandran <Edhaya.Chandran@arm.com>; Barton Gao <gaojie@byosoft.com.cn>; Michael D Kinney <michael.d.kinney@intel.com>; Sunny Wang <Sunny.Wang@arm.com>
主题: Re: [edk2-devel] [edk2-test][PATCH v2 1/1] uefi-sct/SctPkg: Not create event with TPL_HIGH_LEVEL

Thanks for the review, Samer.
Moreover, I just built it and tested it on my ARM system, and confirmed the issue got fixed by this patch.

Without this fix, the result would be 18 tests, and 4 Errors.
CreateEvent_Func: [FAILED]
Passes........... 14
Warnings......... 0
Errors........... 4

Without this fix, the result would be 13 tests, and 0 Errors.
CreateEvent_Func: [PASSED]
Passes........... 13
Warnings......... 0
Errors........... 0

Best Regards,
Sunny Wang

-----Original Message-----
From: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Sent: Monday, June 14, 2021 8:36 AM
To: Heinrich Schuchardt <xypron.glpk@gmx.de>; Sunny Wang <Sunny.Wang@arm.com>; devel@edk2.groups.io
Cc: G Edhaya Chandran <Edhaya.Chandran@arm.com>; Barton Gao <gaojie@byosoft.com.cn>; Michael D Kinney <michael.d.kinney@intel.com>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Subject: RE: [edk2-test][PATCH v2 1/1] uefi-sct/SctPkg: Not create event with TPL_HIGH_LEVEL

Reviewed-By: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>

-----Original Message-----
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sent: Friday, June 11, 2021 5:15 AM
To: Sunny Wang <Sunny.Wang@arm.com>; devel@edk2.groups.io
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; G Edhaya
Chandran <Edhaya.Chandran@arm.com>; Barton Gao
<gaojie@byosoft.com.cn>; Michael D Kinney <michael.d.kinney@intel.com>
Subject: Re: [edk2-test][PATCH v2 1/1] uefi-sct/SctPkg: Not create event
with TPL_HIGH_LEVEL

On 11.06.21 10:35, Sunny Wang wrote:
The commits a9d1fb58 and ae7e5477b555 caused SCT BS.CreateEvent
failures.

Section 7.1 of the UEFI Spec states that TPL_HIGH_LEVEL is designed for
exclusive use by the firmware. The creation of events by UEFI
applications, UEFI drivers, and UEFI OS Loaders should not use this TPL
level.

Therefore, revert TPL_HIGH_LEVEL change in commits a9d1fb58 and
ae7e5477b555 to not create event with TPL_HIGH_LEVEL to be compliant
with UEFI Spec and fix the failures.

For more information, https://edk2.groups.io/g/devel/message/76338

Cc: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@arm.com>
Cc: G Edhaya Chandran <edhaya.chandran@arm.com>
Cc: Barton Gao <gaojie@byosoft.com.cn>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Sunny Wang <sunny.wang@arm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

---
.../EventTimerTaskPriorityServicesBBTestCreateEvent.c | 5 +----
.../EventTimerTaskPriorityServicesBBTestCreateEventEx.c | 4 +---
2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEvent.c b/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEvent.c
index a7e7366e..d5c033f7 100644
--- a/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEvent.c
+++ b/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEvent.c
@@ -2,6 +2,7 @@

Copyright 2006 - 2012 Unified EFI, Inc.<BR>
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, ARM Limited. All rights reserved.

This program and the accompanying materials
are licensed and made available under the terms and conditions of the
BSD License
@@ -190,7 +191,6 @@ BBTestCreateEvent_Conf_Sub1 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_TEST_ASSERTION AssertionType;
@@ -342,7 +342,6 @@ BBTestCreateEvent_Conf_Sub3 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_TEST_ASSERTION AssertionType;
@@ -407,7 +406,6 @@ BBTestCreateEvent_Conf_Sub4 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_TEST_ASSERTION AssertionType;
@@ -482,7 +480,6 @@ BBTestCreateEvent_Func_Sub1 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_TEST_ASSERTION AssertionType;
diff --git a/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEventEx.c b/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEventEx.c
index eb458de5..03b7ae6e 100644
--- a/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEventEx.c
+++ b/uefi-
sct/SctPkg/TestCase/UEFI/EFI/BootServices/EventTimerTaskPriorityServices/
BlackBoxTest/EventTimerTaskPriorityServicesBBTestCreateEventEx.c
@@ -2,6 +2,7 @@

Copyright 2006 - 2016 Unified EFI, Inc.<BR>
Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2021, ARM Limited. All rights reserved.

This program and the accompanying materials
are licensed and made available under the terms and conditions of the
BSD License
@@ -228,7 +229,6 @@ BBTestCreateEventEx_Conf_Sub1 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_GUID *EventGroups[] = {
@@ -318,7 +318,6 @@ BBTestCreateEventEx_Conf_Sub2 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_GUID *EventGroups[] = {
@@ -413,7 +412,6 @@ BBTestCreateEventEx_Conf_Sub3 (
EFI_TPL NotifyTpls[] = {
TPL_CALLBACK,
TPL_NOTIFY,
- TPL_HIGH_LEVEL,
0
};
EFI_GUID *EventGroups[] = {

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Event: TianoCore Bug Triage - APAC / NAMO - 06/15/2021 #cal-reminder

devel@edk2.groups.io Calendar <noreply@...>
 

Reminder: TianoCore Bug Triage - APAC / NAMO

When:
06/15/2021
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

Where:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTUyZTg2NjgtNDhlNS00ODVlLTllYTUtYzg1OTNjNjdiZjFh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%22b286b53a-1218-4db3-bfc9-3d4c5aa7669e%22%7d

Organizer: Liming Gao gaoliming@...

View Event

Description:

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao

 

________________________________________________________________________________

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回复: [edk2-devel] [Patch V4 0/9] Create multiple Hobs for Universal Payload

Zhiguang Liu
 

Thank Patrick for verifying.
I will add your Tested-by tag for this patch series.

Thanks
Zhiguang

发件人: Patrick Rudolph <patrick.rudolph@...>
发送时间: 2021年6月15日 20:00
收件人: devel@edk2.groups.io <devel@edk2.groups.io>; Liu, Zhiguang <zhiguang.liu@...>
抄送: gaoliming <gaoliming@...>
主题: Re: [edk2-devel] [Patch V4 0/9] Create multiple Hobs for Universal Payload
 
Tested the patch series on Intel Coffee Lake Platform using latest
coreboot master.
Everything seems to work fine.

Thanks
Patrick

On Thu, Jun 10, 2021 at 11:48 AM Zhiguang Liu <zhiguang.liu@...> wrote:
>
> Liming,
>
> Bugzilla is created at https://bugzilla.tianocore.org/show_bug.cgi?id=3447
>
> Thanks
> Zhiguang
>
> > -----Original Message-----
> > From: gaoliming <gaoliming@...>
> > Sent: Thursday, June 10, 2021 5:14 PM
> > To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
> > Subject: 回复: [edk2-devel] [Patch V4 0/9] Create multiple Hobs for Universal
> > Payload
> >
> > Zhiguang:
> >   Can you submit one BZ for this new feature? I will add it into edk2 202108
> > stable tag planning.
> >
> > Thanks
> > Liming
> > > -----邮件原件-----
> > > 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Zhiguang Liu
> > > 发送时间: 2021年6月10日 9:33
> > > 收件人: devel@edk2.groups.io
> > > 主题: [edk2-devel] [Patch V4 0/9] Create multiple Hobs for Universal
> > > Payload
> > >
> > > V1:
> > > This patch set is based on Universal Payload on
> > > https://universalpayload.github.io/documentation/payload-
> > interfaces/index.
> > > html
> > > This patch set introduce one general header, three different hob types
> > > and how Universal Payload consume these hobs.
> > >
> > > V2:
> > > Move all the header files and Guid define to MdeModulePkg Fix code bug
> > > when parsing SmbiosDxe.
> > > Enhance error handling in AcpiTableProtocol.c.
> > > Add AcpiTableDxe.inf in UefiPayload.fdf
> > >
> > > V3:
> > > Avoid duplicated code in SmBiosDxe.c
> > >
> > > V4:
> > > Add link to spec in header files' file comments Avoid using PLD,
> > > because it may be confusing
> > >
> > > All changes can be seen at
> > >
> > https://github.com/LiuZhiguang001/edk2/tree/UniversalPayloadHeaders_v4
> > >
> > > Zhiguang Liu (9):
> > >   MdeModulePkg: Add Universal Payload general definition header file
> > >   MdeModulePkg: Add new structure for the PCI Root Bridge Info Hob
> > >   UefiPayloadPkg: UefiPayload retrieve PCI root bridge from Guid Hob
> > >   MdeModulePkg: Add new structure for the Universal Payload SMBios
> > Table
> > >     Info Hob
> > >   MdeModulePkg/Universal/SmbiosDxe: Scan for existing tables
> > >   UefiPayloadPkg: Creat gPldSmbiosTableGuid Hob
> > >   MdeModulePkg: Add new structure for the Universal Payload ACPI Table
> > >     Info Hob
> > >   MdeModulePkg/ACPI: Install ACPI table from HOB.
> > >   UefiPayloadPkg: Creat gPldAcpiTableGuid Hob
> > >
> > >  MdeModulePkg/Include/UniversalPayload/AcpiTable.h              |
> > > 30 ++++++++++++++++++++++++++++++
> > >  MdeModulePkg/Include/UniversalPayload/PciRootBridges.h         |
> > > 91
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > +++++++++++++++++++++++++++++
> > >  MdeModulePkg/Include/UniversalPayload/SmbiosTable.h            |
> > > 30 ++++++++++++++++++++++++++++++
> > >  MdeModulePkg/Include/UniversalPayload/UniversalPayload.h       |
> > > 35 +++++++++++++++++++++++++++++++++++
> > >  MdeModulePkg/MdeModulePkg.dec
> > > |  15 +++++++++++++++
> > >  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiSdt.c             |
> > > 92
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > +++---------------------------
> > >  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTable.h           |
> > > 38 +++++++++++++++++++++++++++++++++++++-
> > >  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf      |   8
> > > +++++---
> > >  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c   | 171
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > ++++++++++++++++++++++++++++++++++++++++-------
> > >  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.c                   |
> > > 293
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > ++++++++++++++++++++++++++++++++++++++++++++-
> > >  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.h                   |
> > > 65
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > ++-
> > >  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf                 |
> > > 5 ++++-
> > >  UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c                     |
> > > 28 +---------------------------
> > >  UefiPayloadPkg/BlSupportDxe/BlSupportDxe.h                     |
> > > 5 +----
> > >  UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf                   |
> > > 4 +---
> > >  UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h        |  40
> > > ++++++++++++++++++++++++++++++++++++++--
> > >  UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c     |  47
> > > ++++++++++++++++++++++++++++++++++++++++++++---
> > >  UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf   |   8
> > > +++++++-
> > >  UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c |  73
> > >
> > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++
> > > ++++++++++-
> > >  UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c             |  23
> > > ++++++++++++++++++++++-
> > >  UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h             |   5
> > > +++--
> > >  UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf           |   4
> > > +++-
> > >  UefiPayloadPkg/UefiPayloadPkg.dsc                              |
> > > 2 +-
> > >  UefiPayloadPkg/UefiPayloadPkg.fdf                              |
> > > 4 ++++
> > >  24 files changed, 1029 insertions(+), 87 deletions(-)  create mode
> > > 100644 MdeModulePkg/Include/UniversalPayload/AcpiTable.h
> > >  create mode 100644
> > > MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
> > >  create mode 100644
> > > MdeModulePkg/Include/UniversalPayload/SmbiosTable.h
> > >  create mode 100644
> > > MdeModulePkg/Include/UniversalPayload/UniversalPayload.h
> > >
> > > --
> > > 2.30.0.windows.2
> > >
> > >
> > >
> > >
> > >
> >
> >
>
>
>
>
>
>


Re: [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

Yao, Jiewen
 

Good catch, Jeremiah!

Thank you!

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jeremiah Cox via groups.io
Sent: Wednesday, June 16, 2021 2:55 AM
To: Grzegorz Bernacki <gjb@...>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

 

"dbt" and "dbx" are swapped in the comments?  Look for groups of 3 underscores ("___") below...

+ ## GUID used to specify section with default ___dbt___ content
+ gDefault___dbx___FileGuid = { 0x5740766a, 0x718e, 0x4dc0, { 0x99, 0x35, 0xc3, 0x6f, 0x7d, 0x3f, 0x88, 0x4f } }
+
+ ## GUID used to specify section with default ___dbx___ content
+ gDefault___dbt___FileGuid = { 0x36c513ee, 0xa338, 0x4976, { 0xa0, 0xfb, 0x6d, 0xdb, 0xa3, 0xda, 0xfe, 0x87 } }


Re: [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add TPM platform hier disable support

Yao, Jiewen
 

Thank you, Michael.

Acked-by: Jiewen Yao <Jiewen.yao@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Wednesday, June 16, 2021 4:57 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Dong, Eric <eric.dong@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
Jeremiah Cox <jerecox@microsoft.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add
TPM platform hier disable support

It's been a week and I haven't seen any feedback. Please review when
possible.

Thanks,
Michael

On 6/7/2021 12:05 PM, Michael Kubacki wrote:
From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3411

This patch series adds support in TpmPlatformHierarchyLib to either
randomize the platform auth (current behavior) or disable the
platform auth (new behavior) based on a new PCD introduced to
MinPlatformPkg: PcdRandomizePlatformHierarchy.

Some platforms that would like to adopt MinPlatformPkg prefer to
disable the platform hierarchy as opposed to the randomization
approach.

Minor changes are included to eliminate code duplication in impacted
code.

V2 changes:
1. Update code that randomizes the platform auth in Tcg2PlatformPei
to use the TpmPlatformHierarchyLib interface for platform
hierarchy configuration.
2. Remove pre-existing redundant code in Tcg2PlatformPei.
3. Add a PCD to allow the platform integrator to choose how to
configure the TPM platform hierarchy.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jeremiah Cox <jerecox@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>

Michael Kubacki (4):
MinPlatformPkg: Add TpmPlatformHierarchyLib to Components in DSC
MinPlatformPkg/TpmPlatformHierarchyLib: Add PEI support
MinPlatformPkg/Tcg2PlatformPei: Use TpmPlatformHierarchyLib
MinPlatformPkg/TpmPlatformHierarchyLib: Add disable support

Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.c =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} | 72
+++++++++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.c
| 130 +-------------------
Platform/Intel/MinPlatformPkg/Include/Library/TpmPlatformHierarchyLib.h
| 4 +-
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
| 1 +
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
| 4 +-
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.inf =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} | 22 ++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf
| 2 +
7 files changed, 85 insertions(+), 150 deletions(-)
rename
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.c =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} (70%)
rename
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.inf =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} (66%)



Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

One final comment, PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe seems a little excessive, I think you can do PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe and everyone will understand what it is.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:45 PM
To: devel@edk2.groups.io; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Also, uefi_2500_800.efi should not be added directly inside of PurleyOpenBoardPkg. You will need to move that to edk2-non-osi. I'm not sure exactly which driver that is, but I have a suspicion that it might make sense to add it to ASpeedGopBinPkg.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:41 PM
To: KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


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Re: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Guo Dong
 

Could you provide more info on the issues in fixed by this patch?
There is a UEFI payload patch (under code review) to support the bootloader to provide a HOB
on the PCI resources, this way the UEFI payload doesn't need collect resources again by parsing
all the PCI devices. Not sure if that patch (UefiPayloadPkg: UefiPayload retrieve PCI root bridge
from Guid Hob) could avoid the issues.

In this patch, as it mentioned some information (system memory or MMIO) is missing in the
bootloader E820 style table. Guessing the TOLUD might work in most cases, but may fail since
the assumptions.

I saw this patch fixed the memory type for ACPI memory. I think we could have this fix if the
TOLUD guessing could be avoided.

Thanks,
Guo

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Patrick
Rudolph
Sent: Tuesday, June 15, 2021 6:23 AM
To: devel@edk2.groups.io
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo
<guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [edk2-devel] [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve
bootloader memrange parsing

Currently several DXE crash due to invalid memory resource settings.
coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or
"MMIO
in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking memory ranges and
then
mark everything reserved below TOLUD as DRAM and everything reserved
above
TOLUD as MMIO.

This fixes several assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 187 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 194 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..d20e1a0862 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,162 @@


#include "UefiPayloadEntry.h"



+STATIC UINT32 TopOfLowerUsableDram = 0;

+

/**

Callback function to build resource descriptor HOB



This function build a HOB based on the memory map entry info.

+ It creates only EFI_RESOURCE_MEMORY_MAPPED_IO and
EFI_RESOURCE_MEMORY_RESERVED

+ resources.

+

+ @param MemoryMapEntry Memory map entry info got from
bootloader.

+ @param Params A pointer to ACPI_BOARD_INFO.

+

+ @retval RETURN_SUCCESS Successfully build a HOB.

+ @retval EFI_INVALID_PARAMETER Invalid parameter provided.

+**/

+EFI_STATUS

+MemInfoCallbackMMIO (

+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,

+ IN VOID *Params

+ )

+{

+ EFI_PHYSICAL_ADDRESS Base;

+ EFI_RESOURCE_TYPE Type;

+ UINT64 Size;

+ EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;

+ ACPI_BOARD_INFO *AcpiBoardInfo;

+

+ AcpiBoardInfo = (ACPI_BOARD_INFO *)Params;

+ if (AcpiBoardInfo == NULL) {

+ return EFI_INVALID_PARAMETER;

+ }

+

+ //

+ // Skip types already handled in MemInfoCallback

+ //

+ if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type ==
E820_ACPI) {

+ return RETURN_SUCCESS;

+ }

+

+ if (MemoryMapEntry->Base == AcpiBoardInfo->PcieBaseAddress) {

+ //

+ // MMCONF is always MMIO

+ //

+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;

+ } else if (MemoryMapEntry->Base < TopOfLowerUsableDram) {

+ //

+ // It's in DRAM and thus must be reserved

+ //

+ Type = EFI_RESOURCE_MEMORY_RESERVED;

+ } else if (MemoryMapEntry->Base < 0x100000000ULL &&

+ MemoryMapEntry->Base >= TopOfLowerUsableDram) {

+ //

+ // It's not in DRAM, must be MMIO

+ //

+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;

+ } else {

+ Type = EFI_RESOURCE_MEMORY_RESERVED;

+ }

+

+ Base = MemoryMapEntry->Base;

+ Size = MemoryMapEntry->Size;

+

+ Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |

+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

+ EFI_RESOURCE_ATTRIBUTE_TESTED |

+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;

+

+ BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size);

+ DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));

+

+ if (MemoryMapEntry->Type == E820_NVS) {

+ BuildMemoryAllocationHob (Base, Size, EfiACPIMemoryNVS);

+ } else if (MemoryMapEntry->Type == E820_UNUSABLE ||

+ MemoryMapEntry->Type == E820_DISABLED) {

+ BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);

+ } else if (MemoryMapEntry->Type == E820_PMEM) {

+ BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);

+ }

+

+ return RETURN_SUCCESS;

+}

+

+

+/**

+ Callback function to find TOLUD (Top of Lower Usable DRAM)

+

+ Estimate where TOLUD (Top of Lower Usable DRAM) resides. The exact
position

+ would require platform specific code.

+

+ @param MemoryMapEntry Memory map entry info got from
bootloader.

+ @param Params Not used for now.

+

+ @retval RETURN_SUCCESS Successfully updated
TopOfLowerUsableDram.

+**/

+EFI_STATUS

+FindToludCallback (

+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,

+ IN VOID *Params

+ )

+{

+ //

+ // This code assumes that the memory map on this x86 machine below
4GiB is continous

+ // until TOLUD. In addition it assumes that the bootloader provided
memory tables have

+ // no "holes" and thus the first memory range not covered by e820 marks
the end of

+ // usable DRAM. In addition it's assumed that every reserved memory
region touching

+ // usable RAM is also covering DRAM, everything else that is marked
reserved thus must be

+ // MMIO not detectable by bootloader/OS

+ //

+

+ //

+ // Skip memory types not RAM or reserved

+ //

+ if (MemoryMapEntry->Type == E820_NVS || MemoryMapEntry->Type ==
E820_UNUSABLE ||

+ MemoryMapEntry->Type == E820_DISABLED || MemoryMapEntry->Type
== E820_PMEM) {

+ return RETURN_SUCCESS;

+ }

+

+ //

+ // Skip resources above 4GiB

+ //

+ if (MemoryMapEntry->Base >= 0x100000000ULL) {

+ return RETURN_SUCCESS;

+ }

+

+ if ((MemoryMapEntry->Type == E820_RAM) ||

+ (MemoryMapEntry->Type == E820_ACPI)) {

+ //

+ // It's usable DRAM. Update TOLUD.

+ //

+ if (TopOfLowerUsableDram < (MemoryMapEntry->Base +
MemoryMapEntry->Size)) {

+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;

+ }

+ } else {

+ //

+ // It might be reserved DRAM or MMIO.

+ //

+ // If it touches usable DRAM at Base assume it's DRAM as well,

+ // as it could be bootloader installed tables, TSEG, GTT, ...

+ //

+ if (TopOfLowerUsableDram == MemoryMapEntry->Base) {

+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;

+ }

+ }

+

+ return RETURN_SUCCESS;

+}

+

+

+/**

+ Callback function to build resource descriptor HOB

+

+ This function build a HOB based on the memory map entry info.

+ Only add EFI_RESOURCE_SYSTEM_MEMORY.



@param MemoryMapEntry Memory map entry info got from
bootloader.

@param Params Not used for now.

@@ -28,7 +180,15 @@ MemInfoCallback (
UINT64 Size;

EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;



- Type = (MemoryMapEntry->Type == 1) ?
EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED;

+ //

+ // Skip everything not known to be usable DRAM.

+ // It will be added later.

+ //

+ if (MemoryMapEntry->Type != E820_RAM && MemoryMapEntry->Type !=
E820_ACPI) {

+ return RETURN_SUCCESS;

+ }

+

+ Type = EFI_RESOURCE_SYSTEM_MEMORY;

Base = MemoryMapEntry->Base;

Size = MemoryMapEntry->Size;



@@ -40,7 +200,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;



- if (Base >= BASE_4GB ) {

+ if (Base >= BASE_4GB) {

// Remove tested attribute to avoid DXE core to dispatch driver to memory
above 4GB

Attribue &= ~EFI_RESOURCE_ATTRIBUTE_TESTED;

}

@@ -48,6 +208,10 @@ MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size);

DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));



+ if (MemoryMapEntry->Type == E820_ACPI) {

+ BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);

+ }

+

return RETURN_SUCCESS;

}



@@ -236,7 +400,16 @@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;



//

- // Parse memory info and build memory HOBs

+ // First find TOLUD

+ //

+ Status = ParseMemoryInfo (FindToludCallback, NULL);

+ if (EFI_ERROR(Status)) {

+ return Status;

+ }

+ DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n",
TopOfLowerUsableDram));

+

+ //

+ // Parse memory info and build memory HOBs for Usable RAM

//

Status = ParseMemoryInfo (MemInfoCallback, NULL);

if (EFI_ERROR(Status)) {

@@ -289,6 +462,14 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));

}



+ //

+ // Parse memory info and build memory HOBs for reserved DRAM and
MMIO

+ //

+ Status = ParseMemoryInfo (MemInfoCallbackMMIO, &AcpiBoardInfo);

+ if (EFI_ERROR(Status)) {

+ return Status;

+ }

+

//

// Parse platform specific information.

//

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..35ea23d202 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \

((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) &
((Alignment) - 1)))



+

+#define E820_RAM 1

+#define E820_RESERVED 2

+#define E820_ACPI 3

+#define E820_NVS 4

+#define E820_UNUSABLE 5

+#define E820_DISABLED 6

+#define E820_PMEM 7

+#define E820_UNDEFINED 8

+

/**

Auto-generated function that calls the library constructors for all of the
module's

dependent libraries.

--
2.30.2



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Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

Also, uefi_2500_800.efi should not be added directly inside of PurleyOpenBoardPkg. You will need to move that to edk2-non-osi. I'm not sure exactly which driver that is, but I have a suspicion that it might make sense to add it to ASpeedGopBinPkg.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:41 PM
To: KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


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Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


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Re: [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add TPM platform hier disable support

Michael Kubacki
 

It's been a week and I haven't seen any feedback. Please review when possible.

Thanks,
Michael

On 6/7/2021 12:05 PM, Michael Kubacki wrote:
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3411
This patch series adds support in TpmPlatformHierarchyLib to either
randomize the platform auth (current behavior) or disable the
platform auth (new behavior) based on a new PCD introduced to
MinPlatformPkg: PcdRandomizePlatformHierarchy.
Some platforms that would like to adopt MinPlatformPkg prefer to
disable the platform hierarchy as opposed to the randomization
approach.
Minor changes are included to eliminate code duplication in impacted
code.
V2 changes:
1. Update code that randomizes the platform auth in Tcg2PlatformPei
to use the TpmPlatformHierarchyLib interface for platform
hierarchy configuration.
2. Remove pre-existing redundant code in Tcg2PlatformPei.
3. Add a PCD to allow the platform integrator to choose how to
configure the TPM platform hierarchy.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jeremiah Cox <jerecox@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Michael Kubacki (4):
MinPlatformPkg: Add TpmPlatformHierarchyLib to Components in DSC
MinPlatformPkg/TpmPlatformHierarchyLib: Add PEI support
MinPlatformPkg/Tcg2PlatformPei: Use TpmPlatformHierarchyLib
MinPlatformPkg/TpmPlatformHierarchyLib: Add disable support
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.c => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} | 72 +++++++++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.c | 130 +-------------------
Platform/Intel/MinPlatformPkg/Include/Library/TpmPlatformHierarchyLib.h | 4 +-
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 1 +
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 4 +-
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.inf => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} | 22 ++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf | 2 +
7 files changed, 85 insertions(+), 150 deletions(-)
rename Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.c => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} (70%)
rename Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.inf => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} (66%)


Re: [PATCH v1 1/5] EDK2 Code First: PI Specification: EFI_MM_COMMUNICATE_HEADER Update

Kun Qin
 

Hi Hao,

Sorry that I missed comments for this patch earlier. You are correct. I only inspected SmmLockBoxPeiLib. The PEI instance handled mode switch with ```OFFSET_OF ``` function. But DXE instance still have a few use cases that will be impacted.

I will update this read me file and add a code change patch for this library in v2. Thanks for pointing this out.

Regards,
Kun

On 06/11/2021 00:46, Wu, Hao A wrote:
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Kun Qin
Sent: Thursday, June 10, 2021 9:43 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
<gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
Andrew Fish <afish@apple.com>; Laszlo Ersek <lersek@redhat.com>; Leif
Lindholm <leif@nuviainc.com>
Subject: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification:
EFI_MM_COMMUNICATE_HEADER Update

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3430

This change includes specification update markdown file that describes the
proposed PI Specification v1.7 Errata A in detail and potential impact to the
existing codebase.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
---
BZ3430-SpecChange.md | 88 ++++++++++++++++++++
1 file changed, 88 insertions(+)

diff --git a/BZ3430-SpecChange.md b/BZ3430-SpecChange.md new file mode
100644 index 000000000000..33a1ffda447b
--- /dev/null
+++ b/BZ3430-SpecChange.md
@@ -0,0 +1,88 @@
+# Title: Change MessageLength Field of EFI_MM_COMMUNICATE_HEADER
to
+UINT64
+
+## Status: Draft
+
+## Document: UEFI Platform Initialization Specification Version 1.7
+Errata A
+
+## License
+
+SPDX-License-Identifier: CC-BY-4.0
+
+## Submitter: [TianoCore Community](https://www.tianocore.org)
+
+## Summary of the change
+
+Change the `MessageLength` Field of `EFI_MM_COMMUNICATE_HEADER`
from UINTN to UINT64 to remove architecture dependency:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINT64 MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+## Benefits of the change
+
+In PI Spec v1.7 Errata A, Vol.4, Sec 5.7 MM Communication Protocol, the
MessageLength field of `EFI_MM_COMMUNICATE_HEADER` (also defined as
`EFI_SMM_COMMUNICATE_HEADER`) is defined as type UINTN.
+
+But this structure, as a generic definition, could be used for both PEI and
DXE MM communication. Thus for a system that supports PEI MM launch,
but operates PEI in 32bit mode and MM foundation in 64bit, the current
`EFI_MM_COMMUNICATE_HEADER` definition will cause structure parse
error due to UINTN used.
+
+## Impact of the change
+
+This change will impact the known structure consumers including:
+
+```bash
+MdeModulePkg/Core/PiSmmCore/PiSmmIpl
+MdeModulePkg/Application/SmiHandlerProfileInfo
+MdeModulePkg/Application/MemoryProfileInfo
+```
+
+For consumers that are not using
`OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)`, but performing
explicit addition such as the existing
MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.c,
one will need to change code implementation to match new structure
definition. Otherwise, the code compiled on IA32 architecture will
experience structure field dereference error.
+
+User who currently uses UINTN local variables as place holder of
MessageLength will need to use caution to make cast from UINTN to UINT64
and vice versa. It is recommended to use `SafeUint64ToUintn` for such
operations when the value is indeterministic.
+
+Note: MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib is also
consuming this structure, but it handled this size discrepancy internally. If this
Hello Kun,
Sorry for a question.
I am not sure why the current codes in file SmmLockBoxDxeLib.c will work properly after the UINTN -> UINT64 change.
For example:
LockBoxGetSmmCommBuffer():
MinimalSizeNeeded = sizeof (EFI_GUID) +
sizeof (UINTN) +
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_SAVE),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_SET_ATTRIBUTES),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_UPDATE),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE),
sizeof (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE_ALL_IN_PLACE)))));
SaveLockBox():
UINT8 TempCommBuffer[sizeof(EFI_GUID) + sizeof(UINTN) + sizeof(EFI_SMM_LOCK_BOX_PARAMETER_SAVE)];
Is the series missed changes for SmmLockBoxDxeLib or I got something wrong?
Best Regards,
Hao Wu

potential spec change is not applied, all applicable PEI MM communicate
callers will need to use the same routine as that of SmmLockBoxPeiLib to
invoke a properly populated EFI_MM_COMMUNICATE_HEADER to be used
in X64 MM foundation.
+
+## Detailed description of the change [normative updates]
+
+### Specification Changes
+
+1. In PI Specification v1.7 Errata A: Vol. 4 Page-91, the definition of
`EFI_MM_COMMUNICATE_HEADER` should be changed from current:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINTN MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+to:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINT64 MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+### Code Changes
+
+1. Remove the explicit calculation of the offset of `Data` in
`EFI_MM_COMMUNICATE_HEADER`. Thus applicable calculations of
`sizeof(EFI_GUID) + sizeof(UINTN)` should be replaced with
`OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)` or similar
alternatives. These calculations are identified in:
+
+```bash
+MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
c
+MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
+```
+
+1. Resolve potentially mismatched type between `UINTN` and `UINT64`.
This would occur when `MessageLength` or its derivitive are used for local
calculation with existing `UINTN` typed variables. Code change regarding this
perspective is per case evaluation: if the variables involved are all
deterministic values, and there is no overflow or underflow risk, a cast
operation (from `UINTN` to `UINT64`) can be safely used. Otherwise, the
calculation will be performed in `UINT64` bitwidth and then convert to
`UINTN` using `SafeUint64*` and `SafeUint64ToUintn`, respectively. These
operations are identified in:
+
+```bash
+MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
+MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
c
+MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
+```
+
+1. After all above changes applied and specification updated,
`MdePkg/Include/Protocol/MmCommunication.h` will need to be updated to
match new definition that includes the field type update.
--
2.31.1.windows.1




Re: [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

Jeremiah Cox
 

"dbt" and "dbx" are swapped in the comments?  Look for groups of 3 underscores ("___") below...

+ ## GUID used to specify section with default ___dbt___ content
+ gDefault___dbx___FileGuid = { 0x5740766a, 0x718e, 0x4dc0, { 0x99, 0x35, 0xc3, 0x6f, 0x7d, 0x3f, 0x88, 0x4f } }
+
+ ## GUID used to specify section with default ___dbx___ content
+ gDefault___dbt___FileGuid = { 0x36c513ee, 0xa338, 0x4976, { 0xa0, 0xfb, 0x6d, 0xdb, 0xa3, 0xda, 0xfe, 0x87 } }


[PATCH v1 0/1] ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI console

Artem Kopotev
 

cmd_load_symbols.py can only load symbols from a firmware volume. Add the possibility to
use UEFI console output to calculate dll load address and send
add-symbol-file commands directly to ArmDS debugger

Public branch:
https://github.com/artkopotev/edk2/commits/fix_armds_debug_script

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>

artem.kopotev (1):
ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI
console

.../Scripts/Ds5/cmd_load_symbols.py | 17 ++++-
ArmPlatformPkg/Scripts/Ds5/console_loader.py | 68 +++++++++++++++++++
2 files changed, 83 insertions(+), 2 deletions(-)
create mode 100644 ArmPlatformPkg/Scripts/Ds5/console_loader.py

--
2.17.1


[PATCH v1 1/1] ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI console

Artem Kopotev
 

cmd_load_symbols.py can only load symbols from FV. Add the possibility to
use UEFI console output to calculate dll load address and send
add-symbol-file commands directly to ArmDS debugger

dll load address can't be used directly from UEFI output, see comment in
DebugPeCoffExtraActionLib: "This may not work correctly if you generate
PE/COFF directly as then the Offset would not be required".

1) Use objdump -S module.dll | grep <_ModuleEntryPoint> to get offset
in dll (offset)
2) Use Entrypoint=<address> from UEFI console output (entrypoint)
3) dll load address is (entrypoint)-(offset)

Signed-off-by: Artem Kopotev <artem.kopotev@arm.com>
Change-Id: I3ac5ea761254a346bbb5806fb089b0979419bc01
---
ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py | 17 ++++-
ArmPlatformPkg/Scripts/Ds5/console_loader.py | 68 ++++++++++++++++++++
2 files changed, 83 insertions(+), 2 deletions(-)

diff --git a/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py b/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
index de4332edc7d4..89d2f28ba27d 100644
--- a/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
+++ b/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -7,6 +7,8 @@
from arm_ds.debugger_v1 import Debugger
from arm_ds.debugger_v1 import DebugException

+from console_loader import load_symbol_from_console
+
import re, sys, getopt

import edk2_debugger
@@ -21,12 +23,16 @@ def usage():
print "-m,--sysmem=(base,size): System Memory region"
print "-f,--fv=(base,size): Firmware region"
print "-r,--rom=(base,size): ROM region"
+ print "-i,--input=: Filename for the EDK2 console output"
+ print "-o,--objdump=: Path to the objdump tool"

verbose = False
load_all = False
report_file = None
+input_file = None
+objdump = None
regions = []
-opts,args = getopt.getopt(sys.argv[1:], "hvar:vm:vr:vf:v", ["help","verbose","all","report=","sysmem=","rom=","fv="])
+opts,args = getopt.getopt(sys.argv[1:], "hvar:i:o:vm:vr:vf:v", ["help","verbose","all","report=","sysmem=","rom=","fv=","input=","objdump="])
if (opts is None) or (not opts):
report_file = '../../../report.log'
else:
@@ -55,6 +61,10 @@ else:
elif o in ("-r","--rom"):
region_type = edk2_debugger.ArmPlatformDebugger.REGION_TYPE_ROM
regex = region_reg
+ elif o in ("-i","--input"):
+ input_file = a
+ elif o in ("-o", "--objdump"):
+ objdump = a
else:
assert False, "Unhandled option (%s)" % o

@@ -94,3 +104,6 @@ except Exception, (ErrorClass, ErrorMessage):
print "Error(%s): %s" % (ErrorClass, ErrorMessage)
except DebugException, de:
print "DebugError: %s" % (de.getMessage())
+
+if input_file:
+ load_symbol_from_console(ec, input_file, objdump, verbose)
diff --git a/ArmPlatformPkg/Scripts/Ds5/console_loader.py b/ArmPlatformPkg/Scripts/Ds5/console_loader.py
new file mode 100644
index 000000000000..0ce217876d95
--- /dev/null
+++ b/ArmPlatformPkg/Scripts/Ds5/console_loader.py
@@ -0,0 +1,68 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+from arm_ds.debugger_v1 import DebugException
+
+import subprocess, os, edk2_debugger, re
+
+def get_module_name(line):
+ path = line.rsplit(' ')[1]
+ return os.path.splitext(os.path.basename(path))[0]
+
+def get_module_path(line):
+ return line.rsplit(' ')[1]
+
+def get_module_entrypoint(list, module_name):
+ line = [i for i in list if module_name in i and re.search(r'\b'+module_name+r'\b', i)]
+ if len(line) == 0:
+ # Module was not loaded using DxeDispatcher or PeiDispatcher. It is a SEC module
+ # Symbols for these modules are loaded from FV, not from console log
+ return None
+
+ entrypoint_str = line[0].rsplit(' ')[4]
+ return entrypoint_str.rsplit('=')[1]
+
+def load_symbol_from_console(ec, console_file, objdump, verbose):
+ if objdump is None:
+ print "Error: A path to objdump tool is not specified, but -i parameter is provided"
+ elif not os.path.exists(objdump):
+ print "Error: Provided path to objdump is invalid: %s" % objdump
+ elif not os.path.exists(console_file):
+ print "Error: UEFI console file is not found: %s" % console_file
+ else:
+
+ full_list = open(console_file).read().splitlines()
+
+ efi_list = [i for i in full_list if "EntryPoint=" in i]
+
+ full_list = dict.fromkeys(full_list)
+ full_list = [i for i in full_list if "add-symbol-file" in i]
+
+ module_dict = {}
+
+ for line in full_list:
+ name = get_module_name(line)
+ module_dict[name] = (get_module_path(line), get_module_entrypoint(efi_list, name))
+
+ for module in module_dict:
+ entrypoint_addr = module_dict[module][1]
+
+ if entrypoint_addr is not None:
+ path = module_dict[module][0]
+ if not os.path.exists(path):
+ print "Module not found: " + path + ". Skipping..."
+ continue
+
+ sp = subprocess.Popen([objdump,'-S', path], stdout = subprocess.PIPE)
+
+ objdump_out = sp.stdout.readlines()
+ entrypoint_record = [i for i in objdump_out if "<_ModuleEntryPoint>" in i]
+
+ entrypoint_offset = entrypoint_record[0].split(' ')[0]
+
+ load_addr = int(entrypoint_addr, 16) - int(entrypoint_offset, 16)
+
+ edk2_debugger.load_symbol_from_file(ec, path, load_addr, verbose)
--
2.17.1


Re: [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload

Marvin Häuser
 

Hey Ray,

Sure, thanks a lot for taking the time. I will need a bit longer to get to it, sorry. :)

Best regards,
Marvin

On 15.06.21 16:36, Ni, Ray wrote:
Marvin,
I have sent out https://edk2.groups.io/g/devel/message/76429 <UefiPayloadPkg/PayloadLoader: Add more checks to verify ELF images> to address your feedbacks.

Can I merge the 3 patches first? (we can continue discussing the more-checks patch.)

Thanks,
Ray

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
Sent: Thursday, June 10, 2021 7:37 PM
To: devel@edk2.groups.io; mcb30@ipxe.org; mhaeuser@posteo.de
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo <guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload



-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Brown
Sent: Thursday, June 10, 2021 6:43 PM
To: devel@edk2.groups.io; mhaeuser@posteo.de; Ni, Ray <ray.ni@intel.com>
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo <guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload

On 10/06/2021 11:13, Marvin Häuser wrote:
On 10.06.21 11:39, Ni, Ray wrote:
Maybe for some context, my main issue at first was that the checks are
all proper runtime checks with no ASSERTs at all, so I got confused how
this situation could happen in a realistic scenario. I needed to trace
the ParseStatus data flow to understand the idea is basically the same
as in the PE library. Code in a way is self-documenting, and this
personally gave me a hard time understanding why it is written this way.
But thanks for clarifying your intention! :)
I assume you are ok with the ParseStatus.
I will send new version based on mail discussion. Thanks!
I don't need to be okay with anything, I'm not a maintainer nor an
authority. But I gave my opinion, which is that it is dead code that
makes the design/flow harder to understand for a third party, at no
obvious benefit.
FWIW, I strongly agree with Marvin on this: having ParseStatus in its
current form is a bad idea since it adds no value but does incur a cost.
OK. I can remove that😊




Re: [EXTERNAL] Re: [edk2-devel] [PATCH v1 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters

Kun Qin
 

Thanks for the review. Updated patch has been sent here: https://edk2.groups.io/g/devel/message/76553.

Please let me know if any other feedbacks.

Regards,
Kun

On 06/15/2021 09:20, Bret Barkelew wrote:
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
- Bret
*From: *Sean Brogan <mailto:spbrogan@outlook.com>
*Sent: *Tuesday, June 15, 2021 9:00 AM
*To: *devel@edk2.groups.io <mailto:devel@edk2.groups.io>; kuqin12@gmail.com <mailto:kuqin12@gmail.com>
*Cc: *Sean Brogan <mailto:sean.brogan@microsoft.com>; Bret Barkelew <mailto:Bret.Barkelew@microsoft.com>; Kinney, Michael D <mailto:michael.d.kinney@intel.com>; Liming Gao <mailto:gaoliming@byosoft.com.cn>
*Subject: *[EXTERNAL] Re: [edk2-devel] [PATCH v1 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters
Please update the signed-off-by to include yours.
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Thanks
Sean
On 6/11/2021 10:04 PM, Kun Qin wrote:
> From: Sean Brogan <sean.brogan@microsoft.com>
>
> REF:
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3454&;data=04%7C01%7CBret.Barkelew%40microsoft.com%7C436f445e3f774d2549b608d930169d05%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637593696216659744%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=pJiLG4bZ8gYR0MjDuNTmuT3NgRjq%2FZRMnTi1sT67VqM%3D&amp;reserved=0 <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3454&;data=04%7C01%7CBret.Barkelew%40microsoft.com%7C436f445e3f774d2549b608d930169d05%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637593696216659744%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=pJiLG4bZ8gYR0MjDuNTmuT3NgRjq%2FZRMnTi1sT67VqM%3D&amp;reserved=0>
>
> On Linux the shell expands the wildcard paths and causes multiple files
> to be missed. This change adds additional quotes to defer expansion in
> order to bring parity in cspell result.
>
> Cc: Sean Brogan <sean.brogan@microsoft.com>
> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
>
> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
> ---
>   .pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/.pytool/Plugin/SpellCheck/SpellCheck.py
b/.pytool/Plugin/SpellCheck/SpellCheck.py
> index 43365441b91c..97b240ef747c 100644
> --- a/.pytool/Plugin/SpellCheck/SpellCheck.py
> +++ b/.pytool/Plugin/SpellCheck/SpellCheck.py
> @@ -133,7 +133,8 @@ class SpellCheck(ICiBuildPlugin):
>           #
>           relpath = os.path.relpath(abs_pkg_path)
>           cpsell_paths = " ".join(
> -            [f"{relpath}/**/{x}" for x in
package_relative_paths_to_spell_check])
> +            # Double quote each path to defer expansion to cspell
parameters
> +            [f'"{relpath}/**/{x}"' for x in
package_relative_paths_to_spell_check])
>
>           # Make the config file
>           config_file_path = os.path.join(
>


[PATCH v2 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters

Kun Qin
 

From: Sean Brogan <sean.brogan@microsoft.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3454

On Linux the shell expands the wildcard paths and causes multiple files
to be missed. This change adds additional quotes to defer expansion in
order to bring parity in cspell result.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
---

Notes:
v2:
- Added reviewed-by tags [Bret]
- Added reviewed-by tag [Sean]
- Added signed-off-by tag from Kun [Sean]

.pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.pytool/Plugin/SpellCheck/SpellCheck.py b/.pytool/Plugin/SpellCheck/SpellCheck.py
index 9ad57632a6e8..05c471d91ba1 100644
--- a/.pytool/Plugin/SpellCheck/SpellCheck.py
+++ b/.pytool/Plugin/SpellCheck/SpellCheck.py
@@ -134,7 +134,8 @@ class SpellCheck(ICiBuildPlugin):
#
relpath = os.path.relpath(abs_pkg_path)
cpsell_paths = " ".join(
- [f"{relpath}/**/{x}" for x in package_relative_paths_to_spell_check])
+ # Double quote each path to defer expansion to cspell parameters
+ [f'"{relpath}/**/{x}"' for x in package_relative_paths_to_spell_check])

# Make the config file
config_file_path = os.path.join(
--
2.31.1.windows.1


[PATCH v2 0/1] SpellCheck plugin inspects fewer files when run on Linux

Kun Qin
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3454

This patch series is a follow up of previous submission:
https://edk2.groups.io/g/devel/message/76427

v2 patch change includes feedback for v1 series:
a. Adding "Reviewed-by" tags;
b. Adding "Signed-Off-by" tags for myself;

Patch v2 branch: https://github.com/kuqin12/edk2/tree/exp_shell_v2

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Sean Brogan (1):
Pytool: SpellCheck: Defer path expansion in cspell parameters

.pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

--
2.31.1.windows.1


Re: [edk2-platforms][PATCH v2 29/32] JadePkg: Recover boot options when NVRAM cleared

Nhi Pham
 

On 6/8/21 06:46, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:21 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Due to recent changes in EDK2, system without a valid boot options list
in NVRAM will enter Platform Recovery mode. As ReadyToBoot event is not
triggered in this mode, services like ACPI and PCIe won't be able to do
some finalization settings and cause OS fails to boot.
This change is to prevent the issue by recovery boot options list each
time NVRAM is cleared.
Urgh.
Ultimately this is a bug in EDK2. And it should be fixed in edk2:
https://bugzilla.tianocore.org/show_bug.cgi?id=2831

But could you let me know which specific edk2 change broke this for
you, since it is not obvious to me?
Thanks Leif for the info.

The issue happened since below change  037d86dd7a (20/06/06 14:49) ArmPkg/PlatformBootManagerLib: don't connect all devices on each boot <Ard Biesheuvel>

From that commit, System with a NVRAM cleared might try to boot with default boot option in Platform Recovery mode. As ReadyToBoot event is not triggered in this mode, services like ACPI and PCIe can't complete theirs finalizing configurations and cause the OS fails to boot. This patch is to prevent the system from entering Platform Recovery mode by recovering boot options list each time NVRAM cleared.

Best regards,

Nhi


/
Leif

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Platform/Ampere/JadePkg/Jade.dsc | 5 ++
Platform/Ampere/JadePkg/Jade.fdf | 5 ++
Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf | 39 +++++++++++++
Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c | 58 ++++++++++++++++++++
4 files changed, 107 insertions(+)

diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index 9d787113e3b5..023f2e898d7f 100755
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -185,3 +185,8 @@ [Components.common]
Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/WatchdogConfigDxe/WatchdogConfigDxe.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/PcieDeviceConfigDxe/PcieDeviceConfigDxe.inf
+
+ #
+ # Misc
+ #
+ Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index b0c2894d00f8..edbead046572 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -361,4 +361,9 @@ [FV.FvMain]
INF Silicon/Ampere/AmpereAltraPkg/Drivers/WatchdogConfigDxe/WatchdogConfigDxe.inf
INF Silicon/Ampere/AmpereAltraPkg/Drivers/PcieDeviceConfigDxe/PcieDeviceConfigDxe.inf
+ #
+ # Misc
+ #
+ INF Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
+
!include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc
diff --git a/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
new file mode 100644
index 000000000000..624332339beb
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = BootOptionsRecoveryDxe
+ FILE_GUID = FDCDDC91-4F9E-400C-9BB4-1FE4BE9565B3
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = BootOptionsRecoveryDxeEntry
+
+[Sources]
+ BootOptionsRecoveryDxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ PcdLib
+ PrintLib
+ UefiBootManagerLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Guids]
+ gEfiEndOfDxeEventGroupGuid
+
+[Pcd]
+ gAmpereTokenSpaceGuid.PcdNvramErased
+
+[Depex]
+ gEfiFaultTolerantWriteProtocolGuid
diff --git a/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c
new file mode 100644
index 000000000000..cd9637ec704e
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c
@@ -0,0 +1,58 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+VOID
+EFIAPI
+RecoveryCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ DEBUG ((DEBUG_INFO, "%a: Do recover boot options\n", __FUNCTION__));
+
+ EfiBootManagerConnectAll ();
+ EfiBootManagerRefreshAllBootOption ();
+
+ gBS->CloseEvent (Event);
+}
+
+EFI_STATUS
+EFIAPI
+BootOptionsRecoveryDxeEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT EndOfDxeEvent;
+
+ DEBUG ((DEBUG_INFO, "%a: NVRAM Clear is %d\n", PcdGetBool (PcdNvramErased), __FUNCTION__));
+
+ if (PcdGetBool (PcdNvramErased)) {
+ DEBUG ((DEBUG_INFO, "%a: Register event to recover boot options\n", __FUNCTION__));
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ RecoveryCallback,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return Status;
+}
--
2.17.1


Re: [edk2-platforms][PATCH v2 21/32] AmpereAltraPkg: Add DebugInfoPei module

Nhi Pham
 

On 6/8/21 06:08, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:13 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Helps to show various system information like CPU info and Board Setting
values to UART console during boot process.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 1 +
Platform/Ampere/JadePkg/Jade.fdf | 2 +
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf | 41 ++++
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c | 230 ++++++++++++++++++++
4 files changed, 274 insertions(+)

diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
index 930bbb5d385b..2d380b21df24 100755
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
@@ -534,6 +534,7 @@ [Components.common]
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MemoryInitPeim/MemoryInitPeim.inf
+ Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 3d5d857178b3..8c09e2a49089 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -167,6 +167,8 @@ [FV.FVMAIN_COMPACT]
#
# Print platform information before passing control into the Driver Execution Environment (DXE) phase
#
+ INF Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
+
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
new file mode 100755
index 000000000000..11414f72f369
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
@@ -0,0 +1,41 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = DebugInfo
+ FILE_GUID = C0571D26-6176-11E9-8647-D663BD873D93
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = DebugInfoPeiEntryPoint
+
+[Sources]
+ DebugInfoPei.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ ArmLib
+ HobLib
+ NVParamLib
+ PeimEntryPoint
+ PrintLib
+ SerialPortLib
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ TRUE
diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
new file mode 100644
index 000000000000..d6775ffa4a79
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
@@ -0,0 +1,230 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/IoLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/PrintLib.h>
+#include <Library/SerialPortLib.h>
+#include <NVParamDef.h>
+#include <Pcie.h>
+#include <PlatformInfoHob.h>
+
+#define MAX_PRINT_LEN 512
+
+#define GB_SCALE_FACTOR 1073741824
+#define MB_SCALE_FACTOR 1048576
+#define KB_SCALE_FACTOR 1024
+#define MHZ_SCALE_FACTOR 1000000
+
+STATIC VOID
+SerialPrint (
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ CHAR8 Buf[MAX_PRINT_LEN];
+ VA_LIST Marker;
+ UINTN NumberOfPrinted;
+
+ VA_START (Marker, FormatString);
+ NumberOfPrinted = AsciiVSPrint (Buf, sizeof (Buf), FormatString, Marker);
+ SerialPortWrite ((UINT8 *)Buf, NumberOfPrinted);
+ VA_END (Marker);
+}
Why not use BaseDebugLibSerialPort?
Thanks Leif for catching that. Will replace it by DebugPrint in the v3.

Best regards,

Nhi


/
Leif

+
+/**
+ Print any existence NVRAM.
+**/
+STATIC VOID
+PrintNVRAM (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ NVPARAM Idx;
+ UINT32 Val;
+ UINT16 ACLRd = NV_PERM_ALL;
+ BOOLEAN Flag;
+
+ Flag = FALSE;
+ for (Idx = NV_PREBOOT_PARAM_START; Idx <= NV_PREBOOT_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Pre-boot Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_MANU_PARAM_START; Idx <= NV_MANU_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Manufacturer Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_USER_PARAM_START; Idx <= NV_USER_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("User Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_BOARD_PARAM_START; Idx <= NV_BOARD_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Board Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+}
+
+STATIC
+CHAR8 *
+GetCCIXLinkSpeed (
+ IN UINTN Speed
+ )
+{
+ switch (Speed) {
+ case 1:
+ return "2.5 GT/s";
+
+ case 2:
+ return "5 GT/s";
+
+ case 3:
+ return "8 GT/s";
+
+ case 4:
+ case 6:
+ return "16 GT/s";
+
+ case 0xa:
+ return "20 GT/s";
+
+ case 0xf:
+ return "25 GT/s";
+ }
+
+ return "Unknown";
+}
+
+/**
+ Print system info
+**/
+STATIC VOID
+PrintSystemInfo (
+ VOID
+ )
+{
+ UINTN Idx;
+ VOID *Hob;
+ PLATFORM_INFO_HOB *PlatformHob;
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ SerialPrint ("SCP FW version : %a\n", (const CHAR8 *)PlatformHob->SmPmProVer);
+ SerialPrint ("SCP FW build date : %a\n", (const CHAR8 *)PlatformHob->SmPmProBuild);
+
+ SerialPrint ("Failsafe status : %d\n", PlatformHob->FailSafeStatus);
+ SerialPrint ("Reset status : %d\n", PlatformHob->ResetStatus);
+ SerialPrint ("CPU info\n");
+ SerialPrint (" CPU ID : %X\n", ArmReadMidr ());
+ SerialPrint (" CPU Clock : %d MHz\n", PlatformHob->CpuClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" Number of active sockets : %d\n", GetNumberOfActiveSockets ());
+ SerialPrint (" Number of active cores : %d\n", GetNumberOfActiveCores ());
+ if (IsSlaveSocketActive ()) {
+ SerialPrint (
+ " Inter Socket Connection 0 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[0],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[0])
+ );
+ SerialPrint (
+ " Inter Socket Connection 1 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[1],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[1])
+ );
+ }
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Core voltage : %d\n", Idx, PlatformHob->CoreVoltage[Idx]);
+ SerialPrint (" Socket[%d]: SCU ProductID : %X\n", Idx, PlatformHob->ScuProductId[Idx]);
+ SerialPrint (" Socket[%d]: Max cores : %d\n", Idx, PlatformHob->MaxNumOfCore[Idx]);
+ SerialPrint (" Socket[%d]: Warranty : %d\n", Idx, PlatformHob->Warranty[Idx]);
+ SerialPrint (" Socket[%d]: Subnuma : %d\n", Idx, PlatformHob->SubNumaMode[Idx]);
+ SerialPrint (" Socket[%d]: RC disable mask : %X\n", Idx, PlatformHob->RcDisableMask[Idx]);
+ SerialPrint (" Socket[%d]: AVS enabled : %d\n", Idx, PlatformHob->AvsEnable[Idx]);
+ SerialPrint (" Socket[%d]: AVS voltage : %d\n", Idx, PlatformHob->AvsVoltageMV[Idx]);
+ }
+
+ SerialPrint ("SOC info\n");
+ SerialPrint (" DDR Frequency : %d MHz\n", PlatformHob->DramInfo.MaxSpeed);
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Soc voltage : %d\n", Idx, PlatformHob->SocVoltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM1 voltage : %d\n", Idx, PlatformHob->Dimm1Voltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM2 voltage : %d\n", Idx, PlatformHob->Dimm2Voltage[Idx]);
+ }
+
+ SerialPrint (" PCP Clock : %d MHz\n", PlatformHob->PcpClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SOC Clock : %d MHz\n", PlatformHob->SocClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SYS Clock : %d MHz\n", PlatformHob->SysClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" AHB Clock : %d MHz\n", PlatformHob->AhbClk / MHZ_SCALE_FACTOR);
+}
+
+/**
+ Entry point function for the PEIM
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @return EFI_SUCCESS If we installed our PPI
+
+**/
+EFI_STATUS
+EFIAPI
+DebugInfoPeiEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ PrintSystemInfo ();
+ PrintNVRAM ();
+
+ return EFI_SUCCESS;
+}
--
2.17.1

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