Date   

Re: [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

Yao, Jiewen
 

Good catch, Jeremiah!

Thank you!

 

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jeremiah Cox via groups.io
Sent: Wednesday, June 16, 2021 2:55 AM
To: Grzegorz Bernacki <gjb@...>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

 

"dbt" and "dbx" are swapped in the comments?  Look for groups of 3 underscores ("___") below...

+ ## GUID used to specify section with default ___dbt___ content
+ gDefault___dbx___FileGuid = { 0x5740766a, 0x718e, 0x4dc0, { 0x99, 0x35, 0xc3, 0x6f, 0x7d, 0x3f, 0x88, 0x4f } }
+
+ ## GUID used to specify section with default ___dbx___ content
+ gDefault___dbt___FileGuid = { 0x36c513ee, 0xa338, 0x4976, { 0xa0, 0xfb, 0x6d, 0xdb, 0xa3, 0xda, 0xfe, 0x87 } }


Re: [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add TPM platform hier disable support

Yao, Jiewen
 

Thank you, Michael.

Acked-by: Jiewen Yao <Jiewen.yao@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
Kubacki
Sent: Wednesday, June 16, 2021 4:57 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Dong, Eric <eric.dong@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
Jeremiah Cox <jerecox@microsoft.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add
TPM platform hier disable support

It's been a week and I haven't seen any feedback. Please review when
possible.

Thanks,
Michael

On 6/7/2021 12:05 PM, Michael Kubacki wrote:
From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3411

This patch series adds support in TpmPlatformHierarchyLib to either
randomize the platform auth (current behavior) or disable the
platform auth (new behavior) based on a new PCD introduced to
MinPlatformPkg: PcdRandomizePlatformHierarchy.

Some platforms that would like to adopt MinPlatformPkg prefer to
disable the platform hierarchy as opposed to the randomization
approach.

Minor changes are included to eliminate code duplication in impacted
code.

V2 changes:
1. Update code that randomizes the platform auth in Tcg2PlatformPei
to use the TpmPlatformHierarchyLib interface for platform
hierarchy configuration.
2. Remove pre-existing redundant code in Tcg2PlatformPei.
3. Add a PCD to allow the platform integrator to choose how to
configure the TPM platform hierarchy.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jeremiah Cox <jerecox@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>

Michael Kubacki (4):
MinPlatformPkg: Add TpmPlatformHierarchyLib to Components in DSC
MinPlatformPkg/TpmPlatformHierarchyLib: Add PEI support
MinPlatformPkg/Tcg2PlatformPei: Use TpmPlatformHierarchyLib
MinPlatformPkg/TpmPlatformHierarchyLib: Add disable support

Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.c =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} | 72
+++++++++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.c
| 130 +-------------------
Platform/Intel/MinPlatformPkg/Include/Library/TpmPlatformHierarchyLib.h
| 4 +-
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
| 1 +
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
| 4 +-
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.inf =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} | 22 ++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf
| 2 +
7 files changed, 85 insertions(+), 150 deletions(-)
rename
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.c =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} (70%)
rename
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlat
formHierarchyLib.inf =>
PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} (66%)



Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

One final comment, PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe seems a little excessive, I think you can do PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe and everyone will understand what it is.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:45 PM
To: devel@edk2.groups.io; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Also, uefi_2500_800.efi should not be added directly inside of PurleyOpenBoardPkg. You will need to move that to edk2-non-osi. I'm not sure exactly which driver that is, but I have a suspicion that it might make sense to add it to ASpeedGopBinPkg.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:41 PM
To: KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


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Re: [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsing

Guo Dong
 

Could you provide more info on the issues in fixed by this patch?
There is a UEFI payload patch (under code review) to support the bootloader to provide a HOB
on the PCI resources, this way the UEFI payload doesn't need collect resources again by parsing
all the PCI devices. Not sure if that patch (UefiPayloadPkg: UefiPayload retrieve PCI root bridge
from Guid Hob) could avoid the issues.

In this patch, as it mentioned some information (system memory or MMIO) is missing in the
bootloader E820 style table. Guessing the TOLUD might work in most cases, but may fail since
the assumptions.

I saw this patch fixed the memory type for ACPI memory. I think we could have this fix if the
TOLUD guessing could be avoided.

Thanks,
Guo

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Patrick
Rudolph
Sent: Tuesday, June 15, 2021 6:23 AM
To: devel@edk2.groups.io
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo
<guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: [edk2-devel] [PATCH] UefiPayloadPkg/UefiPayloadEntry: Improve
bootloader memrange parsing

Currently several DXE crash due to invalid memory resource settings.
coreboot and slimbootloader provide an e820 compatible memory map,
which doesn't work well with EDK2 as the e820 spec is missing MMIO regions.
In e820 'reserved' could either mean "DRAM used by boot firmware" or
"MMIO
in use and not detectable by OS".

Guess Top of lower usable DRAM (TOLUD) by walking memory ranges and
then
mark everything reserved below TOLUD as DRAM and everything reserved
above
TOLUD as MMIO.

This fixes several assertions seen in PciHostBridgeDxe.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
.../UefiPayloadEntry/UefiPayloadEntry.c | 187 +++++++++++++++++-
.../UefiPayloadEntry/UefiPayloadEntry.h | 10 +
2 files changed, 194 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 805f5448d9..d20e1a0862 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -7,10 +7,162 @@


#include "UefiPayloadEntry.h"



+STATIC UINT32 TopOfLowerUsableDram = 0;

+

/**

Callback function to build resource descriptor HOB



This function build a HOB based on the memory map entry info.

+ It creates only EFI_RESOURCE_MEMORY_MAPPED_IO and
EFI_RESOURCE_MEMORY_RESERVED

+ resources.

+

+ @param MemoryMapEntry Memory map entry info got from
bootloader.

+ @param Params A pointer to ACPI_BOARD_INFO.

+

+ @retval RETURN_SUCCESS Successfully build a HOB.

+ @retval EFI_INVALID_PARAMETER Invalid parameter provided.

+**/

+EFI_STATUS

+MemInfoCallbackMMIO (

+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,

+ IN VOID *Params

+ )

+{

+ EFI_PHYSICAL_ADDRESS Base;

+ EFI_RESOURCE_TYPE Type;

+ UINT64 Size;

+ EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;

+ ACPI_BOARD_INFO *AcpiBoardInfo;

+

+ AcpiBoardInfo = (ACPI_BOARD_INFO *)Params;

+ if (AcpiBoardInfo == NULL) {

+ return EFI_INVALID_PARAMETER;

+ }

+

+ //

+ // Skip types already handled in MemInfoCallback

+ //

+ if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type ==
E820_ACPI) {

+ return RETURN_SUCCESS;

+ }

+

+ if (MemoryMapEntry->Base == AcpiBoardInfo->PcieBaseAddress) {

+ //

+ // MMCONF is always MMIO

+ //

+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;

+ } else if (MemoryMapEntry->Base < TopOfLowerUsableDram) {

+ //

+ // It's in DRAM and thus must be reserved

+ //

+ Type = EFI_RESOURCE_MEMORY_RESERVED;

+ } else if (MemoryMapEntry->Base < 0x100000000ULL &&

+ MemoryMapEntry->Base >= TopOfLowerUsableDram) {

+ //

+ // It's not in DRAM, must be MMIO

+ //

+ Type = EFI_RESOURCE_MEMORY_MAPPED_IO;

+ } else {

+ Type = EFI_RESOURCE_MEMORY_RESERVED;

+ }

+

+ Base = MemoryMapEntry->Base;

+ Size = MemoryMapEntry->Size;

+

+ Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |

+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

+ EFI_RESOURCE_ATTRIBUTE_TESTED |

+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;

+

+ BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size);

+ DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));

+

+ if (MemoryMapEntry->Type == E820_NVS) {

+ BuildMemoryAllocationHob (Base, Size, EfiACPIMemoryNVS);

+ } else if (MemoryMapEntry->Type == E820_UNUSABLE ||

+ MemoryMapEntry->Type == E820_DISABLED) {

+ BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);

+ } else if (MemoryMapEntry->Type == E820_PMEM) {

+ BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);

+ }

+

+ return RETURN_SUCCESS;

+}

+

+

+/**

+ Callback function to find TOLUD (Top of Lower Usable DRAM)

+

+ Estimate where TOLUD (Top of Lower Usable DRAM) resides. The exact
position

+ would require platform specific code.

+

+ @param MemoryMapEntry Memory map entry info got from
bootloader.

+ @param Params Not used for now.

+

+ @retval RETURN_SUCCESS Successfully updated
TopOfLowerUsableDram.

+**/

+EFI_STATUS

+FindToludCallback (

+ IN MEMROY_MAP_ENTRY *MemoryMapEntry,

+ IN VOID *Params

+ )

+{

+ //

+ // This code assumes that the memory map on this x86 machine below
4GiB is continous

+ // until TOLUD. In addition it assumes that the bootloader provided
memory tables have

+ // no "holes" and thus the first memory range not covered by e820 marks
the end of

+ // usable DRAM. In addition it's assumed that every reserved memory
region touching

+ // usable RAM is also covering DRAM, everything else that is marked
reserved thus must be

+ // MMIO not detectable by bootloader/OS

+ //

+

+ //

+ // Skip memory types not RAM or reserved

+ //

+ if (MemoryMapEntry->Type == E820_NVS || MemoryMapEntry->Type ==
E820_UNUSABLE ||

+ MemoryMapEntry->Type == E820_DISABLED || MemoryMapEntry->Type
== E820_PMEM) {

+ return RETURN_SUCCESS;

+ }

+

+ //

+ // Skip resources above 4GiB

+ //

+ if (MemoryMapEntry->Base >= 0x100000000ULL) {

+ return RETURN_SUCCESS;

+ }

+

+ if ((MemoryMapEntry->Type == E820_RAM) ||

+ (MemoryMapEntry->Type == E820_ACPI)) {

+ //

+ // It's usable DRAM. Update TOLUD.

+ //

+ if (TopOfLowerUsableDram < (MemoryMapEntry->Base +
MemoryMapEntry->Size)) {

+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;

+ }

+ } else {

+ //

+ // It might be reserved DRAM or MMIO.

+ //

+ // If it touches usable DRAM at Base assume it's DRAM as well,

+ // as it could be bootloader installed tables, TSEG, GTT, ...

+ //

+ if (TopOfLowerUsableDram == MemoryMapEntry->Base) {

+ TopOfLowerUsableDram = MemoryMapEntry->Base +
MemoryMapEntry->Size;

+ }

+ }

+

+ return RETURN_SUCCESS;

+}

+

+

+/**

+ Callback function to build resource descriptor HOB

+

+ This function build a HOB based on the memory map entry info.

+ Only add EFI_RESOURCE_SYSTEM_MEMORY.



@param MemoryMapEntry Memory map entry info got from
bootloader.

@param Params Not used for now.

@@ -28,7 +180,15 @@ MemInfoCallback (
UINT64 Size;

EFI_RESOURCE_ATTRIBUTE_TYPE Attribue;



- Type = (MemoryMapEntry->Type == 1) ?
EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED;

+ //

+ // Skip everything not known to be usable DRAM.

+ // It will be added later.

+ //

+ if (MemoryMapEntry->Type != E820_RAM && MemoryMapEntry->Type !=
E820_ACPI) {

+ return RETURN_SUCCESS;

+ }

+

+ Type = EFI_RESOURCE_SYSTEM_MEMORY;

Base = MemoryMapEntry->Base;

Size = MemoryMapEntry->Size;



@@ -40,7 +200,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;



- if (Base >= BASE_4GB ) {

+ if (Base >= BASE_4GB) {

// Remove tested attribute to avoid DXE core to dispatch driver to memory
above 4GB

Attribue &= ~EFI_RESOURCE_ATTRIBUTE_TESTED;

}

@@ -48,6 +208,10 @@ MemInfoCallback (
BuildResourceDescriptorHob (Type, Attribue,
(EFI_PHYSICAL_ADDRESS)Base, Size);

DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type =
0x%x\n", Base, Size, Type));



+ if (MemoryMapEntry->Type == E820_ACPI) {

+ BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);

+ }

+

return RETURN_SUCCESS;

}



@@ -236,7 +400,16 @@ BuildHobFromBl (
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;



//

- // Parse memory info and build memory HOBs

+ // First find TOLUD

+ //

+ Status = ParseMemoryInfo (FindToludCallback, NULL);

+ if (EFI_ERROR(Status)) {

+ return Status;

+ }

+ DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n",
TopOfLowerUsableDram));

+

+ //

+ // Parse memory info and build memory HOBs for Usable RAM

//

Status = ParseMemoryInfo (MemInfoCallback, NULL);

if (EFI_ERROR(Status)) {

@@ -289,6 +462,14 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));

}



+ //

+ // Parse memory info and build memory HOBs for reserved DRAM and
MMIO

+ //

+ Status = ParseMemoryInfo (MemInfoCallbackMMIO, &AcpiBoardInfo);

+ if (EFI_ERROR(Status)) {

+ return Status;

+ }

+

//

// Parse platform specific information.

//

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
index 2c84d6ed53..35ea23d202 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
@@ -38,6 +38,16 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \

((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) &
((Alignment) - 1)))



+

+#define E820_RAM 1

+#define E820_RESERVED 2

+#define E820_ACPI 3

+#define E820_NVS 4

+#define E820_UNUSABLE 5

+#define E820_DISABLED 6

+#define E820_PMEM 7

+#define E820_UNDEFINED 8

+

/**

Auto-generated function that calls the library constructors for all of the
module's

dependent libraries.

--
2.30.2



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Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

Also, uefi_2500_800.efi should not be added directly inside of PurleyOpenBoardPkg. You will need to move that to edk2-non-osi. I'm not sure exactly which driver that is, but I have a suspicion that it might make sense to add it to ASpeedGopBinPkg.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 15, 2021 2:41 PM
To: KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


Please consider the environment before printing this email.

The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Nate DeSimone
 

Hi Manic,

I looked over all of your changes. The code itself looks good. However, there is an issue with the copyright headers that you have placed on the top of many of the files included here. It appears that you added the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

//***********************************************************************
//* *
//* Copyright (c) 1985 - 2021, American Megatrends International LLC. *
//* *
//* All rights reserved. *
//* *
//* SPDX-License-Identifier: BSD-2-Clause-Patent *
//* *
//***********************************************************************

Note that the SPDX spec requires that there be only one copyright and license statement per file. The correct way to add your new attribution would be the following:

/** @file

Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2021, American Megatrends International LLC.
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

There are also several files where you modified the file but did not add the new copyright notice. For example AmlOffsetTable.c, BoardAcpiDxeDsdt.c do not have the new copyright added. Please correct this and send a new patch series.

Thanks,
Nate

-----Original Message-----
From: manickavasakam karpagavinayagam <manickavasakamk@ami.com>
Sent: Thursday, June 10, 2021 4:50 PM
To: devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.oram@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Felixp@ami.com; DOPPALAPUDI, HARIKRISHNA <harikrishnad@ami.com>; Jha, Manish <manishj@ami.com>; Bobroff, Zachary <zacharyb@ami.com>; KARPAGAVINAYAGAM, MANICKAVASAKAM <manickavasakamk@ami.com>
Subject: [edk2-platforms][PATCH 0/2] Support for TiogaPass Platform and Override generic PciBus Driver with

Add BoardTiogaPass packages to support TiogaPass Platform Overriden generic PciBus Driver with Platform specific instance of PciBus driver To skip SPI controller initialization during PCI enumeration to avoid SET variable assert issue during POST To skip executing a specific MLX card UEFI OPROM


manickavasakam karpagavinayagam (2):
PurleyOpenBoardPkg : Support for TiogaPass Platform
PurleyOpenBoardPkg : Override generic PciBus Driver with Platform
specific instance of PciBus driver.

.../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 452 +-
.../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 2 +
.../BoardTiogaPass/CoreDxeInclude.dsc | 168 +
.../BoardTiogaPass/CoreUefiBootInclude.fdf | 82 +
.../BoardTiogaPass/GitEdk2MinTiogaPass.bat | 102 +
.../BasePlatformHookLib/BasePlatformHookLib.c | 397 ++
.../BasePlatformHookLib.inf | 46 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.c | 45 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 50 +
.../BoardAcpiLib/DxeTiogaPassAcpiTableLib.c | 62 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 71 +
.../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 51 +
.../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 129 +
.../BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c | 46 +
.../Library/BoardInitLib/AllLanesEparam.c | 53 +
.../Library/BoardInitLib/GpioTable.c | 305 +
.../Library/BoardInitLib/IioBifur.c | 79 +
.../BoardInitLib/PeiBoardInitPostMemLib.c | 55 +
.../BoardInitLib/PeiBoardInitPostMemLib.inf | 47 +
.../BoardInitLib/PeiBoardInitPreMemLib.c | 121 +
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 79 +
.../Library/BoardInitLib/PeiTiogaPassDetect.c | 37 +
.../BoardInitLib/PeiTiogaPassInitLib.h | 27 +
.../BoardInitLib/PeiTiogaPassInitPostMemLib.c | 95 +
.../BoardInitLib/PeiTiogaPassInitPreMemLib.c | 647 ++
.../Library/BoardInitLib/UsbOC.c | 55 +
.../Library/PeiReportFvLib/PeiReportFvLib.c | 147 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 60 +
.../BoardTiogaPass/OpRoms/uefi_2500_800.efi | Bin 0 -> 36928 bytes
.../BoardTiogaPass/OpenBoardPkg.dsc | 255 +
.../BoardTiogaPass/OpenBoardPkg.fdf | 610 ++
.../BoardTiogaPass/PlatformPkgBuildOption.dsc | 94 +
.../BoardTiogaPass/PlatformPkgConfig.dsc | 68 +
.../BoardTiogaPass/PlatformPkgPcd.dsc | 402 ++
.../BoardTiogaPass/StructureConfig.dsc | 6246 +++++++++++++++++
.../BoardTiogaPass/__init__.py | 0
.../PurleyOpenBoardPkg/BoardTiogaPass/bld.bat | 148 +
.../BoardTiogaPass/build_board.py | 204 +
.../BoardTiogaPass/build_config.cfg | 42 +
.../BoardTiogaPass/logo.txt | 10 +
.../BoardTiogaPass/postbuild.bat | 105 +
.../BoardTiogaPass/prebuild.bat | 221 +
.../Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf | 6 +-
.../IpmiPlatformHookLib.inf | 2 +-
.../Include/Guid/PchRcVariable.h | 5 +
.../Include/Guid/SetupVariable.h | 14 +-
.../Bus/Pci/PciBusDxe/ComponentName.c | 170 +
.../Bus/Pci/PciBusDxe/ComponentName.h | 146 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 460 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 396 ++
.../Bus/Pci/PciBusDxe/PciBusDxe.inf | 112 +
.../Bus/Pci/PciBusDxe/PciBusDxe.uni | 16 +
.../Bus/Pci/PciBusDxe/PciBusDxeExtra.uni | 14 +
.../Bus/Pci/PciBusDxe/PciCommand.c | 267 +
.../Bus/Pci/PciBusDxe/PciCommand.h | 232 +
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 1056 +++
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 266 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 188 +
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 83 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 2210 ++++++
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 515 ++
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 2884 ++++++++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 480 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 484 ++
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 205 +
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 2087 ++++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 660 ++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 1809 +++++
.../MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h | 179 +
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 775 ++
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 136 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 82 +
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 28 +
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 2292 ++++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 456 ++
.../Bus/Pci/PciBusDxe/PciRomTable.c | 135 +
.../Bus/Pci/PciBusDxe/PciRomTable.h | 48 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 2 +-
79 files changed, 30584 insertions(+), 232 deletions(-) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreDxeInclude.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/CoreUefiBootInclude.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/GitEdk2MinTiogaPass.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BasePlatformHookLib/BasePlatformHookLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/DxeTiogaPassAcpiTableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardAcpiLib/SmmTiogaPassAcpiEnableLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/AllLanesEparam.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/GpioTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/IioBifur.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassDetect.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPostMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/PeiTiogaPassInitPreMemLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/BoardInitLib/UsbOC.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpRoms/uefi_2500_800.efi
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgBuildOption.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/StructureConfig.dsc
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/__init__.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/bld.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_board.py
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/logo.txt
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/postbuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/prebuild.bat
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxeExtra.uni
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Override/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

--
2.25.0.windows.1


Please consider the environment before printing this email.

The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission.


Re: [edk2-platforms][PATCH v2 0/4] MinPlatformPkg: Add TPM platform hier disable support

Michael Kubacki
 

It's been a week and I haven't seen any feedback. Please review when possible.

Thanks,
Michael

On 6/7/2021 12:05 PM, Michael Kubacki wrote:
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3411
This patch series adds support in TpmPlatformHierarchyLib to either
randomize the platform auth (current behavior) or disable the
platform auth (new behavior) based on a new PCD introduced to
MinPlatformPkg: PcdRandomizePlatformHierarchy.
Some platforms that would like to adopt MinPlatformPkg prefer to
disable the platform hierarchy as opposed to the randomization
approach.
Minor changes are included to eliminate code duplication in impacted
code.
V2 changes:
1. Update code that randomizes the platform auth in Tcg2PlatformPei
to use the TpmPlatformHierarchyLib interface for platform
hierarchy configuration.
2. Remove pre-existing redundant code in Tcg2PlatformPei.
3. Add a PCD to allow the platform integrator to choose how to
configure the TPM platform hierarchy.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jeremiah Cox <jerecox@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Michael Kubacki (4):
MinPlatformPkg: Add TpmPlatformHierarchyLib to Components in DSC
MinPlatformPkg/TpmPlatformHierarchyLib: Add PEI support
MinPlatformPkg/Tcg2PlatformPei: Use TpmPlatformHierarchyLib
MinPlatformPkg/TpmPlatformHierarchyLib: Add disable support
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.c => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} | 72 +++++++++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.c | 130 +-------------------
Platform/Intel/MinPlatformPkg/Include/Library/TpmPlatformHierarchyLib.h | 4 +-
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 1 +
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 4 +-
Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.inf => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} | 22 ++--
Platform/Intel/MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf | 2 +
7 files changed, 85 insertions(+), 150 deletions(-)
rename Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.c => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c} (70%)
rename Platform/Intel/MinPlatformPkg/Tcg/Library/{TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.inf => PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf} (66%)


Re: [PATCH v1 1/5] EDK2 Code First: PI Specification: EFI_MM_COMMUNICATE_HEADER Update

Kun Qin
 

Hi Hao,

Sorry that I missed comments for this patch earlier. You are correct. I only inspected SmmLockBoxPeiLib. The PEI instance handled mode switch with ```OFFSET_OF ``` function. But DXE instance still have a few use cases that will be impacted.

I will update this read me file and add a code change patch for this library in v2. Thanks for pointing this out.

Regards,
Kun

On 06/11/2021 00:46, Wu, Hao A wrote:
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Kun Qin
Sent: Thursday, June 10, 2021 9:43 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
<gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
Andrew Fish <afish@apple.com>; Laszlo Ersek <lersek@redhat.com>; Leif
Lindholm <leif@nuviainc.com>
Subject: [edk2-devel] [PATCH v1 1/5] EDK2 Code First: PI Specification:
EFI_MM_COMMUNICATE_HEADER Update

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3430

This change includes specification update markdown file that describes the
proposed PI Specification v1.7 Errata A in detail and potential impact to the
existing codebase.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
---
BZ3430-SpecChange.md | 88 ++++++++++++++++++++
1 file changed, 88 insertions(+)

diff --git a/BZ3430-SpecChange.md b/BZ3430-SpecChange.md new file mode
100644 index 000000000000..33a1ffda447b
--- /dev/null
+++ b/BZ3430-SpecChange.md
@@ -0,0 +1,88 @@
+# Title: Change MessageLength Field of EFI_MM_COMMUNICATE_HEADER
to
+UINT64
+
+## Status: Draft
+
+## Document: UEFI Platform Initialization Specification Version 1.7
+Errata A
+
+## License
+
+SPDX-License-Identifier: CC-BY-4.0
+
+## Submitter: [TianoCore Community](https://www.tianocore.org)
+
+## Summary of the change
+
+Change the `MessageLength` Field of `EFI_MM_COMMUNICATE_HEADER`
from UINTN to UINT64 to remove architecture dependency:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINT64 MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+## Benefits of the change
+
+In PI Spec v1.7 Errata A, Vol.4, Sec 5.7 MM Communication Protocol, the
MessageLength field of `EFI_MM_COMMUNICATE_HEADER` (also defined as
`EFI_SMM_COMMUNICATE_HEADER`) is defined as type UINTN.
+
+But this structure, as a generic definition, could be used for both PEI and
DXE MM communication. Thus for a system that supports PEI MM launch,
but operates PEI in 32bit mode and MM foundation in 64bit, the current
`EFI_MM_COMMUNICATE_HEADER` definition will cause structure parse
error due to UINTN used.
+
+## Impact of the change
+
+This change will impact the known structure consumers including:
+
+```bash
+MdeModulePkg/Core/PiSmmCore/PiSmmIpl
+MdeModulePkg/Application/SmiHandlerProfileInfo
+MdeModulePkg/Application/MemoryProfileInfo
+```
+
+For consumers that are not using
`OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)`, but performing
explicit addition such as the existing
MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.c,
one will need to change code implementation to match new structure
definition. Otherwise, the code compiled on IA32 architecture will
experience structure field dereference error.
+
+User who currently uses UINTN local variables as place holder of
MessageLength will need to use caution to make cast from UINTN to UINT64
and vice versa. It is recommended to use `SafeUint64ToUintn` for such
operations when the value is indeterministic.
+
+Note: MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib is also
consuming this structure, but it handled this size discrepancy internally. If this
Hello Kun,
Sorry for a question.
I am not sure why the current codes in file SmmLockBoxDxeLib.c will work properly after the UINTN -> UINT64 change.
For example:
LockBoxGetSmmCommBuffer():
MinimalSizeNeeded = sizeof (EFI_GUID) +
sizeof (UINTN) +
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_SAVE),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_SET_ATTRIBUTES),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_UPDATE),
MAX (sizeof (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE),
sizeof (EFI_SMM_LOCK_BOX_PARAMETER_RESTORE_ALL_IN_PLACE)))));
SaveLockBox():
UINT8 TempCommBuffer[sizeof(EFI_GUID) + sizeof(UINTN) + sizeof(EFI_SMM_LOCK_BOX_PARAMETER_SAVE)];
Is the series missed changes for SmmLockBoxDxeLib or I got something wrong?
Best Regards,
Hao Wu

potential spec change is not applied, all applicable PEI MM communicate
callers will need to use the same routine as that of SmmLockBoxPeiLib to
invoke a properly populated EFI_MM_COMMUNICATE_HEADER to be used
in X64 MM foundation.
+
+## Detailed description of the change [normative updates]
+
+### Specification Changes
+
+1. In PI Specification v1.7 Errata A: Vol. 4 Page-91, the definition of
`EFI_MM_COMMUNICATE_HEADER` should be changed from current:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINTN MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+to:
+
+```c
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINT64 MessageLength;
+ UINT8 Data[ANYSIZE_ARRAY];
+} EFI_MM_COMMUNICATE_HEADER;
+```
+
+### Code Changes
+
+1. Remove the explicit calculation of the offset of `Data` in
`EFI_MM_COMMUNICATE_HEADER`. Thus applicable calculations of
`sizeof(EFI_GUID) + sizeof(UINTN)` should be replaced with
`OFFSET_OF(EFI_MM_COMMUNICATE_HEADER, Data)` or similar
alternatives. These calculations are identified in:
+
+```bash
+MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
c
+MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
+```
+
+1. Resolve potentially mismatched type between `UINTN` and `UINT64`.
This would occur when `MessageLength` or its derivitive are used for local
calculation with existing `UINTN` typed variables. Code change regarding this
perspective is per case evaluation: if the variables involved are all
deterministic values, and there is no overflow or underflow risk, a cast
operation (from `UINTN` to `UINT64`) can be safely used. Otherwise, the
calculation will be performed in `UINT64` bitwidth and then convert to
`UINTN` using `SafeUint64*` and `SafeUint64ToUintn`, respectively. These
operations are identified in:
+
+```bash
+MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
+MdeModulePkg/Application/SmiHandlerProfileInfo/SmiHandlerProfileInfo.
c
+MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.c
+```
+
+1. After all above changes applied and specification updated,
`MdePkg/Include/Protocol/MmCommunication.h` will need to be updated to
match new definition that includes the field type update.
--
2.31.1.windows.1




Re: [PATCH v3 6/8] SecurityPkg: Add new modules to Security package.

Jeremiah Cox
 

"dbt" and "dbx" are swapped in the comments?  Look for groups of 3 underscores ("___") below...

+ ## GUID used to specify section with default ___dbt___ content
+ gDefault___dbx___FileGuid = { 0x5740766a, 0x718e, 0x4dc0, { 0x99, 0x35, 0xc3, 0x6f, 0x7d, 0x3f, 0x88, 0x4f } }
+
+ ## GUID used to specify section with default ___dbx___ content
+ gDefault___dbt___FileGuid = { 0x36c513ee, 0xa338, 0x4976, { 0xa0, 0xfb, 0x6d, 0xdb, 0xa3, 0xda, 0xfe, 0x87 } }


[PATCH v1 0/1] ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI console

Artem Kopotev
 

cmd_load_symbols.py can only load symbols from a firmware volume. Add the possibility to
use UEFI console output to calculate dll load address and send
add-symbol-file commands directly to ArmDS debugger

Public branch:
https://github.com/artkopotev/edk2/commits/fix_armds_debug_script

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>

artem.kopotev (1):
ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI
console

.../Scripts/Ds5/cmd_load_symbols.py | 17 ++++-
ArmPlatformPkg/Scripts/Ds5/console_loader.py | 68 +++++++++++++++++++
2 files changed, 83 insertions(+), 2 deletions(-)
create mode 100644 ArmPlatformPkg/Scripts/Ds5/console_loader.py

--
2.17.1


[PATCH v1 1/1] ArmPlatformPkg/Scripts: Create add-symbol-file commands from UEFI console

Artem Kopotev
 

cmd_load_symbols.py can only load symbols from FV. Add the possibility to
use UEFI console output to calculate dll load address and send
add-symbol-file commands directly to ArmDS debugger

dll load address can't be used directly from UEFI output, see comment in
DebugPeCoffExtraActionLib: "This may not work correctly if you generate
PE/COFF directly as then the Offset would not be required".

1) Use objdump -S module.dll | grep <_ModuleEntryPoint> to get offset
in dll (offset)
2) Use Entrypoint=<address> from UEFI console output (entrypoint)
3) dll load address is (entrypoint)-(offset)

Signed-off-by: Artem Kopotev <artem.kopotev@arm.com>
Change-Id: I3ac5ea761254a346bbb5806fb089b0979419bc01
---
ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py | 17 ++++-
ArmPlatformPkg/Scripts/Ds5/console_loader.py | 68 ++++++++++++++++++++
2 files changed, 83 insertions(+), 2 deletions(-)

diff --git a/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py b/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
index de4332edc7d4..89d2f28ba27d 100644
--- a/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
+++ b/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -7,6 +7,8 @@
from arm_ds.debugger_v1 import Debugger
from arm_ds.debugger_v1 import DebugException

+from console_loader import load_symbol_from_console
+
import re, sys, getopt

import edk2_debugger
@@ -21,12 +23,16 @@ def usage():
print "-m,--sysmem=(base,size): System Memory region"
print "-f,--fv=(base,size): Firmware region"
print "-r,--rom=(base,size): ROM region"
+ print "-i,--input=: Filename for the EDK2 console output"
+ print "-o,--objdump=: Path to the objdump tool"

verbose = False
load_all = False
report_file = None
+input_file = None
+objdump = None
regions = []
-opts,args = getopt.getopt(sys.argv[1:], "hvar:vm:vr:vf:v", ["help","verbose","all","report=","sysmem=","rom=","fv="])
+opts,args = getopt.getopt(sys.argv[1:], "hvar:i:o:vm:vr:vf:v", ["help","verbose","all","report=","sysmem=","rom=","fv=","input=","objdump="])
if (opts is None) or (not opts):
report_file = '../../../report.log'
else:
@@ -55,6 +61,10 @@ else:
elif o in ("-r","--rom"):
region_type = edk2_debugger.ArmPlatformDebugger.REGION_TYPE_ROM
regex = region_reg
+ elif o in ("-i","--input"):
+ input_file = a
+ elif o in ("-o", "--objdump"):
+ objdump = a
else:
assert False, "Unhandled option (%s)" % o

@@ -94,3 +104,6 @@ except Exception, (ErrorClass, ErrorMessage):
print "Error(%s): %s" % (ErrorClass, ErrorMessage)
except DebugException, de:
print "DebugError: %s" % (de.getMessage())
+
+if input_file:
+ load_symbol_from_console(ec, input_file, objdump, verbose)
diff --git a/ArmPlatformPkg/Scripts/Ds5/console_loader.py b/ArmPlatformPkg/Scripts/Ds5/console_loader.py
new file mode 100644
index 000000000000..0ce217876d95
--- /dev/null
+++ b/ArmPlatformPkg/Scripts/Ds5/console_loader.py
@@ -0,0 +1,68 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+from arm_ds.debugger_v1 import DebugException
+
+import subprocess, os, edk2_debugger, re
+
+def get_module_name(line):
+ path = line.rsplit(' ')[1]
+ return os.path.splitext(os.path.basename(path))[0]
+
+def get_module_path(line):
+ return line.rsplit(' ')[1]
+
+def get_module_entrypoint(list, module_name):
+ line = [i for i in list if module_name in i and re.search(r'\b'+module_name+r'\b', i)]
+ if len(line) == 0:
+ # Module was not loaded using DxeDispatcher or PeiDispatcher. It is a SEC module
+ # Symbols for these modules are loaded from FV, not from console log
+ return None
+
+ entrypoint_str = line[0].rsplit(' ')[4]
+ return entrypoint_str.rsplit('=')[1]
+
+def load_symbol_from_console(ec, console_file, objdump, verbose):
+ if objdump is None:
+ print "Error: A path to objdump tool is not specified, but -i parameter is provided"
+ elif not os.path.exists(objdump):
+ print "Error: Provided path to objdump is invalid: %s" % objdump
+ elif not os.path.exists(console_file):
+ print "Error: UEFI console file is not found: %s" % console_file
+ else:
+
+ full_list = open(console_file).read().splitlines()
+
+ efi_list = [i for i in full_list if "EntryPoint=" in i]
+
+ full_list = dict.fromkeys(full_list)
+ full_list = [i for i in full_list if "add-symbol-file" in i]
+
+ module_dict = {}
+
+ for line in full_list:
+ name = get_module_name(line)
+ module_dict[name] = (get_module_path(line), get_module_entrypoint(efi_list, name))
+
+ for module in module_dict:
+ entrypoint_addr = module_dict[module][1]
+
+ if entrypoint_addr is not None:
+ path = module_dict[module][0]
+ if not os.path.exists(path):
+ print "Module not found: " + path + ". Skipping..."
+ continue
+
+ sp = subprocess.Popen([objdump,'-S', path], stdout = subprocess.PIPE)
+
+ objdump_out = sp.stdout.readlines()
+ entrypoint_record = [i for i in objdump_out if "<_ModuleEntryPoint>" in i]
+
+ entrypoint_offset = entrypoint_record[0].split(' ')[0]
+
+ load_addr = int(entrypoint_addr, 16) - int(entrypoint_offset, 16)
+
+ edk2_debugger.load_symbol_from_file(ec, path, load_addr, verbose)
--
2.17.1


Re: [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload

Marvin Häuser
 

Hey Ray,

Sure, thanks a lot for taking the time. I will need a bit longer to get to it, sorry. :)

Best regards,
Marvin

On 15.06.21 16:36, Ni, Ray wrote:
Marvin,
I have sent out https://edk2.groups.io/g/devel/message/76429 <UefiPayloadPkg/PayloadLoader: Add more checks to verify ELF images> to address your feedbacks.

Can I merge the 3 patches first? (we can continue discussing the more-checks patch.)

Thanks,
Ray

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
Sent: Thursday, June 10, 2021 7:37 PM
To: devel@edk2.groups.io; mcb30@ipxe.org; mhaeuser@posteo.de
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo <guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload



-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Brown
Sent: Thursday, June 10, 2021 6:43 PM
To: devel@edk2.groups.io; mhaeuser@posteo.de; Ni, Ray <ray.ni@intel.com>
Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo <guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payload

On 10/06/2021 11:13, Marvin Häuser wrote:
On 10.06.21 11:39, Ni, Ray wrote:
Maybe for some context, my main issue at first was that the checks are
all proper runtime checks with no ASSERTs at all, so I got confused how
this situation could happen in a realistic scenario. I needed to trace
the ParseStatus data flow to understand the idea is basically the same
as in the PE library. Code in a way is self-documenting, and this
personally gave me a hard time understanding why it is written this way.
But thanks for clarifying your intention! :)
I assume you are ok with the ParseStatus.
I will send new version based on mail discussion. Thanks!
I don't need to be okay with anything, I'm not a maintainer nor an
authority. But I gave my opinion, which is that it is dead code that
makes the design/flow harder to understand for a third party, at no
obvious benefit.
FWIW, I strongly agree with Marvin on this: having ParseStatus in its
current form is a bad idea since it adds no value but does incur a cost.
OK. I can remove that😊




Re: [EXTERNAL] Re: [edk2-devel] [PATCH v1 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters

Kun Qin
 

Thanks for the review. Updated patch has been sent here: https://edk2.groups.io/g/devel/message/76553.

Please let me know if any other feedbacks.

Regards,
Kun

On 06/15/2021 09:20, Bret Barkelew wrote:
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
- Bret
*From: *Sean Brogan <mailto:spbrogan@outlook.com>
*Sent: *Tuesday, June 15, 2021 9:00 AM
*To: *devel@edk2.groups.io <mailto:devel@edk2.groups.io>; kuqin12@gmail.com <mailto:kuqin12@gmail.com>
*Cc: *Sean Brogan <mailto:sean.brogan@microsoft.com>; Bret Barkelew <mailto:Bret.Barkelew@microsoft.com>; Kinney, Michael D <mailto:michael.d.kinney@intel.com>; Liming Gao <mailto:gaoliming@byosoft.com.cn>
*Subject: *[EXTERNAL] Re: [edk2-devel] [PATCH v1 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters
Please update the signed-off-by to include yours.
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Thanks
Sean
On 6/11/2021 10:04 PM, Kun Qin wrote:
> From: Sean Brogan <sean.brogan@microsoft.com>
>
> REF:
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3454&;data=04%7C01%7CBret.Barkelew%40microsoft.com%7C436f445e3f774d2549b608d930169d05%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637593696216659744%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=pJiLG4bZ8gYR0MjDuNTmuT3NgRjq%2FZRMnTi1sT67VqM%3D&amp;reserved=0 <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3454&;data=04%7C01%7CBret.Barkelew%40microsoft.com%7C436f445e3f774d2549b608d930169d05%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637593696216659744%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=pJiLG4bZ8gYR0MjDuNTmuT3NgRjq%2FZRMnTi1sT67VqM%3D&amp;reserved=0>
>
> On Linux the shell expands the wildcard paths and causes multiple files
> to be missed. This change adds additional quotes to defer expansion in
> order to bring parity in cspell result.
>
> Cc: Sean Brogan <sean.brogan@microsoft.com>
> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
>
> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
> ---
>   .pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/.pytool/Plugin/SpellCheck/SpellCheck.py
b/.pytool/Plugin/SpellCheck/SpellCheck.py
> index 43365441b91c..97b240ef747c 100644
> --- a/.pytool/Plugin/SpellCheck/SpellCheck.py
> +++ b/.pytool/Plugin/SpellCheck/SpellCheck.py
> @@ -133,7 +133,8 @@ class SpellCheck(ICiBuildPlugin):
>           #
>           relpath = os.path.relpath(abs_pkg_path)
>           cpsell_paths = " ".join(
> -            [f"{relpath}/**/{x}" for x in
package_relative_paths_to_spell_check])
> +            # Double quote each path to defer expansion to cspell
parameters
> +            [f'"{relpath}/**/{x}"' for x in
package_relative_paths_to_spell_check])
>
>           # Make the config file
>           config_file_path = os.path.join(
>


[PATCH v2 1/1] Pytool: SpellCheck: Defer path expansion in cspell parameters

Kun Qin
 

From: Sean Brogan <sean.brogan@microsoft.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3454

On Linux the shell expands the wildcard paths and causes multiple files
to be missed. This change adds additional quotes to defer expansion in
order to bring parity in cspell result.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
---

Notes:
v2:
- Added reviewed-by tags [Bret]
- Added reviewed-by tag [Sean]
- Added signed-off-by tag from Kun [Sean]

.pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.pytool/Plugin/SpellCheck/SpellCheck.py b/.pytool/Plugin/SpellCheck/SpellCheck.py
index 9ad57632a6e8..05c471d91ba1 100644
--- a/.pytool/Plugin/SpellCheck/SpellCheck.py
+++ b/.pytool/Plugin/SpellCheck/SpellCheck.py
@@ -134,7 +134,8 @@ class SpellCheck(ICiBuildPlugin):
#
relpath = os.path.relpath(abs_pkg_path)
cpsell_paths = " ".join(
- [f"{relpath}/**/{x}" for x in package_relative_paths_to_spell_check])
+ # Double quote each path to defer expansion to cspell parameters
+ [f'"{relpath}/**/{x}"' for x in package_relative_paths_to_spell_check])

# Make the config file
config_file_path = os.path.join(
--
2.31.1.windows.1


[PATCH v2 0/1] SpellCheck plugin inspects fewer files when run on Linux

Kun Qin
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3454

This patch series is a follow up of previous submission:
https://edk2.groups.io/g/devel/message/76427

v2 patch change includes feedback for v1 series:
a. Adding "Reviewed-by" tags;
b. Adding "Signed-Off-by" tags for myself;

Patch v2 branch: https://github.com/kuqin12/edk2/tree/exp_shell_v2

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Sean Brogan (1):
Pytool: SpellCheck: Defer path expansion in cspell parameters

.pytool/Plugin/SpellCheck/SpellCheck.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

--
2.31.1.windows.1


Re: [edk2-platforms][PATCH v2 29/32] JadePkg: Recover boot options when NVRAM cleared

Nhi Pham
 

On 6/8/21 06:46, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:21 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Due to recent changes in EDK2, system without a valid boot options list
in NVRAM will enter Platform Recovery mode. As ReadyToBoot event is not
triggered in this mode, services like ACPI and PCIe won't be able to do
some finalization settings and cause OS fails to boot.
This change is to prevent the issue by recovery boot options list each
time NVRAM is cleared.
Urgh.
Ultimately this is a bug in EDK2. And it should be fixed in edk2:
https://bugzilla.tianocore.org/show_bug.cgi?id=2831

But could you let me know which specific edk2 change broke this for
you, since it is not obvious to me?
Thanks Leif for the info.

The issue happened since below change  037d86dd7a (20/06/06 14:49) ArmPkg/PlatformBootManagerLib: don't connect all devices on each boot <Ard Biesheuvel>

From that commit, System with a NVRAM cleared might try to boot with default boot option in Platform Recovery mode. As ReadyToBoot event is not triggered in this mode, services like ACPI and PCIe can't complete theirs finalizing configurations and cause the OS fails to boot. This patch is to prevent the system from entering Platform Recovery mode by recovering boot options list each time NVRAM cleared.

Best regards,

Nhi


/
Leif

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Platform/Ampere/JadePkg/Jade.dsc | 5 ++
Platform/Ampere/JadePkg/Jade.fdf | 5 ++
Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf | 39 +++++++++++++
Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c | 58 ++++++++++++++++++++
4 files changed, 107 insertions(+)

diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index 9d787113e3b5..023f2e898d7f 100755
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -185,3 +185,8 @@ [Components.common]
Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/WatchdogConfigDxe/WatchdogConfigDxe.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/PcieDeviceConfigDxe/PcieDeviceConfigDxe.inf
+
+ #
+ # Misc
+ #
+ Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index b0c2894d00f8..edbead046572 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -361,4 +361,9 @@ [FV.FvMain]
INF Silicon/Ampere/AmpereAltraPkg/Drivers/WatchdogConfigDxe/WatchdogConfigDxe.inf
INF Silicon/Ampere/AmpereAltraPkg/Drivers/PcieDeviceConfigDxe/PcieDeviceConfigDxe.inf
+ #
+ # Misc
+ #
+ INF Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
+
!include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc
diff --git a/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
new file mode 100644
index 000000000000..624332339beb
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.inf
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = BootOptionsRecoveryDxe
+ FILE_GUID = FDCDDC91-4F9E-400C-9BB4-1FE4BE9565B3
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = BootOptionsRecoveryDxeEntry
+
+[Sources]
+ BootOptionsRecoveryDxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ PcdLib
+ PrintLib
+ UefiBootManagerLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Guids]
+ gEfiEndOfDxeEventGroupGuid
+
+[Pcd]
+ gAmpereTokenSpaceGuid.PcdNvramErased
+
+[Depex]
+ gEfiFaultTolerantWriteProtocolGuid
diff --git a/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c
new file mode 100644
index 000000000000..cd9637ec704e
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/BootOptionsRecoveryDxe/BootOptionsRecoveryDxe.c
@@ -0,0 +1,58 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+VOID
+EFIAPI
+RecoveryCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ DEBUG ((DEBUG_INFO, "%a: Do recover boot options\n", __FUNCTION__));
+
+ EfiBootManagerConnectAll ();
+ EfiBootManagerRefreshAllBootOption ();
+
+ gBS->CloseEvent (Event);
+}
+
+EFI_STATUS
+EFIAPI
+BootOptionsRecoveryDxeEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT EndOfDxeEvent;
+
+ DEBUG ((DEBUG_INFO, "%a: NVRAM Clear is %d\n", PcdGetBool (PcdNvramErased), __FUNCTION__));
+
+ if (PcdGetBool (PcdNvramErased)) {
+ DEBUG ((DEBUG_INFO, "%a: Register event to recover boot options\n", __FUNCTION__));
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ RecoveryCallback,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return Status;
+}
--
2.17.1


Re: [edk2-platforms][PATCH v2 21/32] AmpereAltraPkg: Add DebugInfoPei module

Nhi Pham
 

On 6/8/21 06:08, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:13 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Helps to show various system information like CPU info and Board Setting
values to UART console during boot process.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 1 +
Platform/Ampere/JadePkg/Jade.fdf | 2 +
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf | 41 ++++
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c | 230 ++++++++++++++++++++
4 files changed, 274 insertions(+)

diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
index 930bbb5d385b..2d380b21df24 100755
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
@@ -534,6 +534,7 @@ [Components.common]
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MemoryInitPeim/MemoryInitPeim.inf
+ Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 3d5d857178b3..8c09e2a49089 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -167,6 +167,8 @@ [FV.FVMAIN_COMPACT]
#
# Print platform information before passing control into the Driver Execution Environment (DXE) phase
#
+ INF Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
+
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
new file mode 100755
index 000000000000..11414f72f369
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
@@ -0,0 +1,41 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = DebugInfo
+ FILE_GUID = C0571D26-6176-11E9-8647-D663BD873D93
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = DebugInfoPeiEntryPoint
+
+[Sources]
+ DebugInfoPei.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ ArmLib
+ HobLib
+ NVParamLib
+ PeimEntryPoint
+ PrintLib
+ SerialPortLib
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ TRUE
diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
new file mode 100644
index 000000000000..d6775ffa4a79
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
@@ -0,0 +1,230 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/IoLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/PrintLib.h>
+#include <Library/SerialPortLib.h>
+#include <NVParamDef.h>
+#include <Pcie.h>
+#include <PlatformInfoHob.h>
+
+#define MAX_PRINT_LEN 512
+
+#define GB_SCALE_FACTOR 1073741824
+#define MB_SCALE_FACTOR 1048576
+#define KB_SCALE_FACTOR 1024
+#define MHZ_SCALE_FACTOR 1000000
+
+STATIC VOID
+SerialPrint (
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ CHAR8 Buf[MAX_PRINT_LEN];
+ VA_LIST Marker;
+ UINTN NumberOfPrinted;
+
+ VA_START (Marker, FormatString);
+ NumberOfPrinted = AsciiVSPrint (Buf, sizeof (Buf), FormatString, Marker);
+ SerialPortWrite ((UINT8 *)Buf, NumberOfPrinted);
+ VA_END (Marker);
+}
Why not use BaseDebugLibSerialPort?
Thanks Leif for catching that. Will replace it by DebugPrint in the v3.

Best regards,

Nhi


/
Leif

+
+/**
+ Print any existence NVRAM.
+**/
+STATIC VOID
+PrintNVRAM (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ NVPARAM Idx;
+ UINT32 Val;
+ UINT16 ACLRd = NV_PERM_ALL;
+ BOOLEAN Flag;
+
+ Flag = FALSE;
+ for (Idx = NV_PREBOOT_PARAM_START; Idx <= NV_PREBOOT_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Pre-boot Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_MANU_PARAM_START; Idx <= NV_MANU_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Manufacturer Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_USER_PARAM_START; Idx <= NV_USER_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("User Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_BOARD_PARAM_START; Idx <= NV_BOARD_PARAM_MAX; Idx += NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Board Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+}
+
+STATIC
+CHAR8 *
+GetCCIXLinkSpeed (
+ IN UINTN Speed
+ )
+{
+ switch (Speed) {
+ case 1:
+ return "2.5 GT/s";
+
+ case 2:
+ return "5 GT/s";
+
+ case 3:
+ return "8 GT/s";
+
+ case 4:
+ case 6:
+ return "16 GT/s";
+
+ case 0xa:
+ return "20 GT/s";
+
+ case 0xf:
+ return "25 GT/s";
+ }
+
+ return "Unknown";
+}
+
+/**
+ Print system info
+**/
+STATIC VOID
+PrintSystemInfo (
+ VOID
+ )
+{
+ UINTN Idx;
+ VOID *Hob;
+ PLATFORM_INFO_HOB *PlatformHob;
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ SerialPrint ("SCP FW version : %a\n", (const CHAR8 *)PlatformHob->SmPmProVer);
+ SerialPrint ("SCP FW build date : %a\n", (const CHAR8 *)PlatformHob->SmPmProBuild);
+
+ SerialPrint ("Failsafe status : %d\n", PlatformHob->FailSafeStatus);
+ SerialPrint ("Reset status : %d\n", PlatformHob->ResetStatus);
+ SerialPrint ("CPU info\n");
+ SerialPrint (" CPU ID : %X\n", ArmReadMidr ());
+ SerialPrint (" CPU Clock : %d MHz\n", PlatformHob->CpuClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" Number of active sockets : %d\n", GetNumberOfActiveSockets ());
+ SerialPrint (" Number of active cores : %d\n", GetNumberOfActiveCores ());
+ if (IsSlaveSocketActive ()) {
+ SerialPrint (
+ " Inter Socket Connection 0 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[0],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[0])
+ );
+ SerialPrint (
+ " Inter Socket Connection 1 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[1],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[1])
+ );
+ }
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Core voltage : %d\n", Idx, PlatformHob->CoreVoltage[Idx]);
+ SerialPrint (" Socket[%d]: SCU ProductID : %X\n", Idx, PlatformHob->ScuProductId[Idx]);
+ SerialPrint (" Socket[%d]: Max cores : %d\n", Idx, PlatformHob->MaxNumOfCore[Idx]);
+ SerialPrint (" Socket[%d]: Warranty : %d\n", Idx, PlatformHob->Warranty[Idx]);
+ SerialPrint (" Socket[%d]: Subnuma : %d\n", Idx, PlatformHob->SubNumaMode[Idx]);
+ SerialPrint (" Socket[%d]: RC disable mask : %X\n", Idx, PlatformHob->RcDisableMask[Idx]);
+ SerialPrint (" Socket[%d]: AVS enabled : %d\n", Idx, PlatformHob->AvsEnable[Idx]);
+ SerialPrint (" Socket[%d]: AVS voltage : %d\n", Idx, PlatformHob->AvsVoltageMV[Idx]);
+ }
+
+ SerialPrint ("SOC info\n");
+ SerialPrint (" DDR Frequency : %d MHz\n", PlatformHob->DramInfo.MaxSpeed);
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Soc voltage : %d\n", Idx, PlatformHob->SocVoltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM1 voltage : %d\n", Idx, PlatformHob->Dimm1Voltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM2 voltage : %d\n", Idx, PlatformHob->Dimm2Voltage[Idx]);
+ }
+
+ SerialPrint (" PCP Clock : %d MHz\n", PlatformHob->PcpClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SOC Clock : %d MHz\n", PlatformHob->SocClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SYS Clock : %d MHz\n", PlatformHob->SysClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" AHB Clock : %d MHz\n", PlatformHob->AhbClk / MHZ_SCALE_FACTOR);
+}
+
+/**
+ Entry point function for the PEIM
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @return EFI_SUCCESS If we installed our PPI
+
+**/
+EFI_STATUS
+EFIAPI
+DebugInfoPeiEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ PrintSystemInfo ();
+ PrintNVRAM ();
+
+ return EFI_SUCCESS;
+}
--
2.17.1


Re: [edk2-platforms][PATCH v2 20/32] JadePkg: Add SMBIOS tables support

Nhi Pham
 

On 6/8/21 06:00, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:12 +0700, Nhi Pham wrote:
From: Quan Nguyen <quan@os.amperecomputing.com>

This supports various SMBIOS tables type 0, 1, 2, 3, 4, 7, 8, 9, 11,
13, 16, 17, 19, 24 and 32.

SMBIOS Type 1, 2 and 3 are hardcoded as Host-BMC communication is not
supported yet. And, this module does not support fixup tables to reflect
changes of the system at booting time.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
---
Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec | 12 +
Platform/Ampere/JadePkg/Jade.dsc | 26 +
Platform/Ampere/JadePkg/Jade.fdf | 8 +
Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf | 45 +
Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf | 45 +
Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 52 +
Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.c | 709 +++++++++++++
Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c | 705 +++++++++++++
Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 1049 ++++++++++++++++++++
9 files changed, 2651 insertions(+)

diff --git a/Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec b/Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
index 0ac075047276..368136b5342f 100755
--- a/Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+++ b/Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
@@ -63,11 +63,23 @@ [PcdsFixedAtBuild]
gAmpereTokenSpaceGuid.PcdSmproNsMailboxIndex|0x1|UINT32|0x00000003
gAmpereTokenSpaceGuid.PcdPmproDbBaseReg|0x100001540000|UINT64|0x00000004
+ #
+ # SMBIOS Type 1 Pcd
+ #
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MajorVersion|0|UINT8|0x00000005
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MinorVersion|0|UINT8|0x00000006
+
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx]
#
# Firmware Volume Pcds
#
gAmpereTokenSpaceGuid.PcdFvBlockSize|0|UINT32|0xB0000001
+ #
+ # SMBIOS, default or template values
+ #
+ # SMBIOS Type 0 - BIOS Information
+ gAmpereTokenSpaceGuid.PcdSmbiosTables0BiosReleaseDate|"MM/DD/YYYY"|VOID*|0xB0000002 # Must follow this MM/DD/YYYY SMBIOS date format
+
# NVRam Pcds
gAmpereTokenSpaceGuid.PcdNvramErased|FALSE|BOOLEAN|0xB0000009
diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index 6aaa644ad298..9c7d7cad4915 100755
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -104,7 +104,22 @@ [PcdsFeatureFlag.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+[PcdsFixedAtBuild]
+!ifdef $(FIRMWARE_VER)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
+!endif
+
[PcdsFixedAtBuild.common]
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MajorVersion|$(MAJOR_VER)
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MinorVersion|$(MINOR_VER)
+
+ # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point,
+ # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the
+ # presence of the 32-bit entry point anyway (because many AARCH64 systems
+ # don't have 32-bit addressable physical RAM), and the additional allocations
+ # below 4 GB needlessly fragment the memory map. So expose the 64-bit entry
+ # point only, for entry point versions >= 3.0.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
!if $(SECURE_BOOT_ENABLE) == TRUE
# Override the default values from SecurityPkg to ensure images
@@ -114,6 +129,9 @@ [PcdsFixedAtBuild.common]
gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
!endif
+[PcdsDynamicDefault.common.DEFAULT]
+ # SMBIOS Type 0 - BIOS Information
+ gAmpereTokenSpaceGuid.PcdSmbiosTables0BiosReleaseDate|"MM/DD/YYYY"
[PcdsPatchableInModule]
#
@@ -148,3 +166,11 @@ [Components.common]
# VGA Aspeed
#
Drivers/ASpeed/ASpeedGopBinPkg/ASpeedAst2500GopDxe.inf
+
+ #
+ # SMBIOS
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+ Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf
+ Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index ef24e6f1f8e0..3d5d857178b3 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -340,4 +340,12 @@ [FV.FvMain]
INF RuleOverride=ACPITABLE Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
INF RuleOverride=ACPITABLE Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf
+ #
+ # SMBIOS
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf
+
!include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf b/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf
new file mode 100644
index 000000000000..f723ad612a52
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.inf
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = SmbiosCpuDxe
+ FILE_GUID = 4DD7C2E4-E6A6-11EA-8736-D3C56ABBB5C4
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SmbiosCpuDxeEntry
+
+[Sources]
+ SmbiosCpuDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ ArmLib
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ MemoryAllocationLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Protocols]
+ gEfiSmbiosProtocolGuid ## CONSUMED
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ gEfiSmbiosProtocolGuid
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf
new file mode 100644
index 000000000000..87b9123df856
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.inf
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = SmbiosMemInfoDxe
+ FILE_GUID = ECF38190-EBF8-11EA-B646-830715BDF83A
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SmbiosMemInfoDxeEntry
+
+[Sources]
+ SmbiosMemInfoDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ ArmLib
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ MemoryAllocationLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Protocols]
+ gEfiSmbiosProtocolGuid ## CONSUMED
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ gEfiSmbiosProtocolGuid
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
new file mode 100755
index 000000000000..73a601b0df08
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -0,0 +1,52 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = SmbiosPlatformDxe
+ FILE_GUID = F0CC7D0B-CD83-4DDA-A5D4-613AB02D4E52
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SmbiosPlatformDxeEntry
+
+[Sources]
+ SmbiosPlatformDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ MemoryAllocationLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Protocols]
+ gEfiSmbiosProtocolGuid ## CONSUMED
+
+[Pcd]
+ # Type 0
+ gAmpereTokenSpaceGuid.PcdSmbiosTables0BiosReleaseDate
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MajorVersion
+ gAmpereTokenSpaceGuid.PcdSmbiosTables1MinorVersion
+
+ gArmTokenSpaceGuid.PcdFdSize
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ gEfiSmbiosProtocolGuid
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.c b/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.c
new file mode 100644
index 000000000000..659212a2cc90
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosCpuDxe/SmbiosCpuDxe.c
@@ -0,0 +1,709 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Guid/SmBios.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmLib/ArmLibPrivate.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <PlatformInfoHob.h>
+#include <Protocol/Smbios.h>
+
+#define CPU_CACHE_LEVEL_MAX 3
+
+#define MHZ_SCALE_FACTOR 1000000
+
+#define CACHE_SIZE(x) (UINT16) (0x8000 | (x) >> 16)
+#define CACHE_SIZE_2(x) (0x80000000 | (x) >> 16)
+
+#define TYPE4_ADDITIONAL_STRINGS \
+ "SOCKET 0\0" /* socket type */ \
+ "Ampere(R)\0" /* manufacturer */ \
+ "Ampere(R) Altra(R) Processor\0" /* processor description */ \
+ "NotSet\0" /* part number */
+
+#define TYPE7_ADDITIONAL_STRINGS \
+ "L1 Cache\0" /* L1 Cache */
+
+//
+// Type definition and contents of the default SMBIOS table.
+// This table covers only the minimum structures required by
+// the SMBIOS specification (section 6.2, version 3.0)
+//
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE4 Base;
+ CHAR8 Strings[sizeof (TYPE4_ADDITIONAL_STRINGS)];
+} ARM_TYPE4;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE7 Base;
+ CHAR8 Strings[sizeof (TYPE7_ADDITIONAL_STRINGS)];
+} ARM_TYPE7;
+
+#pragma pack()
+//-------------------------------------
+// SMBIOS Platform Common
+//-------------------------------------
+enum {
+ ADDITIONAL_STR_INDEX_1 = 1,
+ ADDITIONAL_STR_INDEX_2,
+ ADDITIONAL_STR_INDEX_3,
+ ADDITIONAL_STR_INDEX_4,
+ ADDITIONAL_STR_INDEX_5,
+ ADDITIONAL_STR_INDEX_6,
+ ADDITIONAL_STR_INDEX_7,
+ ADDITIONAL_STR_INDEX_8,
+ ADDITIONAL_STR_INDEX_9,
+ ADDITIONAL_STR_INDEX_MAX
+};
+
+// Type 4 Processor Socket 0
+STATIC ARM_TYPE4 mArmDefaultType4Sk0 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // socket type
+ 3, // processor type CPU
+ ProcessorFamilyIndicatorFamily2, // processor family, acquire from field2
+ ADDITIONAL_STR_INDEX_2, // manufacturer
+ {{0,},{0.}}, // processor id
+ ADDITIONAL_STR_INDEX_3, // version
+ {0,0,0,0,0,1}, // voltage
+ 0, // external clock
+ 3000, // max speed
+ 3000, // current speed
+ 0x41, // status
+ ProcessorUpgradeOther,
+ 0xFFFF, // l1 cache handle
+ 0xFFFF, // l2 cache handle
+ 0xFFFF, // l3 cache handle
+ 0, // serial not set
+ 0, // asset not set
+ ADDITIONAL_STR_INDEX_4, // part number
+ 80, // core count in socket
+ 80, // enabled core count in socket
+ 0, // threads per socket
+ 0xEC, // processor characteristics
+ ProcessorFamilyARMv8, // ARM core
+ },
+ TYPE4_ADDITIONAL_STRINGS
+};
+
+// Type 4 Processor Socket 1
+STATIC ARM_TYPE4 mArmDefaultType4Sk1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // socket type
+ 3, // processor type CPU
+ ProcessorFamilyIndicatorFamily2, // processor family, acquire from field2
+ ADDITIONAL_STR_INDEX_2, // manufacturer
+ {{0,},{0.}}, // processor id
+ ADDITIONAL_STR_INDEX_3, // version
+ {0,0,0,0,0,1}, // voltage
+ 0, // external clock
+ 3000, // max speed
+ 3000, // current speed
+ 0x41, // status
+ ProcessorUpgradeOther,
+ 0xFFFF, // l1 cache handle
+ 0xFFFF, // l2 cache handle
+ 0xFFFF, // l3 cache handle
+ 0, // serial not set
+ 0, // asset not set
+ ADDITIONAL_STR_INDEX_4, // part number
+ 80, // core count in socket
+ 80, // enabled core count in socket
+ 0, // threads per socket
+ 0xEC, // processor characteristics
+ ProcessorFamilyARMv8, // ARM core
+ },
+ TYPE4_ADDITIONAL_STRINGS
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk0L1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x180, // L1 enabled, Write Back
+ 0x8001, // 64k i cache max
+ 0x8001, // 64k installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorParity, // parity checking
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity4Way, // 4-way
+ },
+ "L1 Cache\0"
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk0L2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x181, // L2 enabled, Write Back
+ 0x8010, // 1M cache max
+ 0x8010, // 1M installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorSingleBit, // single bit ECC
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity8Way, // 8-way
+ },
+ "L2 Cache\0"
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk0L3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x182, // L3 enabled, Write Back
+ 0x8200, // 32M cache max
+ 0x8200, // 32M installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorParity, // parity checking
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity16Way, // 16-way
+ },
+ "L3 Cache\0"
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk1L1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x180, // L1 enabled, Write Back
+ 0x8001, // 64k i cache max
+ 0x8001, // 64k installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorParity, // parity checking
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity4Way, // 4-way
+ },
+ "L1 Cache\0"
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk1L2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x181, // L2 enabled, Write Back
+ 0x8010, // 1M cache max
+ 0x8010, // 1M installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorSingleBit, // single bit ECC
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity8Way, // 8-way
+ },
+ "L2 Cache\0"
+};
+
+// Type 7 Cache Information
+STATIC ARM_TYPE7 mArmDefaultType7Sk1L3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ 0x182, // L3 enabled, Write Back
+ 0x8200, // 32M cache max
+ 0x8200, // 32M installed
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ {0, 0, 0, 0, 0, 1}, // SRAM type
+ 0, // unkown speed
+ CacheErrorParity, // parity checking
+ CacheTypeUnified, // Unified cache
+ CacheAssociativity16Way, // 16-way
+ },
+ "L3 Cache\0"
+};
+
+STATIC CONST VOID *DefaultCommonTables[] =
+{
+ &mArmDefaultType4Sk0,
+ &mArmDefaultType4Sk1,
+ NULL
+};
+
+STATIC CONST VOID *DefaultType7Sk0Tables[] =
+{
+ &mArmDefaultType7Sk0L1,
+ &mArmDefaultType7Sk0L2,
+ &mArmDefaultType7Sk0L3,
+ NULL
+};
+
+STATIC CONST VOID *DefaultType7Sk1Tables[] =
+{
+ &mArmDefaultType7Sk1L1,
+ &mArmDefaultType7Sk1L2,
+ &mArmDefaultType7Sk1L3,
+ NULL
+};
+
+STATIC
+UINT32
+GetCacheConfig (
+ UINT32 Level
+ )
+{
+ UINT64 Val;
+ BOOLEAN SupportWB;
+ BOOLEAN SupportWT;
+
+ Val = ReadCCSIDR (Level);
+ SupportWT = (Val & (1 << 31)) ? TRUE : FALSE;
+ SupportWB = (Val & (1 << 30)) ? TRUE : FALSE;
+ if (SupportWT && SupportWB) {
+ return 2; /* Varies with Memory Address */
+ }
+
+ if (SupportWT) {
+ return 0;
+ }
+
+ return 1; /* WB */
+}
+
+STATIC
+UINTN
+GetStringPackSize (
+ CHAR8 *StringPack
+ )
+{
+ UINTN StrCount;
+ CHAR8 *StrStart;
+
+ if ((*StringPack == 0) && (*(StringPack + 1) == 0)) {
+ return 0;
+ }
+
+ // String section ends in double-null (0000h)
+ for (StrCount = 0, StrStart = StringPack;
+ ((*StrStart != 0) || (*(StrStart + 1) != 0)); StrStart++, StrCount++)
+ {
+ }
+
+ return StrCount + 2; // Included the double NULL
+}
+
+// Update String at String number to String Pack
+EFI_STATUS
+UpdateStringPack (
+ CHAR8 *StringPack,
+ CHAR8 *String,
+ UINTN StringNumber
+ )
+{
+ CHAR8 *StrStart;
+ UINTN StrIndex;
+ UINTN InputStrLen;
+ UINTN TargetStrLen;
+ UINTN BufferSize;
+ CHAR8 *Buffer;
+
+ StrStart = StringPack;
+ for (StrIndex = 1; StrIndex < StringNumber; StrStart++) {
+ // A string ends in 00h
+ if (*StrStart == 0) {
+ StrIndex++;
+ }
+ // String section ends in double-null (0000h)
+ if ((*StrStart == 0) && (*(StrStart + 1) == 0)) {
+ return EFI_NOT_FOUND;
+ }
+ }
+
+ if (*StrStart == 0) {
+ StrStart++;
+ }
+
+ InputStrLen = AsciiStrLen (String);
+ TargetStrLen = AsciiStrLen (StrStart);
+ BufferSize = GetStringPackSize (StrStart + TargetStrLen + 1);
+
+ // Replace the String if length matched
+ // OR this is the last string
+ if (InputStrLen == TargetStrLen || (BufferSize == 0)) {
+ CopyMem (StrStart, String, InputStrLen);
+ }
+ // Otherwise, buffer is needed to apply new string
+ else {
Move else to same line as {

Apart from that, with the understanding that this is a work in
progress, but provides some value already:

Reviewed-by: Leif Lindholm <leif@nuviainc.com>

For the improvement works, I would appreciate if you could look at
what we've done so far both with regards to ArmPkg/Universal/Smbios
and the helper functions added for that, to see how we could reduce
the amount of platform-specific code.
Because the cache-related functions/definitions in the AmpereCpuLib will be replaced by ArmLib so I'm going to replace the SmbiosCpuDxe by ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf in the v3.

Other SMBIOS Types will be improved in the future.

Best regards,

Nhi


/
Leif

+ Buffer = AllocateZeroPool (BufferSize);
+ if (Buffer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ CopyMem (Buffer, StrStart + TargetStrLen + 1, BufferSize);
+ CopyMem (StrStart, String, InputStrLen + 1);
+ CopyMem (StrStart + InputStrLen + 1, Buffer, BufferSize);
+
+ FreePool (Buffer);
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+UpdateSmbiosType4 (
+ PLATFORM_INFO_HOB *PlatformHob
+ )
+{
+ UINTN Index;
+ CHAR8 Str[40];
+ CHAR8 *StringPack;
+ SMBIOS_TABLE_TYPE4 *Table;
+
+ ASSERT (PlatformHob != NULL);
+
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ if (Index == 0) {
+ Table = &mArmDefaultType4Sk0.Base;
+ StringPack = mArmDefaultType4Sk0.Strings;
+ } else {
+ Table = &mArmDefaultType4Sk1.Base;
+ StringPack = mArmDefaultType4Sk1.Strings;
+ }
+
+ AsciiSPrint (Str, sizeof (Str), "CPU %d", Index);
+ UpdateStringPack (StringPack, Str, ADDITIONAL_STR_INDEX_1);
+
+ Table->CoreCount = (UINT8)GetMaximumNumberOfCores ();
+ Table->ThreadCount = (UINT8)GetMaximumNumberOfCores ();
+ Table->EnabledCoreCount = (UINT8)GetNumberOfActiveCoresPerSocket (Index);
+
+ if (Table->EnabledCoreCount) {
+ Table->CurrentSpeed = (UINT16)(PlatformHob->CpuClk / MHZ_SCALE_FACTOR);
+ Table->ExternalClock = (UINT16)(PlatformHob->PcpClk / MHZ_SCALE_FACTOR);
+ Table->MaxSpeed = (UINT16)(PlatformHob->CpuClk / MHZ_SCALE_FACTOR);
+ if (PlatformHob->TurboCapability[Index]) {
+ Table->MaxSpeed = (UINT16)(PlatformHob->TurboFrequency[Index]);
+ }
+ } else {
+ Table->CurrentSpeed = 0;
+ Table->ExternalClock = 0;
+ Table->MaxSpeed = 0;
+ Table->Status = 0;
+ }
+
+ *((UINT32 *)&Table->ProcessorId) = (UINT32)ArmReadMidr ();
+ *((UINT32 *)&Table->ProcessorId + 1) = 0;
+ *((UINT8 *)&Table->Voltage) = 0x80 | PlatformHob->CoreVoltage[Index] / 100;
+
+ /* Type 4 Part number */
+ if (Table->EnabledCoreCount) {
+ if ((PlatformHob->ScuProductId[Index] & 0xff) == 0x01) {
+ AsciiSPrint (
+ Str,
+ sizeof (Str),
+ "Q%02d-%02X",
+ PlatformHob->SkuMaxCore[Index],
+ PlatformHob->SkuMaxTurbo[Index]
+ );
+ } else {
+ AsciiSPrint (
+ Str,
+ sizeof (Str),
+ "M%02d%02X",
+ PlatformHob->SkuMaxCore[Index],
+ PlatformHob->SkuMaxTurbo[Index]
+ );
+ }
+
+ UpdateStringPack (StringPack, Str, ADDITIONAL_STR_INDEX_4);
+ }
+ }
+}
+
+STATIC
+VOID
+UpdateSmbiosType7 (
+ PLATFORM_INFO_HOB *PlatformHob
+ )
+{
+ UINTN Index;
+ SMBIOS_TABLE_TYPE7 *Table;
+
+ ASSERT (PlatformHob != NULL);
+
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ if (Index == 0) {
+ Table = &mArmDefaultType7Sk0L1.Base;
+ } else {
+ Table = &mArmDefaultType7Sk1L1.Base;
+ }
+
+ Table->Associativity = (UINT8)CpuGetAssociativity (1);
+ Table->CacheConfiguration = (1 << 7 | GetCacheConfig (1) << 8); /* Enabled, Internal, L1 */
+ Table->MaximumCacheSize = CACHE_SIZE (CpuGetCacheSize (1));
+ Table->InstalledSize = CACHE_SIZE (CpuGetCacheSize (1));
+ Table->MaximumCacheSize2 = CACHE_SIZE_2 (CpuGetCacheSize (1));
+ Table->InstalledSize2 = CACHE_SIZE_2 (CpuGetCacheSize (1));
+
+ if (Index == 0) {
+ Table = &mArmDefaultType7Sk0L2.Base;
+ } else {
+ Table = &mArmDefaultType7Sk1L2.Base;
+ }
+
+ Table->Associativity = (UINT8)CpuGetAssociativity (2);
+ Table->CacheConfiguration = (1 << 7 | GetCacheConfig (2) << 8 | 1); /* Enabled, Internal, L2 */
+ Table->MaximumCacheSize = CACHE_SIZE (CpuGetCacheSize (2));
+ Table->InstalledSize = CACHE_SIZE (CpuGetCacheSize (2));
+ Table->MaximumCacheSize2 = CACHE_SIZE_2 (CpuGetCacheSize (2));
+ Table->InstalledSize2 = CACHE_SIZE_2 (CpuGetCacheSize (2));
+
+ if (Index == 0) {
+ Table = &mArmDefaultType7Sk0L3.Base;
+ } else {
+ Table = &mArmDefaultType7Sk1L3.Base;
+ }
+
+ // CpuGetCacheSize() not return L3 size, set it to 32MB
+ Table->MaximumCacheSize = CACHE_SIZE (32 << 20);
+ Table->InstalledSize = CACHE_SIZE (32 << 20);
+ Table->MaximumCacheSize2 = CACHE_SIZE_2 (32 << 20);
+ Table->InstalledSize2 = CACHE_SIZE_2 (32 << 20);
+ }
+
+ if (GetNumberOfSupportedSockets () == 2 && GetNumberOfActiveCoresPerSocket (1) == 0) {
+ mArmDefaultType7Sk1L1.Base.InstalledSize = 0;
+ mArmDefaultType7Sk1L1.Base.InstalledSize2 = 0;
+ mArmDefaultType7Sk1L2.Base.InstalledSize = 0;
+ mArmDefaultType7Sk1L2.Base.InstalledSize2 = 0;
+ mArmDefaultType7Sk1L3.Base.InstalledSize = 0;
+ mArmDefaultType7Sk1L3.Base.InstalledSize2 = 0;
+ }
+
+}
+
+STATIC
+VOID
+UpdateSmbiosInfo (
+ VOID
+ )
+{
+ VOID *Hob;
+ PLATFORM_INFO_HOB *PlatformHob;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ ASSERT (Hob != NULL);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ UpdateSmbiosType4 (PlatformHob);
+ UpdateSmbiosType7 (PlatformHob);
+}
+
+/**
+ Install SMBIOS Type 7 table
+
+ @param Smbios SMBIOS protocol.
+**/
+EFI_STATUS
+InstallType7Structures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE4 *Type4Table;
+ CONST VOID **Tables;
+ UINTN Index;
+ UINTN Level;
+
+ for ( Index = 0; Index < GetNumberOfSupportedSockets (); Index++ ) {
+ if ( Index == 0) {
+ Tables = DefaultType7Sk0Tables;
+ Type4Table = &mArmDefaultType4Sk0.Base;
+ } else {
+ Tables = DefaultType7Sk1Tables;
+ Type4Table = &mArmDefaultType4Sk1.Base;
+ }
+
+ for (Level = 0; Level < CPU_CACHE_LEVEL_MAX; Level++ ) {
+ SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *)Tables[Level])->Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)Tables[Level]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: adding SMBIOS type 7 Socket %d L%d cache failed\n",
+ __FUNCTION__,
+ Index,
+ Level + 1
+ ));
+ // stop adding rather than continuing
+ return Status;
+ }
+
+ // Save handle to Type 4
+ if (Level == 0) { // L1 cache
+ Type4Table->L1CacheHandle = SmbiosHandle;
+ } else if (Level == 1) { // L2 cache
+ Type4Table->L2CacheHandle = SmbiosHandle;
+ } else if (Level == 2) { // L3 cache
+ Type4Table->L3CacheHandle = SmbiosHandle;
+ }
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install a whole table worth of structructures
+
+ @param Smbios SMBIOS protocol.
+ @param DefaultTables A pointer to the default SMBIOS table structure.
+**/
+EFI_STATUS
+InstallStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios,
+ IN CONST VOID *DefaultTables[]
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINTN Index;
+
+ for (Index = 0; Index < GetNumberOfSupportedSockets () && DefaultTables[Index] != NULL; Index++) {
+ SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *)DefaultTables[Index])->Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)DefaultTables[Index]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: adding %d failed\n", __FUNCTION__, Index));
+
+ // stop adding rather than continuing
+ return Status;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install all structures from the DefaultTables structure
+
+ @param Smbios SMBIOS protocol
+
+**/
+EFI_STATUS
+InstallAllStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ UpdateSmbiosInfo ();
+
+ // Install Type 7 structures
+ InstallType7Structures (Smbios);
+
+ // Install Tables
+ Status = InstallStructures (Smbios, DefaultCommonTables);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+SmbiosCpuDxeEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+
+ //
+ // Find the SMBIOS protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ (VOID **)&Smbios
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate SMBIOS Protocol"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ Status = InstallAllStructures (Smbios);
+ DEBUG ((DEBUG_ERROR, "SmbiosCpu install: %r\n", Status));
+
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c
new file mode 100644
index 000000000000..a262239b53ba
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c
@@ -0,0 +1,705 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Guid/SmBios.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <PlatformInfoHob.h>
+#include <Protocol/Smbios.h>
+
+#define TYPE16_ADDITIONAL_STRINGS \
+ "\0" /* no string*/
+
+#define TYPE17_ADDITIONAL_STRINGS \
+ "Device Locator not set \0" \
+ "Bank Locator not set \0" \
+ "Manufacturer not set \0" \
+ "Serial Number not set \0" \
+ "Asset Tag not set \0" \
+ "Part Number not set \0" \
+
+#define TYPE19_ADDITIONAL_STRINGS \
+ "\0" /* no string */
+
+//
+// Type definition and contents of the default SMBIOS table.
+// This table covers only the minimum structures required by
+// the SMBIOS specification (section 6.2, version 3.0)
+//
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE16 Base;
+ CHAR8 Strings[sizeof (TYPE16_ADDITIONAL_STRINGS)];
+} ARM_TYPE16;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE17 Base;
+ CHAR8 Strings[sizeof (TYPE17_ADDITIONAL_STRINGS)];
+} ARM_TYPE17;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE19 Base;
+ CHAR8 Strings[sizeof (TYPE19_ADDITIONAL_STRINGS)];
+} ARM_TYPE19;
+
+#pragma pack()
+// Type 16 Physical Memory Array
+STATIC ARM_TYPE16 mArmDefaultType16 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE16), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ MemoryArrayLocationSystemBoard, // on motherboard
+ MemoryArrayUseSystemMemory, // system RAM
+ MemoryErrorCorrectionMultiBitEcc, // ECC RAM
+ 0x80000000,
+ 0xFFFE, // No error information structure
+ 0x10,
+ 0x40000000000ULL,
+ },
+ TYPE16_ADDITIONAL_STRINGS
+};
+
+// Type 17 Memory Device
+STATIC ARM_TYPE17 mArmDefaultType17 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE,
+ sizeof (SMBIOS_TABLE_TYPE17),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 0xFFFF, // array to which this module belongs
+ 0xFFFE, // no errors
+ 72, // single DIMM with ECC
+ 64, // data width of this device (64-bits)
+ 0, // no module installed
+ 0x09, // DIMM
+ 1, // part of a set
+ 1, // device locator
+ 2, // bank locator
+ MemoryTypeDdr4, // DDR4
+ {}, // type detail
+ 0, // ? MHz
+ 3, // manufacturer
+ 4, // serial
+ 5, // asset tag
+ 6, // part number
+ 0, // rank
+ },
+ TYPE17_ADDITIONAL_STRINGS
+};
+
+// Type 19 Memory Array Mapped Address
+STATIC ARM_TYPE19 mArmDefaultType19 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS,
+ sizeof (SMBIOS_TABLE_TYPE19),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 0xFFFFFFFF, // invalid, look at extended addr field
+ 0xFFFFFFFF,
+ 0xFFFF, // handle
+ 1,
+ 0x0,
+ 0x0,
+ },
+ TYPE19_ADDITIONAL_STRINGS
+};
+
+typedef struct _JEDEC_MF_ID {
+ UINT8 VendorId;
+ CHAR8 *ManufacturerString;
+} JEDEC_MF_ID;
+
+JEDEC_MF_ID Bank0Table[] = {
+ { 0x01, "AMD" },
+ { 0x04, "Fujitsu" },
+ { 0x07, "Hitachi" },
+ { 0x89, "Intel" },
+ { 0x10, "NEC" },
+ { 0x97, "Texas Instrument" },
+ { 0x98, "Toshiba" },
+ { 0x1c, "Mitsubishi" },
+ { 0x1f, "Atmel" },
+ { 0x20, "STMicroelectronics" },
+ { 0xa4, "IBM" },
+ { 0x2c, "Micron Technology" },
+ { 0xad, "SK Hynix" },
+ { 0xb0, "Sharp" },
+ { 0xb3, "IDT" },
+ { 0x3e, "Oracle" },
+ { 0xbf, "SST" },
+ { 0x40, "ProMos/Mosel" },
+ { 0xc1, "Infineon" },
+ { 0xc2, "Macronix" },
+ { 0x45, "SanDisk" },
+ { 0xce, "Samsung" },
+ { 0xda, "Winbond" },
+ { 0xe0, "LG Semi" },
+ { 0x62, "Sanyo" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank1Table[] = {
+ { 0x98, "Kingston" },
+ { 0xba, "PNY" },
+ { 0x4f, "Transcend" },
+ { 0x7a, "Apacer" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank2Table[] = {
+ { 0x9e, "Corsair" },
+ { 0xfe, "Elpida" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank3Table[] = {
+ { 0x0b, "Nanya" },
+ { 0x94, "Mushkin" },
+ { 0x25, "Kingmax" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank4Table[] = {
+ { 0xb0, "OCZ" },
+ { 0xcb, "A-DATA" },
+ { 0xcd, "G Skill" },
+ { 0xef, "Team" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank5Table[] = {
+ { 0x02, "Patriot" },
+ { 0x9b, "Crucial" },
+ { 0x51, "Qimonda" },
+ { 0x57, "AENEON" },
+ { 0xf7, "Avant" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank6Table[] = {
+ { 0x34, "Super Talent" },
+ { 0xd3, "Silicon Power" },
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID Bank7Table[] = {
+ { 0xff, "Undefined" }
+};
+
+JEDEC_MF_ID *ManufacturerJedecIdBankTable[] = {
+ Bank0Table,
+ Bank1Table,
+ Bank2Table,
+ Bank3Table,
+ Bank4Table,
+ Bank5Table,
+ Bank6Table,
+ Bank7Table
+};
+
+STATIC
+UINTN
+GetStringPackSize (
+ CHAR8 *StringPack
+ )
+{
+ UINTN StrCount;
+ CHAR8 *StrStart;
+
+ if ((*StringPack == 0) && (*(StringPack + 1) == 0)) {
+ return 0;
+ }
+
+ // String section ends in double-null (0000h)
+ for (StrCount = 0, StrStart = StringPack;
+ ((*StrStart != 0) || (*(StrStart + 1) != 0)); StrStart++, StrCount++)
+ {
+ }
+
+ return StrCount + 2; // Included the double NULL
+}
+
+// Update String at String number to String Pack
+EFI_STATUS
+UpdateStringPack (
+ CHAR8 *StringPack,
+ CHAR8 *String,
+ UINTN StringNumber
+ )
+{
+ CHAR8 *StrStart;
+ UINTN StrIndex;
+ UINTN InputStrLen;
+ UINTN TargetStrLen;
+ UINTN BufferSize;
+ CHAR8 *Buffer;
+
+ StrStart = StringPack;
+ for (StrIndex = 1; StrIndex < StringNumber; StrStart++) {
+ // A string ends in 00h
+ if (*StrStart == 0) {
+ StrIndex++;
+ }
+ // String section ends in double-null (0000h)
+ if ((*StrStart == 0) && (*(StrStart + 1) == 0)) {
+ return EFI_NOT_FOUND;
+ }
+ }
+
+ if (*StrStart == 0) {
+ StrStart++;
+ }
+
+ InputStrLen = AsciiStrLen (String);
+ TargetStrLen = AsciiStrLen (StrStart);
+ BufferSize = GetStringPackSize (StrStart + TargetStrLen + 1);
+
+ // Replace the String if length matched
+ // OR this is the last string
+ if ((InputStrLen == TargetStrLen) || (BufferSize == 0)) {
+ CopyMem (StrStart, String, InputStrLen);
+ }
+ // Otherwise, buffer is needed to apply new string
+ else {
+ Buffer = AllocateZeroPool (BufferSize);
+ if (Buffer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ CopyMem (Buffer, StrStart + TargetStrLen + 1, BufferSize);
+ CopyMem (StrStart, String, InputStrLen + 1);
+ CopyMem (StrStart + InputStrLen + 1, Buffer, BufferSize);
+
+ FreePool (Buffer);
+ }
+
+ return EFI_SUCCESS;
+}
+
+UINT8
+GetMemoryType (
+ IN UINT8 *SpdData
+ )
+{
+ return (SpdData[2] == 0x08) ? 1 : // DDR2
+ (SpdData[2] == 0x0B) ? 2 : // DDR3
+ (SpdData[2] == 0x0C) ? 3 : 0; // DDR4
+}
+
+EFI_STATUS
+UpdateManufacturer (
+ IN VOID *Table,
+ IN UINT8 *SpdData
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN i;
+ UINT8 Data8;
+ UINT8 MemType;
+ JEDEC_MF_ID *IdTblPtr = NULL;
+
+ MemType = GetMemoryType (SpdData);
+
+ switch (MemType) {
+ case 1:
+ for (i = 0; i < 8; i++) { // DDR2
+ Data8 = SpdData[64 + i];
+ if (Data8 != 0x7f) {
+ break;
+ }
+ }
+ break;
+
+ case 2: // DDR3
+ i = SpdData[117] & 0x7f; // Remove parity bit
+ Data8 = SpdData[118];
+ break;
+
+ case 3: // DDR4
+ i = SpdData[320] & 0x7f; // Remove parity bit
+ Data8 = SpdData[321];
+ break;
+
+ default:
+ return EFI_UNSUPPORTED; // Not supported
+ }
+
+ if (i > 7) {
+ i = 7;
+ }
+ IdTblPtr = ManufacturerJedecIdBankTable[i];
+
+ // Search in Manufacturer table
+ while ((IdTblPtr->VendorId != Data8) && (IdTblPtr->VendorId != 0xff)) {
+ IdTblPtr++;
+ }
+
+ if (IdTblPtr->VendorId != 0xff) {
+ Status = UpdateStringPack (
+ ((ARM_TYPE17 *)Table)->Strings,
+ IdTblPtr->ManufacturerString,
+ ((ARM_TYPE17 *)Table)->Base.Manufacturer
+ );
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+UpdateSerialNumber (
+ IN VOID *Table,
+ IN UINT8 *SpdData
+ )
+{
+ UINT8 MemType;
+ UINTN Offset;
+ CHAR8 Str[64];
+
+ MemType = GetMemoryType (SpdData);
+
+ switch (MemType) {
+ case 1:
+ Offset = 95;
+ break;
+
+ case 2: // DDR3
+ Offset = 122;
+ break;
+
+ case 3: // DDR4
+ Offset = 325;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED; // Not supported
+ }
+
+ AsciiSPrint (
+ Str,
+ sizeof (Str),
+ "%02X%02X%02X%02X",
+ SpdData[Offset],
+ SpdData[Offset + 1],
+ SpdData[Offset + 2],
+ SpdData[Offset + 3]
+ );
+
+ return UpdateStringPack (
+ ((ARM_TYPE17 *)Table)->Strings,
+ Str,
+ ((ARM_TYPE17 *)Table)->Base.SerialNumber
+ );
+}
+
+CHAR8
+Printable (
+ IN CHAR8 Character
+ )
+{
+ if((Character >= 0x20) && (Character <= 0x7E)) {
+ return Character;
+ }
+
+ return ' ';
+}
+
+EFI_STATUS
+UpdatePartNumber (
+ IN VOID *Table,
+ IN UINT8 *SpdData
+ )
+{
+ UINT8 MemType;
+ UINTN Offset;
+ CHAR8 Str[64];
+
+ MemType = GetMemoryType (SpdData);
+
+ switch (MemType) {
+ case 1:
+ Offset = 73;
+ break;
+
+ case 2: // DDR3
+ Offset = 128;
+ break;
+
+ case 3: // DDR4
+ Offset = 329;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED; // Not supported
+ }
+
+ AsciiSPrint (
+ Str,
+ sizeof (Str),
+ "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
+ Printable (SpdData[Offset]),
+ Printable (SpdData[Offset + 1]),
+ Printable (SpdData[Offset + 2]),
+ Printable (SpdData[Offset + 3]),
+ Printable (SpdData[Offset + 4]),
+ Printable (SpdData[Offset + 5]),
+ Printable (SpdData[Offset + 6]),
+ Printable (SpdData[Offset + 7]),
+ Printable (SpdData[Offset + 8]),
+ Printable (SpdData[Offset + 9]),
+ Printable (SpdData[Offset + 10]),
+ Printable (SpdData[Offset + 11]),
+ Printable (SpdData[Offset + 12]),
+ Printable (SpdData[Offset + 13]),
+ Printable (SpdData[Offset + 14]),
+ Printable (SpdData[Offset + 15]),
+ Printable (SpdData[Offset + 16]),
+ Printable (SpdData[Offset + 17])
+ );
+
+ return UpdateStringPack (
+ ((ARM_TYPE17 *)Table)->Strings,
+ Str,
+ ((ARM_TYPE17 *)Table)->Base.PartNumber
+ );
+}
+
+/**
+ Install SMBIOS Type 16 17 and 19 table
+
+ @param Smbios SMBIOS protocol.
+**/
+EFI_STATUS
+InstallMemStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ EFI_SMBIOS_HANDLE Type16Handle;
+ PLATFORM_INFO_HOB *PlatformHob;
+ PLATFORM_DIMM *Dimm;
+ CHAR8 *Table;
+ VOID *Hob;
+ UINTN Index;
+ UINTN SlotIndex;
+ UINTN MemRegionIndex;
+ UINT64 MemorySize = 0;
+ CHAR8 Str[64];
+
+ ASSERT (Smbios != NULL);
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ ASSERT (Hob != NULL);
+ if (Hob == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ Table = AllocateZeroPool (sizeof (ARM_TYPE17));
+ if (Table == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for ( Index = 0; Index < GetNumberOfSupportedSockets (); Index++ ) {
+ // Copy template to Type 16
+ CopyMem (Table, (VOID *)&mArmDefaultType16, sizeof (ARM_TYPE16));
+
+ ((ARM_TYPE16 *)Table)->Base.MaximumCapacity = 0x80000000;
+ ((ARM_TYPE16 *)Table)->Base.ExtendedMaximumCapacity = 0x40000000000ULL; /* 4TB per socket */
+ ((ARM_TYPE16 *)Table)->Base.MemoryErrorCorrection = MemoryErrorCorrectionMultiBitEcc;
+
+ // Install Type 16 and hold the handle so that the subsequence type17/19 could use
+ Type16Handle = ((ARM_TYPE16 *)Table)->Base.Hdr.Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &Type16Handle,
+ (EFI_SMBIOS_TABLE_HEADER *)Table
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: adding SMBIOS type 16 socket %d failed\n", __FUNCTION__, Index));
+ FreePool (Table);
+ // stop adding rather than continuing
+ return Status;
+ }
+
+ for (SlotIndex = 0; SlotIndex < PlatformHob->DimmList.BoardDimmSlots; SlotIndex++) {
+ // Copy Tempplate to Type 17
+ CopyMem (Table, (VOID *)&mArmDefaultType17, sizeof (ARM_TYPE17));
+
+ // Fill up type 17 table's content here
+ Dimm = &PlatformHob->DimmList.Dimm[SlotIndex];
+ if (Dimm->NodeId != Index) {
+ continue;
+ }
+
+ if (Dimm->Info.DimmStatus == DIMM_INSTALLED_OPERATIONAL) {
+
+ UpdateManufacturer ((VOID *)Table, Dimm->SpdData.Data);
+ UpdateSerialNumber ((VOID *)Table, Dimm->SpdData.Data);
+ UpdatePartNumber ((VOID *)Table, Dimm->SpdData.Data);
+
+ MemorySize = Dimm->Info.DimmSize * 1024;
+ if (MemorySize >= 0x7FFF) {
+ ((ARM_TYPE17 *)Table)->Base.Size = 0x7FFF;
+ ((ARM_TYPE17 *)Table)->Base.ExtendedSize = MemorySize;
+ } else {
+ ((ARM_TYPE17 *)Table)->Base.Size = (UINT16)MemorySize;
+ ((ARM_TYPE17 *)Table)->Base.ExtendedSize = 0;
+ }
+
+ ((ARM_TYPE17 *)Table)->Base.MemoryType = 0x1A; /* DDR4 */
+ ((ARM_TYPE17 *)Table)->Base.Speed = (UINT16)PlatformHob->DramInfo.MaxSpeed;
+ ((ARM_TYPE17 *)Table)->Base.ConfiguredMemoryClockSpeed = (UINT16)PlatformHob->DramInfo.MaxSpeed;
+ ((ARM_TYPE17 *)Table)->Base.Attributes = Dimm->Info.DimmNrRank & 0x0F;
+ ((ARM_TYPE17 *)Table)->Base.ConfiguredVoltage = 1200;
+ ((ARM_TYPE17 *)Table)->Base.MinimumVoltage = 1140;
+ ((ARM_TYPE17 *)Table)->Base.MaximumVoltage = 1260;
+ ((ARM_TYPE17 *)Table)->Base.DeviceSet = 0; // None
+
+ if (Dimm->Info.DimmType == UDIMM || Dimm->Info.DimmType == SODIMM) {
+ ((ARM_TYPE17 *)Table)->Base.TypeDetail.Unbuffered = 1; /* BIT 14: unregistered */
+ } else if (Dimm->Info.DimmType == RDIMM
+ || Dimm->Info.DimmType == LRDIMM
+ || Dimm->Info.DimmType == RSODIMM)
+ {
+ ((ARM_TYPE17 *)Table)->Base.TypeDetail.Registered = 1; /* BIT 13: registered */
+ }
+ /* FIXME: Determine if need to set technology to NVDIMM-* when supported */
+ ((ARM_TYPE17 *)Table)->Base.MemoryTechnology = 0x3; // DRAM
+ }
+ AsciiSPrint (Str, sizeof (Str), "Socket %d DIMM %d", Index, SlotIndex);
+ UpdateStringPack (((ARM_TYPE17 *)Table)->Strings, Str, ((ARM_TYPE17 *)Table)->Base.DeviceLocator);
+ AsciiSPrint (Str, sizeof (Str), "Bank %d", SlotIndex);
+ UpdateStringPack (((ARM_TYPE17 *)Table)->Strings, Str, ((ARM_TYPE17 *)Table)->Base.BankLocator);
+ AsciiSPrint (Str, sizeof (Str), "Array %d Asset Tag %d", Index, SlotIndex);
+ UpdateStringPack (((ARM_TYPE17 *)Table)->Strings, Str, ((ARM_TYPE17 *)Table)->Base.AssetTag);
+
+ // Update Type 16 handle
+ ((ARM_TYPE17 *)Table)->Base.MemoryArrayHandle = Type16Handle;
+
+ // Install structure
+ SmbiosHandle = ((ARM_TYPE17 *)Table)->Base.Hdr.Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)Table
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: adding SMBIOS type 17 Socket %d Slot %d failed\n",
+ __FUNCTION__,
+ Index,
+ SlotIndex
+ ));
+ FreePool (Table);
+ // stop adding rather than continuing
+ return Status;
+ }
+ }
+
+ for (MemRegionIndex = 0; MemRegionIndex < PlatformHob->DramInfo.NumRegion; MemRegionIndex++) {
+ // Copy Tempplate to Type 19
+ CopyMem (Table, (VOID *)&mArmDefaultType19, sizeof (ARM_TYPE19));
+
+ if (PlatformHob->DramInfo.NvdRegion[MemRegionIndex] > 0
+ || PlatformHob->DramInfo.Socket[MemRegionIndex] != Index)
+ {
+ continue;
+ }
+
+ ((ARM_TYPE19 *)Table)->Base.StartingAddress = 0xFFFFFFFF;
+ ((ARM_TYPE19 *)Table)->Base.EndingAddress = 0xFFFFFFFF;
+ ((ARM_TYPE19 *)Table)->Base.ExtendedStartingAddress = PlatformHob->DramInfo.Base[MemRegionIndex];
+ ((ARM_TYPE19 *)Table)->Base.ExtendedEndingAddress = PlatformHob->DramInfo.Base[MemRegionIndex] +
+ PlatformHob->DramInfo.Size[MemRegionIndex] - 1;
+
+ if (MemorySize != 0) {
+ ((ARM_TYPE19 *)Table)->Base.PartitionWidth = (PlatformHob->DramInfo.Size[MemRegionIndex] - 1) / MemorySize + 1;
+ }
+
+ // Update Type 16 handle
+ ((ARM_TYPE19 *)Table)->Base.MemoryArrayHandle = Type16Handle;
+
+ // Install structure
+ SmbiosHandle = ((ARM_TYPE19 *)Table)->Base.Hdr.Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)Table
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: adding SMBIOS type 19 Socket %d MemRegion %d failed\n",
+ __FUNCTION__,
+ Index,
+ MemRegionIndex
+ ));
+ FreePool (Table);
+ // stop adding rather than continuing
+ return Status;
+ }
+ }
+ }
+
+ FreePool (Table);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+SmbiosMemInfoDxeEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+
+ //
+ // Find the SMBIOS protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ (VOID **)&Smbios
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate SMBIOS Protocol"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ Status = InstallMemStructures (Smbios);
+ DEBUG ((DEBUG_ERROR, "SmbiosMemInfoDxe install: %r\n", Status));
+
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
new file mode 100644
index 000000000000..086fdd9749fb
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -0,0 +1,1049 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Guid/SmBios.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <PlatformInfoHob.h>
+#include <Protocol/Smbios.h>
+
+// Type0 Data
+#define VENDOR_TEMPLATE "Ampere(R)\0"
+#define BIOS_VERSION_TEMPLATE "TianoCore EDKII\0"
+#define RELEASE_DATE_TEMPLATE "MM/DD/YYYY\0"
+
+#define TYPE0_ADDITIONAL_STRINGS \
+ VENDOR_TEMPLATE /* Vendor */ \
+ BIOS_VERSION_TEMPLATE /* BiosVersion */ \
+ RELEASE_DATE_TEMPLATE /* BiosReleaseDate */
+
+// Type1 Data
+#define MANUFACTURER_TEMPLATE "Ampere(R)\0"
+#define PRODUCT_NAME_TEMPLATE "Mt. Jade\0"
+#define SYS_VERSION_TEMPLATE "PR010\0"
+#define SERIAL_TEMPLATE "123456789ABCDEFF123456789ABCDEFF\0"
+#define SKU_TEMPLATE "FEDCBA9876543211FEDCBA9876543211\0"
+#define FAMILY_TEMPLATE "ARMv8\0"
+
+#define TYPE1_ADDITIONAL_STRINGS \
+ MANUFACTURER_TEMPLATE /* Manufacturer */ \
+ PRODUCT_NAME_TEMPLATE /* Product Name */ \
+ SYS_VERSION_TEMPLATE /* Version */ \
+ SERIAL_TEMPLATE /* Serial Number */ \
+ SKU_TEMPLATE /* SKU Number */ \
+ FAMILY_TEMPLATE /* Family */
+
+#define TYPE2_ADDITIONAL_STRINGS \
+ MANUFACTURER_TEMPLATE /* Manufacturer */ \
+ PRODUCT_NAME_TEMPLATE /* Product Name */ \
+ "EVT2\0" /* Version */ \
+ "Serial Not Set\0" /* Serial */ \
+ "Base of Chassis\0" /* board location */ \
+ "FF\0" /* Version */ \
+ "FF\0" /* Version */
+
+#define CHASSIS_VERSION_TEMPLATE "None \0"
+#define CHASSIS_SERIAL_TEMPLATE "Serial Not Set \0"
+#define CHASSIS_ASSET_TAG_TEMPLATE "Asset Tag Not Set \0"
+
+#define TYPE3_ADDITIONAL_STRINGS \
+ MANUFACTURER_TEMPLATE /* Manufacturer */ \
+ CHASSIS_VERSION_TEMPLATE /* Version */ \
+ CHASSIS_SERIAL_TEMPLATE /* Serial */ \
+ CHASSIS_ASSET_TAG_TEMPLATE /* Asset Tag */ \
+ SKU_TEMPLATE /* SKU Number */
+
+#define TYPE8_ADDITIONAL_STRINGS \
+ "VGA1 - Rear VGA Connector\0" \
+ "DB-15 Male (VGA) \0"
+
+#define TYPE9_ADDITIONAL_STRINGS \
+ "Socket 0 Riser 1 x32 - Slot 1\0"
+
+#define TYPE11_ADDITIONAL_STRINGS \
+ "www.amperecomputing.com\0"
+
+#define TYPE13_ADDITIONAL_STRINGS \
+ "en|US|iso8859-1\0"
+
+#define TYPE41_ADDITIONAL_STRINGS \
+ "Onboard VGA\0"
+
+//
+// Type definition and contents of the default SMBIOS table.
+// This table covers only the minimum structures required by
+// the SMBIOS specification (section 6.2, version 3.0)
+//
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE0 Base;
+ CHAR8 Strings[sizeof (TYPE0_ADDITIONAL_STRINGS)];
+} ARM_TYPE0;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE1 Base;
+ CHAR8 Strings[sizeof (TYPE1_ADDITIONAL_STRINGS)];
+} ARM_TYPE1;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE2 Base;
+ CHAR8 Strings[sizeof (TYPE2_ADDITIONAL_STRINGS)];
+} ARM_TYPE2;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE3 Base;
+ CHAR8 Strings[sizeof (TYPE3_ADDITIONAL_STRINGS)];
+} ARM_TYPE3;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE8 Base;
+ CHAR8 Strings[sizeof (TYPE8_ADDITIONAL_STRINGS)];
+} ARM_TYPE8;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE9 Base;
+ CHAR8 Strings[sizeof (TYPE9_ADDITIONAL_STRINGS)];
+} ARM_TYPE9;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE11 Base;
+ CHAR8 Strings[sizeof (TYPE11_ADDITIONAL_STRINGS)];
+} ARM_TYPE11;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE13 Base;
+ CHAR8 Strings[sizeof (TYPE13_ADDITIONAL_STRINGS)];
+} ARM_TYPE13;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE41 Base;
+ CHAR8 Strings[sizeof (TYPE41_ADDITIONAL_STRINGS)];
+} ARM_TYPE41;
+
+#pragma pack()
+
+//-------------------------------------
+// SMBIOS Platform Common
+//-------------------------------------
+enum {
+ ADDITIONAL_STR_INDEX_1 = 1,
+ ADDITIONAL_STR_INDEX_2,
+ ADDITIONAL_STR_INDEX_3,
+ ADDITIONAL_STR_INDEX_4,
+ ADDITIONAL_STR_INDEX_5,
+ ADDITIONAL_STR_INDEX_6,
+ ADDITIONAL_STR_INDEX_MAX
+};
+
+
+// Type 0 BIOS information
+STATIC ARM_TYPE0 mArmDefaultType0 = {
+ {
+ { // Header
+ EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length, The length of the structure's string-set is not included.
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+
+ ADDITIONAL_STR_INDEX_1, // SMBIOS_TABLE_STRING Vendor
+ ADDITIONAL_STR_INDEX_2, // SMBIOS_TABLE_STRING BiosVersion
+ 0, // UINT16 BiosSegment
+ ADDITIONAL_STR_INDEX_3, // SMBIOS_TABLE_STRING BiosReleaseDate
+ 0, // UINT8 BiosSize
+
+ // MISC_BIOS_CHARACTERISTICS BiosCharacteristics
+ {
+ 0,0,0,0,0,0,
+ 1, // PCI supported
+ 0,
+ 1, // PNP supported
+ 0,
+ 1, // BIOS upgradable
+ 0, 0, 0,
+ 0, // Boot from CD
+ 1, // selectable boot
+ },
+
+ // BIOSCharacteristicsExtensionBytes[2]
+ {
+ 0,
+ 0,
+ },
+
+ 0, // UINT8 SystemBiosMajorRelease
+ 0, // UINT8 SystemBiosMinorRelease
+
+ // If the system does not have field upgradeable embedded controller
+ // firmware, the value is 0FFh
+ 0xFF, // UINT8 EmbeddedControllerFirmwareMajorRelease
+ 0xFF // UINT8 EmbeddedControllerFirmwareMinorRelease
+ },
+
+ // Text strings (unformatted area)
+ TYPE0_ADDITIONAL_STRINGS
+};
+
+// Type 1 System information
+STATIC ARM_TYPE1 mArmDefaultType1 = {
+ {
+ { // Header
+ EFI_SMBIOS_TYPE_SYSTEM_INFORMATION,
+ sizeof (SMBIOS_TABLE_TYPE1),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+
+ ADDITIONAL_STR_INDEX_1, // Manufacturer
+ ADDITIONAL_STR_INDEX_2, // Product Name
+ ADDITIONAL_STR_INDEX_3, // Version
+ ADDITIONAL_STR_INDEX_4, // Serial Number
+ { 0x12345678, 0x9ABC, 0xDEFF, { 0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xFF }}, // UUID
+ SystemWakeupTypePowerSwitch, // Wakeup type
+ ADDITIONAL_STR_INDEX_5, // SKU Number
+ ADDITIONAL_STR_INDEX_6, // Family
+ },
+
+ // Text strings (unformatted)
+ TYPE1_ADDITIONAL_STRINGS
+};
+
+// Type 2 Baseboard
+STATIC ARM_TYPE2 mArmDefaultType2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE2), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // Manufacturer
+ ADDITIONAL_STR_INDEX_2, // Product Name
+ ADDITIONAL_STR_INDEX_3, // Version
+ ADDITIONAL_STR_INDEX_4, // Serial
+ 0, // Asset tag
+ {1}, // motherboard, not replaceable
+ ADDITIONAL_STR_INDEX_5, // location of board
+ 0xFFFF, // chassis handle
+ BaseBoardTypeMotherBoard,
+ 0,
+ {0},
+ },
+ TYPE2_ADDITIONAL_STRINGS
+};
+
+// Type 3 Enclosure
+STATIC CONST ARM_TYPE3 mArmDefaultType3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE3), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // Manufacturer
+ MiscChassisTypeRackMountChassis, // Rack-mounted chassis
+ ADDITIONAL_STR_INDEX_2, // version
+ ADDITIONAL_STR_INDEX_3, // serial
+ ADDITIONAL_STR_INDEX_4, // asset tag
+ ChassisStateUnknown, // boot chassis state
+ ChassisStateSafe, // power supply state
+ ChassisStateSafe, // thermal state
+ ChassisSecurityStatusNone, // security state
+ {0,0,0,0}, // OEM defined
+ 1, // 1U height
+ 2, // number of power cords
+ 0, // no contained elements
+ 3, // ContainedElementRecordLength;
+ },
+ TYPE3_ADDITIONAL_STRINGS
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8Vga = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortConnectorTypeDB15Female, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortTypeOther, // ExternalConnectorType;
+ PortTypeVideoPort, // PortType;
+ },
+ "VGA1 - Rear VGA Connector\0" \
+ "DB-15 Male (VGA)\0"
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8USBFront = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortConnectorTypeUsb, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortTypeOther, // ExternalConnectorType;
+ PortTypeUsb, // PortType;
+ },
+ "Front Panel USB 3.0\0" \
+ "USB\0"
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8USBRear = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortConnectorTypeUsb, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortTypeOther, // ExternalConnectorType;
+ PortTypeUsb, // PortType;
+ },
+ "Rear Panel USB 3.0\0" \
+ "USB\0"
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8NetRJ45 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortConnectorTypeRJ45, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortConnectorTypeRJ45, // ExternalConnectorType;
+ PortTypeNetworkPort, // PortType;
+ },
+ "RJ1 - BMC RJ45 Port\0" \
+ "RJ45 Connector\0"
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8NetOcp = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortTypeOther, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortTypeOther, // ExternalConnectorType;
+ PortTypeNetworkPort, // PortType;
+ },
+ "OCP1 - OCP NIC 3.0 Connector\0" \
+ "OCP NIC 3.0\0"
+};
+
+// Type 8 Port Connector Information
+STATIC CONST ARM_TYPE8 mArmDefaultType8Uart = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE8), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1, // InternalReferenceDesignator String
+ PortTypeOther, // InternalConnectorType;
+ ADDITIONAL_STR_INDEX_2, // ExternalReferenceDesignator String
+ PortConnectorTypeDB9Female, // ExternalConnectorType;
+ PortTypeSerial16550Compatible, // PortType;
+ },
+ "UART1 - BMC UART5 Connector\0" \
+ "DB-9 female\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk0RiserX32Slot1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth16X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 0,
+ 0,
+ 0,
+ },
+ "S0 Riser 1 x32 - Slot 1\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk0RiserX32Slot2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 4,
+ 0,
+ 0,
+ },
+ "S0 Riser x32 - Slot 2\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk0RiserX32Slot3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 5,
+ 0,
+ 0,
+ },
+ "S0 Riser x32 - Slot 3\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1RiserX24Slot1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 7,
+ 0,
+ 0,
+ },
+ "S1 Riser x24 - Slot 1\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1RiserX24Slot2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 8,
+ 0,
+ 0,
+ },
+ "S1 Riser x24 - Slot 2\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1RiserX24Slot3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 9,
+ 0,
+ 0,
+ },
+ "S1 Riser x24 - Slot 3\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1RiserX8Slot1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth8X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 8,
+ 0,
+ 0,
+ },
+ "S1 Riser x8 - Slot 1\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk0OcpNic = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth16X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 1,
+ 0,
+ 0,
+ },
+ "S0 OCP NIC 3.0\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1NvmeM2Slot1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth4X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 5,
+ 0,
+ 0,
+ },
+ "S1 NVMe M.2 - Slot 1\0"
+};
+
+// Type 9 System Slots
+STATIC ARM_TYPE9 mArmDefaultType9Sk1NvmeM2Slot2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1,
+ SlotTypePciExpressGen3,
+ SlotDataBusWidth4X,
+ SlotUsageAvailable,
+ SlotLengthLong,
+ 0,
+ {0, 0, 1}, // Provides 3.3 Volts
+ {1}, // PME
+ 5,
+ 0,
+ 0,
+ },
+ "S1 NVMe M.2 - Slot 2\0"
+};
+
+// Type 11 OEM Strings
+STATIC ARM_TYPE11 mArmDefaultType11 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_OEM_STRINGS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE11), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ ADDITIONAL_STR_INDEX_1
+ },
+ TYPE11_ADDITIONAL_STRINGS
+};
+
+// Type 13 BIOS Language Information
+STATIC ARM_TYPE13 mArmDefaultType13 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE13), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1,
+ 0,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+ 1,
+ },
+ TYPE13_ADDITIONAL_STRINGS
+};
+
+// Type 24 Hardware Security
+STATIC SMBIOS_TABLE_TYPE24 mArmDefaultType24 = {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_HARDWARE_SECURITY, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE24), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 0
+};
+
+// Type 32 System Boot Information
+STATIC SMBIOS_TABLE_TYPE32 mArmDefaultType32 = {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE32), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ {0, 0, 0, 0, 0, 0},
+ 0
+};
+
+// Type 38 IPMI Device Information
+STATIC SMBIOS_TABLE_TYPE38 mArmDefaultType38 = {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_IPMI_DEVICE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE38), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ IPMIDeviceInfoInterfaceTypeSSIF,
+ 0x20,
+ 0x20,
+ 0xFF,
+ 0x20
+};
+
+// Type 41 Onboard Devices Extended Information
+STATIC ARM_TYPE41 mArmDefaultType41 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION,
+ sizeof (SMBIOS_TABLE_TYPE41),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1,
+ 0x83, // OnBoardDeviceExtendedTypeVideo, Enabled
+ 1,
+ 4,
+ 2,
+ 0,
+ },
+ TYPE41_ADDITIONAL_STRINGS
+};
+
+// Type 42 System Boot Information
+STATIC SMBIOS_TABLE_TYPE42 mArmDefaultType42 = {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE,
+ sizeof (SMBIOS_TABLE_TYPE42),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ MCHostInterfaceTypeOemDefined,
+ 4,
+ {0xFF, 0, 0, 0}
+};
+
+STATIC CONST VOID *DefaultCommonTables[] =
+{
+ &mArmDefaultType0,
+ &mArmDefaultType1,
+ &mArmDefaultType2,
+ &mArmDefaultType8Vga,
+ &mArmDefaultType8USBFront,
+ &mArmDefaultType8USBRear,
+ &mArmDefaultType8NetRJ45,
+ &mArmDefaultType8NetOcp,
+ &mArmDefaultType8Uart,
+ &mArmDefaultType9Sk0RiserX32Slot1,
+ &mArmDefaultType9Sk0RiserX32Slot2,
+ &mArmDefaultType9Sk0RiserX32Slot3,
+ &mArmDefaultType9Sk1RiserX24Slot1,
+ &mArmDefaultType9Sk1RiserX24Slot2,
+ &mArmDefaultType9Sk1RiserX24Slot3,
+ &mArmDefaultType9Sk1RiserX8Slot1,
+ &mArmDefaultType9Sk0OcpNic,
+ &mArmDefaultType9Sk1NvmeM2Slot1,
+ &mArmDefaultType9Sk1NvmeM2Slot2,
+ &mArmDefaultType11,
+ &mArmDefaultType13,
+ &mArmDefaultType24,
+ &mArmDefaultType32,
+ &mArmDefaultType38,
+ &mArmDefaultType41,
+ &mArmDefaultType42,
+ NULL
+};
+
+typedef struct {
+ CHAR8 MonthNameStr[4]; // example "Jan", Compiler build date, month
+ CHAR8 DigitStr[3]; // example "01", Smbios date format, month
+} MonthStringDig;
+
+STATIC MonthStringDig MonthMatch[12] = {
+ { "Jan", "01" },
+ { "Feb", "02" },
+ { "Mar", "03" },
+ { "Apr", "04" },
+ { "May", "05" },
+ { "Jun", "06" },
+ { "Jul", "07" },
+ { "Aug", "08" },
+ { "Sep", "09" },
+ { "Oct", "10" },
+ { "Nov", "11" },
+ { "Dec", "12" }
+};
+
+STATIC
+VOID
+ConstructBuildDate (
+ OUT CHAR8 *DateBuf
+ )
+{
+ UINTN i;
+
+ // GCC __DATE__ format is "Feb 2 1996"
+ // If the day of the month is less than 10, it is padded with a space on the left
+ CHAR8 *BuildDate = __DATE__;
+
+ // SMBIOS spec date string: MM/DD/YYYY
+ CHAR8 SmbiosDateStr[sizeof (RELEASE_DATE_TEMPLATE)] = { 0 };
+
+ SmbiosDateStr[sizeof (RELEASE_DATE_TEMPLATE) - 1] = '\0';
+
+ SmbiosDateStr[2] = '/';
+ SmbiosDateStr[5] = '/';
+
+ // Month
+ for (i = 0; i < sizeof (MonthMatch) / sizeof (MonthMatch[0]); i++) {
+ if (AsciiStrnCmp (&BuildDate[0], MonthMatch[i].MonthNameStr, AsciiStrLen (MonthMatch[i].MonthNameStr)) == 0) {
+ CopyMem (&SmbiosDateStr[0], MonthMatch[i].DigitStr, AsciiStrLen (MonthMatch[i].DigitStr));
+ break;
+ }
+ }
+
+ // Day
+ CopyMem (&SmbiosDateStr[3], &BuildDate[4], 2);
+ if (BuildDate[4] == ' ') {
+ // day is less then 10, SAPCE filed by compiler, SMBIOS requires 0
+ SmbiosDateStr[3] = '0';
+ }
+
+ // Year
+ CopyMem (&SmbiosDateStr[6], &BuildDate[7], 4);
+
+ CopyMem (DateBuf, SmbiosDateStr, AsciiStrLen (RELEASE_DATE_TEMPLATE));
+}
+
+STATIC
+UINT8
+GetBiosVerMajor (
+ VOID
+ )
+{
+ return (PcdGet8 (PcdSmbiosTables1MajorVersion));
+}
+
+STATIC
+UINT8
+GetBiosVerMinor (
+ VOID
+ )
+{
+ return (PcdGet8 (PcdSmbiosTables1MinorVersion));
+}
+
+STATIC
+EFI_STATUS
+UpdateSmbiosType0 (
+ PLATFORM_INFO_HOB *PlatformHob
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ MISC_BIOS_CHARACTERISTICS_EXTENSION *MiscExt = NULL;
+ CHAR8 *ReleaseDateBuf = NULL;
+ CHAR8 *PcdReleaseDate = NULL;
+ CHAR8 AsciiVersion[32];
+ UINTN Index;
+
+ //
+ // Update Type0 information
+ //
+ ReleaseDateBuf = &mArmDefaultType0.Strings[0]
+ + sizeof (VENDOR_TEMPLATE) - 1
+ + sizeof (BIOS_VERSION_TEMPLATE) - 1;
+ PcdReleaseDate = (CHAR8 *)PcdGetPtr (PcdSmbiosTables0BiosReleaseDate);
+
+ if (AsciiStrnCmp (PcdReleaseDate, RELEASE_DATE_TEMPLATE, AsciiStrLen (RELEASE_DATE_TEMPLATE)) == 0) {
+ // If PCD is still template date MM/DD/YYYY, use compiler date
+ ConstructBuildDate (ReleaseDateBuf);
+ } else {
+ // PCD is updated somehow, use PCD date
+ CopyMem (ReleaseDateBuf, PcdReleaseDate, AsciiStrLen (PcdReleaseDate));
+ }
+
+ if (PcdGet32 (PcdFdSize) < SIZE_16MB) {
+ mArmDefaultType0.Base.BiosSize = (PcdGet32 (PcdFdSize) / SIZE_64KB) - 1;
+
+ mArmDefaultType0.Base.ExtendedBiosSize.Size = 0;
+ mArmDefaultType0.Base.ExtendedBiosSize.Unit = 0;
+ } else {
+ // TODO: Need to update Extended BIOS ROM Size
+ mArmDefaultType0.Base.BiosSize = 0xFF;
+
+ // As a reminder
+ ASSERT (FALSE);
+ }
+
+ // Type0 BIOS Characteristics Extension Byte 1
+ MiscExt = (MISC_BIOS_CHARACTERISTICS_EXTENSION *)&(mArmDefaultType0.Base.BIOSCharacteristicsExtensionBytes);
+
+ MiscExt->BiosReserved.AcpiIsSupported = 1;
+
+ // Type0 BIOS Characteristics Extension Byte 2
+ MiscExt->SystemReserved.BiosBootSpecIsSupported = 1;
+ MiscExt->SystemReserved.FunctionKeyNetworkBootIsSupported = 1;
+ MiscExt->SystemReserved.UefiSpecificationSupported = 1;
+
+ // Type0 BIOS Release
+ // TODO: to decide another way: If the system does not support the use of this
+ // field, the value is 0FFh
+ mArmDefaultType0.Base.SystemBiosMajorRelease = GetBiosVerMajor ();
+ mArmDefaultType0.Base.SystemBiosMinorRelease = GetBiosVerMinor ();
+
+ /* Update SMBIOS Type 0 EC Info */
+ CopyMem (
+ (VOID *)&AsciiVersion,
+ (VOID *)&PlatformHob->SmPmProVer,
+ sizeof (PlatformHob->SmPmProVer)
+ );
+ /* The AsciiVersion is formated as "major.minor" */
+ for (Index = 0; Index < (UINTN)AsciiStrLen (AsciiVersion); Index++) {
+ if (AsciiVersion[Index] == '.') {
+ AsciiVersion[Index] = '\0';
+ break;
+ }
+ }
+
+ mArmDefaultType0.Base.EmbeddedControllerFirmwareMajorRelease =
+ (UINT8)AsciiStrDecimalToUintn (AsciiVersion);
+ mArmDefaultType0.Base.EmbeddedControllerFirmwareMinorRelease =
+ (UINT8)AsciiStrDecimalToUintn (AsciiVersion + Index + 1);
+
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+InstallType3Structure (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ ASSERT (Smbios != NULL);
+
+ SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER*) &mArmDefaultType3)->Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)&mArmDefaultType3
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "adding SMBIOS type 3 failed\n"));
+ // stop adding rather than continuing
+ return Status;
+ }
+
+ // Save this handle to type 2 table
+ mArmDefaultType2.Base.ChassisHandle = SmbiosHandle;
+
+ return Status;
+}
+
+/**
+ Install a whole table worth of structures
+
+ @param Smbios SMBIOS protocol.
+ @param DefaultTables A pointer to the default SMBIOS table structure.
+**/
+EFI_STATUS
+InstallStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios,
+ IN CONST VOID *DefaultTables[]
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINTN TableIndex;
+
+ ASSERT (Smbios != NULL);
+
+ for (TableIndex = 0; DefaultTables[TableIndex] != NULL; TableIndex++) {
+ SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *)DefaultTables[TableIndex])->Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)DefaultTables[TableIndex]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: adding %d failed\n", __FUNCTION__, TableIndex));
+
+ // stop adding rather than continuing
+ return Status;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+UpdateSmbiosInfo (
+ VOID
+ )
+{
+ VOID *Hob;
+ PLATFORM_INFO_HOB *PlatformHob;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ ASSERT (Hob != NULL);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ //
+ // Update Type0 information
+ //
+ UpdateSmbiosType0 (PlatformHob);
+
+}
+
+/**
+ Install all structures from the DefaultTables structure
+
+ @param Smbios SMBIOS protocol
+
+**/
+EFI_STATUS
+InstallAllStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ ASSERT (Smbios != NULL);
+
+ // Update SMBIOS Tables
+ UpdateSmbiosInfo ();
+
+ // Install Type 3 table
+ InstallType3Structure (Smbios);
+
+ // Install Tables
+ Status = InstallStructures (Smbios, DefaultCommonTables);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Installs SMBIOS information for ARM platforms
+
+ @param ImageHandle Module's image handle
+ @param SystemTable Pointer of EFI_SYSTEM_TABLE
+
+ @retval EFI_SUCCESS Smbios data successfully installed
+ @retval Other Smbios data was not installed
+
+**/
+EFI_STATUS
+EFIAPI
+SmbiosPlatformDxeEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+
+ //
+ // Find the SMBIOS protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ (VOID **)&Smbios
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = InstallAllStructures (Smbios);
+ DEBUG ((DEBUG_ERROR, "SmbiosPlatform install - %r\n", Status));
+
+ return Status;
+}
--
2.17.1


Re: [edk2-platforms][PATCH v2 15/32] JadePkg: Add PcieBoardLib library instance

Nhi Pham
 

Hi Leif,

Thanks for reviewing. Will address all your comments from this patch.

Best regards,
Nhi

On 6/8/21 05:45, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:07 +0700, Nhi Pham wrote:
From: Vu Nguyen <vunguyen@os.amperecomputing.com>

Provides basic features like:
* Screen menu to change bifurcation setting of each Root Complex. Note
that we can only change the option for Root Complex which doesn't have
default value in the BoardSetting.
* Parsing the BoardSetting and coordinate with saved setting to enable
corresponding PCIe controller of each Root Complex.
* Config speed and lane of enabled controller.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Vu Nguyen <vunguyen@os.amperecomputing.com>
---
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec | 3 +
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardLib.inf | 60 ++
Platform/Ampere/JadePkg/Library/PcieBoardLib/NVDataStruc.h | 89 ++
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.h | 138 +++
Silicon/Ampere/AmpereAltraPkg/Include/Library/PcieBoardLib.h | 102 ++
Platform/Ampere/JadePkg/Library/PcieBoardLib/Vfr.vfr | 212 ++++
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoard.c | 438 ++++++++
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardCommon.c | 327 ++++++
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.c | 1120 ++++++++++++++++++++
Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.uni | 99 ++
10 files changed, 2588 insertions(+)

diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
index 0d79673ce50a..a372a4e0078b 100644
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
@@ -40,6 +40,9 @@ [LibraryClasses]
## @libraryclass Defines a set of methods to initialize Pcie
PcieCoreLib|Silicon/Ampere/AmpereAltraP/Include/Library/PcieCoreLib.h
+ ## @libraryclass Defines a set of miscellaneous PCIe functions
+ PcieBoardLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/PcieBoardLib.h
+
## @libraryclass Defines a set of methods to access flash memory.
FlashLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/FlashLib.h
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardLib.inf b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardLib.inf
new file mode 100644
index 000000000000..6be78f8936d7
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardLib.inf
@@ -0,0 +1,60 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = PcieBoardLib
+ FILE_GUID = 062191A6-E113-4FD6-84C7-E400B4B34759
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PcieBoardLib
+
+[Sources]
+ PcieBoard.c
+ PcieBoardCommon.c
+ PcieBoardScreen.c
+ PcieBoardScreen.h
+ PcieBoardScreen.uni
+ NVDataStruc.h
+ Vfr.vfr
+
+[Packages]
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ BaseLib
+ DevicePathLib
+ GpioLib
+ HiiLib
+ HobLib
+ MemoryAllocationLib
+ SystemFirmwareInterfaceLib
+ UefiBootServicesTableLib
+ UefiLib
+ UefiRuntimeServicesTableLib
+
+[Protocols]
+ gEfiDevicePathProtocolGuid
+ gEfiHiiStringProtocolGuid ## CONSUMES
+ gEfiHiiConfigRoutingProtocolGuid ## CONSUMES
+ gEfiHiiConfigAccessProtocolGuid ## PRODUCES
+ gEfiHiiDatabaseProtocolGuid ## CONSUMES
+ gEfiConfigKeywordHandlerProtocolGuid ## CONSUMES
+
+[Guids]
+ gEfiIfrTianoGuid ## CONSUMES
+ gPlatformManagerFormsetGuid ## CONSUMES
+ gPlatformHobGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/NVDataStruc.h b/Platform/Ampere/JadePkg/Library/PcieBoardLib/NVDataStruc.h
new file mode 100644
index 000000000000..f94f12d968fd
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/NVDataStruc.h
(Should this not be NVDataStruct.h?

@@ -0,0 +1,89 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef NVDATASTRUC_H_
+#define NVDATASTRUC_H_
+
+#define MAX_AC01_PCIE_SCREEN_ROOT_COMPLEX 16
+
+#define PCIE_VARSTORE_NAME L"PcieIfrNVData"
+#define PCIE_VARSTORE_ID 0x1234
+#define PCIE_FORM_ID 0x1235
+#define PCIE_RC0_FORM_ID 0x1236
+#define PCIE_RC1_FORM_ID 0x1237
+#define PCIE_RC2_FORM_ID 0x1238
+#define PCIE_RC3_FORM_ID 0x1239
+#define PCIE_RC4_FORM_ID 0x123A
+#define PCIE_RC5_FORM_ID 0x123B
+#define PCIE_RC6_FORM_ID 0x123C
+#define PCIE_RC7_FORM_ID 0x123D
+#define PCIE_RC8_FORM_ID 0x123E
+#define PCIE_RC9_FORM_ID 0x123F
+#define PCIE_RC10_FORM_ID 0x1240
+#define PCIE_RC11_FORM_ID 0x1241
+#define PCIE_RC12_FORM_ID 0x1242
+#define PCIE_RC13_FORM_ID 0x1243
+#define PCIE_RC14_FORM_ID 0x1244
+#define PCIE_RC15_FORM_ID 0x1245
+#define PCIE_FORM_SET_GUID { 0xe84e70d6, 0xe4b2, 0x4c6e, { 0x98, 0x51, 0xcb, 0x2b, 0xac, 0x77, 0x7d, 0xbb } }
+
+#define PCIE_GOTO_ID_BASE 0x8040
Would recommend prefix before PCIE.
Or, given this is a fully local include - dropping the PCIE prefix.

+
+#pragma pack(1)
+
+//
+// NV data structure definition
+//
+typedef struct {
+ BOOLEAN RCStatus[MAX_AC01_PCIE_SCREEN_ROOT_COMPLEX];
+ UINT8 RCBifurLo[MAX_AC01_PCIE_SCREEN_ROOT_COMPLEX];
+ UINT8 RCBifurHi[MAX_AC01_PCIE_SCREEN_ROOT_COMPLEX];
+ UINT32 SmmuPmu;
+} PCIE_VARSTORE_DATA;
Same.

+
+//
+// Labels definition
+//
+#define LABEL_UPDATE 0x2223
+#define LABEL_END 0x2224
+#define LABEL_RC0_UPDATE 0x2225
+#define LABEL_RC0_END 0x2226
+#define LABEL_RC1_UPDATE 0x2227
+#define LABEL_RC1_END 0x2228
+#define LABEL_RC2_UPDATE 0x2229
+#define LABEL_RC2_END 0x222A
+#define LABEL_RC3_UPDATE 0x222B
+#define LABEL_RC3_END 0x222C
+#define LABEL_RC4_UPDATE 0x222D
+#define LABEL_RC4_END 0x222E
+#define LABEL_RC5_UPDATE 0x222F
+#define LABEL_RC5_END 0x2230
+#define LABEL_RC6_UPDATE 0x2231
+#define LABEL_RC6_END 0x2232
+#define LABEL_RC7_UPDATE 0x2233
+#define LABEL_RC7_END 0x2234
+#define LABEL_RC8_UPDATE 0x2235
+#define LABEL_RC8_END 0x2236
+#define LABEL_RC9_UPDATE 0x2237
+#define LABEL_RC9_END 0x2238
+#define LABEL_RC10_UPDATE 0x2239
+#define LABEL_RC10_END 0x223A
+#define LABEL_RC11_UPDATE 0x223B
+#define LABEL_RC11_END 0x223C
+#define LABEL_RC12_UPDATE 0x223D
+#define LABEL_RC12_END 0x223E
+#define LABEL_RC13_UPDATE 0x223F
+#define LABEL_RC13_END 0x2240
+#define LABEL_RC14_UPDATE 0x2241
+#define LABEL_RC14_END 0x2242
+#define LABEL_RC15_UPDATE 0x2243
+#define LABEL_RC15_END 0x2244
+
+#pragma pack()
Move this to just after the struct? Nothing to pack beyond that.

+
+#endif
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.h b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.h
new file mode 100644
index 000000000000..c5c50060870c
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.h
@@ -0,0 +1,138 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PCIE_SCREEN_H_
+#define PCIE_SCREEN_H_
Needs to not start with PCIE - additional prefix is fine.

+
+#include <Guid/MdeModuleHii.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HiiLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Protocol/FormBrowser2.h>
+#include <Protocol/HiiConfigAccess.h>
+#include <Protocol/HiiConfigKeyword.h>
+#include <Protocol/HiiConfigRouting.h>
+#include <Protocol/HiiDatabase.h>
+#include <Protocol/HiiString.h>
Move all include statements not needed by this header file to the .c
file that actually uses them.

+
+#include "NVDataStruc.h"
+
+//
+// This is the generated IFR binary data for each formset defined in VFR.
+// This data array is ready to be used as input of HiiAddPackages() to
+// create a packagelist (which contains Form packages, String packages, etc).
+//
+extern UINT8 VfrBin[];
Add some descriptive prefix.
PcieBoardVfrBin?

+
+//
+// This is the generated String package data for all .UNI files.
+// This data array is ready to be used as input of HiiAddPackages() to
+// create a packagelist (which contains Form packages, String packages, etc).
+//
+extern UINT8 PcieDxeStrings[];
Not part of PCIE or PI spec - add "Platform" or something prefix.

+
+#define MAX_EDITABLE_ELEMENTS 3
+#define PCIE_RC0_STATUS_OFFSET \
+ OFFSET_OF (PCIE_VARSTORE_DATA, RCStatus[0])
+#define PCIE_RC0_BIFUR_LO_OFFSET \
+ OFFSET_OF (PCIE_VARSTORE_DATA, RCBifurLo[0])
+#define PCIE_RC0_BIFUR_HI_OFFSET \
+ OFFSET_OF (PCIE_VARSTORE_DATA, RCBifurHi[0])
+#define PCIE_SMMU_PMU_OFFSET \
+ OFFSET_OF (PCIE_VARSTORE_DATA, SmmuPmu)
+
+#define PCIE_SCREEN_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'E')
This signature is supposed to be at least potentially unique.

+
+typedef struct {
+ UINTN Signature;
+
+ EFI_HANDLE DriverHandle;
+ EFI_HII_HANDLE HiiHandle;
+ PCIE_VARSTORE_DATA VarStoreConfig;
+
+ //
+ // Consumed protocol
+ //
+ EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
+ EFI_HII_STRING_PROTOCOL *HiiString;
+ EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
+ EFI_CONFIG_KEYWORD_HANDLER_PROTOCOL *HiiKeywordHandler;
+
+ //
+ // Produced protocol
+ //
+ EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
+} PCIE_SCREEN_PRIVATE_DATA;
Structs need more unique prefixes.

+
+typedef union {
+ UINT16 VAR_ID;
+ struct _PCIE_VAR_ID {
+ UINT16 PciDevIndex : 12;
+ UINT16 DataType : 3;
+ UINT16 Always1 : 1;
+ } IdField;
+} PCIE_VAR_ID;
+
+typedef struct {
+ UINTN PciDevIdx;
+ EFI_STRING_ID GotoStringId;
+ EFI_STRING_ID GotoHelpStringId;
+ UINT16 GotoKey;
+ BOOLEAN ShowItem;
+} PCIE_SETUP_GOTO_DATA;
+
+typedef struct {
+ VOID *StartOpCodeHandle;
+ VOID *EndOpCodeHandle;
+ EFI_IFR_GUID_LABEL *StartLabel;
+ EFI_IFR_GUID_LABEL *EndLabel;
+
+} PCIE_IFR_INFO;
+
+#define PCIE_SCREEN_PRIVATE_FROM_THIS(a) \
+ CR (a, PCIE_SCREEN_PRIVATE_DATA, ConfigAccess, PCIE_SCREEN_PRIVATE_DATA_SIGNATURE)
+
+#pragma pack(1)
+
+///
+/// HII specific Vendor Device Path definition.
+///
+typedef struct {
+ VENDOR_DEVICE_PATH VendorDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} HII_VENDOR_DEVICE_PATH;
+
+#pragma pack()
+
+UINT8
+PcieRCDevMapLoDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ );
+
+UINT8
+PcieRCDevMapHiDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ );
+
+BOOLEAN
+PcieRCActiveDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ );
+
+#endif /* PCIE_SCREEN_H_ */
diff --git a/Silicon/Ampere/AmpereAltraPkg/Include/Library/PcieBoardLib.h b/Silicon/Ampere/AmpereAltraPkg/Include/Library/PcieBoardLib.h
new file mode 100644
index 000000000000..bff5b62ba13b
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Include/Library/PcieBoardLib.h
@@ -0,0 +1,102 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PCIE_BOARD_LIB_H_
+#define PCIE_BOARD_LIB_H_
+
+#include "Pcie.h"
OK, I'm going to stop pointing this out from this point on, but
anything that is not referencing a direct aspect of the PCIe
specification should not be named PCIE*/Pcie*, ...
These names are reserved.

Since most of these symbols are internal anyway, and reference only
settings inside the PCIE configuration screen, I think the cleanest
thing would be to drop the PCIE/Pcie prefixes altogether.

+
+/**
+
+ Check if a PCIE port enabled in the board configuration.
+
+ @param Index The port index.
+
+ @retval TRUE if the port enabled, otherwise FALSE.
+
+**/
+BOOLEAN
+PcieBoardCheckSysSlotEnabled (
+ IN UINTN Index
+ );
+
+VOID
+PcieBoardGetRCSegmentNumber (
+ IN AC01_RC *RC,
+ OUT UINTN *SegmentNumber
+ );
+
+/**
+
+ Check if SMM PMU enabled in board screen
+
+ @retval TRUE if the SMMU PMU enabled, otherwise FALSE.
+
+**/
+BOOLEAN
+PcieBoardCheckSmmuPmuEnabled (
+ VOID
+ );
+
+/**
+
+ Build UEFI menu.
+
+ @param ImageHandle Handle.
+ @param SystemTable Pointer to System Table.
+ @param RCList List of Root Complex with properties.
+
+ @retval EFI_SUCCESS if successful, otherwise EFI_ERROR.
+
+**/
+EFI_STATUS
+PcieBoardScreenInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable,
+ IN AC01_RC *RCList
+ );
+
+BOOLEAN
+IsEmptyRC (
+ IN AC01_RC *RC
+ );
+
+VOID
+PcieBoardSetupDevmap (
+ IN AC01_RC *RC
+ );
+
+VOID
+PcieBoardGetLaneAllocation (
+ IN AC01_RC *RC
+ );
+
+VOID
+PcieBoardGetSpeed (
+ IN AC01_RC *RC
+ );
+
+VOID
+PcieBoardParseRCParams (
+ IN AC01_RC *RC
+ );
+
+VOID
+PcieBoardAssertPerst (
+ AC01_RC *RC,
+ UINT32 PcieIndex,
+ UINT8 Bifurcation,
+ BOOLEAN isPullToHigh
+ );
+
+BOOLEAN
+PcieBoardCheckSmmuPmuEnabled (
+ VOID
+ );
+
+#endif /* PCIE_BOARD_LIB_H_ */
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/Vfr.vfr b/Platform/Ampere/JadePkg/Library/PcieBoardLib/Vfr.vfr
new file mode 100644
index 000000000000..a596d5ac9a92
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/Vfr.vfr
@@ -0,0 +1,212 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "NVDataStruc.h"
+
+formset
+ guid = PCIE_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_PCIE_FORM),
+ help = STRING_TOKEN(STR_PCIE_FORM_HELP),
+ classguid = gPlatformManagerFormsetGuid,
+
+ //
+ // Define a variable Storage
+ //
+ varstore PCIE_VARSTORE_DATA,
+ varid = PCIE_VARSTORE_ID,
+ name = PcieIfrNVData,
+ guid = PCIE_FORM_SET_GUID;
+
+ form
+ formid = PCIE_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_FORM);
+
+ label LABEL_UPDATE;
+ // dynamic content here
+ label LABEL_END;
+ endform;
+
+ form
+ formid = PCIE_RC0_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC0_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC0_FORM);
+
+ label LABEL_RC0_UPDATE;
+ // dynamic content here
+ label LABEL_RC0_END;
+ endform;
+
+ form
+ formid = PCIE_RC1_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC1_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC1_FORM);
+
+ label LABEL_RC1_UPDATE;
+ // dynamic content here
+ label LABEL_RC1_END;
+ endform;
+
+ form
+ formid = PCIE_RC2_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC2_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC2_FORM);
+
+ label LABEL_RC2_UPDATE;
+ // dynamic content here
+ label LABEL_RC2_END;
+ endform;
+
+ form
+ formid = PCIE_RC3_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC3_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC3_FORM);
+
+ label LABEL_RC3_UPDATE;
+ // dynamic content here
+ label LABEL_RC3_END;
+ endform;
+
+ form
+ formid = PCIE_RC4_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC4_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC4_FORM);
+
+ label LABEL_RC4_UPDATE;
+ // dynamic content here
+ label LABEL_RC4_END;
+ endform;
+
+ form
+ formid = PCIE_RC5_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC5_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC5_FORM);
+
+ label LABEL_RC5_UPDATE;
+ // dynamic content here
+ label LABEL_RC5_END;
+ endform;
+
+ form
+ formid = PCIE_RC6_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC6_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC6_FORM);
+
+ label LABEL_RC6_UPDATE;
+ // dynamic content here
+ label LABEL_RC6_END;
+ endform;
+
+ form
+ formid = PCIE_RC7_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC7_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC7_FORM);
+
+ label LABEL_RC7_UPDATE;
+ // dynamic content here
+ label LABEL_RC7_END;
+ endform;
+
+ form
+ formid = PCIE_RC8_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC8_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC8_FORM);
+
+ label LABEL_RC8_UPDATE;
+ // dynamic content here
+ label LABEL_RC8_END;
+ endform;
+
+ form
+ formid = PCIE_RC9_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC9_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC9_FORM);
+
+ label LABEL_RC9_UPDATE;
+ // dynamic content here
+ label LABEL_RC9_END;
+ endform;
+
+ form
+ formid = PCIE_RC10_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC10_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC10_FORM);
+
+ label LABEL_RC10_UPDATE;
+ // dynamic content here
+ label LABEL_RC10_END;
+ endform;
+
+ form
+ formid = PCIE_RC11_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC11_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC11_FORM);
+
+ label LABEL_RC11_UPDATE;
+ // dynamic content here
+ label LABEL_RC11_END;
+ endform;
+
+ form
+ formid = PCIE_RC12_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC12_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC12_FORM);
+
+ label LABEL_RC12_UPDATE;
+ // dynamic content here
+ label LABEL_RC12_END;
+ endform;
+
+ form
+ formid = PCIE_RC13_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC13_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC13_FORM);
+
+ label LABEL_RC13_UPDATE;
+ // dynamic content here
+ label LABEL_RC13_END;
+ endform;
+
+ form
+ formid = PCIE_RC14_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC14_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC14_FORM);
+
+ label LABEL_RC14_UPDATE;
+ // dynamic content here
+ label LABEL_RC14_END;
+ endform;
+
+ form
+ formid = PCIE_RC15_FORM_ID,
+ title = STRING_TOKEN(STR_PCIE_RC15_FORM);
+
+ subtitle text = STRING_TOKEN(STR_PCIE_RC15_FORM);
+
+ label LABEL_RC15_UPDATE;
+ // dynamic content here
+ label LABEL_RC15_END;
+ endform;
+
+endformset;
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoard.c b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoard.c
new file mode 100644
index 000000000000..c0c94d349b5b
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoard.c
@@ -0,0 +1,438 @@
+/** @file
+
+ Pcie board specific driver to handle asserting PERST signal to Endpoint
+ card and parsing NVPARAM board settings for bifurcation programming.
+
+ PERST asserting is via group of GPIO pins to CPLD as Platform Specification.
+
+ NVPARAM board settings is spec-ed within Firmware Interface Requirement.
+ Bifuration devmap is programmed before at SCP following the rule
+
+ Root Complex Type-A devmap settings (RP == Root Port)
+ -----------------------------------------
+ | RP0 | RP1 | RP2 | RP3 | Devmap |
+ | (x16) | (x4) | (x8) | (x4) | (output) |
+ -------------------------------------------
+ | Y | N | N | N | 0 |
+ | Y | N | Y | N | 1 |
+ | Y | N | Y | Y | 2 |
+ | Y | Y | Y | Y | 3 |
+ -----------------------------------------
+
+ Root Complex Type-B LO (aka RCBxA) devmap settings (RP == Root Port)
+ ----------------------------------------
+ | RP0 | RP1 | RP2 | RP3 | Devmap |
+ | (x8) | (x2) | (x4) | (x3) | (output) |
+ ----------------------------------------
+ | Y | N | N | N | 0 |
+ | Y | N | Y | N | 1 |
+ | Y | N | Y | Y | 2 |
+ | Y | Y | Y | Y | 3 |
+ ----------------------------------------
+
+ Root Complex Type-B LO (aka RCBxB) devmap settings (RP == Root Port)
+ ----------------------------------------
+ | RP4 | RP5 | RP6 | RP7 | Devmap |
+ | (x8) | (x2) | (x4) | (x3) | (output) |
+ ----------------------------------------
+ | Y | N | N | N | 0 |
+ | Y | N | Y | N | 1 |
+ | Y | N | Y | Y | 2 |
+ | Y | Y | Y | Y | 3 |
+ ----------------------------------------
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/GpioLib.h>
+#include <Library/HobLib.h>
+#include <Library/IoLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/PcieBoardLib.h>
+#include <Library/TimerLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <NVDataStruc.h>
+#include <NVParamDef.h>
+#include <Pcie.h>
+#include <PlatformInfoHob.h>
+
+#ifndef BIT
+#define BIT(nr) (1 << (nr))
+#endif
+
+extern CHAR16 VariableName[];
+extern EFI_GUID gPcieFormSetGuid;
+
+VOID
+EFIAPI
+PcieBoardLoadPreset (
+ IN AC01_RC *RC
+ )
+{
+ UINT32 Nv;
+ INTN NvParam;
+ INTN Ret;
+ INTN i;
+
+ // Load default value
+ for (i = 0; i < MAX_PCIE_B; i++) {
+ RC->PresetGen3[i] = PRESET_INVALID;
+ RC->PresetGen4[i] = PRESET_INVALID;
+ }
+
+ // Load override value
+ if (RC->Socket == 0) {
+ if (RC->Type == RCA) {
+ if (RC->ID < 4) {
There are various live-coded values of 4 and 2 in this function.
Please replace them with #defines with descriptive names to improve readability.

+ NvParam = NV_SI_RO_BOARD_S0_RCA0_TXRX_G3PRESET + RC->ID * NVPARAM_SIZE;
+ } else {
+ NvParam = NV_SI_RO_BOARD_S0_RCA4_TXRX_G3PRESET + (RC->ID - 4) * NVPARAM_SIZE;
+ }
+ } else {
+ NvParam = NV_SI_RO_BOARD_S0_RCB0A_TXRX_G3PRESET + (RC->ID - 4) * (2 * NVPARAM_SIZE);
+ }
+ } else if (RC->Type == RCA) {
+ if (RC->ID < 4) {
+ NvParam = NV_SI_RO_BOARD_S1_RCA2_TXRX_G3PRESET + (RC->ID - 2) * NVPARAM_SIZE;
+ } else {
+ NvParam = NV_SI_RO_BOARD_S1_RCA4_TXRX_G3PRESET + (RC->ID - 4) * NVPARAM_SIZE;
+ }
+ } else {
+ NvParam = NV_SI_RO_BOARD_S1_RCB0A_TXRX_G3PRESET + (RC->ID - 4) * (2 * NVPARAM_SIZE);
+ }
+
+ Ret = NVParamGet ((NVPARAM)NvParam, NV_PERM_ALL, &Nv);
+ if (Ret == EFI_SUCCESS) {
+ for (i = 0; i < 4; i++) {
+ RC->PresetGen3[i] = (Nv >> (NVPARAM_SIZE * i)) & 0xFF;
+ }
+ }
+
+ if (RC->Type == RCB) {
+ NvParam += NVPARAM_SIZE;
+ Ret = NVParamGet ((NVPARAM)NvParam, NV_PERM_ALL, &Nv);
+ if (Ret == EFI_SUCCESS) {
+ for (i = 0; i < 4; i++) {
+ RC->PresetGen3[i] = (Nv >> (NVPARAM_SIZE * i)) & 0xFF;
+ }
+ }
+ }
+
+ if (RC->Socket == 0) {
+ if (RC->Type == RCA) {
+ if (RC->ID < 4) {
+ NvParam = NV_SI_RO_BOARD_S0_RCA0_TXRX_G4PRESET + RC->ID * NVPARAM_SIZE;
+ } else {
+ NvParam = NV_SI_RO_BOARD_S0_RCA4_TXRX_G4PRESET + (RC->ID - 4) * NVPARAM_SIZE;
+ }
+ } else {
+ NvParam = NV_SI_RO_BOARD_S0_RCB0A_TXRX_G4PRESET + (RC->ID - 4) * (2 * NVPARAM_SIZE);
+ }
+ } else if (RC->Type == RCA) {
+ if (RC->ID < 4) {
+ NvParam = NV_SI_RO_BOARD_S1_RCA2_TXRX_G4PRESET + (RC->ID - 2) * NVPARAM_SIZE;
+ } else {
+ NvParam = NV_SI_RO_BOARD_S1_RCA4_TXRX_G4PRESET + (RC->ID - 4) * NVPARAM_SIZE;
+ }
+ } else {
+ NvParam = NV_SI_RO_BOARD_S1_RCB0A_TXRX_G4PRESET + (RC->ID - 4) * (2 * NVPARAM_SIZE);
+ }
+
+ Ret = NVParamGet ((NVPARAM)NvParam, NV_PERM_ALL, &Nv);
+ if (Ret == EFI_SUCCESS) {
+ for (i = 0; i < 4; i++) {
+ RC->PresetGen4[i] = (Nv >> (8 * i)) & 0xFF;
+ }
+ }
+
+ if (RC->Type == RCB) {
+ NvParam += NVPARAM_SIZE;
+ Ret = NVParamGet ((NVPARAM)NvParam, NV_PERM_ALL, &Nv);
+ if (Ret == EFI_SUCCESS) {
+ for (i = 0; i < 4; i++) {
+ RC->PresetGen4[i + 4] = (Nv >> (8 * i)) & 0xFF;
+ }
+ }
+ }
+}
+
+VOID
+EFIAPI
+PcieBoardParseRCParams (
+ IN AC01_RC *RC
+ )
+{
+ UINT32 Efuse;
+ PLATFORM_INFO_HOB *PlatformHob;
+ UINT8 PlatRCId;
+ EFI_STATUS Status;
+ VOID *Hob;
+ UINTN BufferSize;
+ PCIE_VARSTORE_DATA VarStoreConfig = {
+ .RCStatus = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, FALSE, TRUE,
+ TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE},
+ .RCBifurLo = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+ .RCBifurHi = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+ .SmmuPmu = 0
+ };
+
+ PCIE_DEBUG ("%a - Socket%d RC%d\n", __FUNCTION__, RC->Socket, RC->ID);
+
+ PlatRCId = RC->Socket * RCS_PER_SOCKET + RC->ID;
+ // Get RC activation status
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = gRT->GetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ NULL,
+ &BufferSize,
+ &VarStoreConfig
+ );
+ if (EFI_ERROR (Status)) {
+ PCIE_DEBUG ("%a - Failed to read PCIE variable data from config store.\n", __FUNCTION__);
+ }
+
+ RC->Active = VarStoreConfig.RCStatus[PlatRCId];
+ RC->DevMapLo = VarStoreConfig.RCBifurLo[PlatRCId];
+ RC->DevMapHi = VarStoreConfig.RCBifurHi[PlatRCId];
+
+ PCIE_DEBUG (
+ "%a - Socket%d RC%d is %s\n",
+ __FUNCTION__,
+ RC->Socket,
+ RC->ID,
+ (RC->Active) ? "ACTIVE" : "INACTIVE"
+ );
+
+ if (!IsSlaveSocketActive () && RC->Socket == 1) {
+ RC->Active = FALSE;
+ }
+
+ if (RC->Active) {
+ //
+ // Consolidate with E-fuse
+ //
+ Efuse = 0;
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob != NULL) {
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+ Efuse = PlatformHob->RcDisableMask[0] | (PlatformHob->RcDisableMask[1] << RCS_PER_SOCKET);
+ PCIE_DEBUG (
+ "RcDisableMask[0]: 0x%x [1]: 0x%x\n",
+ PlatformHob->RcDisableMask[0],
+ PlatformHob->RcDisableMask[1]
+ );
+
+ // Update errata flags for Ampere Altra
+ if ((PlatformHob->ScuProductId[0] & 0xff) == 0x01) {
+ if (PlatformHob->AHBCId[0] == 0x20100
+ || PlatformHob->AHBCId[0] == 0x21100
+ || (IsSlaveSocketActive ()
+ && (PlatformHob->AHBCId[1] == 0x20100
+ || PlatformHob->AHBCId[1] == 0x21100)))
+ {
+ RC->Flags |= PCIE_ERRATA_SPEED1;
+ PCIE_DEBUG ("RC[%d]: Flags 0x%x\n", RC->ID, RC->Flags);
+ }
+ }
+ }
+
+ RC->Active = (RC->Active && !(Efuse & BIT (PlatRCId))) ? TRUE : FALSE;
+ }
+
+ /* Load Gen3/Gen4 preset */
+ PcieBoardLoadPreset (RC);
+ PcieBoardGetLaneAllocation (RC);
+ PcieBoardSetupDevmap (RC);
+ PcieBoardGetSpeed (RC);
+}
+
+VOID
+EFIAPI
+PcieBoardReleaseAllPerst (
+ IN UINT8 SocketId
+ )
+{
+ UINT32 GpioIndex, GpioPin;
+
+ // Write 1 to all GPIO[16..21] to release all PERST
+ GpioPin = GPIO_DWAPB_PINS_PER_SOCKET * SocketId + 16;
+ for (GpioIndex = 0; GpioIndex < 6; GpioIndex++) {
+ GpioModeConfig (GpioPin + GpioIndex, GPIO_CONFIG_OUT_HI);
+ }
+}
+
+VOID
+EFIAPI
+PcieBoardAssertPerst (
+ AC01_RC *RC,
+ UINT32 PcieIndex,
+ UINT8 Bifurcation,
+ BOOLEAN isPullToHigh
CamelCase uses leading capital letter.

+ )
+{
+ UINT32 GpioGroupVal, Val, GpioIndex, GpioPin;
+
+ /*
+ * For Post-silicon, Fansipan board is using GPIO combination (GPIO[16..21])
+ * to control CPLD.
+ * It should be follow PCIE RESET TABLE in Fansipan schematic.
+ *
+ * Depend on Bifurcation settings, will active corresponding PERST pin or not
+ */
+
+ if (RC->Type == RCA) {
+ switch (Bifurcation) {
+ case 0: // RCA_BIFURCATION_ONE_X16:
+ if (PcieIndex != 0) { // 1,2,3
+ }
+ break;
+
+ case 1: // RCA_BIFURCATION_TWO_X8:
Wouldn't this look an awful lot better as
case RCA_BIFURCATION_TWO_X8:
than with a live-coded integer, followed by a comment explaining what
that integer means?
This appplies throughout this function.

+ if ((PcieIndex == 1) || (PcieIndex == 3)) { // 1,3
+ }
+ break;
+
+ case 2: // RCA_BIFURCATION_ONE_X8_TWO_X4:
+ if (PcieIndex == 1) { // 1
+ }
+ break;
+
+ case 3: // RCA_BIFURCATION_FOUR_X4:
+ break;
+
+ default:
+ PCIE_DEBUG ("Invalid Bifurcation setting\n");
+ break;
+ }
+ } else { // RCB
+ switch (Bifurcation) {
+ case 0: // RCB_BIFURCATION_ONE_X8:
+ if ((PcieIndex != 0) && (PcieIndex != 4)) { // 1,2,3,5,6,7
+ }
+ break;
+
+ case 1: // RCB_BIFURCATION_TWO_X4:
+ if ((PcieIndex % 2) != 0) { // 1,3,5,7
+ }
+ break;
+
+ case 2: // RCB_BIFURCATION_ONE_X4_TWO_X2:
+ if ((PcieIndex == 1) || (PcieIndex == 5)) {
+ }
+ break;
+
+ case 3: // RCB_BIFURCATION_FOUR_X2:
+ break;
+
+ default:
+ PCIE_DEBUG ("Invalid Bifurcation setting\n");
+ break;
+ }
+ }
+
+ if (!isPullToHigh) { // Pull PERST to Low
+ if (RC->Type == RCA) { // RCA: RC->ID: 0->3 ; PcieIndex: 0->3
+ GpioGroupVal = 62 - RC->ID*4 - PcieIndex;
That 62 needs to be a #define.

+ }
+ else { // RCB: RC->ID: 4->7 ; PcieIndex: 0->7
else on same line as }

+ GpioGroupVal = 46 - (RC->ID - 4)*8 - PcieIndex;
+ }
+
+ GpioPin = GPIO_DWAPB_PINS_PER_SOCKET * RC->Socket + 16;
+ for (GpioIndex = 0; GpioIndex < 6; GpioIndex++) {
+ // 6: Number of GPIO pins to control via CPLD
+ Val = (GpioGroupVal & 0x3F) & (1 << GpioIndex);
+ if (Val == 0) {
+ GpioModeConfig (GpioPin + GpioIndex, GPIO_CONFIG_OUT_LOW);
+ } else {
+ GpioModeConfig (GpioPin + GpioIndex, GPIO_CONFIG_OUT_HI);
+ }
+ }
+
+ // Keep reset as low as 100 ms as specification
+ MicroSecondDelay (100 * 1000);
+ } else { // Pull PERST to High
+ PcieBoardReleaseAllPerst (RC->Socket);
+ }
+}
+
+/**
+ * Overrride the segment number for a root complex with
+ * a board specific number.
+ **/
+VOID
+EFIAPI
+PcieBoardGetRCSegmentNumber (
+ IN AC01_RC *RC,
+ OUT UINTN *SegmentNumber
+ )
+{
+ if (RC->Socket == 0) {
+ if (RC->Type == RCA) {
+ switch (RC->ID) {
+ case 0:
+ *SegmentNumber = 12;
+ break;
+
+ case 1:
+ *SegmentNumber = 13;
+ break;
+
+ case 2:
+ *SegmentNumber = 1;
+ break;
+
+ case 3:
+ *SegmentNumber = 0;
+ break;
+
+ default:
+ *SegmentNumber = 16;
+ }
+ } else { /* Socket0, CCIX: RCA0 and RCA1 */
+ *SegmentNumber = RC->ID - 2;
+ }
+ } else { /* Socket1, CCIX: RCA0 and RCA1 */
+ if (RC->ID == 0 || RC->ID == 1) {
+ *SegmentNumber = 16;
+ } else {
+ *SegmentNumber = 4 + RC->ID;
+ }
+ }
+}
+
+BOOLEAN
+EFIAPI
+PcieBoardCheckSmmuPmuEnabled (
+ VOID
+ )
+{
+ EFI_GUID PcieFormSetGuid = PCIE_FORM_SET_GUID;
+ PCIE_VARSTORE_DATA VarStoreConfig;
+ UINTN BufferSize;
+ EFI_STATUS Status;
+
+ // Get Buffer Storage data from EFI variable
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = gRT->GetVariable (
+ PCIE_VARSTORE_NAME,
+ &PcieFormSetGuid,
+ NULL,
+ &BufferSize,
+ &VarStoreConfig
+ );
+ if (EFI_ERROR (Status)) {
+ return FALSE;
+ }
+
+ return VarStoreConfig.SmmuPmu;
+}
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardCommon.c b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardCommon.c
new file mode 100644
index 000000000000..a8accbf53047
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardCommon.c
@@ -0,0 +1,327 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/SystemFirmwareInterfaceLib.h>
+#include <NVParamDef.h>
+
+#include "Pcie.h"
+
+/* Host bridge registers */
+#define HBRCAPDMR 0x0
+#define HBRCBPDMR 0x4
Inappropriate names for this codebase.
Are these the actual register names as described in hardware manuals
for this device? If so, they can be permitted. But every file where
these names are used need to contain a glossary section at the start
of it, explaining what these actually are.
Applies also below.

+
+/* HBRCAPDMR */
+#define RCAPCIDEVMAP_SET(dst, src) \
+ (((dst) & ~0x7) | (((UINT32)(src)) & 0x7))
+
+/* HBRCBPDMR */
+#define RCBPCIDEVMAPLO_SET(dst, src) \
+ (((dst) & ~0x7) | (((UINT32)(src)) & 0x7))
+#define RCBPCIDEVMAPHI_SET(dst, src) \
+ (((dst) & ~0x70) | (((UINT32)(src) << 4) & 0x70))
+
+#define PCIE_GET_MAX_WIDTH(Pcie, Max) \
+ !((Pcie).MaxWidth) ? (Max) : MIN((Pcie).MaxWidth, (Max))
+
+BOOLEAN
+IsEmptyRC (
+ IN AC01_RC *RC
+ )
+{
+ INTN Idx;
+
+ for (Idx = PCIE_0; Idx < MAX_PCIE; Idx++) {
+ if (RC->Pcie[Idx].Active) {
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+VOID
+PcieBoardSetRCBifur (
+ IN AC01_RC *RC,
+ IN UINT8 RPStart,
+ IN UINT8 DevMap
+ )
+{
+ UINT8 MaxWidth;
+
+ if (RPStart != PCIE_0 && RPStart != PCIE_4) {
+ return;
+ }
+
+ if (RC->Type != RCB && RPStart == PCIE_4) {
+ return;
+ }
+
+ if (RC->Type == RCA && RC->Pcie[RPStart].MaxWidth == LNKW_X16) {
+ RC->Pcie[RPStart + 1].MaxWidth = LNKW_X4;
+ RC->Pcie[RPStart + 2].MaxWidth = LNKW_X8;
+ RC->Pcie[RPStart + 3].MaxWidth = LNKW_X4;
+ }
+
+ if (RC->Type == RCB && RC->Pcie[RPStart].MaxWidth == LNKW_X8) {
+ RC->Pcie[RPStart + 1].MaxWidth = LNKW_X2;
+ RC->Pcie[RPStart + 2].MaxWidth = LNKW_X4;
+ RC->Pcie[RPStart + 3].MaxWidth = LNKW_X2;
+ }
+
+ switch (DevMap) {
+ case 1:
Would benefit from #defines with descriptive names rather than just
live-coded integers. (All cases in switch.)

+ MaxWidth = (RC->Type == RCA) ? LNKW_X8 : LNKW_X4;
+ RC->Pcie[RPStart].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart], MaxWidth);
+ RC->Pcie[RPStart + 1].Active = 0;
+ RC->Pcie[RPStart + 2].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 2], MaxWidth);
+ RC->Pcie[RPStart + 2].Active = 1;
+ RC->Pcie[RPStart + 3].Active = 0;
+ break;
+
+ case 2:
+ MaxWidth = (RC->Type == RCA) ? LNKW_X8 : LNKW_X4;
+ RC->Pcie[RPStart].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart], MaxWidth);
+ RC->Pcie[RPStart + 1].Active = 0;
+ MaxWidth = (RC->Type == RCA) ? LNKW_X4 : LNKW_X2;
+ RC->Pcie[RPStart + 2].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 2], MaxWidth);
+ RC->Pcie[RPStart + 2].Active = 1;
+ RC->Pcie[RPStart + 3].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 3], MaxWidth);
+ RC->Pcie[RPStart + 3].Active = 1;
+ break;
+
+ case 3:
+ MaxWidth = (RC->Type == RCA) ? LNKW_X4 : LNKW_X2;
+ RC->Pcie[RPStart].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart], MaxWidth);
+ RC->Pcie[RPStart + 1].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 1], MaxWidth);
+ RC->Pcie[RPStart + 1].Active = 1;
+ RC->Pcie[RPStart + 2].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 2], MaxWidth);
+ RC->Pcie[RPStart + 2].Active = 1;
+ RC->Pcie[RPStart + 3].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart + 3], MaxWidth);
+ RC->Pcie[RPStart + 3].Active = 1;
+ break;
+
+ case 0:
+ default:
+ MaxWidth = (RC->Type == RCA) ? LNKW_X16 : LNKW_X8;
+ RC->Pcie[RPStart].MaxWidth = PCIE_GET_MAX_WIDTH (RC->Pcie[RPStart], MaxWidth);
+ RC->Pcie[RPStart + 1].Active = 0;
+ RC->Pcie[RPStart + 2].Active = 0;
+ RC->Pcie[RPStart + 3].Active = 0;
+ break;
+ }
+}
+
+VOID
+PcieBoardGetLaneAllocation (
+ IN AC01_RC *RC
+ )
+{
+ INTN RPIndex, Ret;
+ UINT32 Nv, Width;
+ NVPARAM NvParam;
+
+ // Retrieve lane allocation and capabilities for each controller
+ if (RC->Type == RCA) {
+ NvParam = NV_SI_RO_BOARD_S0_RCA0_CFG + RC->Socket * 96 +
+ RC->ID * 8;
+ } else {
+ NvParam = NV_SI_RO_BOARD_S0_RCB0_LO_CFG + RC->Socket * 96 +
+ (RC->ID - MAX_RCA) * 16;
+ }
Please create descriptively named #defines for that 96, 16, and 8.

+
+ Ret = NVParamGet (NvParam, NV_PERM_ALL, &Nv);
+ Nv = (Ret != EFI_SUCCESS) ? 0 : Nv;
+
+ for (RPIndex = 0; RPIndex < MAX_PCIE_A; RPIndex++) {
+ Width = (Nv >> (RPIndex * 8)) & 0xF;
+ switch (Width) {
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ RC->Pcie[RPIndex].MaxWidth = 1 << Width;
+ RC->Pcie[RPIndex].MaxGen = SPEED_GEN3;
+ RC->Pcie[RPIndex].Active = TRUE;
+ break;
+
+ case 0:
+ default:
+ RC->Pcie[RPIndex].MaxWidth = LNKW_NONE;
+ RC->Pcie[RPIndex].MaxGen = 0;
+ RC->Pcie[RPIndex].Active = FALSE;
+ break;
+ }
+ }
+
+ if (RC->Type == RCB) {
+ // Processing Hi
+ NvParam += 8;
+ Ret = NVParamGet (NvParam, NV_PERM_ALL, &Nv);
+ Nv = (Ret != EFI_SUCCESS) ? 0 : Nv;
+
+ for (RPIndex = MAX_PCIE_A; RPIndex < MAX_PCIE; RPIndex++) {
+ Width = (Nv >> ((RPIndex - MAX_PCIE_A) * 8)) & 0xF;
Same 8?

+ switch (Width) {
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ RC->Pcie[RPIndex].MaxWidth = 1 << Width;
+ RC->Pcie[RPIndex].MaxGen = SPEED_GEN3;
+ RC->Pcie[RPIndex].Active = TRUE;
+ break;
+
+ case 0:
+ default:
+ RC->Pcie[RPIndex].MaxWidth = LNKW_NONE;
+ RC->Pcie[RPIndex].MaxGen = 0;
+ RC->Pcie[RPIndex].Active = FALSE;
+ break;
+ }
+ }
+ }
+
+ // Do not proceed if no Root Port enabled
+ if (IsEmptyRC (RC)) {
+ RC->Active = FALSE;
+ }
+}
+
+VOID
+PcieBoardSetupDevmap (
+ IN AC01_RC *RC
+ )
+{
+ UINT32 Val;
+
+ if (RC->Pcie[PCIE_0].Active
+ && RC->Pcie[PCIE_1].Active
+ && RC->Pcie[PCIE_2].Active
+ && RC->Pcie[PCIE_3].Active)
+ {
+ RC->DefaultDevMapLo = 3;
What's a DefaultDevMapLo?
The *only* benefit of SuperLongCamelCaseNames is that they actually
completely spell out what things are. This makes abbreviating them
extremely unfortunate, except where the abbreviation is completely
obvious regardless of context.

I also have a feeling these 0, 1, 2, 3 could benefit from being
replaced by descriptively named #defines.

+ } else if (RC->Pcie[PCIE_0].Active
+ && RC->Pcie[PCIE_2].Active
+ && RC->Pcie[PCIE_3].Active)
+ {
+ RC->DefaultDevMapLo = 2;
+ } else if (RC->Pcie[PCIE_0].Active
+ && RC->Pcie[PCIE_2].Active)
+ {
+ RC->DefaultDevMapLo = 1;
+ } else {
+ RC->DefaultDevMapLo = 0;
+ }
+
+ if (RC->Pcie[PCIE_4].Active
+ && RC->Pcie[PCIE_5].Active
+ && RC->Pcie[PCIE_6].Active
+ && RC->Pcie[PCIE_7].Active)
+ {
+ RC->DefaultDevMapHi = 3;
+ } else if (RC->Pcie[PCIE_4].Active
+ && RC->Pcie[PCIE_6].Active
+ && RC->Pcie[PCIE_7].Active)
+ {
+ RC->DefaultDevMapHi = 2;
+ } else if (RC->Pcie[PCIE_4].Active
+ && RC->Pcie[PCIE_6].Active)
+ {
+ RC->DefaultDevMapHi = 1;
+ } else {
+ RC->DefaultDevMapHi = 0;
+ }
+
+ if (RC->DevMapLo == 0) {
+ RC->DevMapLo = RC->DefaultDevMapLo;
+ }
+
+ if (RC->Type == RCB && RC->DevMapHi == 0) {
+ RC->DevMapHi = RC->DefaultDevMapHi;
+ }
+
+ PcieBoardSetRCBifur (RC, PCIE_0, RC->DevMapLo);
+ if (RC->Type == RCB) {
+ PcieBoardSetRCBifur (RC, PCIE_4, RC->DevMapHi);
+ }
+
+ if (RC->Active) {
+ if (RC->Type == RCA) {
+ if (!EFI_ERROR (MailboxMsgRegisterRead (RC->Socket, RC->HBAddr + HBRCAPDMR, &Val))) {
+ Val = RCAPCIDEVMAP_SET (Val, RC->DevMapLo & 0x7);
Is this actively trying to obscure away runtime errors, or
are there valid situations where RC->DevMapLo may be higher than 7
and only the bottom 3 bits should be respected?
If so, a comment should explain.

+ MailboxMsgRegisterWrite (RC->Socket, RC->HBAddr + HBRCAPDMR, Val);
+ }
+ } else {
+ if (!EFI_ERROR (MailboxMsgRegisterRead (RC->Socket, RC->HBAddr + HBRCBPDMR, &Val))) {
+ Val = RCBPCIDEVMAPLO_SET (Val, RC->DevMapLo & 0x7);
+ Val = RCBPCIDEVMAPHI_SET (Val, RC->DevMapHi & 0x7);
Is this actively trying to obscure away runtime errors, or
are there valid situations where RC->DevMapLo or RC->DevMapHi may be
higher than 7 and only the bottom 3 bits should be respected?
If so, a comment should explain.

+ MailboxMsgRegisterWrite (RC->Socket, RC->HBAddr + HBRCBPDMR, Val);
+ }
+ }
+ }
+}
+
+VOID
+PcieBoardGetSpeed (
+ IN AC01_RC *RC
+ )
+{
+ UINT8 MaxGenTbl[MAX_PCIE_A] = { SPEED_GEN4, SPEED_GEN4, SPEED_GEN4, SPEED_GEN4 }; // Bifurcation 0: RCA x16 / RCB x8
+ UINT8 MaxGenTblX8X4X4[MAX_PCIE_A] = { SPEED_GEN4, SPEED_GEN4, SPEED_GEN1, SPEED_GEN1 }; // Bifurcation 2: x8 x4 x4 (PCIE_ERRATA_SPEED1)
+ UINT8 MaxGenTblX4X4X4X4[MAX_PCIE_A] = { SPEED_GEN1, SPEED_GEN1, SPEED_GEN1, SPEED_GEN1 }; // Bifurcation 3: x4 x4 x4 x4 (PCIE_ERRATA_SPEED1)
+ UINT8 MaxGenTblRCB[MAX_PCIE_A] = { SPEED_GEN1, SPEED_GEN1, SPEED_GEN1, SPEED_GEN1 }; // RCB PCIE_ERRATA_SPEED1
+ INTN RPIdx;
+ UINT8 *MaxGen;
+
+ ASSERT (MAX_PCIE_A == 4);
+ ASSERT (MAX_PCIE == 8);
+
+ //
+ // Due to hardware errata, for A0/A1*
+ // RCB is limited to Gen1 speed.
+ // RCA x16, x8 port supports up to Gen4,
+ // RCA x4 port only supports Gen1.
+ //
+ MaxGen = MaxGenTbl;
+ if (RC->Type == RCB) {
+ if (RC->Flags & PCIE_ERRATA_SPEED1) {
+ MaxGen = MaxGenTblRCB;
+ }
+ } else {
+ switch (RC->DevMapLo) {
+ case 2: /* x8 x4 x4 */
#define for these 2, 3, and 1.

+ if (RC->Flags & PCIE_ERRATA_SPEED1) {
+ MaxGen = MaxGenTblX8X4X4;
+ }
+ break;
+
+ case 3: /* X4 x4 x4 x4 */
+ if (RC->Flags & PCIE_ERRATA_SPEED1) {
+ MaxGen = MaxGenTblX4X4X4X4;
+ }
+ break;
+
+ case 1: /* x8 x8 */
+ default:
+ break;
+ }
+ }
+
+ for (RPIdx = 0; RPIdx < MAX_PCIE_A; RPIdx++) {
+ RC->Pcie[RPIdx].MaxGen = RC->Pcie[RPIdx].Active ? MaxGen[RPIdx] : 0;
+ }
+
+ if (RC->Type == RCB) {
+ for (RPIdx = MAX_PCIE_A; RPIdx < MAX_PCIE; RPIdx++) {
+ RC->Pcie[RPIdx].MaxGen = RC->Pcie[RPIdx].Active ?
+ MaxGen[RPIdx - MAX_PCIE_A] : 0;
+ }
+ }
+}
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.c b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.c
new file mode 100644
index 000000000000..309cc8857b8c
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.c
@@ -0,0 +1,1120 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/HobLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/PcieBoardLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <NVParamDef.h>
+#include <Pcie.h>
+#include <PlatformInfoHob.h>
+
+#include "PcieBoardScreen.h"
+
+#ifndef BIT
+#define BIT(nr) (1 << (nr))
+#endif
+
+#define MAX_STRING_SIZE 32
+
+CHAR16 VariableName[] = PCIE_VARSTORE_NAME;
+EFI_GUID gPcieFormSetGuid = PCIE_FORM_SET_GUID;
+
+EFI_HANDLE DriverHandle = NULL;
+PCIE_SCREEN_PRIVATE_DATA *mPrivateData = NULL;
+
+AC01_RC RCList[MAX_AC01_PCIE_ROOT_COMPLEX];
+
+HII_VENDOR_DEVICE_PATH mHiiVendorDevicePath = {
+ {
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_VENDOR_DP,
+ {
+ (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+ (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+ }
+ },
+ PCIE_FORM_SET_GUID
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ (UINT8)(END_DEVICE_PATH_LENGTH),
+ (UINT8)((END_DEVICE_PATH_LENGTH) >> 8)
+ }
+ }
+};
+
+/**
+ This function allows a caller to extract the current configuration for one
+ or more named elements from the target driver.
+ @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
+ @param Request A null-terminated Unicode string in
+ <ConfigRequest> format.
+ @param Progress On return, points to a character in the Request
+ string. Points to the string's null terminator if
+ request was successful. Points to the most recent
+ '&' before the first failing name/value pair (or
+ the beginning of the string if the failure is in
+ the first name/value pair) if the request was not
+ successful.
+ @param Results A null-terminated Unicode string in
+ <ConfigAltResp> format which has all values filled
+ in for the names in the Request string. String to
+ be allocated by the called function.
+ @retval EFI_SUCCESS The Results is filled with the requested values.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory to store the results.
+ @retval EFI_INVALID_PARAMETER Request is illegal syntax, or unknown name.
+ @retval EFI_NOT_FOUND Routing data doesn't match any storage in this
+ driver.
+**/
+EFI_STATUS
+EFIAPI
+ExtractConfig (
+ IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
+ IN CONST EFI_STRING Request,
+ OUT EFI_STRING *Progress,
+ OUT EFI_STRING *Results
+ )
+{
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ PCIE_SCREEN_PRIVATE_DATA *PrivateData;
+ EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
+ EFI_STRING ConfigRequest;
+ EFI_STRING ConfigRequestHdr;
+ UINTN Size;
+ CHAR16 *StrPointer;
+ BOOLEAN AllocatedRequest;
+ PCIE_VARSTORE_DATA *VarStoreConfig;
+
+ if (Progress == NULL || Results == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Initialize the local variables.
+ //
+ ConfigRequestHdr = NULL;
+ ConfigRequest = NULL;
+ Size = 0;
+ *Progress = Request;
+ AllocatedRequest = FALSE;
+
+ PrivateData = PCIE_SCREEN_PRIVATE_FROM_THIS (This);
+ HiiConfigRouting = PrivateData->HiiConfigRouting;
+ VarStoreConfig = &PrivateData->VarStoreConfig;
+ ASSERT (VarStoreConfig != NULL);
+
+ //
+ // Get Buffer Storage data from EFI variable.
+ // Try to get the current setting from variable.
+ //
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = gRT->GetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ NULL,
+ &BufferSize,
+ VarStoreConfig
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+
+ if (Request == NULL) {
+ //
+ // Request is set to NULL, construct full request string.
+ //
+
+ //
+ // Allocate and fill a buffer large enough to hold the <ConfigHdr> template
+ // followed by "&OFFSET=0&WIDTH=WWWWWWWWWWWWWWWW" followed by a
+ // Null-terminator
+ //
+ ConfigRequestHdr = HiiConstructConfigHdr (
+ &gPcieFormSetGuid,
+ VariableName,
+ PrivateData->DriverHandle
+ );
+ if (ConfigRequestHdr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ Size = (StrLen (ConfigRequestHdr) + 32 + 1) * sizeof (CHAR16);
+ ConfigRequest = AllocateZeroPool (Size);
+ ASSERT (ConfigRequest != NULL);
+ AllocatedRequest = TRUE;
+ UnicodeSPrint (
+ ConfigRequest,
+ Size,
+ L"%s&OFFSET=0&WIDTH=%016LX",
+ ConfigRequestHdr,
+ (UINT64)BufferSize
+ );
+ FreePool (ConfigRequestHdr);
+ ConfigRequestHdr = NULL;
+ } else {
+ //
+ // Check routing data in <ConfigHdr>.
+ // Note: if only one Storage is used, then this checking could be skipped.
+ //
+ if (!HiiIsConfigHdrMatch (Request, &gPcieFormSetGuid, NULL)) {
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // Set Request to the unified request string.
+ //
+ ConfigRequest = Request;
+
+ //
+ // Check whether Request includes Request Element.
+ //
+ if (StrStr (Request, L"OFFSET") == NULL) {
+ //
+ // Check Request Element does exist in Request String
+ //
+ StrPointer = StrStr (Request, L"PATH");
+ if (StrPointer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (StrStr (StrPointer, L"&") == NULL) {
+ Size = (StrLen (Request) + 32 + 1) * sizeof (CHAR16);
What is 32?

+ ConfigRequest = AllocateZeroPool (Size);
+ ASSERT (ConfigRequest != NULL);
+ AllocatedRequest = TRUE;
+ UnicodeSPrint (
+ ConfigRequest,
+ Size,
+ L"%s&OFFSET=0&WIDTH=%016LX",
+ Request,
+ (UINT64)BufferSize
+ );
+ }
+ }
+ }
+
+ //
+ // Check if requesting Name/Value storage
+ //
+ if (StrStr (ConfigRequest, L"OFFSET") == NULL) {
+ //
+ // Don't have any Name/Value storage names
+ //
+ Status = EFI_SUCCESS;
+ } else {
+ //
+ // Convert buffer data to <ConfigResp> by helper function BlockToConfig()
+ //
+ Status = HiiConfigRouting->BlockToConfig (
+ HiiConfigRouting,
+ ConfigRequest,
+ (UINT8 *)VarStoreConfig,
+ BufferSize,
+ Results,
+ Progress
+ );
+ }
+
+ //
+ // Free the allocated config request string.
+ //
+ if (AllocatedRequest) {
+ FreePool (ConfigRequest);
+ }
+
+ if (ConfigRequestHdr != NULL) {
+ FreePool (ConfigRequestHdr);
+ }
+ //
+ // Set Progress string to the original request string.
+ //
+ if (Request == NULL) {
+ *Progress = NULL;
+ } else if (StrStr (Request, L"OFFSET") == NULL) {
+ *Progress = Request + StrLen (Request);
+ }
+
+ return Status;
+}
+
+/**
+ This function processes the results of changes in configuration.
+ @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
+ @param Configuration A null-terminated Unicode string in <ConfigResp>
+ format.
+ @param Progress A pointer to a string filled in with the offset of
+ the most recent '&' before the first failing
+ name/value pair (or the beginning of the string if
+ the failure is in the first name/value pair) or
+ the terminating NULL if all was successful.
+ @retval EFI_SUCCESS The Results is processed successfully.
+ @retval EFI_INVALID_PARAMETER Configuration is NULL.
+ @retval EFI_NOT_FOUND Routing data doesn't match any storage in this
+ driver.
+**/
+EFI_STATUS
+EFIAPI
+RouteConfig (
+ IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
+ IN CONST EFI_STRING Configuration,
+ OUT EFI_STRING *Progress
+ )
+{
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ PCIE_SCREEN_PRIVATE_DATA *PrivateData;
+ EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
+ PCIE_VARSTORE_DATA *VarStoreConfig;
+
+ if (Configuration == NULL || Progress == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PrivateData = PCIE_SCREEN_PRIVATE_FROM_THIS (This);
+ HiiConfigRouting = PrivateData->HiiConfigRouting;
+ *Progress = Configuration;
+ VarStoreConfig = &PrivateData->VarStoreConfig;
+ ASSERT (VarStoreConfig != NULL);
+
+ //
+ // Check routing data in <ConfigHdr>.
+ // Note: if only one Storage is used, then this checking could be skipped.
+ //
+ if (!HiiIsConfigHdrMatch (Configuration, &gPcieFormSetGuid, NULL)) {
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // Get Buffer Storage data from EFI variable
+ //
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = gRT->GetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ NULL,
+ &BufferSize,
+ VarStoreConfig
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Check if configuring Name/Value storage
+ //
+ if (StrStr (Configuration, L"OFFSET") == NULL) {
+ //
+ // Don't have any Name/Value storage names
+ //
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Convert <ConfigResp> to buffer data by helper function ConfigToBlock()
+ //
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = HiiConfigRouting->ConfigToBlock (
+ HiiConfigRouting,
+ Configuration,
+ (UINT8 *)VarStoreConfig,
+ &BufferSize,
+ Progress
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Store Buffer Storage back to variable
+ //
+ Status = gRT->SetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof (PCIE_VARSTORE_DATA),
+ VarStoreConfig
+ );
+
+ return Status;
+}
+
+/**
+ This function processes the results of changes in configuration.
+ @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
+ @param Action Specifies the type of action taken by the browser.
+ @param QuestionId A unique value which is sent to the original
+ exporting driver so that it can identify the type
+ of data to expect.
+ @param Type The type of value for the question.
+ @param Value A pointer to the data being sent to the original
+ exporting driver.
+ @param ActionRequest On return, points to the action requested by the
+ callback function.
+ @retval EFI_SUCCESS The callback successfully handled the action.
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the
+ variable and its data.
+ @retval EFI_DEVICE_ERROR The variable could not be saved.
+ @retval EFI_UNSUPPORTED The specified Action is not supported by the
+ callback.
+**/
+EFI_STATUS
+EFIAPI
+DriverCallback (
+ IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
+ IN EFI_BROWSER_ACTION Action,
+ IN EFI_QUESTION_ID QuestionId,
+ IN UINT8 Type,
+ IN EFI_IFR_TYPE_VALUE *Value,
+ OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
+ )
+{
+ PCIE_VARSTORE_DATA *VarStoreConfig;
+ PCIE_SCREEN_PRIVATE_DATA *PrivateData;
+ EFI_STATUS Status;
+
+ if (((Value == NULL) &&
+ (Action != EFI_BROWSER_ACTION_FORM_OPEN) &&
+ (Action != EFI_BROWSER_ACTION_FORM_CLOSE)) ||
+ (ActionRequest == NULL))
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PrivateData = PCIE_SCREEN_PRIVATE_FROM_THIS (This);
+ VarStoreConfig = &PrivateData->VarStoreConfig;
+ ASSERT (VarStoreConfig != NULL);
+
+ Status = EFI_SUCCESS;
+
+ switch (Action) {
+ case EFI_BROWSER_ACTION_FORM_OPEN:
+ break;
+
+ case EFI_BROWSER_ACTION_FORM_CLOSE:
+ break;
+
+ case EFI_BROWSER_ACTION_DEFAULT_STANDARD:
+ case EFI_BROWSER_ACTION_DEFAULT_MANUFACTURING:
+ if (QuestionId == 0x9000) {
+ /* SMMU PMU */
+ Value->u32 = 0; /* default disable */
+ break;
+ }
+
+ switch ((QuestionId - 0x8002) % MAX_EDITABLE_ELEMENTS) {
+ case 0:
+ Value->u8 = PcieRCActiveDefaultSetting ((QuestionId - 0x8002) / MAX_EDITABLE_ELEMENTS, PrivateData);
+ break;
+
+ case 1:
+ Value->u8 = PcieRCDevMapLoDefaultSetting ((QuestionId - 0x8002) / MAX_EDITABLE_ELEMENTS, PrivateData);
+ break;
+
+ case 2:
+ Value->u8 = PcieRCDevMapHiDefaultSetting ((QuestionId - 0x8002) / MAX_EDITABLE_ELEMENTS, PrivateData);
+ break;
+ }
+ break;
+
+ case EFI_BROWSER_ACTION_RETRIEVE:
+ case EFI_BROWSER_ACTION_CHANGING:
+ case EFI_BROWSER_ACTION_SUBMITTED:
+ break;
+
+ default:
+ Status = EFI_UNSUPPORTED;
+ break;
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+PcieScreenUnload (
+ IN EFI_HANDLE ImageHandle
+ )
+{
+ ASSERT (mPrivateData != NULL);
+
+ if (DriverHandle != NULL) {
+ gBS->UninstallMultipleProtocolInterfaces (
+ DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mHiiVendorDevicePath,
+ &gEfiHiiConfigAccessProtocolGuid,
+ &mPrivateData->ConfigAccess,
+ NULL
+ );
+ DriverHandle = NULL;
+ }
+
+ if (mPrivateData->HiiHandle != NULL) {
+ HiiRemovePackages (mPrivateData->HiiHandle);
+ }
+
+ FreePool (mPrivateData);
+ mPrivateData = NULL;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function return default settings for Dev Map LO.
+ @param RC Root Complex ID.
+ @param PrivateData Private data.
+
+ @retval Default dev settings.
+**/
+UINT8
+PcieRCDevMapLoDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ )
+{
+ AC01_RC *RC = &RCList[RCIndex];
+
+ return RC->DefaultDevMapLo;
+}
+
+/**
+ This function return default settings for Dev Map HI.
+ @param RC Root Complex ID.
+ @param PrivateData Private data.
+
+ @retval Default dev settings.
+**/
+UINT8
+PcieRCDevMapHiDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ )
+{
+ AC01_RC *RC = &RCList[RCIndex];
+
+ return RC->DefaultDevMapHi;
+}
+
+BOOLEAN
+PcieRCActiveDefaultSetting (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ )
+{
+ PLATFORM_INFO_HOB *PlatformHob;
+ VOID *Hob;
+ UINT32 Efuse;
+
+ // FIXME: Disable Root Complex 6 (USB and VGA) as default
Please get rid of the FIXME

+ if (RCIndex == 6) {
+ return FALSE;
+ }
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob != NULL) {
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+ Efuse = PlatformHob->RcDisableMask[0] | (PlatformHob->RcDisableMask[1] << RCS_PER_SOCKET);
+ return (!(Efuse & BIT (RCIndex))) ? TRUE : FALSE;
+ }
+
+ return FALSE;
+}
+
+/**
+ This function sets up the first elements of the form.
+ @param RC Root Complex ID.
+ @param PrivateData Private data.
+ @retval EFI_SUCCESS The form is set up successfully.
+**/
+EFI_STATUS
+PcieRCScreenSetup (
+ IN UINTN RCIndex,
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ )
+{
+ VOID *StartOpCodeHandle;
+ EFI_IFR_GUID_LABEL *StartLabel;
+ VOID *EndOpCodeHandle;
+ EFI_IFR_GUID_LABEL *EndLabel;
+ VOID *OptionsOpCodeHandle;
+ VOID *OptionsHiOpCodeHandle;
+ CHAR16 Str[MAX_STRING_SIZE];
+ UINT16 DisabledStatusVarOffset;
+ UINT16 BifurLoVarOffset;
+ UINT16 BifurHiVarOffset;
+ UINT8 QuestionFlags, QuestionFlagsSubItem;
+ AC01_RC *RC;
+
+ RC = &RCList[RCIndex];
+
+ // Initialize the container for dynamic opcodes
+ StartOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (StartOpCodeHandle != NULL);
+ EndOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (EndOpCodeHandle != NULL);
+
+ // Create Hii Extend Label OpCode as the start opcode
+ StartLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
+ StartOpCodeHandle,
+ &gEfiIfrTianoGuid,
+ NULL,
+ sizeof (EFI_IFR_GUID_LABEL)
+ );
+ StartLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
+ StartLabel->Number = LABEL_RC0_UPDATE + 2 * RCIndex;
+
+ // Create Hii Extend Label OpCode as the end opcode
+ EndLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
+ EndOpCodeHandle,
+ &gEfiIfrTianoGuid,
+ NULL,
+ sizeof (EFI_IFR_GUID_LABEL)
+ );
+ EndLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
+ EndLabel->Number = LABEL_RC0_END + 2 * RCIndex;
+
+ // Create textbox to tell socket
+ HiiCreateTextOpCode (
+ StartOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_SOCKET),
+ STRING_TOKEN (STR_PCIE_SOCKET_HELP),
+ HiiSetString (
+ PrivateData->HiiHandle,
+ 0,
+ (RC->Socket) ? L"1" : L"0",
+ NULL
+ )
+ );
+
+ // Create textbox to tell Root Complex type
+ HiiCreateTextOpCode (
+ StartOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_RC_TYPE),
+ STRING_TOKEN (STR_PCIE_RC_TYPE_HELP),
+ HiiSetString (
+ PrivateData->HiiHandle,
+ 0,
+ (RC->Type == RCA) ? L"Root Complex Type-A" : L"Root Complex Type-B",
+ NULL
+ )
+ );
+
+ UnicodeSPrint (Str, sizeof (Str), L"Root Complex #%2d", RCIndex);
+
+ DisabledStatusVarOffset = (UINT16)PCIE_RC0_STATUS_OFFSET +
+ sizeof (BOOLEAN) * RCIndex;
+ BifurLoVarOffset = (UINT16)PCIE_RC0_BIFUR_LO_OFFSET +
+ sizeof (UINT8) * RCIndex;
+ BifurHiVarOffset = (UINT16)PCIE_RC0_BIFUR_HI_OFFSET +
+ sizeof (UINT8) * RCIndex;
+
+ QuestionFlags = EFI_IFR_FLAG_RESET_REQUIRED | EFI_IFR_FLAG_CALLBACK;
+ if (IsEmptyRC (RC)
+ || (GetNumberOfActiveSockets () == 1 && RC->Socket == 1))
+ {
+ //
+ // Do not allow changing if none of Root Port underneath enabled
+ // or slave Root Complex on 1P system.
+ //
+ QuestionFlags |= EFI_IFR_FLAG_READ_ONLY;
+ }
+ // Create the RC disabled checkbox
+ HiiCreateCheckBoxOpCode (
+ StartOpCodeHandle, // Container for dynamic created opcodes
+ 0x8002 + MAX_EDITABLE_ELEMENTS * RCIndex, // QuestionId (or "key")
+ PCIE_VARSTORE_ID, // VarStoreId
+ DisabledStatusVarOffset, // VarOffset in Buffer Storage
+ HiiSetString (
+ PrivateData->HiiHandle,
+ 0,
+ Str,
+ NULL
+ ), // Prompt
+ STRING_TOKEN (STR_PCIE_RC_STATUS_HELP), // Help
+ QuestionFlags, // QuestionFlags
+ 0, // CheckBoxFlags
+ NULL // DefaultsOpCodeHandle
+ );
+
+ if (RC->Type == RCA) {
+ // Create Option OpCode to display bifurcation for RCA
+ OptionsOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (OptionsOpCodeHandle != NULL);
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE0),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 0 // Devmap=0
+ );
+
+
+ if (RC->DefaultDevMapLo != 0) {
+ QuestionFlags |= EFI_IFR_FLAG_READ_ONLY;
+ }
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE1),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 1 // Devmap=1
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE2),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 2 // Devmap=2
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE3),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 3 // Devmap=3
+ );
+
+ HiiCreateOneOfOpCode (
+ StartOpCodeHandle, // Container for dynamic created opcodes
+ 0x8003 + MAX_EDITABLE_ELEMENTS * RCIndex, // Question ID (or call it "key")
+ PCIE_VARSTORE_ID, // VarStore ID
+ BifurLoVarOffset, // Offset in Buffer Storage
+ STRING_TOKEN (STR_PCIE_RCA_BIFUR), // Question prompt text
+ STRING_TOKEN (STR_PCIE_RCA_BIFUR_HELP), // Question help text
+ QuestionFlags, // Question flag
+ EFI_IFR_NUMERIC_SIZE_1, // Data type of Question Value
+ OptionsOpCodeHandle, // Option Opcode list
+ NULL // Default Opcode is NULl
+ );
+ } else {
+ // Create Option OpCode to display bifurcation for RCB-Lo
+ OptionsOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (OptionsOpCodeHandle != NULL);
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE4),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 0 // Devmap=0
+ );
+
+ QuestionFlagsSubItem = QuestionFlags;
+ if (RC->DefaultDevMapLo != 0) {
+ QuestionFlagsSubItem |= EFI_IFR_FLAG_READ_ONLY;
+ }
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE5),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 1 // Devmap=1
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE6),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 2 // Devmap=2
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE7),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 3 // Devmap=3
+ );
+
+ HiiCreateOneOfOpCode (
+ StartOpCodeHandle, // Container for dynamic created opcodes
+ 0x8003 + MAX_EDITABLE_ELEMENTS * RCIndex, // Question ID (or call it "key")
+ PCIE_VARSTORE_ID, // VarStore ID
+ BifurLoVarOffset, // Offset in Buffer Storage
+ STRING_TOKEN (STR_PCIE_RCB_LO_BIFUR), // Question prompt text
+ STRING_TOKEN (STR_PCIE_RCB_LO_BIFUR_HELP), // Question help text
+ QuestionFlagsSubItem, // Question flag
+ EFI_IFR_NUMERIC_SIZE_1, // Data type of Question Value
+ OptionsOpCodeHandle, // Option Opcode list
+ NULL // Default Opcode is NULl
+ );
+
+ // Create Option OpCode to display bifurcation for RCB-Hi
+ OptionsHiOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (OptionsHiOpCodeHandle != NULL);
+
+ QuestionFlagsSubItem = QuestionFlags;
+ if (RC->DefaultDevMapHi != 0) {
+ QuestionFlagsSubItem |= EFI_IFR_FLAG_READ_ONLY;
+ }
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsHiOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE4),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 0 // Devmap=0
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsHiOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE5),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 1 // Devmap=1
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsHiOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE6),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 2 // Devmap=2
+ );
+
+ HiiCreateOneOfOptionOpCode (
+ OptionsHiOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_BIFUR_SELECT_VALUE7),
+ 0,
+ EFI_IFR_NUMERIC_SIZE_1,
+ 3 // Devmap=3
+ );
+
+ HiiCreateOneOfOpCode (
+ StartOpCodeHandle, // Container for dynamic created opcodes
+ 0x8004 + MAX_EDITABLE_ELEMENTS * RCIndex, // Question ID (or call it "key")
+ PCIE_VARSTORE_ID, // VarStore ID
+ BifurHiVarOffset, // Offset in Buffer Storage
+ STRING_TOKEN (STR_PCIE_RCB_HI_BIFUR), // Question prompt text
+ STRING_TOKEN (STR_PCIE_RCB_HI_BIFUR_HELP), // Question help text
+ QuestionFlagsSubItem, // Question flag
+ EFI_IFR_NUMERIC_SIZE_1, // Data type of Question Value
+ OptionsHiOpCodeHandle, // Option Opcode list
+ NULL // Default Opcode is NULl
+ );
+ }
+
+ HiiUpdateForm (
+ PrivateData->HiiHandle, // HII handle
+ &gPcieFormSetGuid, // Formset GUID
+ PCIE_RC0_FORM_ID + RCIndex, // Form ID
+ StartOpCodeHandle, // Label for where to insert opcodes
+ EndOpCodeHandle // Insert data
+ );
+
+ HiiFreeOpCodeHandle (StartOpCodeHandle);
+ HiiFreeOpCodeHandle (EndOpCodeHandle);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function sets up the first elements of the form.
+ @param PrivateData Private data.
+ @retval EFI_SUCCESS The form is set up successfully.
+**/
+EFI_STATUS
+PcieMainScreenSetup (
+ IN PCIE_SCREEN_PRIVATE_DATA *PrivateData
+ )
+{
+ VOID *StartOpCodeHandle;
+ EFI_IFR_GUID_LABEL *StartLabel;
+ VOID *EndOpCodeHandle;
+ EFI_IFR_GUID_LABEL *EndLabel;
+ CHAR16 Str[MAX_STRING_SIZE];
+ UINTN RC;
+ PCIE_SETUP_GOTO_DATA *GotoItem = NULL;
+ EFI_QUESTION_ID GotoId;
+
+ // Initialize the container for dynamic opcodes
+ StartOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (StartOpCodeHandle != NULL);
+ EndOpCodeHandle = HiiAllocateOpCodeHandle ();
+ ASSERT (EndOpCodeHandle != NULL);
+
+ // Create Hii Extend Label OpCode as the start opcode
+ StartLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
+ StartOpCodeHandle,
+ &gEfiIfrTianoGuid,
+ NULL,
+ sizeof (EFI_IFR_GUID_LABEL)
+ );
+ StartLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
+ StartLabel->Number = LABEL_UPDATE;
+
+ // Create Hii Extend Label OpCode as the end opcode
+ EndLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
+ EndOpCodeHandle,
+ &gEfiIfrTianoGuid,
+ NULL,
+ sizeof (EFI_IFR_GUID_LABEL)
+ );
+ EndLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
+ EndLabel->Number = LABEL_END;
+
+ HiiCreateCheckBoxOpCode (
+ StartOpCodeHandle, // Container for dynamic created opcodes
+ 0x9000, // Question ID
+ PCIE_VARSTORE_ID, // VarStore ID
+ (UINT16)PCIE_SMMU_PMU_OFFSET, // Offset in Buffer Storage
+ STRING_TOKEN (STR_PCIE_SMMU_PMU_PROMPT), // Question prompt text
+ STRING_TOKEN (STR_PCIE_SMMU_PMU_HELP), // Question help text
+ EFI_IFR_FLAG_CALLBACK | EFI_IFR_FLAG_RESET_REQUIRED,
+ 0,
+ NULL
+ );
+
+ //
+ // Create the a seperated line
+ //
+ HiiCreateTextOpCode (
+ StartOpCodeHandle,
+ STRING_TOKEN (STR_PCIE_FORM_SEPERATE_LINE),
+ STRING_TOKEN (STR_PCIE_FORM_SEPERATE_LINE),
+ STRING_TOKEN (STR_PCIE_FORM_SEPERATE_LINE)
+ );
+
+ // Create Goto form for each RC
+ for (RC = 0; RC < MAX_AC01_PCIE_ROOT_COMPLEX; RC++) {
+
+ GotoItem = AllocateZeroPool (sizeof (PCIE_SETUP_GOTO_DATA));
+ if (GotoItem == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ GotoItem->PciDevIdx = RC;
+
+ GotoId = PCIE_GOTO_ID_BASE + (UINT16)RC;
+
+ // Update HII string
+ UnicodeSPrint (Str, sizeof (Str), L"Root Complex #%2d", RC);
+ GotoItem->GotoStringId = HiiSetString (
+ PrivateData->HiiHandle,
+ 0,
+ Str,
+ NULL
+ );
+ GotoItem->GotoHelpStringId = STRING_TOKEN (STR_PCIE_GOTO_HELP);
+ GotoItem->ShowItem = TRUE;
+
+ // Add goto control
+ HiiCreateGotoOpCode (
+ StartOpCodeHandle,
+ PCIE_RC0_FORM_ID + RC,
+ GotoItem->GotoStringId,
+ GotoItem->GotoHelpStringId,
+ EFI_IFR_FLAG_CALLBACK,
+ GotoId
+ );
+ }
+
+ HiiUpdateForm (
+ PrivateData->HiiHandle, // HII handle
+ &gPcieFormSetGuid, // Formset GUID
+ PCIE_FORM_ID, // Form ID
+ StartOpCodeHandle, // Label for where to insert opcodes
+ EndOpCodeHandle // Insert data
+ );
+
+ HiiFreeOpCodeHandle (StartOpCodeHandle);
+ HiiFreeOpCodeHandle (EndOpCodeHandle);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PcieBoardScreenInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable,
+ IN AC01_RC *NewRCList
+ )
+{
+ EFI_STATUS Status;
+ EFI_HII_HANDLE HiiHandle;
+ EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
+ EFI_HII_STRING_PROTOCOL *HiiString;
+ EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
+ EFI_CONFIG_KEYWORD_HANDLER_PROTOCOL *HiiKeywordHandler;
+ UINTN BufferSize;
+ BOOLEAN IsUpdated;
+ PCIE_VARSTORE_DATA *VarStoreConfig;
+ UINT8 RCIndex;
+ AC01_RC *RC;
+
+ //
+ // Initialize driver private data
+ //
+ mPrivateData = AllocateZeroPool (sizeof (PCIE_SCREEN_PRIVATE_DATA));
+ if (mPrivateData == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ mPrivateData->Signature = PCIE_SCREEN_PRIVATE_DATA_SIGNATURE;
+
+ mPrivateData->ConfigAccess.ExtractConfig = ExtractConfig;
+ mPrivateData->ConfigAccess.RouteConfig = RouteConfig;
+ mPrivateData->ConfigAccess.Callback = DriverCallback;
+
+ //
+ // Locate Hii Database protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiHiiDatabaseProtocolGuid,
+ NULL,
+ (VOID **)&HiiDatabase
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ mPrivateData->HiiDatabase = HiiDatabase;
+
+ //
+ // Locate HiiString protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiHiiStringProtocolGuid,
+ NULL,
+ (VOID **)&HiiString
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ mPrivateData->HiiString = HiiString;
+
+ //
+ // Locate ConfigRouting protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiHiiConfigRoutingProtocolGuid,
+ NULL,
+ (VOID **)&HiiConfigRouting
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ mPrivateData->HiiConfigRouting = HiiConfigRouting;
+
+ //
+ // Locate keyword handler protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiConfigKeywordHandlerProtocolGuid,
+ NULL,
+ (VOID **)&HiiKeywordHandler
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ mPrivateData->HiiKeywordHandler = HiiKeywordHandler;
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mHiiVendorDevicePath,
+ &gEfiHiiConfigAccessProtocolGuid,
+ &mPrivateData->ConfigAccess,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ mPrivateData->DriverHandle = DriverHandle;
+
+ //
+ // Publish our HII data
+ //
+ HiiHandle = HiiAddPackages (
+ &gPcieFormSetGuid,
+ DriverHandle,
+ PcieBoardLibStrings,
+ VfrBin,
+ NULL
+ );
+ if (HiiHandle == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ mPrivateData->HiiHandle = HiiHandle;
+
+ // Make a shadow copy all Root Complexes' properties
+ CopyMem ((VOID *)RCList, (VOID *)NewRCList, sizeof (RCList));
+
+ //
+ // Initialize efi varstore configuration data
+ //
+ VarStoreConfig = &mPrivateData->VarStoreConfig;
+ ZeroMem (VarStoreConfig, sizeof (PCIE_VARSTORE_DATA));
+
+ // Get Buffer Storage data from EFI variable
+ BufferSize = sizeof (PCIE_VARSTORE_DATA);
+ Status = gRT->GetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ NULL,
+ &BufferSize,
+ VarStoreConfig
+ );
+
+ IsUpdated = FALSE;
+
+ if (EFI_ERROR (Status)) {
+ VarStoreConfig->SmmuPmu = 0; /* Disable by default */
+ IsUpdated = TRUE;
+ }
+ // Update board settings to menu
+ for (RCIndex = 0; RCIndex < MAX_AC01_PCIE_ROOT_COMPLEX; RCIndex++) {
+ RC = &RCList[RCIndex];
+
+ if (EFI_ERROR (Status)) {
+ VarStoreConfig->RCBifurLo[RCIndex] = RC->DevMapLo;
+ VarStoreConfig->RCBifurHi[RCIndex] = RC->DevMapHi;
+ VarStoreConfig->RCStatus[RCIndex] = RC->Active;
+ IsUpdated = TRUE;
+ }
+ // FIXME: Disable Root Complex 6 (USB and VGA) as default
Please get rid of the FIXME.

/
Leif

+ if (EFI_ERROR (Status) && RCIndex == 6) {
+ VarStoreConfig->RCStatus[RCIndex] = 0;
+ }
+ }
+
+ if (IsUpdated) {
+ // Update Buffer Storage
+ Status = gRT->SetVariable (
+ VariableName,
+ &gPcieFormSetGuid,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof (PCIE_VARSTORE_DATA),
+ VarStoreConfig
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ }
+ Status = PcieMainScreenSetup (mPrivateData);
+ ASSERT_EFI_ERROR (Status);
+
+ for (RCIndex = 0; RCIndex < MAX_AC01_PCIE_ROOT_COMPLEX; RCIndex++) {
+ Status = PcieRCScreenSetup (RCIndex, mPrivateData);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.uni b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.uni
new file mode 100644
index 000000000000..776eaa476787
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Library/PcieBoardLib/PcieBoardScreen.uni
@@ -0,0 +1,99 @@
+//
+// Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+
+#langdef en-US "English"
+
+#string STR_PCIE_FORM #language en-US "PCIE Root Complex Configuration"
+#string STR_PCIE_FORM_HELP #language en-US "Configure Root Complex"
+
+#string STR_PCIE_FORM_SEPERATE_LINE #language en-US ""
+
+/////
+
+#string STR_PCIE_GOTO #language en-US ""
+#string STR_PCIE_GOTO_HELP #language en-US "Change On Board Root Complex Settings."
+
+#string STR_PCIE_RC_STATUS #language en-US ""
+#string STR_PCIE_RC_STATUS_HELP #language en-US "Enable / Disable Root Complex"
+
+#string STR_PCIE_RCA_BIFUR #language en-US "Bifurcation x16"
+#string STR_PCIE_RCA_BIFUR_HELP #language en-US "Set bifurcation mode for x16 Root Complex Type-A"
+
+#string STR_PCIE_RCB_LO_BIFUR #language en-US "Bifurcation 1st x8"
+#string STR_PCIE_RCB_LO_BIFUR_HELP #language en-US "Set bifurcation mode for 1st x8 Root Complex Type-B"
+
+#string STR_PCIE_RCB_HI_BIFUR #language en-US "Bifurcation 2nd x8"
+#string STR_PCIE_RCB_HI_BIFUR_HELP #language en-US "Set bifurcation mode for 2nd x8 Root Complex Type-B"
+
+/////
+
+#string STR_PCIE_RC0_FORM #language en-US "Root Complex 0 Configuration"
+#string STR_PCIE_RC0_FORM_HELP #language en-US "Root Complex 0 Configuration"
+
+#string STR_PCIE_RC1_FORM #language en-US "Root Complex 1 Configuration"
+#string STR_PCIE_RC1_FORM_HELP #language en-US "Root Complex 1 Configuration"
+
+#string STR_PCIE_RC2_FORM #language en-US "Root Complex 2 Configuration"
+#string STR_PCIE_RC2_FORM_HELP #language en-US "Root Complex 2 Configuration"
+
+#string STR_PCIE_RC3_FORM #language en-US "Root Complex 3 Configuration"
+#string STR_PCIE_RC3_FORM_HELP #language en-US "Root Complex 3 Configuration"
+
+#string STR_PCIE_RC4_FORM #language en-US "Root Complex 4 Configuration"
+#string STR_PCIE_RC4_FORM_HELP #language en-US "Root Complex 4 Configuration"
+
+#string STR_PCIE_RC5_FORM #language en-US "Root Complex 5 Configuration"
+#string STR_PCIE_RC5_FORM_HELP #language en-US "Root Complex 5 Configuration"
+
+#string STR_PCIE_RC6_FORM #language en-US "Root Complex 6 Configuration"
+#string STR_PCIE_RC6_FORM_HELP #language en-US "Root Complex 6 Configuration"
+
+#string STR_PCIE_RC7_FORM #language en-US "Root Complex 7 Configuration"
+#string STR_PCIE_RC7_FORM_HELP #language en-US "Root Complex 7 Configuration"
+
+#string STR_PCIE_RC8_FORM #language en-US "Root Complex 8 Configuration"
+#string STR_PCIE_RC8_FORM_HELP #language en-US "Root Complex 8 Configuration"
+
+#string STR_PCIE_RC9_FORM #language en-US "Root Complex 9 Configuration"
+#string STR_PCIE_RC9_FORM_HELP #language en-US "Root Complex 9 Configuration"
+
+#string STR_PCIE_RC10_FORM #language en-US "Root Complex 10 Configuration"
+#string STR_PCIE_RC10_FORM_HELP #language en-US "Root Complex 10 Configuration"
+
+#string STR_PCIE_RC11_FORM #language en-US "Root Complex 11 Configuration"
+#string STR_PCIE_RC11_FORM_HELP #language en-US "Root Complex 11 Configuration"
+
+#string STR_PCIE_RC12_FORM #language en-US "Root Complex 12 Configuration"
+#string STR_PCIE_RC12_FORM_HELP #language en-US "Root Complex 12 Configuration"
+
+#string STR_PCIE_RC13_FORM #language en-US "Root Complex 13 Configuration"
+#string STR_PCIE_RC13_FORM_HELP #language en-US "Root Complex 13 Configuration"
+
+#string STR_PCIE_RC14_FORM #language en-US "Root Complex 14 Configuration"
+#string STR_PCIE_RC14_FORM_HELP #language en-US "Root Complex 14 Configuration"
+
+#string STR_PCIE_RC15_FORM #language en-US "Root Complex 15 Configuration"
+#string STR_PCIE_RC15_FORM_HELP #language en-US "Root Complex 15 Configuration"
+
+#string STR_PCIE_BIFUR_SELECT_VALUE0 #language en-US "x16"
+#string STR_PCIE_BIFUR_SELECT_VALUE1 #language en-US "x8+x8"
+#string STR_PCIE_BIFUR_SELECT_VALUE2 #language en-US "x8+x4+x4"
+#string STR_PCIE_BIFUR_SELECT_VALUE3 #language en-US "x4+x4+x4+x4"
+#string STR_PCIE_BIFUR_SELECT_VALUE4 #language en-US "x8"
+#string STR_PCIE_BIFUR_SELECT_VALUE5 #language en-US "x4+x4"
+#string STR_PCIE_BIFUR_SELECT_VALUE6 #language en-US "x4+x2+x2"
+#string STR_PCIE_BIFUR_SELECT_VALUE7 #language en-US "x2+x2+x2+x2"
+
+#string STR_PCIE_SOCKET #language en-US "Socket"
+#string STR_PCIE_SOCKET_HELP #language en-US "Socket 0 - Master; Socket 1 - Slave"
+#string STR_PCIE_SOCKET_VALUE #language en-US ""
+
+#string STR_PCIE_RC_TYPE #language en-US "Type"
+#string STR_PCIE_RC_TYPE_HELP #language en-US "Type-A: x16 lanes bifurcated down to x4; Type-B: 2 of x8 lanes, each bifurcated down to x2"
+#string STR_PCIE_RC_TYPE_VALUE #language en-US ""
+
+#string STR_PCIE_SMMU_PMU_PROMPT #language en-US "SMMU Pmu"
+#string STR_PCIE_SMMU_PMU_HELP #language en-US "Enable/Disable PMU feature for SMMU"
--
2.17.1


Re: [edk2-platforms][PATCH v2 13/32] AmpereAltraPkg, JadePkg: Add ACPI support

Nhi Pham
 

On 6/5/21 06:50, Leif Lindholm wrote:
On Wed, May 26, 2021 at 17:07:05 +0700, Nhi Pham wrote:
Add various ACPI tables for the Mt. Jade platform including: DSDT, SPCR,
DBG2, GTDT, FACP, SSDT, MADT, PPTT, PCCT, SLIT, SRAT, and NFIT.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Contents of ACPI tables not reviewed.
Creation modes on many of these files are incorrect (as commented on
cover letter).
Thanks for catching that. Will correct them in the v3.

Best regards,

Nhi

Address this, and you can have:
Acked-by: Leif Lindholm <leif@nuviainc.com>

/
Leif

---
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 8 +
Platform/Ampere/JadePkg/Jade.dsc | 23 +
Platform/Ampere/JadePkg/Jade.fdf | 8 +
Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf | 20 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 75 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf | 44 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.h | 121 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.h | 49 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatform.h | 76 +
Silicon/Ampere/AmpereAltraPkg/Include/AcpiHeader.h | 37 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c | 457 ++
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c | 445 ++
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c | 351 ++
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.c | 599 +++
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c | 196 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c | 178 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPptt.c | 378 ++
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSlit.c | 190 +
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c | 274 +
Platform/Ampere/JadePkg/AcpiTables/CPU-S0.asi | 5639 ++++++++++++++++++++
Platform/Ampere/JadePkg/AcpiTables/CPU-S1.asi | 5639 ++++++++++++++++++++
Platform/Ampere/JadePkg/AcpiTables/CPU.asi | 127 +
Platform/Ampere/JadePkg/AcpiTables/Dsdt.asl | 575 ++
Platform/Ampere/JadePkg/AcpiTables/PCI-PDRC.asi | 217 +
Platform/Ampere/JadePkg/AcpiTables/PCI-S0.Rca01.asi | 681 +++
Platform/Ampere/JadePkg/AcpiTables/PCI-S0.asi | 2078 ++++++++
Platform/Ampere/JadePkg/AcpiTables/PCI-S1.asi | 2087 ++++++++
Platform/Ampere/JadePkg/AcpiTables/PMU-S0.asi | 1303 +++++
Platform/Ampere/JadePkg/AcpiTables/PMU-S1.asi | 1303 +++++
Platform/Ampere/JadePkg/AcpiTables/PMU.asi | 10 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Bert.aslc | 33 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Dbg2.aslc | 87 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Einj.asl | 165 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Fadt.aslc | 87 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Gtdt.aslc | 180 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Hest.asl | 330 ++
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Sdei.asl | 17 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Spcr.aslc | 81 +
Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/Ssdt.asl | 15 +
39 files changed, 24183 insertions(+)

diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
index 3c47099b8edc..11f50f2f09cd 100755
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
@@ -466,6 +466,14 @@ [PcdsFixedAtBuild.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+ #
+ # ACPI table
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"Ampere"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x2020206172746C41 # Altra
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x2E504D41 # AMP.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x01000013
+
#
# Enable strict image permissions for all images. (This applies
# only to images that were built with >= 4 KB section alignment.)
diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
index 9b9a5d0bad0f..0f9d0adbd34e 100755
--- a/Platform/Ampere/JadePkg/Jade.dsc
+++ b/Platform/Ampere/JadePkg/Jade.dsc
@@ -81,12 +81,24 @@ [LibraryClasses]
#
FailSafeLib|Platform/Ampere/AmperePlatformPkg/Library/FailSafeLib/FailSafeLib.inf
+ #
+ # ACPI Libraries
+ #
+ AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf
+ AcpiHelperLib|Platform/Ampere/AmperePlatformPkg/Library/AcpiHelperLib/AcpiHelperLib.inf
+ AcpiPccLib|Platform/Ampere/AmperePlatformPkg/Library/AcpiPccLib/AcpiPccLib.inf
+
################################################################################
#
# Specific Platform Pcds
#
################################################################################
[PcdsFeatureFlag.common]
+ #
+ # Activate AcpiSdtProtocol
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+
[PcdsFixedAtBuild.common]
!if $(SECURE_BOOT_ENABLE) == TRUE
@@ -108,3 +120,14 @@ [Components.common]
# FailSafe and Watchdog Timer
#
Platform/Ampere/AmperePlatformPkg/Drivers/FailSafeDxe/FailSafeDxe.inf
+
+ #
+ # ACPI
+ #
+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2B
+ }
+ Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
+ Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 375455086d0b..2c6f9fac76fd 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -289,4 +289,12 @@ [FV.FvMain]
#
!include NetworkPkg/Network.fdf.inc
+ #
+ # ACPI
+ #
+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+ INF Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ INF RuleOverride=ACPITABLE Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
+ INF RuleOverride=ACPITABLE Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf
+
!include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc
diff --git a/Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf b/Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf
new file mode 100644
index 000000000000..1cf632f8a406
--- /dev/null
+++ b/Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf
@@ -0,0 +1,20 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = JadeAcpiTables
+ FILE_GUID = 5ADDBC13-8634-480C-9B94-671B7855CDB8
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dsdt.asl
+
+[Packages]
+ MdePkg/MdePkg.dec
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
new file mode 100644
index 000000000000..a1a323eee472
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -0,0 +1,75 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = AcpiPlatformDxe
+ FILE_GUID = CDA4ED56-6960-4092-885D-FEF37D29093E
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = AcpiPlatformDxeInitialize
+
+[Sources.common]
+ AcpiApei.c
+ AcpiApei.h
+ AcpiDsdt.c
+ AcpiMadt.c
+ AcpiNfit.c
+ AcpiPcct.c
+ AcpiPptt.c
+ AcpiPlatform.h
+ AcpiPlatformDxe.c
+ AcpiSlit.c
+ AcpiSrat.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AcpiHelperLib
+ AcpiLib
+ AcpiPccLib
+ AmpereCpuLib
+ BaseLib
+ DebugLib
+ FlashLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+ UefiRuntimeServicesTableLib
+
+[Pcd]
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
+ gAmpereTokenSpaceGuid.PcdPmproDbBaseReg
+ gAmpereTokenSpaceGuid.PcdSmproDbBaseReg
+
+[Guids]
+ gArmMpCoreInfoGuid
+ gEfiAcpiTableGuid
+ gEfiEventReadyToBootGuid
+ gPlatformHobGuid
+
+[Protocols]
+ gEfiAcpiTableProtocolGuid ## ALWAYS_CONSUMED
+ gEfiAcpiSdtProtocolGuid
+ gEfiPciRootBridgeIoProtocolGuid
+
+[Depex]
+ gEfiAcpiTableProtocolGuid
diff --git a/Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf b/Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
new file mode 100644
index 000000000000..acc4092c650d
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf
@@ -0,0 +1,44 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = AcpiCommonTables
+ FILE_GUID = CEFA2AEB-357E-4F48-8066-EA950853056E
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Bert.aslc
+ Dbg2.aslc
+ Einj.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Hest.asl
+ Sdei.asl
+ Spcr.aslc
+ Ssdt.asl
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt ## CONSUMES
+ gArmPlatformTokenSpaceGuid.PcdWatchdogCount ## CONSUMES
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision ## CONSUMES
+
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## CONSUMES
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.h b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.h
new file mode 100644
index 000000000000..c207142459ad
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.h
@@ -0,0 +1,121 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef ACPI_APEI_H_
+#define ACPI_APEI_H_
+
+#include <Base.h>
+#include <IndustryStandard/Acpi63.h>
+#include <Library/AcpiHelperLib.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Platform/Ac01.h>
+#include <Protocol/AcpiTable.h>
+
+#pragma pack(1)
+#define BERT_MSG_SIZE 0x2C
+#define BERT_ERROR_TYPE 0x7F
+#define BERT_UEFI_FAILURE 5
+#define RAS_2P_TYPE 0x03
+#define BERT_DEFAULT_ERROR_SEVERITY 0x1
+#define GENERIC_ERROR_DATA_REVISION 0x300
+
+
+#define PLAT_CRASH_ITERATOR_SIZE 0x398
+#define SMPRO_CRASH_SIZE 0x800
+#define PMPRO_CRASH_SIZE 0x800
+#define HEST_NUM_ENTRIES_PER_SOC 3
+
+#define CURRENT_BERT_VERSION 0x10
+#define BERT_FLASH_OFFSET 0x91B30000ULL
+#define BERT_DDR_OFFSET 0x88230000ULL
+#define BERT_DDR_LENGTH 0x50000
+
+typedef struct {
+ UINT8 Type;
+ UINT8 SubType;
+ UINT16 Instance;
+ CHAR8 Msg[BERT_MSG_SIZE];
+} APEI_BERT_ERROR_DATA;
+
+typedef struct {
+ APEI_BERT_ERROR_DATA Vendor;
+ UINT8 BertRev;
+ UINT8 S0PmproRegisters[PMPRO_CRASH_SIZE];
+ UINT8 S0SmproRegisters[SMPRO_CRASH_SIZE];
+ UINT8 S1PmproRegisters[PMPRO_CRASH_SIZE];
+ UINT8 S1SmproRegisters[SMPRO_CRASH_SIZE];
+ UINT8 AtfDump[PLATFORM_CPU_MAX_NUM_CORES * PLAT_CRASH_ITERATOR_SIZE];
+} APEI_CRASH_DUMP_DATA;
+
+typedef struct {
+ EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE Ges;
+ EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE Ged;
+ APEI_CRASH_DUMP_DATA Bed;
+} APEI_CRASH_DUMP_BERT_ERROR;
+#pragma pack()
+
+VOID
+EFIAPI
+CreateDefaultBertData (
+ APEI_BERT_ERROR_DATA *Data
+ );
+
+VOID
+EFIAPI
+WrapBertErrorData (
+ APEI_CRASH_DUMP_BERT_ERROR *WrappedError
+ );
+
+VOID
+EFIAPI
+PullBertSpinorData (
+ APEI_CRASH_DUMP_DATA *BertErrorData
+ );
+
+VOID
+EFIAPI
+AdjustBERTRegionLen (
+ UINT32 Len
+ );
+
+BOOLEAN
+EFIAPI
+IsBertEnabled (
+ VOID
+ );
+
+VOID
+EFIAPI
+WriteDDRBertTable (
+ APEI_CRASH_DUMP_BERT_ERROR *Data
+ );
+
+VOID
+WriteSpinorDefaultBertTable (
+ APEI_CRASH_DUMP_DATA *SpiRefrenceData
+ );
+
+EFI_STATUS
+EFIAPI
+AcpiApeiUpdate (
+ VOID
+ );
+
+EFI_STATUS
+EFIAPI
+AcpiPopulateBert (
+ VOID
+ );
+
+#endif /* ACPI_APEI_H_ */
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.h b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.h
new file mode 100644
index 000000000000..920579281dd5
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.h
@@ -0,0 +1,49 @@
+/** @file
+
+ Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef ACPI_NFIT_H_
+#define ACPI_NFIT_H_
+
+#include <Platform/Ac01.h>
+
+#define NVDIMM_SK0 0
+#define NVDIMM_SK1 1
+#define NVDIMM_NUM_PER_SK (PLATFORM_NVDIMM_MCU_MAX_PER_SK * PLATFORM_NVDIMM_NUM_MAX_PER_MCU)
+#define ONE_GB (1024 * 1024 * 1024)
+
+enum NvdimmMode {
+ NVDIMM_DISABLED = 0,
+ NVDIMM_NON_HASHED = 1,
+ NVDIMM_HASHED = 2
+};
+
+typedef struct {
+ BOOLEAN Enabled;
+ UINT64 NvdSize;
+ UINT32 DeviceHandle;
+ UINT16 PhysId;
+ UINT8 InterleaveWays;
+ UINT64 RegionOffset;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 RevisionId;
+ UINT16 SubVendorId;
+ UINT16 SubDeviceId;
+ UINT16 SubRevisionId;
+ UINT32 SerialNumber;
+} NVDIMM_INFO;
+
+typedef struct {
+ UINT8 NvdRegionNum;
+ UINT8 NvdRegionId[PLATFORM_NVDIMM_REGION_MAX_PER_SK];
+ UINT8 NvdMode;
+ UINT8 NvdNum;
+ NVDIMM_INFO NvdInfo[NVDIMM_NUM_PER_SK];
+} NVDIMM_DATA;
+
+#endif
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatform.h b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatform.h
new file mode 100644
index 000000000000..ce4d9b8440b8
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatform.h
@@ -0,0 +1,76 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef ACPI_PLATFORM_H_
+#define ACPI_PLATFORM_H_
+
+#include <Uefi.h>
+
+#include <AcpiHeader.h>
+#include <Guid/EventGroup.h>
+#include <Guid/PlatformInfoHobGuid.h>
+#include <IndustryStandard/Acpi63.h>
+#include <Library/ArmLib/ArmLibPrivate.h>
+#include <Library/AcpiHelperLib.h>
+#include <Library/AcpiLib.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Platform/Ac01.h>
+#include <PlatformInfoHob.h>
+#include <Protocol/AcpiTable.h>
+
+EFI_STATUS
+AcpiPatchDsdtTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallMadtTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallNfitTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiPcctInit (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallPcctTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallPpttTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallSlitTable (
+ VOID
+ );
+
+EFI_STATUS
+AcpiInstallSratTable (
+ VOID
+ );
+
+#endif /* ACPI_PLATFORM_H_ */
diff --git a/Silicon/Ampere/AmpereAltraPkg/Include/AcpiHeader.h b/Silicon/Ampere/AmpereAltraPkg/Include/AcpiHeader.h
new file mode 100644
index 000000000000..d604b712d8c8
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Include/AcpiHeader.h
@@ -0,0 +1,37 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef ACPI_HEADER_H_
+#define ACPI_HEADER_H_
+
+#include <IndustryStandard/Acpi.h>
+
+//
+// ACPI table information used to initialize tables.
+//
+#define EFI_ACPI_OEM_ID {'A','m','p','e','r','e'}
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('A','l','t','r','a',' ',' ',' ')
+#define EFI_ACPI_OEM_REVISION FixedPcdGet32 (PcdAcpiDefaultOemRevision)
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32('A','M','P','.')
+#define EFI_ACPI_CREATOR_REVISION FixedPcdGet32 (PcdAcpiDefaultCreatorRevision)
+
+// A macro to initialise the common header part of EFI ACPI tables as defined by
+// EFI_ACPI_DESCRIPTION_HEADER structure.
+#define __ACPI_HEADER(Signature, Type, Revision) { \
+ Signature, /* UINT32 Signature */ \
+ sizeof (Type), /* UINT32 Length */ \
+ Revision, /* UINT8 Revision */ \
+ 0, /* UINT8 Checksum */ \
+ EFI_ACPI_OEM_ID, /* UINT8 OemId[6] */ \
+ EFI_ACPI_OEM_TABLE_ID, /* UINT64 OemTableId */ \
+ EFI_ACPI_OEM_REVISION, /* UINT32 OemRevision */ \
+ EFI_ACPI_CREATOR_ID, /* UINT32 CreatorId */ \
+ EFI_ACPI_CREATOR_REVISION /* UINT32 CreatorRevision */ \
+ }
+
+#endif /* ACPI_HEADER_H_ */
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c
new file mode 100644
index 000000000000..fa188c7776db
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c
@@ -0,0 +1,457 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Library/AcpiHelperLib.h>
+#include <Library/FlashLib.h>
+#include <Library/NVParamLib.h>
+#include <NVParamDef.h>
+
+#include "AcpiApei.h"
+
+UINT8 AMPERE_GUID[16] = {0x8d, 0x89, 0xed, 0xe8, 0x16, 0xdf, 0xcc, 0x43, 0x8e, 0xcc, 0x54, 0xf0, 0x60, 0xef, 0x15, 0x7f};
+CHAR8 DEFAULT_BERT_REBOOT_MSG[BERT_MSG_SIZE] = "Unknown reboot reason";
+
+STATIC VOID
+AcpiApeiUninstallTable (
+ UINT32 Signature
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ EFI_ACPI_SDT_PROTOCOL *AcpiTableSdtProtocol;
+ EFI_ACPI_SDT_HEADER *Table;
+ EFI_ACPI_TABLE_VERSION TableVersion;
+ UINTN TableKey;
+ UINTN Idx;
+
+ /*
+ * Get access to ACPI tables
+ */
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTableProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table protocol\n", __FUNCTION__, __LINE__));
+ return;
+ }
+
+ Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID **)&AcpiTableSdtProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table support protocol\n", __FUNCTION__, __LINE__));
+ return;
+ }
+
+ /*
+ * Search for ACPI Table Signature
+ */
+ for (Idx = 0; ; Idx++) {
+ Status = AcpiTableSdtProtocol->GetAcpiTable (Idx, &Table, &TableVersion, &TableKey);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to get ACPI table index %d \n", __FUNCTION__, __LINE__, Idx));
+ return;
+ } else if (Table->Signature == Signature) {
+ break;
+ }
+ }
+
+ /*
+ * Uninstall ACPI Table
+ */
+ Status = AcpiTableProtocol->UninstallAcpiTable (AcpiTableProtocol, TableKey);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to uninstall table\n", __FUNCTION__, __LINE__));
+ }
+}
+
+VOID
+AdjustBERTRegionLen (
+ UINT32 Len
+ )
+{
+ UINT32 Signature = EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_SIGNATURE;
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL *AcpiTableSdtProtocol = NULL;
+ EFI_ACPI_TABLE_VERSION TableVersion;
+ UINTN TableKey;
+ UINTN Idx;
+ EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_HEADER *Table;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableSdtProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "APEI: Unable to locate ACPI table support protocol\n"));
+ return;
+ }
+
+ /*
+ * Search for ACPI Table Signature
+ */
+ for (Idx = 0; ; Idx++) {
+ Status = AcpiTableSdtProtocol->GetAcpiTable (
+ Idx,
+ (EFI_ACPI_SDT_HEADER **)&Table,
+ &TableVersion,
+ &TableKey
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "APEI: Unable to get ACPI table index:%d\n", Idx));
+ return;
+ } else if (Table->Header.Signature == Signature) {
+ break;
+ }
+ }
+
+ /*
+ * Adjust Boot Error Region Length
+ */
+ Table->BootErrorRegionLength = Len;
+
+ AcpiTableChecksum ((UINT8 *)Table, Table->Header.Length);
+}
+
+/*
+ * Retrieve Bert data from SPI NOR
+ */
+VOID
+PullBertSpinorData (
+ APEI_CRASH_DUMP_DATA *BertErrorData
+ )
+{
+ UINTN Length;
+
+ Length = sizeof (*BertErrorData);
+
+ FlashReadCommand (
+ (UINT8 *)BERT_FLASH_OFFSET,
+ (UINT8 *)BertErrorData,
+ &Length
+ );
+}
+
+/*
+ * wrap raw bert error data
+ *
+ * @param IN BertErrorData Bert Error record to be wrapped
+ * @param OUT WrappedError Generic error data for OS to consume.
+ */
+VOID
+WrapBertErrorData (
+ APEI_CRASH_DUMP_BERT_ERROR *WrappedError
+ )
+{
+ UINT32 CrashSize;
+
+ CrashSize = PLAT_CRASH_ITERATOR_SIZE *
+ GetNumberOfSupportedSockets () *
+ GetMaximumNumberOfCores ();
+ CrashSize += 2 * (SMPRO_CRASH_SIZE + PMPRO_CRASH_SIZE);
+ CrashSize += sizeof (WrappedError->Bed.Vendor) + sizeof (WrappedError->Bed.BertRev);
+
+ WrappedError->Ges.BlockStatus.ErrorDataEntryCount = 1;
+ WrappedError->Ges.BlockStatus.UncorrectableErrorValid = 1;
+ WrappedError->Ged.ErrorSeverity = BERT_DEFAULT_ERROR_SEVERITY;
+ WrappedError->Ged.Revision = GENERIC_ERROR_DATA_REVISION;
+
+ if (WrappedError->Bed.Vendor.Type == RAS_2P_TYPE ||
+ (WrappedError->Bed.Vendor.Type == BERT_ERROR_TYPE &&
+ (WrappedError->Bed.Vendor.SubType == 0 ||
+ WrappedError->Bed.Vendor.SubType == BERT_UEFI_FAILURE)))
+ {
+ WrappedError->Ged.ErrorDataLength = sizeof (WrappedError->Bed.Vendor) +
+ sizeof (WrappedError->Bed.BertRev);
+ WrappedError->Ges.DataLength = sizeof (WrappedError->Bed.Vendor) +
+ sizeof (WrappedError->Bed.BertRev) +
+ sizeof (WrappedError->Ged);
+ AdjustBERTRegionLen (
+ sizeof (WrappedError->Bed.Vendor) +
+ sizeof (WrappedError->Bed.BertRev) +
+ sizeof (WrappedError->Ged) +
+ sizeof (WrappedError->Ges)
+ );
+ } else {
+ WrappedError->Ged.ErrorDataLength = CrashSize;
+ WrappedError->Ges.DataLength = CrashSize + sizeof (WrappedError->Ged);
+ AdjustBERTRegionLen (
+ CrashSize +
+ sizeof (WrappedError->Ged) +
+ sizeof (WrappedError->Ges)
+ );
+ }
+ CopyMem (
+ WrappedError->Ged.SectionType,
+ AMPERE_GUID,
+ sizeof (AMPERE_GUID)
+ );
+}
+
+
+/*
+ * create default bert error
+ * Msg: Unknown reboot reason
+ */
+VOID
+CreateDefaultBertData (
+ APEI_BERT_ERROR_DATA *Data
+ )
+{
+ Data->Type = BERT_ERROR_TYPE;
+ AsciiStrCpyS (
+ Data->Msg,
+ BERT_MSG_SIZE,
+ DEFAULT_BERT_REBOOT_MSG
+ );
+}
+
+/*
+ * Ensures BertErrorData In SPINOR matches
+ * the record produced by CreateDefaultBertData.
+ * @param Bed Crash dump Data
+ */
+VOID
+WriteSpinorDefaultBertTable (
+ APEI_CRASH_DUMP_DATA *Bed
+ )
+{
+ UINT8 BertRev;
+ UINTN Length;
+ UINT64 Offset;
+ UINT32 MsgDiff;
+ APEI_BERT_ERROR_DATA DefaultData = {0};
+
+ CreateDefaultBertData (&DefaultData);
+ if ((Bed->Vendor.Type != DefaultData.Type)) {
+ Offset = BERT_FLASH_OFFSET +
+ OFFSET_OF (APEI_CRASH_DUMP_DATA, Vendor) +
+ OFFSET_OF (APEI_BERT_ERROR_DATA, Type);
+ Length = sizeof (DefaultData.Type);
+ FlashEraseCommand ((UINT8 *)Offset, Length);
+ FlashProgramCommand (
+ (UINT8 *)Offset,
+ (UINT8 *)&(DefaultData.Type),
+ &Length
+ );
+ }
+
+ if ((Bed->Vendor.SubType != DefaultData.SubType)) {
+ Offset = BERT_FLASH_OFFSET +
+ OFFSET_OF (APEI_CRASH_DUMP_DATA, Vendor) +
+ OFFSET_OF (APEI_BERT_ERROR_DATA, SubType);
+ Length = sizeof (DefaultData.SubType);
+ FlashEraseCommand ((UINT8 *)Offset, Length);
+ FlashProgramCommand (
+ (UINT8 *)Offset,
+ (UINT8 *)&(DefaultData.SubType),
+ &Length
+ );
+ }
+
+ if ((Bed->Vendor.Instance != DefaultData.Instance)) {
+ Offset = BERT_FLASH_OFFSET +
+ OFFSET_OF (APEI_CRASH_DUMP_DATA, Vendor) +
+ OFFSET_OF (APEI_BERT_ERROR_DATA, Instance);
+ Length = sizeof (DefaultData.Instance);
+ FlashEraseCommand ((UINT8 *)Offset, Length);
+ FlashProgramCommand (
+ (UINT8 *)Offset,
+ (UINT8 *)&(DefaultData.Instance),
+ &Length
+ );
+ }
+
+ MsgDiff = AsciiStrnCmp (Bed->Vendor.Msg, DefaultData.Msg, BERT_MSG_SIZE);
+ if (MsgDiff != 0) {
+ Offset = BERT_FLASH_OFFSET +
+ OFFSET_OF (APEI_CRASH_DUMP_DATA, Vendor) +
+ OFFSET_OF (APEI_BERT_ERROR_DATA, Msg);
+ Length = sizeof (DefaultData.Msg);
+ FlashEraseCommand ((UINT8 *)Offset, Length);
+ FlashProgramCommand (
+ (UINT8 *)Offset,
+ (UINT8 *)&(DefaultData.Msg),
+ &Length
+ );
+ }
+
+ if (Bed->BertRev != CURRENT_BERT_VERSION) {
+ Offset = BERT_FLASH_OFFSET + OFFSET_OF (APEI_CRASH_DUMP_DATA, BertRev);
+ Length = sizeof (Bed->BertRev);
+ BertRev = CURRENT_BERT_VERSION;
+ FlashEraseCommand ((UINT8 *)Offset, Length);
+ FlashProgramCommand ((UINT8 *)Offset, (UINT8 *)&BertRev, &Length);
+ }
+
+}
+
+/*
+ * Checks Status of NV_SI_RAS_BERT_ENABLED
+ * Returns TRUE if enabled and FALSE if disabled
+ */
+BOOLEAN
+IsBertEnabled (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Value;
+
+ Status = NVParamGet (
+ NV_SI_RAS_BERT_ENABLED,
+ NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
+ &Value
+ );
+ if (EFI_ERROR (Status)) {
+ // BERT is enabled by default
+ return TRUE;
+ }
+
+ return (Value != 0) ? TRUE : FALSE;
+}
+
+/*
+ * Write bert table to DDR
+ */
+VOID
+WriteDDRBertTable (
+ APEI_CRASH_DUMP_BERT_ERROR *Data
+ )
+{
+ VOID *Blk = (VOID *)BERT_DDR_OFFSET;
+
+ /*
+ * writing sizeof data to ddr produces alignment error
+ * this is a temporary workaround
+ */
+ CopyMem (Blk, Data, BERT_DDR_LENGTH);
+}
+
+/*
+ * Update Bert Table
+ */
+EFI_STATUS
+AcpiPopulateBert (
+ VOID
+ )
+{
+ APEI_CRASH_DUMP_BERT_ERROR *DDRError;
+
+ DDRError =
+ (APEI_CRASH_DUMP_BERT_ERROR *)
+ AllocateZeroPool (sizeof (APEI_CRASH_DUMP_BERT_ERROR));
+
+ if (DDRError == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (IsBertEnabled ()) {
+ PullBertSpinorData (&(DDRError->Bed));
+ if ((DDRError->Bed.BertRev == CURRENT_BERT_VERSION)) {
+ WrapBertErrorData (DDRError);
+ WriteDDRBertTable (DDRError);
+ }
+ WriteSpinorDefaultBertTable (&(DDRError->Bed));
+ }
+
+ FreePool (DDRError);
+ return EFI_SUCCESS;
+}
+
+/*
+ * Checks Status of NV_SI_RAS_SDEI_ENABLED
+ * Returns TRUE if enabled and FALSE if disabled or error occurred
+ */
+BOOLEAN
+IsSdeiEnabled (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Value;
+
+ Status = NVParamGet (
+ NV_SI_RAS_SDEI_ENABLED,
+ NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
+ &Value
+ );
+ if (EFI_ERROR (Status)) {
+ // SDEI is disabled by default
+ return FALSE;
+ }
+
+ return (Value != 0) ? TRUE : FALSE;
+}
+
+STATIC
+VOID
+AcpiApeiHestUpdateTable1P (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL *AcpiTableSdtProtocol = NULL;
+ EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestTablePointer;
+ EFI_ACPI_TABLE_VERSION TableVersion;
+ UINTN TableKey;
+ UINTN Idx;
+
+ Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID **)&AcpiTableSdtProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "APEI: Unable to locate ACPI table support protocol\n"));
+ return;
+ }
+
+ /*
+ * Search for ACPI Table Signature
+ */
+ for (Idx = 0; ; Idx++) {
+ Status = AcpiTableSdtProtocol->GetAcpiTable (
+ Idx,
+ (EFI_ACPI_SDT_HEADER **)&HestTablePointer,
+ &TableVersion,
+ &TableKey
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "APEI: Unable to get HEST table"));
+ return;
+ } else if (HestTablePointer->Header.Signature ==
+ EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE)
+ {
+ break;
+ }
+ }
+
+ HestTablePointer->ErrorSourceCount -= HEST_NUM_ENTRIES_PER_SOC;
+ HestTablePointer->Header.Length -=
+ (HEST_NUM_ENTRIES_PER_SOC *
+ sizeof (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE));
+
+ AcpiTableChecksum ((UINT8 *)HestTablePointer, HestTablePointer->Header.Length);
+}
+
+/*
+ * Update APEI
+ *
+ */
+EFI_STATUS
+EFIAPI
+AcpiApeiUpdate (
+ VOID
+ )
+{
+ if (!IsSlaveSocketActive ()) {
+ AcpiApeiHestUpdateTable1P ();
+ }
+
+ if (!IsSdeiEnabled ()) {
+ AcpiApeiUninstallTable (EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE);
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c
new file mode 100644
index 000000000000..7881044104e4
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c
@@ -0,0 +1,445 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Protocol/PciRootBridgeIo.h>
+#include <Library/NVParamLib.h>
+#include <NVParamDef.h>
+
+#include "AcpiNfit.h"
+#include "AcpiPlatform.h"
+
+#define PCIE_DEVICE_CONTROL_OFFSET 0x078
+#define PCIE_DEVICE_CONTROL_UNSUPPORT_REQ_REP_EN 0x08
+#define PCIE_DEVICE_CONTROL_FATAL_ERR_REPORT_EN 0x04
+#define PCIE_DEVICE_CONTROL_NON_FATAL_ERR_REPORT_EN 0x02
+#define PCIE_DEVICE_CONTROL_CORR_ERR_REPORT_EN 0x01
+
+#define PCIE_ROOT_ERR_CMD_OFFSET 0x12C
+#define PCIE_ROOT_ERR_CMD_FATAL_ERR_REPORTING_EN 0x4
+#define PCIE_ROOT_ERR_CMD_NON_FATAL_ERR_REPORTING_EN 0x2
+#define PCIE_ROOT_ERR_CMD_CORR_ERR_REPORTING_EN 0x1
+
+#define PCIE_MAX_DEVICE_PER_ROOT_PORT 8
+
+STATIC VOID
+AcpiPatchCmn600 (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINTN Index;
+
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.CMN%1X._STA", Index);
+ if (GetNumberOfActiveCPMsPerSocket (Index) > 0) {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0xf);
+ } else {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+}
+
+STATIC VOID
+AcpiPatchDmc620 (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINTN Index, Index1;
+ PLATFORM_INFO_HOB *PlatformHob;
+ UINT32 McuMask;
+ VOID *Hob;
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ McuMask = PlatformHob->DramInfo.McuMask[Index];
+ for (Index1 = 0; Index1 < sizeof (McuMask) * 8; Index1++) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.MC%1X%1X._STA", Index, Index1);
+ if (McuMask & (0x1 << Index1)) {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0xf);
+ } else {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+ }
+}
+
+STATIC VOID
+AcpiPatchNvdimm (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINTN NvdRegionNumSK0, NvdRegionNumSK1, NvdRegionNum, Count;
+ PLATFORM_INFO_HOB *PlatformHob;
+ VOID *Hob;
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return;
+ }
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ NvdRegionNumSK0 = 0;
+ NvdRegionNumSK1 = 0;
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ if (PlatformHob->DramInfo.NvdRegion[Count] > 0) {
+ if (PlatformHob->DramInfo.Socket[Count] == 0) {
+ NvdRegionNumSK0++;
+ } else {
+ NvdRegionNumSK1++;
+ }
+ }
+ }
+ NvdRegionNum = NvdRegionNumSK0 + NvdRegionNumSK1;
+
+ /* Disable NVDIMM Root Device */
+ if (NvdRegionNum == 0) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ /* Update NVDIMM Device _STA for SK0 */
+ if (NvdRegionNumSK0 == 0) {
+ /* Disable NVD1/2 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD1._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD2._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ } else if (NvdRegionNumSK0 == 1) {
+ if (PlatformHob->DramInfo.NvdimmMode[NVDIMM_SK0] == NVDIMM_NON_HASHED) {
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ if (PlatformHob->DramInfo.NvdRegion[Count] > 0 &&
+ PlatformHob->DramInfo.Socket[Count] == 0)
+ {
+ if (PlatformHob->DramInfo.Base[Count] ==
+ PLATFORM_NVDIMM_SK0_NHASHED_REGION0)
+ {
+ /* Disable NVD2 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD2._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ } else if (PlatformHob->DramInfo.Base[Count] ==
+ PLATFORM_NVDIMM_SK0_NHASHED_REGION1)
+ {
+ /* Disable NVD1 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD1._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+ }
+ }
+ }
+ /* Update NVDIMM Device _STA for SK1 */
+ if (NvdRegionNumSK1 == 0) {
+ /* Disable NVD3/4 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD3._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD4._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ } else if (NvdRegionNumSK1 == 1) {
+ if (PlatformHob->DramInfo.NvdimmMode[NVDIMM_SK1] == NVDIMM_NON_HASHED) {
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ if (PlatformHob->DramInfo.NvdRegion[Count] > 0 &&
+ PlatformHob->DramInfo.Socket[Count] == 1)
+ {
+ if (PlatformHob->DramInfo.Base[Count] ==
+ PLATFORM_NVDIMM_SK1_NHASHED_REGION0)
+ {
+ /* Disable NVD4 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD4._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ } else if (PlatformHob->DramInfo.Base[Count] ==
+ PLATFORM_NVDIMM_SK1_NHASHED_REGION1)
+ {
+ /* Disable NVD3 */
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.NVDR.NVD3._STA");
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+ }
+ }
+ }
+}
+
+STATIC VOID
+AcpiPatchHwmon (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINT8 Index;
+
+ // PCC Hardware Monitor Devices
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.HM0%1X._STA", Index);
+ if (GetNumberOfActiveCPMsPerSocket (Index) > 0) {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0xf);
+ } else {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+
+ // Ampere Altra SoC Hardware Monitor Devices
+ for (Index = 0; Index < GetNumberOfSupportedSockets (); Index++) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.HM0%1X._STA", Index + 2);
+ if (GetNumberOfActiveCPMsPerSocket (Index) > 0) {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0xf);
+ } else {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+}
+
+STATIC VOID
+AcpiPatchDsu (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINTN Index;
+
+ for (Index = 0; Index < PLATFORM_CPU_MAX_NUM_CORES; Index += PLATFORM_CPU_NUM_CORES_PER_CPM) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.DU%2X._STA", Index / PLATFORM_CPU_NUM_CORES_PER_CPM);
+ if (IsCpuEnabled (Index)) {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0xf);
+ } else {
+ AcpiDSDTSetNodeStatusValue (NodePath, 0x0);
+ }
+ }
+}
+
+VOID
+AcpiPatchPcieNuma (
+ VOID
+ )
+{
+ CHAR8 NodePath[MAX_ACPI_NODE_PATH];
+ UINTN Index;
+ UINTN NumaIdx;
+ UINTN NumPciePort;
+ UINTN NumaAssignment[3][16] = {
+ { 0, 0, 0, 0, 0, 0, 0, 0, // Monolithic Node 0 (S0)
+ 1, 1, 1, 1, 1, 1, 1, 1 }, // Monolithic Node 1 (S1)
+ { 0, 1, 0, 1, 0, 0, 1, 1, // Hemisphere Node 0, 1 (S0)
+ 2, 3, 2, 3, 2, 2, 3, 3 }, // Hemisphere Node 2, 3 (S1)
+ { 0, 2, 1, 3, 1, 1, 3, 3, // Quadrant Node 0, 1, 2, 3 (S0)
+ 4, 6, 5, 7, 5, 5, 7, 7 }, // Quadrant Node 4, 5, 6, 7 (S1)
+ };
+
+ switch (CpuGetSubNumaMode ()) {
+ case SUBNUMA_MODE_MONOLITHIC:
+ NumaIdx = 0;
+ break;
+
+ case SUBNUMA_MODE_HEMISPHERE:
+ NumaIdx = 1;
+ break;
+
+ case SUBNUMA_MODE_QUADRANT:
+ NumaIdx = 2;
+ break;
+
+ default:
+ NumaIdx = 0;
+ break;
+ }
+
+ if (IsSlaveSocketActive ()) {
+ NumPciePort = 16; // 16 ports total (8 per socket)
+ } else {
+ NumPciePort = 8; // 8 ports total
+ }
+
+ for (Index = 0; Index < NumPciePort; Index++) {
+ AsciiSPrint (NodePath, sizeof (NodePath), "\\_SB.PCI%X._PXM", Index);
+ AcpiDSDTSetNodeStatusValue (NodePath, NumaAssignment[NumaIdx][Index]);
+ }
+}
+
+EFI_STATUS
+AcpiPatchPcieAerFwFirst (
+ VOID
+ )
+{
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS Address;
+ EFI_ACPI_SDT_PROTOCOL *AcpiTableProtocol;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_HANDLE *HandleBuffer;
+ UINTN HandleCount;
+ EFI_ACPI_HANDLE TableHandle;
+ EFI_ACPI_HANDLE ChildHandle;
+ EFI_ACPI_DATA_TYPE DataType;
+ UINTN DataSize;
+ CHAR8 ObjectPath[8];
+ EFI_STATUS Status;
+ UINT32 AerFwFirstConfigValue;
+ UINT32 RegData;
+ UINT16 Device;
+ UINT32 Index;
+ UINT8 *Data;
+
+ //
+ // Check if PCIe AER Firmware First should be enabled
+ //
+ Status = NVParamGet (
+ NV_SI_RAS_PCIE_AER_FW_FIRST,
+ NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
+ &AerFwFirstConfigValue
+ );
+ if (EFI_ERROR (Status)) {
+ Status = NVParamGet (
+ NV_SI_RO_BOARD_PCIE_AER_FW_FIRST,
+ NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
+ &AerFwFirstConfigValue
+ );
+ if (EFI_ERROR (Status)) {
+ AerFwFirstConfigValue = 0;
+ }
+ }
+
+ if (AerFwFirstConfigValue == 0) {
+ //
+ // By default, the PCIe AER FW-First (ACPI Object "AERF") is set to 0
+ // in the DSDT table.
+ //
+ return EFI_SUCCESS;
+ }
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+ }
+
+ Status = AcpiOpenDSDT (AcpiTableProtocol, &TableHandle);
+ if (EFI_ERROR (Status)) {
+ AcpiTableProtocol->Close (TableHandle);
+ return Status;
+ }
+
+ //
+ // Update Name Object "AERF" (PCIe AER Firmware-First) if it is enabled.
+ //
+ AsciiSPrint (ObjectPath, sizeof (ObjectPath), "\\AERF");
+ Status = AcpiTableProtocol->FindPath (TableHandle, ObjectPath, &ChildHandle);
+ ASSERT_EFI_ERROR (Status);
+ if (!EFI_ERROR (Status)) {
+ Status = AcpiTableProtocol->GetOption (
+ ChildHandle,
+ 0,
+ &DataType,
+ (VOID *)&Data,
+ &DataSize
+ );
+ ASSERT_EFI_ERROR (Status);
+ if (!EFI_ERROR (Status)
+ && Data[0] == AML_NAME_OP
+ && (Data[5] == AML_ZERO_OP || Data[5] == AML_ONE_OP))
+ {
+ Data[5] = 1; // Enable PCIe AER Firmware-First
+ }
+ }
+
+ AcpiTableProtocol->Close (TableHandle);
+ AcpiDSDTUpdateChecksum (AcpiTableProtocol);
+
+ //
+ // For PCIe AER Firmware First, PCIe capability registers need
+ // to be updated to allow Firmware to detect AER errors.
+ //
+
+ HandleCount = 0;
+ HandleBuffer = NULL;
+ PciRootBridgeIo = NULL;
+
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Loop through each root complex
+ //
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = gBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiPciRootBridgeIoProtocolGuid,
+ (VOID **)&PciRootBridgeIo
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Loop through each root port
+ //
+ for (Device = 1; Device <= PCIE_MAX_DEVICE_PER_ROOT_PORT; Device++) {
+ Address.Bus = 0;
+ Address.Device = Device;
+ Address.Function = 0;
+ Address.Register = 0;
+
+ Address.ExtendedRegister = PCIE_DEVICE_CONTROL_OFFSET;
+ PciRootBridgeIo->Pci.Read (PciRootBridgeIo, EfiPciWidthUint32, *((UINT64 *)&Address), 1, &RegData);
+
+ if (RegData == 0xFFFFFFFF) {
+ continue;
+ }
+
+ RegData |= PCIE_DEVICE_CONTROL_UNSUPPORT_REQ_REP_EN
+ | PCIE_DEVICE_CONTROL_FATAL_ERR_REPORT_EN
+ | PCIE_DEVICE_CONTROL_NON_FATAL_ERR_REPORT_EN
+ | PCIE_DEVICE_CONTROL_CORR_ERR_REPORT_EN;
+
+ PciRootBridgeIo->Pci.Write (PciRootBridgeIo, EfiPciWidthUint32, *((UINT64 *)&Address), 1, &RegData);
+
+ RegData = 0;
+ Address.ExtendedRegister = PCIE_ROOT_ERR_CMD_OFFSET;
+ PciRootBridgeIo->Pci.Read (PciRootBridgeIo, EfiPciWidthUint32, *((UINT64 *)&Address), 1, &RegData);
+
+ RegData |= PCIE_ROOT_ERR_CMD_FATAL_ERR_REPORTING_EN
+ | PCIE_ROOT_ERR_CMD_NON_FATAL_ERR_REPORTING_EN
+ | PCIE_ROOT_ERR_CMD_CORR_ERR_REPORTING_EN;
+
+ PciRootBridgeIo->Pci.Write (PciRootBridgeIo, EfiPciWidthUint32, *((UINT64 *)&Address), 1, &RegData);
+ }
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+AcpiPatchDsdtTable (
+ VOID
+ )
+{
+ AcpiPatchCmn600 ();
+ AcpiPatchDmc620 ();
+ AcpiPatchDsu ();
+ AcpiPatchHwmon ();
+ AcpiPatchNvdimm ();
+ AcpiPatchPcieNuma ();
+ AcpiPatchPcieAerFwFirst ();
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c
new file mode 100644
index 000000000000..1d1643abd299
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c
@@ -0,0 +1,351 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiPlatform.h"
+
+EFI_ACPI_6_3_GIC_ITS_STRUCTURE GicItsTemplate = {
+ EFI_ACPI_6_3_GIC_ITS,
+ sizeof (EFI_ACPI_6_3_GIC_ITS_STRUCTURE),
+ EFI_ACPI_RESERVED_WORD,
+ 0, /* GicItsId */
+ 0, /* PhysicalBaseAddress */
+ 0, /* Reserved2 */
+};
+
+EFI_ACPI_6_3_GICR_STRUCTURE GicRTemplate = {
+ EFI_ACPI_6_3_GICR,
+ sizeof (EFI_ACPI_6_3_GICR_STRUCTURE),
+ EFI_ACPI_RESERVED_WORD,
+ GICR_MASTER_BASE_REG, /* DiscoveryRangeBaseAddress */
+ 0x1000000, /* DiscoveryRangeLength */
+};
+
+EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE GicDTemplate = {
+ EFI_ACPI_6_3_GICD,
+ sizeof (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE),
+ EFI_ACPI_RESERVED_WORD,
+ 0, /* GicDistHwId */
+ GICD_BASE_REG, /* GicDistBase */
+ 0, /* GicDistVector */
+ 0x3, /* GicVersion */
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}
+};
+
+EFI_ACPI_6_3_GIC_STRUCTURE GiccTemplate = {
+ EFI_ACPI_6_3_GIC,
+ sizeof (EFI_ACPI_6_3_GIC_STRUCTURE),
+ EFI_ACPI_RESERVED_WORD,
+ 0, /* GicId */
+ 0, /* AcpiCpuUid */
+ 0, /* Flags */
+ 0,
+ 23, /* PmuIrq */
+ 0,
+ 0,
+ 0,
+ 0,
+ 25, /* GsivId */
+ 0, /* GicRBase */
+ 0, /* Mpidr */
+ 0, /* ProcessorPowerEfficiencyClass */
+ 0, /* Reserved2 */
+ 21, /* SPE irq */
+};
+
+EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER MADTTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ 0, /* need fill in */
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+};
+
+UINT32 Ac01CoreOrderMonolithic[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+ 36, 52, 40, 56, 32, 48, 44, 60,
+ 20, 68, 24, 72, 16, 64, 28, 76,
+ 4, 8, 0, 12, 38, 54, 42, 58,
+ 34, 50, 46, 62, 22, 70, 26, 74,
+ 18, 66, 30, 78, 6, 10, 2, 14,
+ 37, 53, 41, 57, 33, 49, 45, 61,
+ 21, 69, 25, 73, 17, 65, 29, 77,
+ 5, 9, 1, 13, 39, 55, 43, 59,
+ 35, 51, 47, 63, 23, 71, 27, 75,
+ 19, 67, 31, 79, 7, 11, 3, 15,
+};
+
+UINT32 Ac01CoreOrderHemisphere[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+ 32, 48, 16, 64, 36, 52, 0, 20,
+ 68, 4, 34, 50, 18, 66, 38, 54,
+ 2, 22, 70, 6, 33, 49, 17, 65,
+ 37, 53, 1, 21, 69, 5, 35, 51,
+ 19, 67, 39, 55, 3, 23, 71, 7,
+ 44, 60, 28, 76, 40, 56, 12, 24,
+ 72, 8, 46, 62, 30, 78, 42, 58,
+ 14, 26, 74, 10, 45, 61, 29, 77,
+ 41, 57, 13, 25, 73, 9, 47, 63,
+ 31, 79, 43, 59, 15, 27, 75, 11,
+};
+
+UINT32 Ac01CoreOrderQuadrant[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+ 16, 32, 0, 20, 4, 18, 34, 2,
+ 22, 6, 17, 33, 1, 21, 5, 19,
+ 35, 3, 23, 7, 48, 64, 52, 68,
+ 36, 50, 66, 54, 70, 38, 49, 65,
+ 53, 69, 37, 51, 67, 55, 71, 39,
+ 28, 44, 12, 24, 8, 30, 46, 14,
+ 26, 10, 29, 45, 13, 25, 9, 31,
+ 47, 15, 27, 11, 60, 76, 56, 72,
+ 40, 62, 78, 58, 74, 42, 61, 77,
+ 57, 73, 41, 63, 79, 59, 75, 43,
+};
+
+EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *MadtTablePointer;
+
+UINT32 *
+CpuGetCoreOrder (
+ VOID
+ )
+{
+ UINT8 SubNumaMode;
+
+ SubNumaMode = CpuGetSubNumaMode ();
+ switch (SubNumaMode) {
+ case SUBNUMA_MODE_MONOLITHIC:
+ return (UINT32 *)&Ac01CoreOrderMonolithic;
+
+ case SUBNUMA_MODE_HEMISPHERE:
+ return (UINT32 *)&Ac01CoreOrderHemisphere;
+
+ case SUBNUMA_MODE_QUADRANT:
+ return (UINT32 *)&Ac01CoreOrderQuadrant;
+
+ default:
+ // Should never reach here
+ ASSERT (FALSE);
+ return NULL;
+ }
+
+ return NULL;
+}
+
+UINT32
+AcpiInstallMadtProcessorNode (
+ VOID *EntryPointer,
+ UINT32 CpuId
+ )
+{
+ EFI_ACPI_6_3_GIC_STRUCTURE *MadtProcessorEntryPointer = EntryPointer;
+ UINT32 SocketId;
+ UINT32 ClusterId;
+ UINTN Size;
+
+ Size = sizeof (GiccTemplate);
+ CopyMem (MadtProcessorEntryPointer, &GiccTemplate, Size);
+
+ SocketId = SOCKET_ID (CpuId);
+ ClusterId = CLUSTER_ID (CpuId);
+
+ //
+ // GICv2 compatibility mode is not supported.
+ // Hence, set GIC's CPU Interface Number to 0.
+ //
+ MadtProcessorEntryPointer->CPUInterfaceNumber = 0;
+ MadtProcessorEntryPointer->AcpiProcessorUid =
+ (SocketId << PLATFORM_SOCKET_UID_BIT_OFFSET) +
+ (ClusterId << 8) + (CpuId % PLATFORM_CPU_NUM_CORES_PER_CPM);
+ MadtProcessorEntryPointer->Flags = 1;
+ MadtProcessorEntryPointer->MPIDR =
+ (((ClusterId << 8) + (CpuId % PLATFORM_CPU_NUM_CORES_PER_CPM)) << 8);
+ MadtProcessorEntryPointer->MPIDR += (((UINT64)SocketId) << 32);
+
+ return Size;
+}
+
+UINT32
+AcpiInstallMadtGicD (
+ VOID *EntryPointer
+ )
+{
+ EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE *GicDEntryPointer = EntryPointer;
+ UINTN Size;
+
+ Size = sizeof (GicDTemplate);
+ CopyMem (GicDEntryPointer, &GicDTemplate, Size);
+
+ return Size;
+}
+
+UINT32
+AcpiInstallMadtGicR (
+ VOID *EntryPointer,
+ UINT32 SocketId
+ )
+{
+ EFI_ACPI_6_3_GICR_STRUCTURE *GicREntryPointer = EntryPointer;
+ UINTN Size;
+
+ /*
+ * If the Slave socket is not present, discard the Slave socket
+ * GIC redistributor region
+ */
+ if (SocketId == 1 && !IsSlaveSocketActive ()) {
+ return 0;
+ }
+
+ Size = sizeof (GicRTemplate);
+ CopyMem (GicREntryPointer, &GicRTemplate, Size);
+
+ if (SocketId == 1) {
+ GicREntryPointer->DiscoveryRangeBaseAddress = GICR_SLAVE_BASE_REG;
+ }
+
+ return Size;
+}
+
+UINT32
+AcpiInstallMadtGicIts (
+ VOID *EntryPointer,
+ UINT32 Index
+ )
+{
+ EFI_ACPI_6_3_GIC_ITS_STRUCTURE *GicItsEntryPointer = EntryPointer;
+ UINTN Size, Offset;
+ UINT64 GicBase = GICD_BASE_REG;
+ UINT32 ItsId = Index;
+
+ if (Index > SOCKET0_LAST_RC) { /* Socket 1, Index: 8-15 */
+ GicBase = GICD_SLAVE_BASE_REG;
+ Index -= (SOCKET0_LAST_RC + 1); /* Socket 1, Index:8 -> RCA0 */
+ }
+ Size = sizeof (GicItsTemplate);
+ CopyMem (GicItsEntryPointer, &GicItsTemplate, Size);
+ Offset = 0x40000 + Index * 0x20000;
+ GicItsEntryPointer->GicItsId = ItsId;
+ GicItsEntryPointer->PhysicalBaseAddress = Offset + GicBase;
+
+ return Size;
+}
+
+/*
+ * Install MADT table.
+ */
+EFI_STATUS
+AcpiInstallMadtTable (
+ VOID
+ )
+{
+ EFI_ACPI_6_3_GIC_STRUCTURE *GiccEntryPointer = NULL;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ UINTN MadtTableKey = 0;
+ INTN Index;
+ EFI_STATUS Status;
+ UINTN Size;
+ UINT32 *CoreOrder;
+ UINT32 SktMaxCoreNum;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Size = sizeof (MADTTableHeaderTemplate) +
+ (PLATFORM_CPU_MAX_NUM_CORES * sizeof (GiccTemplate)) +
+ sizeof (GicDTemplate) +
+ (PLATFORM_CPU_MAX_SOCKET * sizeof (GicRTemplate)) +
+ ((SOCKET0_LAST_RC - SOCKET0_FIRST_RC + 1) * sizeof (GicItsTemplate));
+ if (IsSlaveSocketActive ()) {
+ Size += ((SOCKET1_LAST_RC - SOCKET1_FIRST_RC + 1) * sizeof (GicItsTemplate));
+ } else if (!IsSlaveSocketPresent ()) {
+ Size += 2 * sizeof (GicItsTemplate); /* RCA0/1 */
+ }
+
+ MadtTablePointer =
+ (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)AllocateZeroPool (Size);
+ if (MadtTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ GiccEntryPointer =
+ (EFI_ACPI_6_3_GIC_STRUCTURE *)((UINT64)MadtTablePointer +
+ sizeof (MADTTableHeaderTemplate));
+
+ /* Install Gic interface for each processor */
+ Size = 0;
+ CoreOrder = CpuGetCoreOrder ();
+ ASSERT (CoreOrder != NULL);
+ SktMaxCoreNum = PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM;
+ for (Index = 0; Index < SktMaxCoreNum; Index++) {
+ if (IsCpuEnabled (CoreOrder[Index])) {
+ Size += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Size), CoreOrder[Index]);
+ }
+ }
+
+ for (Index = 0; Index < SktMaxCoreNum; Index++) {
+ if (IsCpuEnabled (CoreOrder[Index] + SktMaxCoreNum)) {
+ Size += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Size), CoreOrder[Index] + SktMaxCoreNum);
+ }
+ }
+
+ /* Install Gic Distributor */
+ Size += AcpiInstallMadtGicD ((VOID *)((UINT64)GiccEntryPointer + Size));
+
+ /* Install Gic Redistributor */
+ for (Index = 0; Index < PLATFORM_CPU_MAX_SOCKET; Index++) {
+ Size += AcpiInstallMadtGicR ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+ }
+
+ /* Install Gic ITS */
+ if (!IsSlaveSocketPresent ()) {
+ for (Index = 0; Index <= 1; Index++) { /* RCA0/1 */
+ Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+ }
+ }
+ for (Index = SOCKET0_FIRST_RC; Index <= SOCKET0_LAST_RC; Index++) {
+ Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+ }
+ if (IsSlaveSocketActive ()) {
+ for (Index = SOCKET1_FIRST_RC; Index <= SOCKET1_LAST_RC; Index++) {
+ Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+ }
+ }
+ CopyMem (
+ MadtTablePointer,
+ &MADTTableHeaderTemplate,
+ sizeof (MADTTableHeaderTemplate)
+ );
+
+ Size += sizeof (MADTTableHeaderTemplate);
+ MadtTablePointer->Header.Length = Size;
+ CopyMem (
+ MadtTablePointer->Header.OemId,
+ PcdGetPtr (PcdAcpiDefaultOemId),
+ sizeof (MadtTablePointer->Header.OemId)
+ );
+
+ AcpiTableChecksum (
+ (UINT8 *)MadtTablePointer,
+ MadtTablePointer->Header.Length
+ );
+
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)MadtTablePointer,
+ MadtTablePointer->Header.Length,
+ &MadtTableKey
+ );
+ FreePool ((VOID *)MadtTablePointer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.c
new file mode 100644
index 000000000000..d13ac3514e11
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiNfit.c
@@ -0,0 +1,599 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiNfit.h"
+#include "AcpiPlatform.h"
+
+EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE NfitSPATemplate = {
+ EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE,
+ sizeof (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE),
+ 0, // The uniue index - need to be filled.
+ 0, // The flags - need to be filled.
+ 0, // Reserved.
+ 0, // Proximity domain - need to be filled.
+ EFI_ACPI_6_3_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION, // PM range type.
+ 0, // Start address - need to be filled.
+ 0, // Size - need to be filled.
+ EFI_MEMORY_UC | EFI_MEMORY_WC | EFI_MEMORY_WT | EFI_MEMORY_WB |
+ EFI_MEMORY_WP | EFI_MEMORY_UCE, // attribute - need to be filled.
+};
+
+EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE NvdimmControlRegionTemplate = {
+ EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE,
+ sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE),
+ 0, // The unique index - need to be filled.
+ 0, // The vendor id - need to be filled.
+ 0, // The device id - need to be filled.
+ 0, // The revision - need to be filled.
+ 0, // The subsystem nvdimm id - need to be filled.
+ 0, // The subsystem nvdimm device id - need to be filled.
+ 0, // The subsystem revision - need to be filled.
+ 0, // The valid field.
+ 0, // The manufacturing location - not valid.
+ 0, // The manufacturing date - not valid.
+ {0}, // Reserved.
+ 0, // The serial number - need to be filled.
+ 0, // The region format interface code - dummy value.
+ 0, // The number of block control windows.
+ 0, // The size of block control windows.
+ 0, // The Command Register Offset in Block Control Window.
+ 0, // The Size of Command Register in Block Control Windows.
+ 0, // The Status Register Offset in Block Control Window.
+ 0, // Size of Status Register in Block Control Windows.
+ 0, // The NVDIMM Control Region Flag.
+ {0}, // Reserved.
+};
+
+EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE NvdimmRegionMappingTemplate = {
+ EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE,
+ sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE),
+ {0}, // _ADR of the NVDIMM device - need to be filled.
+ 0, // Dimm smbios handle index - need to be filled.
+ 0, // The unique region index - need to be filled.
+ 0, // The SPA range index - need to be filled.
+ 0, // The control region index - need to be filled.
+ 0, // The region size - need to be filled.
+ 0, // The region offset - need to be filled.
+ 0, // The region base - need to be filled.
+ 0, // The interleave structure index - need to be filled.
+ 0, // The interleave ways - need to be filled.
+ 0, // NVDIMM flags - need to be filled.
+ 0, // Reserved.
+};
+
+EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE NFITTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE,
+ 0, /* need fill in */
+ EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION
+ ),
+ 0x00000000, // Reserved
+};
+
+NVDIMM_DATA NvdData[PLATFORM_CPU_MAX_SOCKET] = { 0 };
+
+EFI_STATUS
+AcpiNvdInfoInit (
+ IN OUT NVDIMM_INFO *NvdInfoPtr,
+ IN UINTN NvdId
+ )
+{
+ PLATFORM_INFO_HOB *PlatformHob;
+ VOID *Hob;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL || NvdInfoPtr == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ NvdInfoPtr->Enabled = TRUE;
+ NvdInfoPtr->PhysId = NvdId;
+ NvdInfoPtr->NvdSize = PlatformHob->DimmList.Dimm[NvdId].Info.DimmSize * ONE_GB;
+ NvdInfoPtr->VendorId =
+ *((UINT16 *)&PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[320]);
+ NvdInfoPtr->DeviceId =
+ *((UINT16 *)&PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[192]);
+ NvdInfoPtr->RevisionId =
+ (UINT16)PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[349];
+ NvdInfoPtr->SubVendorId =
+ *((UINT16 *)&PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[194]);
+ NvdInfoPtr->SubDeviceId =
+ *((UINT16 *)&PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[196]);
+ NvdInfoPtr->SubRevisionId =
+ (UINT16)PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[198];
+ NvdInfoPtr->SerialNumber =
+ *((UINT32 *)&PlatformHob->DimmList.Dimm[NvdId].SpdData.Data[325]);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AcpiNvdDataInit (
+ IN UINTN Socket
+ )
+{
+ PLATFORM_INFO_HOB *PlatformHob;
+ NVDIMM_INFO *NvdInfo;
+ UINTN Count;
+ VOID *Hob;
+ UINTN NvdRegionNum, RegionId;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ NvdRegionNum = 0;
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ if (PlatformHob->DramInfo.NvdRegion[Count] != 0
+ && (PlatformHob->DramInfo.Socket[Count] == Socket))
+ {
+ NvdData[Socket].NvdRegionId[NvdRegionNum] = Count;
+ NvdRegionNum++;
+ }
+ }
+ if (NvdRegionNum == 0) {
+ return EFI_SUCCESS;
+ }
+
+ NvdData[Socket].NvdRegionNum = NvdRegionNum;
+ NvdData[Socket].NvdMode = PlatformHob->DramInfo.NvdimmMode[Socket];
+ if (NvdData[Socket].NvdMode == NVDIMM_HASHED) {
+ NvdInfo = &NvdData[Socket].NvdInfo[NVDIMM_SK0];
+ NvdInfo->DeviceHandle =
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD1_DEVICE_HANDLE :
+ PLATFORM_NVDIMM_NVD3_DEVICE_HANDLE;
+ NvdInfo->InterleaveWays = PLATFORM_NVDIMM_HASHED_INTERLEAVE_WAYS;
+ NvdInfo->RegionOffset = 0;
+ AcpiNvdInfoInit (
+ NvdInfo,
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD1_DIMM_ID :
+ PLATFORM_NVDIMM_NVD3_DIMM_ID
+ );
+
+ NvdInfo = &NvdData[Socket].NvdInfo[1];
+ NvdInfo->DeviceHandle =
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD2_DEVICE_HANDLE :
+ PLATFORM_NVDIMM_NVD4_DEVICE_HANDLE;
+ NvdInfo->InterleaveWays = PLATFORM_NVDIMM_HASHED_INTERLEAVE_WAYS;
+ NvdInfo->RegionOffset = PLATFORM_NVDIMM_HASHED_REGION_OFFSET;
+ AcpiNvdInfoInit (
+ NvdInfo,
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD2_DIMM_ID :
+ PLATFORM_NVDIMM_NVD4_DIMM_ID
+ );
+
+ /* Update NvdNum */
+ NvdData[Socket].NvdNum = 0;
+ for (Count = 0; Count < NVDIMM_NUM_PER_SK; Count++) {
+ if (NvdData[Socket].NvdInfo[Count].Enabled) {
+ NvdData[Socket].NvdNum++;
+ }
+ }
+ return EFI_SUCCESS;
+ }
+ /* NVDIMM_NON_HASHED */
+ NvdData[Socket].NvdNum = 0;
+ for (Count = 0; Count < NvdData[Socket].NvdRegionNum; Count++) {
+ RegionId = NvdData[Socket].NvdRegionId[Count];
+ if (PlatformHob->DramInfo.Base[RegionId] ==
+ PLATFORM_NVDIMM_SK0_NHASHED_REGION0 ||
+ PlatformHob->DramInfo.Base[RegionId] ==
+ PLATFORM_NVDIMM_SK1_NHASHED_REGION0)
+ {
+ NvdInfo = &NvdData[Socket].NvdInfo[0];
+ NvdInfo->DeviceHandle =
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD1_DEVICE_HANDLE :
+ PLATFORM_NVDIMM_NVD3_DEVICE_HANDLE;
+ NvdInfo->InterleaveWays = PLATFORM_NVDIMM_NHASHED_INTERLEAVE_WAYS;
+ NvdInfo->RegionOffset = 0;
+ AcpiNvdInfoInit (
+ NvdInfo,
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD1_DIMM_ID :
+ PLATFORM_NVDIMM_NVD3_DIMM_ID
+ );
+
+ } else if (PlatformHob->DramInfo.Base[RegionId] ==
+ PLATFORM_NVDIMM_SK0_NHASHED_REGION1 ||
+ PlatformHob->DramInfo.Base[RegionId] ==
+ PLATFORM_NVDIMM_SK1_NHASHED_REGION1)
+ {
+ NvdInfo = &NvdData[Socket].NvdInfo[1];
+ NvdInfo->DeviceHandle =
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD2_DEVICE_HANDLE :
+ PLATFORM_NVDIMM_NVD4_DEVICE_HANDLE;
+ NvdInfo->InterleaveWays = PLATFORM_NVDIMM_NHASHED_INTERLEAVE_WAYS;
+ NvdInfo->RegionOffset = 0;
+ AcpiNvdInfoInit (
+ NvdInfo,
+ (Socket == 0) ? PLATFORM_NVDIMM_NVD2_DIMM_ID :
+ PLATFORM_NVDIMM_NVD4_DIMM_ID
+ );
+ }
+ }
+ /* Update NvdNum */
+ NvdData[Socket].NvdNum = 0;
+ for (Count = 0; Count < NVDIMM_NUM_PER_SK; Count++) {
+ if (NvdData[Socket].NvdInfo[Count].Enabled) {
+ NvdData[Socket].NvdNum++;
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+/*
+ * Fill in SPA structure
+ */
+VOID
+AcpiNfitFillSPA (
+ IN OUT EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *NfitSpaPointer,
+ IN UINTN NvdRegionIndex,
+ IN UINT64 NvdRegionBase,
+ IN UINT64 NvdRegionSize
+ )
+{
+ ASSERT (NfitSpaPointer != NULL);
+
+ NfitSpaPointer->Flags = 0;
+ NfitSpaPointer->SPARangeStructureIndex = NvdRegionIndex;
+ NfitSpaPointer->SystemPhysicalAddressRangeBase = NvdRegionBase;
+ NfitSpaPointer->SystemPhysicalAddressRangeLength = NvdRegionSize;
+}
+
+VOID
+NfitFillControlRegion (
+ IN OUT EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *NfitControlRegionPointer,
+ IN NVDIMM_INFO *NvdInfo,
+ IN UINTN NvdControlRegionIndex
+ )
+{
+ ASSERT (
+ NfitControlRegionPointer != NULL
+ && NvdInfo != NULL
+ );
+
+ NfitControlRegionPointer->NVDIMMControlRegionStructureIndex =
+ NvdControlRegionIndex;
+ NfitControlRegionPointer->VendorID = NvdInfo->VendorId;
+ NfitControlRegionPointer->DeviceID = NvdInfo->DeviceId;
+ NfitControlRegionPointer->RevisionID = NvdInfo->RevisionId;
+ NfitControlRegionPointer->SubsystemVendorID = NvdInfo->SubVendorId;
+ NfitControlRegionPointer->SubsystemDeviceID = NvdInfo->SubDeviceId;
+ NfitControlRegionPointer->SubsystemRevisionID = NvdInfo->SubRevisionId;
+ NfitControlRegionPointer->SerialNumber = NvdInfo->SerialNumber;
+}
+
+VOID
+NfitFillRegionMapping (
+ IN OUT EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE *NfitRegionMappingPointer,
+ IN EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *NfitControlRegionPointer,
+ IN EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *NfitSpaPointer,
+ IN NVDIMM_INFO *NvdInfo,
+ IN UINTN NvdRegionID
+ )
+{
+ ASSERT (
+ NfitRegionMappingPointer != NULL
+ && NfitRegionMappingPointer != NULL
+ && NfitRegionMappingPointer != NULL
+ && NfitRegionMappingPointer != NULL
+ && NvdInfo != NULL
+ );
+
+ NfitRegionMappingPointer->NVDIMMRegionID = NvdRegionID;
+ NfitRegionMappingPointer->NVDIMMPhysicalID = NvdInfo->PhysId;
+ NfitRegionMappingPointer->InterleaveWays = NvdInfo->InterleaveWays;
+ NfitRegionMappingPointer->RegionOffset = NvdInfo->RegionOffset;
+ NfitRegionMappingPointer->NVDIMMRegionSize = NvdInfo->NvdSize;
+ NfitRegionMappingPointer->NFITDeviceHandle.DIMMNumber =
+ NvdInfo->DeviceHandle & 0x0F;
+ NfitRegionMappingPointer->NFITDeviceHandle.MemoryChannelNumber =
+ (NvdInfo->DeviceHandle >> 4) & 0x0F;
+ NfitRegionMappingPointer->NFITDeviceHandle.MemoryControllerID =
+ (NvdInfo->DeviceHandle >> 8) & 0x0F;
+ NfitRegionMappingPointer->NFITDeviceHandle.SocketID =
+ (NvdInfo->DeviceHandle >> 12) & 0x0F;
+ NfitRegionMappingPointer->SPARangeStructureIndex =
+ NfitSpaPointer->SPARangeStructureIndex;
+ NfitRegionMappingPointer->NVDIMMPhysicalAddressRegionBase =
+ NfitSpaPointer->SystemPhysicalAddressRangeBase;
+ NfitRegionMappingPointer->NVDIMMControlRegionStructureIndex =
+ NfitControlRegionPointer->NVDIMMControlRegionStructureIndex;
+}
+
+EFI_STATUS
+AcpiNfitFillTableBySK (
+ IN EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *NfitSpaPointerStart,
+ IN OUT EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE **NfitSpaPointerNext,
+ IN UINTN Socket
+ )
+{
+ EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *NfitSpaPointer;
+ EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *NfitControlRegionPointer;
+ EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE *NfitRegionMappingPointer;
+ PLATFORM_INFO_HOB *PlatformHob;
+ VOID *Hob;
+ UINT64 NvdRegionBase,
+ NvdRegionSize;
+ UINTN NvdCount, MaxNvdCount, RegionCount;
+ UINTN RegionId, NvdRegionIndex, NvdIndex;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL
+ || NfitSpaPointerStart == NULL
+ || NfitSpaPointerNext == NULL)
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+ NvdRegionIndex = (Socket == 0) ? 0 : NvdData[NVDIMM_SK0].NvdRegionNum;
+ NvdIndex = (Socket == 0) ? 0 : NvdData[NVDIMM_SK0].NvdNum;
+ if (NvdData[Socket].NvdMode == NVDIMM_HASHED) {
+ /* Table Type 0: SPA Range Structure */
+ NfitSpaPointer = NfitSpaPointerStart;
+ CopyMem (
+ (VOID *)NfitSpaPointer,
+ (VOID *)&NfitSPATemplate,
+ sizeof (NfitSPATemplate)
+ );
+ RegionId = NvdData[Socket].NvdRegionId[0];
+ NvdRegionBase = PlatformHob->DramInfo.Base[RegionId];
+ NvdRegionSize = PlatformHob->DramInfo.Size[RegionId];
+ NvdRegionIndex++;
+ AcpiNfitFillSPA (
+ NfitSpaPointer,
+ NvdRegionIndex,
+ NvdRegionBase,
+ NvdRegionSize
+ );
+
+ NfitControlRegionPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *)
+ (NfitSpaPointer + 1);
+ for (NvdCount = 0; NvdCount < NVDIMM_NUM_PER_SK; NvdCount++) {
+ if (!NvdData[Socket].NvdInfo[NvdCount].Enabled) {
+ continue;
+ }
+ NvdIndex++;
+ /* Table Type 4: NVDIMM Control Region Structure Mark */
+ CopyMem (
+ (VOID *)NfitControlRegionPointer,
+ (VOID *)&NvdimmControlRegionTemplate,
+ sizeof (NvdimmControlRegionTemplate)
+ );
+ NfitFillControlRegion (
+ NfitControlRegionPointer,
+ &NvdData[Socket].NvdInfo[NvdCount],
+ NvdIndex
+ );
+
+ NfitRegionMappingPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE *)
+ (NfitControlRegionPointer + 1);
+
+ /* Table Type 1: NVDIMM Region Mapping Structure */
+ CopyMem (
+ (VOID *)NfitRegionMappingPointer,
+ (VOID *)&NvdimmRegionMappingTemplate,
+ sizeof (NvdimmRegionMappingTemplate)
+ );
+ NfitFillRegionMapping (
+ NfitRegionMappingPointer,
+ NfitControlRegionPointer,
+ NfitSpaPointer,
+ &NvdData[Socket].NvdInfo[NvdCount],
+ NvdIndex - 1
+ );
+
+ NfitControlRegionPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *)
+ (NfitRegionMappingPointer + 1);
+ }
+ NfitSpaPointer =
+ (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *)
+ NfitControlRegionPointer;
+ } else { /* NVDIMM_NON_HASHED */
+ NfitSpaPointer = NfitSpaPointerStart;
+ for (RegionCount = 0; RegionCount < NvdData[Socket].NvdRegionNum;
+ RegionCount++)
+ {
+ /* Table Type 0: SPA Range Structure */
+ CopyMem (
+ (VOID *)NfitSpaPointer,
+ (VOID *)&NfitSPATemplate,
+ sizeof (NfitSPATemplate)
+ );
+ RegionId = NvdData[Socket].NvdRegionId[RegionCount];
+ NvdRegionBase = PlatformHob->DramInfo.Base[RegionId];
+ NvdRegionSize = PlatformHob->DramInfo.Size[RegionId];
+ NvdRegionIndex++;
+ AcpiNfitFillSPA (
+ NfitSpaPointer,
+ NvdRegionIndex,
+ NvdRegionBase,
+ NvdRegionSize
+ );
+
+ NfitControlRegionPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *)
+ (NfitSpaPointer + 1);
+ NvdCount = ((NvdRegionBase == PLATFORM_NVDIMM_SK0_NHASHED_REGION0) ||
+ (NvdRegionBase == PLATFORM_NVDIMM_SK1_NHASHED_REGION0)) ?
+ 0 : PLATFORM_NVDIMM_NUM_MAX_PER_MCU;
+ MaxNvdCount = NvdCount + PLATFORM_NVDIMM_NUM_MAX_PER_MCU;
+ for (; NvdCount < MaxNvdCount; NvdCount++) {
+ if (!NvdData[Socket].NvdInfo[NvdCount].Enabled) {
+ continue;
+ }
+ NvdIndex++;
+
+ /* Table Type 4: NVDIMM Control Region Structure Mark */
+ CopyMem (
+ (VOID *)NfitControlRegionPointer,
+ (VOID *)&NvdimmControlRegionTemplate,
+ sizeof (NvdimmControlRegionTemplate)
+ );
+ NfitFillControlRegion (
+ NfitControlRegionPointer,
+ &NvdData[Socket].NvdInfo[NvdCount],
+ NvdIndex
+ );
+
+ NfitRegionMappingPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE *)
+ (NfitControlRegionPointer + 1);
+
+ /* Table Type 1: NVDIMM Region Mapping Structure */
+ CopyMem (
+ (VOID *)NfitRegionMappingPointer,
+ (VOID *)&NvdimmRegionMappingTemplate,
+ sizeof (NvdimmRegionMappingTemplate)
+ );
+ NfitFillRegionMapping (
+ NfitRegionMappingPointer,
+ NfitControlRegionPointer,
+ NfitSpaPointer,
+ &NvdData[Socket].NvdInfo[NvdCount],
+ NvdIndex - 1
+ );
+
+ NfitControlRegionPointer =
+ (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE *)
+ (NfitRegionMappingPointer + 1);
+ }
+ NfitSpaPointer =
+ (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *)
+ NfitControlRegionPointer;
+ }
+ }
+ /* Update NfitSpaPointerNext */
+ *NfitSpaPointerNext = NfitSpaPointer;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AcpiNfitFillTable (
+ IN EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE *NfitTablePointer
+ )
+{
+ EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *NfitSpaPointerNext;
+
+ if (NfitTablePointer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ NfitSpaPointerNext = (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE *)
+ (NfitTablePointer + 1);
+
+ if (NvdData[NVDIMM_SK0].NvdRegionNum != 0) {
+ AcpiNfitFillTableBySK (NfitSpaPointerNext, &NfitSpaPointerNext, NVDIMM_SK0);
+ }
+
+ if (NvdData[NVDIMM_SK1].NvdRegionNum != 0) {
+ AcpiNfitFillTableBySK (NfitSpaPointerNext, &NfitSpaPointerNext, NVDIMM_SK1);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/*
+ * Install NFIT table.
+ */
+EFI_STATUS
+AcpiInstallNfitTable (
+ VOID
+ )
+{
+ EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE *NfitTablePointer;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ UINTN NfitTableKey = 0;
+ EFI_STATUS Status;
+ UINTN Size;
+ UINTN NvdRegionNum;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = AcpiNvdDataInit (NVDIMM_SK0);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = AcpiNvdDataInit (NVDIMM_SK1);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ NvdRegionNum = NvdData[NVDIMM_SK0].NvdRegionNum +
+ NvdData[NVDIMM_SK1].NvdRegionNum;
+ if (NvdRegionNum == 0) {
+ return EFI_INVALID_PARAMETER; /* No NVDIMM Region */
+ }
+ Size = sizeof (EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE);
+ if (NvdData[NVDIMM_SK0].NvdRegionNum != 0) {
+ Size +=
+ (sizeof (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE) *
+ NvdData[NVDIMM_SK0].NvdRegionNum) +
+ (sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE) *
+ NvdData[NVDIMM_SK0].NvdNum) +
+ (sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE) *
+ NvdData[NVDIMM_SK0].NvdNum);
+ }
+ if (NvdData[NVDIMM_SK1].NvdRegionNum != 0) {
+ Size +=
+ (sizeof (EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE) *
+ NvdData[NVDIMM_SK1].NvdRegionNum) +
+ (sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE) *
+ NvdData[NVDIMM_SK1].NvdNum) +
+ (sizeof (EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE) *
+ NvdData[NVDIMM_SK1].NvdNum);
+ }
+ NfitTablePointer =
+ (EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE *)AllocateZeroPool (Size);
+ if (NfitTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (
+ (VOID *)NfitTablePointer,
+ (VOID *)&NFITTableHeaderTemplate,
+ sizeof (NFITTableHeaderTemplate)
+ );
+
+ NfitTablePointer->Header.Length = Size;
+
+ Status = AcpiNfitFillTable (NfitTablePointer);
+ if (EFI_ERROR (Status)) {
+ FreePool ((VOID *)NfitTablePointer);
+ return Status;
+ }
+ AcpiTableChecksum (
+ (UINT8 *)NfitTablePointer,
+ NfitTablePointer->Header.Length
+ );
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)NfitTablePointer,
+ NfitTablePointer->Header.Length,
+ &NfitTableKey
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool ((VOID *)NfitTablePointer);
+ }
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c
new file mode 100644
index 000000000000..296ae57aada0
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c
@@ -0,0 +1,196 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/AcpiPccLib.h>
+#include "AcpiPlatform.h"
+
+EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS PcctSubspaceTemplate = {
+ EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS,
+ sizeof (EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS),
+ 0, // PlatformInterrupt
+ 0, // PlatformInterruptFlags
+ 0, // Reserved
+ 0, // BaseAddress
+ 0x100, // AddressLength
+ { 0, 0x20, 0, 0x3, 0x0 }, // DoorbellRegister
+ 0, // DoorbellPreserve
+ 0x53000040, // DoorbellWrite
+ 1, // NominalLatency
+ 1, // MaximumPeriodicAccessRate
+ 1, // MinimumRequestTurnaroundTime
+ { 0, 0x20, 0, 0x3, 0x0 }, // PlatformInterruptAckRegister
+ 0, // PlatformInterruptAckPreserve
+ 0x10001, // PlatformInterruptAckWrite
+};
+
+EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER PcctTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER,
+ EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION
+ ),
+ EFI_ACPI_6_3_PCCT_FLAGS_PLATFORM_INTERRUPT,
+};
+
+EFI_STATUS
+AcpiPcctInit (
+ VOID
+ )
+{
+ UINT8 NumberOfSockets;
+ UINT8 Socket;
+ UINT16 Doorbell;
+ UINT16 Subspace;
+
+ NumberOfSockets = GetNumberOfActiveSockets ();
+ Subspace = 0;
+
+ for (Socket = 0; Socket < NumberOfSockets; Socket++) {
+ for (Doorbell = 0; Doorbell < NUMBER_OF_DOORBELLS_PER_SOCKET; Doorbell++ ) {
+ if (AcpiPccIsDoorbellReserved (Doorbell + NUMBER_OF_DOORBELLS_PER_SOCKET * Socket)) {
+ continue;
+ }
+ AcpiPccInitSharedMemory (Socket, Doorbell, Subspace);
+ AcpiPccUnmaskDoorbellInterrupt (Socket, Doorbell);
+
+ Subspace++;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install PCCT table.
+
+ Each socket has 16 PCC subspaces corresponding to 16 Mailbox/Doorbell channels
+ 0 - 7 : PMpro subspaces
+ 8 - 15 : SMpro subspaces
+
+ Please note that some SMpro/PMpro Doorbell are reserved for private use.
+ The reserved Doorbells are filtered by using the ACPI_PCC_AVAILABLE_DOORBELL_MASK
+ and ACPI_PCC_NUMBER_OF_RESERVED_DOORBELLS macro.
+
+**/
+EFI_STATUS
+AcpiInstallPcctTable (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER *PcctTablePointer;
+ EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS *PcctEntryPointer;
+ EFI_PHYSICAL_ADDRESS PccSharedMemPointer;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ UINTN PcctTableKey;
+ UINT8 NumberOfSockets;
+ UINT8 Socket;
+ UINT16 Doorbell;
+ UINT16 Subspace;
+ UINT16 NumberOfSubspaces;
+ UINTN Size;
+ UINTN DoorbellAddress;
+
+ Subspace = 0;
+ NumberOfSockets = GetNumberOfActiveSockets ();
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ NumberOfSubspaces = ACPI_PCC_MAX_SUBPACE_PER_SOCKET * NumberOfSockets;
+
+ AcpiPccAllocateSharedMemory (&PccSharedMemPointer, NumberOfSubspaces);
+ if (PccSharedMemPointer == 0) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Size = sizeof (EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER) +
+ NumberOfSubspaces * sizeof (EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS);
+
+ PcctTablePointer = (EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER *)AllocateZeroPool (Size);
+ if (PcctTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ PcctEntryPointer = (EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS *)
+ ((UINT64)PcctTablePointer + sizeof (EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER));
+
+ for (Socket = 0; Socket < NumberOfSockets; Socket++) {
+ for (Doorbell = 0; Doorbell < NUMBER_OF_DOORBELLS_PER_SOCKET; Doorbell++ ) {
+ if (AcpiPccIsDoorbellReserved (Doorbell + NUMBER_OF_DOORBELLS_PER_SOCKET * Socket)) {
+ continue;
+ }
+
+ CopyMem (
+ &PcctEntryPointer[Subspace],
+ &PcctSubspaceTemplate,
+ sizeof (EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS)
+ );
+
+ PcctEntryPointer[Subspace].BaseAddress = (UINT64)PccSharedMemPointer + ACPI_PCC_SUBSPACE_SHARED_MEM_SIZE * Subspace;
+ PcctEntryPointer[Subspace].AddressLength = ACPI_PCC_SUBSPACE_SHARED_MEM_SIZE;
+
+ DoorbellAddress = MailboxGetDoorbellAddress (Socket, Doorbell);
+
+ PcctEntryPointer[Subspace].DoorbellRegister.Address = DoorbellAddress + DB_OUT_REG_OFST;
+ PcctEntryPointer[Subspace].PlatformInterrupt = MailboxGetDoorbellInterruptNumber (Socket, Doorbell);
+ PcctEntryPointer[Subspace].PlatformInterruptAckRegister.Address = DoorbellAddress + DB_STATUS_REG_OFST;
+
+ if (Doorbell == ACPI_PCC_CPPC_DOORBELL_ID) {
+ PcctEntryPointer[Subspace].DoorbellWrite = MAILBOX_URGENT_CPPC_MESSAGE;
+ PcctEntryPointer[Subspace].NominalLatency = ACPI_PCC_CPPC_NOMINAL_LATENCY_US;
+ PcctEntryPointer[Subspace].MinimumRequestTurnaroundTime = ACPI_PCC_CPPC_MIN_REQ_TURNAROUND_TIME_US;
+ } else {
+ PcctEntryPointer[Subspace].DoorbellWrite = MAILBOX_TYPICAL_PCC_MESSAGE;
+ PcctEntryPointer[Subspace].NominalLatency = ACPI_PCC_NOMINAL_LATENCY_US;
+ PcctEntryPointer[Subspace].MinimumRequestTurnaroundTime = ACPI_PCC_MIN_REQ_TURNAROUND_TIME_US;
+ }
+ PcctEntryPointer[Subspace].MaximumPeriodicAccessRate = ACPI_PCC_MAX_PERIODIC_ACCESS_RATE;
+
+ Subspace++;
+ }
+ }
+
+ CopyMem (
+ PcctTablePointer,
+ &PcctTableHeaderTemplate,
+ sizeof (EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER)
+ );
+
+ //
+ // Recalculate the size
+ //
+ Size = sizeof (EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER) +
+ Subspace * sizeof (EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS);
+
+ PcctTablePointer->Header.Length = Size;
+ AcpiTableChecksum (
+ (UINT8 *)PcctTablePointer,
+ PcctTablePointer->Header.Length
+ );
+
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)PcctTablePointer,
+ PcctTablePointer->Header.Length,
+ &PcctTableKey
+ );
+ if (EFI_ERROR (Status)) {
+ AcpiPccFreeSharedMemory ();
+ FreePool ((VOID *)PcctTablePointer);
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c
new file mode 100644
index 000000000000..3ed3e98d00d2
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c
@@ -0,0 +1,178 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiApei.h"
+#include "AcpiPlatform.h"
+
+STATIC EFI_EVENT mAcpiRegistration = NULL;
+
+/*
+ * This GUID must match the FILE_GUID in AcpiTables.inf of each boards
+ */
+STATIC CONST EFI_GUID mAcpiCommonTableFile = { 0xCEFA2AEB, 0x357E, 0x4F48, { 0x80, 0x66, 0xEA, 0x95, 0x08, 0x53, 0x05, 0x6E } } ;
+STATIC CONST EFI_GUID mJadeAcpiTableFile = { 0x5addbc13, 0x8634, 0x480c, { 0x9b, 0x94, 0x67, 0x1b, 0x78, 0x55, 0xcd, 0xb8 } };
+/**
+ * Callback called when ACPI Protocol is installed
+ */
+STATIC VOID
+AcpiNotificationEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
+
+ Status = LocateAndInstallAcpiFromFv (&mAcpiCommonTableFile);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = LocateAndInstallAcpiFromFv (&mJadeAcpiTableFile);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Find ACPI table RSD_PTR from the system table.
+ //
+ Status = EfiGetSystemConfigurationTable (&gEfiAcpiTableGuid, (VOID **)&Rsdp);
+ if (EFI_ERROR (Status)) {
+ Status = EfiGetSystemConfigurationTable (&gEfiAcpi10TableGuid, (VOID **)&Rsdp);
+ }
+
+ if (!EFI_ERROR (Status) &&
+ Rsdp != NULL &&
+ Rsdp->Revision >= EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION &&
+ Rsdp->RsdtAddress != 0)
+ {
+ // ARM Platforms must set the RSDT address to NULL
+ Rsdp->RsdtAddress = 0;
+ }
+
+ DEBUG ((DEBUG_INFO, "[%a:%d]-\n", __FUNCTION__, __LINE__));
+}
+
+VOID
+EFIAPI
+InstallAcpiOnReadyToBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ Status = AcpiInstallMadtTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Installed MADT table\n"));
+ }
+
+ Status = AcpiInstallPpttTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Installed PPTT table\n"));
+ }
+
+ Status = AcpiInstallSlitTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Installed SLIT table\n"));
+ }
+
+ Status = AcpiInstallSratTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Installed SRAT table\n"));
+ }
+
+ Status = AcpiInstallPcctTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Installed PCCT table\n"));
+ }
+
+ Status = AcpiInstallNfitTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Installed NFIT table\n"));
+ }
+
+ Status = AcpiPopulateBert ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "Populate BERT record\n"));
+ }
+
+ //
+ // Close the event, so it will not be signalled again.
+ //
+ gBS->CloseEvent (Event);
+}
+
+VOID
+EFIAPI
+UpdateAcpiOnExitBootServices (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ Status = AcpiPatchDsdtTable ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "DSDT Table updated!\n"));
+ }
+
+ // Configure ACPI Platform Error Interfaces
+ Status = AcpiApeiUpdate ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "APEI Table updated!\n"));
+ }
+
+ // Configure PCC mailbox base address and unmask interrupt
+ Status = AcpiPcctInit ();
+ if (!EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "PCCT Table updated!\n"));
+ }
+
+ //
+ // Close the event, so it will not be signalled again.
+ //
+ gBS->CloseEvent (Event);
+}
+
+EFI_STATUS
+EFIAPI
+AcpiPlatformDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_EVENT ReadyToBootEvent;
+ EFI_EVENT ExitBootServicesEvent;
+ EFI_STATUS Status;
+
+ EfiCreateProtocolNotifyEvent (
+ &gEfiAcpiTableProtocolGuid,
+ TPL_CALLBACK,
+ AcpiNotificationEvent,
+ NULL,
+ &mAcpiRegistration
+ );
+
+ Status = gBS->CreateEvent (
+ EVT_SIGNAL_EXIT_BOOT_SERVICES,
+ TPL_CALLBACK,
+ UpdateAcpiOnExitBootServices,
+ NULL,
+ &ExitBootServicesEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ InstallAcpiOnReadyToBoot,
+ NULL,
+ &gEfiEventReadyToBootGuid,
+ &ReadyToBootEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPptt.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPptt.c
new file mode 100644
index 000000000000..97adb66beed3
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPptt.c
@@ -0,0 +1,378 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiPlatform.h"
+
+EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR PPTTProcessorTemplate = {
+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR),
+ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },
+ {0}, /* Flags */
+ 0, /* Parent */
+ 0, /* AcpiProcessorId */
+ 0 /* NumberOfPrivateResources */
+};
+
+EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE PPTTCacheTemplate = {
+ EFI_ACPI_6_3_PPTT_TYPE_CACHE,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE),
+ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },
+ {0}, /* Flags */
+ 0, /* NextLevelOfCache */
+ 0, /* Size */
+ 0, /* NumberOfSets */
+ 0, /* Associativity */
+ {0}, /* Attributes */
+ 0
+};
+
+EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER PPTTTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE,
+ 0, /* need fill in */
+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
+ ),
+};
+
+STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER *PpttTablePointer;
+STATIC UINT32 PpttClusterOffset[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_MAX_SOCKET];
+STATIC UINT32 PpttSocketOffset[PLATFORM_CPU_MAX_SOCKET];
+STATIC UINT32 PpttRootOffset;
+STATIC UINT32 PpttL1DataCacheOffset[PLATFORM_CPU_MAX_NUM_CORES];
+STATIC UINT32 PpttL1InstructionCacheOffset[PLATFORM_CPU_MAX_NUM_CORES];
+STATIC UINT32 PpttL2CacheOffset[PLATFORM_CPU_MAX_NUM_CORES];
+STATIC UINT32 PpttSLCCacheOffset[PLATFORM_CPU_MAX_SOCKET];
+
+UINT32
+AcpiPpttProcessorCoreNode (
+ VOID *EntryPointer,
+ UINT32 CpuId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *PpttProcessorEntryPointer = EntryPointer;
+ UINT32 *ResPointer;
+ UINTN ClusterIdPerSocket, CoreIdPerCpm, SocketId;
+
+ CopyMem (
+ PpttProcessorEntryPointer,
+ &PPTTProcessorTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)
+ );
+
+ ClusterIdPerSocket = (CpuId / PLATFORM_CPU_NUM_CORES_PER_CPM) % PLATFORM_CPU_MAX_CPM;
+ SocketId = (CpuId / PLATFORM_CPU_NUM_CORES_PER_CPM) / PLATFORM_CPU_MAX_CPM;
+ CoreIdPerCpm = CpuId % PLATFORM_CPU_NUM_CORES_PER_CPM;
+ PpttProcessorEntryPointer->Flags.AcpiProcessorIdValid = 1;
+ PpttProcessorEntryPointer->Flags.NodeIsALeaf = 1;
+ PpttProcessorEntryPointer->Flags.IdenticalImplementation = 1;
+ PpttProcessorEntryPointer->AcpiProcessorId = (SocketId << PLATFORM_SOCKET_UID_BIT_OFFSET) | (ClusterIdPerSocket << 8) | CoreIdPerCpm;
+ PpttProcessorEntryPointer->Parent = (UINT32)PpttClusterOffset[CpuId / PLATFORM_CPU_NUM_CORES_PER_CPM];
+ PpttProcessorEntryPointer->NumberOfPrivateResources = 2; /* L1I + L1D */
+
+ ResPointer = (UINT32 *)((UINT64)EntryPointer +
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
+ ResPointer[0] = PpttL1InstructionCacheOffset[CpuId];
+ ResPointer[1] = PpttL1DataCacheOffset[CpuId];
+
+ PpttProcessorEntryPointer->Length = sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + 2 * sizeof (UINT32);
+
+ return PpttProcessorEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttClusterNode (
+ VOID *EntryPointer,
+ UINT32 ClusterId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *PpttProcessorEntryPointer = EntryPointer;
+
+ PpttClusterOffset[ClusterId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+
+ CopyMem (
+ PpttProcessorEntryPointer,
+ &PPTTProcessorTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)
+ );
+
+ PpttProcessorEntryPointer->Parent = (UINT32)PpttSocketOffset[ClusterId / PLATFORM_CPU_MAX_CPM];
+ PpttProcessorEntryPointer->Flags.IdenticalImplementation = 1;
+
+ return PpttProcessorEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttSocketNode (
+ VOID *EntryPointer,
+ UINT32 SocketId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *PpttProcessorEntryPointer = EntryPointer;
+ UINT32 *ResPointer;
+
+ PpttSocketOffset[SocketId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+
+ CopyMem (
+ PpttProcessorEntryPointer,
+ &PPTTProcessorTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)
+ );
+
+ PpttProcessorEntryPointer->Flags.PhysicalPackage = 1;
+ PpttProcessorEntryPointer->Flags.IdenticalImplementation = 1;
+ PpttProcessorEntryPointer->Parent = (UINT32)PpttRootOffset;
+
+ PpttProcessorEntryPointer->NumberOfPrivateResources = 1;
+ ResPointer = (UINT32 *)((UINT64)EntryPointer + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
+ ResPointer[0] = PpttSLCCacheOffset[SocketId];
+
+ PpttProcessorEntryPointer->Length = sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32);
+
+ return PpttProcessorEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttRootNode (
+ VOID *EntryPointer
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *PpttProcessorEntryPointer = EntryPointer;
+
+ PpttRootOffset = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+
+ CopyMem (
+ PpttProcessorEntryPointer,
+ &PPTTProcessorTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)
+ );
+
+ PpttProcessorEntryPointer->Flags.IdenticalImplementation = 1;
+
+ return PpttProcessorEntryPointer->Length;
+}
+
+STATIC VOID
+AcpiPpttFillCacheSizeInfo (
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *Node,
+ UINT32 Level
+ )
+{
+ UINT64 CacheCCSIDR;
+ UINT32 CacheLineSize;
+ UINT32 Count;
+
+ CacheCCSIDR = ReadCCSIDR (Level);
+
+ CacheLineSize = 1;
+ Count = CCSIDR_LINE_SIZE (CacheCCSIDR) + 4;
+ while (Count-- > 0) {
+ CacheLineSize *= 2;
+ }
+
+ Node->Flags.LineSizeValid = 1;
+ Node->Flags.NumberOfSetsValid = 1;
+ Node->Flags.AssociativityValid = 1;
+ Node->Flags.SizePropertyValid = 1;
+ Node->Flags.CacheTypeValid = 1;
+ Node->NumberOfSets = CCSIDR_NUMSETS (CacheCCSIDR) + 1;
+ Node->Associativity = CCSIDR_ASSOCIATIVITY (CacheCCSIDR) + 1;
+ Node->LineSize = CacheLineSize;
+ Node->Size = Node->NumberOfSets *
+ Node->Associativity *
+ Node->LineSize;
+}
+
+STATIC UINT32
+AcpiPpttL1DataCacheNode (
+ VOID *EntryPointer,
+ UINT32 CpuId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *PpttCacheEntryPointer = EntryPointer;
+
+ PpttL1DataCacheOffset[CpuId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+ CopyMem (
+ PpttCacheEntryPointer,
+ &PPTTCacheTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)
+ );
+
+ AcpiPpttFillCacheSizeInfo (PpttCacheEntryPointer, 1);
+ PpttCacheEntryPointer->Attributes.CacheType = 0x0; /* Data Cache */
+ PpttCacheEntryPointer->NextLevelOfCache = PpttL2CacheOffset[CpuId];
+
+ return PpttCacheEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttL1InstructionCacheNode (
+ VOID *EntryPointer,
+ UINT32 CpuId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *PpttCacheEntryPointer = EntryPointer;
+
+ PpttL1InstructionCacheOffset[CpuId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+ CopyMem (
+ PpttCacheEntryPointer,
+ &PPTTCacheTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)
+ );
+
+ AcpiPpttFillCacheSizeInfo (PpttCacheEntryPointer, 1);
+ PpttCacheEntryPointer->Attributes.CacheType = 0x1; /* Instruction Cache */
+ PpttCacheEntryPointer->NextLevelOfCache = PpttL2CacheOffset[CpuId];
+
+ return PpttCacheEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttL2CacheNode (
+ VOID *EntryPointer,
+ UINT32 CpuId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *PpttCacheEntryPointer = EntryPointer;
+
+ PpttL2CacheOffset[CpuId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+ CopyMem (
+ PpttCacheEntryPointer,
+ &PPTTCacheTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)
+ );
+
+ AcpiPpttFillCacheSizeInfo (PpttCacheEntryPointer, 2);
+ PpttCacheEntryPointer->Attributes.CacheType = 0x3; /* Unified Cache */
+ PpttCacheEntryPointer->NextLevelOfCache = 0;
+
+ return PpttCacheEntryPointer->Length;
+}
+
+STATIC UINT32
+AcpiPpttSLCCacheNode (
+ VOID *EntryPointer,
+ UINT32 SocketId
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *PpttCacheEntryPointer = EntryPointer;
+
+ PpttSLCCacheOffset[SocketId] = (UINT64)EntryPointer - (UINT64)PpttTablePointer;
+ CopyMem (
+ PpttCacheEntryPointer,
+ &PPTTCacheTemplate,
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)
+ );
+
+ PpttCacheEntryPointer->Flags.LineSizeValid = 1;
+ PpttCacheEntryPointer->Flags.NumberOfSetsValid = 1;
+ PpttCacheEntryPointer->Flags.AssociativityValid = 1;
+ PpttCacheEntryPointer->Flags.SizePropertyValid = 1;
+ PpttCacheEntryPointer->Flags.CacheTypeValid = 1;
+
+ PpttCacheEntryPointer->Size = 0x2000000; /* 32 MB */
+ PpttCacheEntryPointer->NumberOfSets = 0x400; /* 1024 sets per 1MB HN-F */
+
+ PpttCacheEntryPointer->Associativity = 0x10; /* 16-way set-associative */
+ PpttCacheEntryPointer->LineSize = 0x40; /* 64 bytes */
+ PpttCacheEntryPointer->NextLevelOfCache = 0;
+
+ PpttCacheEntryPointer->Attributes.CacheType = 0x3; /* Unified Cache */
+
+ return PpttCacheEntryPointer->Length;
+}
+
+/*
+ * Install PPTT table.
+ */
+EFI_STATUS
+AcpiInstallPpttTable (
+ VOID
+ )
+{
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *PpttProcessorEntryPointer = NULL;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ UINTN PpttTableKey = 0;
+ UINTN Count;
+ EFI_STATUS Status;
+ UINTN Size;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Size = sizeof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER) +
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + /* Root node */
+ (PLATFORM_CPU_MAX_SOCKET * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)) + /* SLC node */
+ (PLATFORM_CPU_MAX_SOCKET * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32))) + /* Socket node */
+ (PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_MAX_SOCKET * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)) + /* Cluster node */
+ (PLATFORM_CPU_MAX_NUM_CORES * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + 2 * sizeof (UINT32))) + /* Core node */
+ (PLATFORM_CPU_MAX_NUM_CORES * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)) + /* L1I node */
+ (PLATFORM_CPU_MAX_NUM_CORES * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)) + /* L1D node */
+ (PLATFORM_CPU_MAX_NUM_CORES * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); /* L2 node */
+
+ PpttTablePointer =
+ (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER *)AllocateZeroPool (Size);
+ if (PpttTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ PpttProcessorEntryPointer =
+ (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *)((UINT64)PpttTablePointer +
+ sizeof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER));
+
+ Size = 0;
+ Size += AcpiPpttRootNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size));
+
+ for (Count = 0; Count < PLATFORM_CPU_MAX_SOCKET; Count++) {
+ Size += AcpiPpttSLCCacheNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ Size += AcpiPpttSocketNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ }
+
+ for (Count = 0; Count < PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_MAX_SOCKET; Count++) {
+ Size += AcpiPpttClusterNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ }
+
+ for (Count = 0; Count < PLATFORM_CPU_MAX_NUM_CORES; Count++) {
+ Size += AcpiPpttL2CacheNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ Size += AcpiPpttL1InstructionCacheNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ Size += AcpiPpttL1DataCacheNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ Size += AcpiPpttProcessorCoreNode ((VOID *)((UINT64)PpttProcessorEntryPointer + Size), Count);
+ }
+
+ CopyMem (
+ PpttTablePointer,
+ &PPTTTableHeaderTemplate,
+ sizeof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER)
+ );
+
+ Size += sizeof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER);
+ PpttTablePointer->Header.Length = Size;
+
+ AcpiTableChecksum (
+ (UINT8 *)PpttTablePointer,
+ PpttTablePointer->Header.Length
+ );
+
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)PpttTablePointer,
+ PpttTablePointer->Header.Length,
+ &PpttTableKey
+ );
+ FreePool ((VOID *)PpttTablePointer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSlit.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSlit.c
new file mode 100644
index 000000000000..60acdb9dd5db
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSlit.c
@@ -0,0 +1,190 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiPlatform.h"
+
+#define MAX_NODES_PER_SOCKET 4
+#define SELF_DISTANCE 10
+#define REMOTE_DISTANCE 20
+
+EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER SLITTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE,
+ 0, /* need fill in */
+ EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION
+ ),
+ 0,
+};
+
+VOID
+ComputeCoordinatesForNode (
+ UINTN Node,
+ UINTN *X,
+ UINTN *Y
+ )
+{
+ switch (Node) {
+ case 0:
+ *X = 0;
+ *Y = 0;
+ break;
+ case 1:
+ *X = 1;
+ *Y = 0;
+ break;
+ case 2:
+ *X = 0;
+ *Y = 1;
+ break;
+ case 3:
+ *X = 1;
+ *Y = 1;
+ break;
+ default:
+ *X = 0;
+ *Y = 0;
+ break;
+ }
+}
+
+/**
+ Compute the distance between between two nodes on socket.
+**/
+UINT8
+ComputeSlitDistanceOnSocket (
+ UINTN Node1,
+ UINTN Node2
+ )
+{
+ UINTN X1, Y1, X2, Y2;
+ UINTN XDistance, YDistance;
+
+ ComputeCoordinatesForNode (Node1, &X1, &Y1);
+ ComputeCoordinatesForNode (Node2, &X2, &Y2);
+
+ XDistance = ABS ((INTN)(X1 - X2));
+ YDistance = ABS ((INTN)(Y1 - Y2));
+
+ return (UINT8)(XDistance + YDistance + SELF_DISTANCE);
+}
+
+/**
+ Compute the distance between between two nodes on
+ different sockets.
+ Node1 - local socket node number
+ Node2 - remote socket node number
+**/
+UINT8
+ComputeSlitDistanceOnRemoteSocket (
+ UINTN LocalNode,
+ UINTN RemoteNode
+ )
+{
+ UINTN LocalDistance, RemoteDistance;
+
+ //
+ // Mesh forwards traffic between sockets over both CCIX links when going from
+ // one quadrant to another. For example, memory access from Node 0 to Node 4
+ // results in traffic being split between RCA0 and 1. Hence distance is
+ // different only between upper half and lower half of sockets and not
+ // between quadrants. Hemisphere configuration is not impacted as there
+ // is no upper-half.
+ //
+ LocalDistance = 0;
+ RemoteDistance = 0;
+ if (LocalNode >= (MAX_NODES_PER_SOCKET / 2)) {
+ LocalDistance = 1;
+ }
+ if (RemoteNode >= (MAX_NODES_PER_SOCKET / 2)) {
+ RemoteDistance = 1;
+ }
+
+ return (UINT8)(LocalDistance + RemoteDistance + REMOTE_DISTANCE);
+}
+
+UINT8
+ComputeSlitDistance (
+ UINTN Node1,
+ UINTN Node2,
+ UINTN DomainsPerSocket
+ )
+{
+ UINT8 Distance;
+
+ Distance = 0;
+ if ((Node1 / DomainsPerSocket) == (Node2 / DomainsPerSocket)) {
+ Distance = ComputeSlitDistanceOnSocket (
+ Node1 % DomainsPerSocket,
+ Node2 % DomainsPerSocket
+ );
+ } else {
+ Distance = ComputeSlitDistanceOnRemoteSocket (
+ Node1 % DomainsPerSocket,
+ Node2 % DomainsPerSocket
+ );
+ }
+
+ return Distance;
+}
+
+EFI_STATUS
+AcpiInstallSlitTable (
+ VOID
+ )
+{
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ EFI_STATUS Status;
+ UINTN NumDomain, Count, Count1;
+ EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER *SlitTablePointer;
+ UINT8 *TmpPtr;
+ UINTN SlitTableKey;
+ UINTN NumDomainPerSocket;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ NumDomainPerSocket = CpuGetNumberOfSubNumaRegion ();
+ NumDomain = NumDomainPerSocket * GetNumberOfActiveSockets ();
+
+ SlitTablePointer = (EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER *)
+ AllocateZeroPool (sizeof (SLITTableHeaderTemplate) + NumDomain * NumDomain);
+ if (SlitTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem ((VOID *)SlitTablePointer, (VOID *)&SLITTableHeaderTemplate, sizeof (SLITTableHeaderTemplate));
+ SlitTablePointer->NumberOfSystemLocalities = NumDomain;
+ TmpPtr = (UINT8 *)SlitTablePointer + sizeof (SLITTableHeaderTemplate);
+ for (Count = 0; Count < NumDomain; Count++) {
+ for (Count1 = 0; Count1 < NumDomain; Count1++, TmpPtr++) {
+ *TmpPtr = ComputeSlitDistance (Count, Count1, NumDomainPerSocket);
+ }
+ }
+
+ SlitTablePointer->Header.Length = sizeof (SLITTableHeaderTemplate) + NumDomain * NumDomain;
+
+ AcpiTableChecksum (
+ (UINT8 *)SlitTablePointer,
+ SlitTablePointer->Header.Length
+ );
+
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)SlitTablePointer,
+ SlitTablePointer->Header.Length,
+ &SlitTableKey
+ );
+ FreePool ((VOID *)SlitTablePointer);
+
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
new file mode 100644
index 000000000000..5f3b7007623a
--- /dev/null
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
@@ -0,0 +1,274 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Guid/ArmMpCoreInfo.h>
+#include "AcpiPlatform.h"
+
+EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER SRATTableHeaderTemplate = {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ 0, /* need fill in */
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION
+ ),
+ 0x00000001,
+ 0x0000000000000000,
+};
+
+EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE GicItsAffinityTemplate = {
+ .Type = EFI_ACPI_6_3_GIC_ITS_AFFINITY,
+ sizeof (EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE),
+ .ProximityDomain = 0, /* ProximityDomain */
+ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },
+ .ItsId = 0,
+};
+
+STATIC
+UINTN
+SratCalculateNumMemoryRegion (
+ VOID
+ )
+{
+ PLATFORM_INFO_HOB *PlatformHob;
+ UINTN Count;
+ UINT64 TmpVal;
+ VOID *Hob;
+ UINTN Result;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return 0;
+ }
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ Result = 0;
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ TmpVal = PlatformHob->DramInfo.Size[Count];
+ if (TmpVal > 0) {
+ Result++;
+ }
+ }
+
+ return Result;
+}
+
+STATIC
+EFI_STATUS
+SratAddMemAffinity (
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE *SratMemAffinity
+ )
+{
+ PLATFORM_INFO_HOB *PlatformHob;
+ UINTN Count, NumRegion;
+ UINT64 RegionSize, RegionBase;
+ VOID *Hob;
+ UINTN ProximityDomain;
+
+ /* Get the Platform HOB */
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ NumRegion = 0;
+
+ for (Count = 0; Count < PlatformHob->DramInfo.NumRegion; Count++) {
+ RegionSize = PlatformHob->DramInfo.Size[Count];
+ RegionBase = PlatformHob->DramInfo.Base[Count];
+ ProximityDomain = PlatformHob->DramInfo.Node[Count];
+ if (RegionSize > 0) {
+ ZeroMem ((VOID *)&SratMemAffinity[NumRegion], sizeof (SratMemAffinity[NumRegion]));
+ SratMemAffinity[NumRegion].Flags = EFI_ACPI_6_3_MEMORY_ENABLED;
+ if (PlatformHob->DramInfo.NvdRegion[Count] != 0) {
+ /* Mark NVDIMM-N region as HOT_PLUGGABLE and NON-VOLATILE */
+ SratMemAffinity[NumRegion].Flags |= EFI_ACPI_6_3_MEMORY_HOT_PLUGGABLE |
+ EFI_ACPI_6_3_MEMORY_NONVOLATILE;
+ }
+ SratMemAffinity[NumRegion].LengthLow =
+ (UINT32)(RegionSize & 0xFFFFFFFF);
+ SratMemAffinity[NumRegion].LengthHigh =
+ (UINT32)((RegionSize & 0xFFFFFFFF00000000ULL) >> 32);
+ SratMemAffinity[NumRegion].AddressBaseLow =
+ (UINT32)(RegionBase & 0xFFFFFFFF);
+ SratMemAffinity[NumRegion].AddressBaseHigh =
+ (UINT32)((RegionBase & 0xFFFFFFFF00000000ULL) >> 32);
+ SratMemAffinity[NumRegion].ProximityDomain = (UINT32)(ProximityDomain);
+ SratMemAffinity[NumRegion].Type = EFI_ACPI_6_3_MEMORY_AFFINITY;
+ SratMemAffinity[NumRegion].Length = sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE);
+ NumRegion++;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+SratAddGiccAffinity (
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE *SratGiccAffinity
+ )
+{
+ ARM_PROCESSOR_TABLE *ArmProcessorTable;
+ ARM_CORE_INFO *ArmCoreInfoTable;
+ UINTN Count, NumNode, Idx;
+ UINT32 AcpiProcessorUid;
+ UINT8 Socket;
+ UINT8 Cpm;
+
+ for (Idx = 0; Idx < gST->NumberOfTableEntries; Idx++) {
+ if (CompareGuid (&gArmMpCoreInfoGuid, &(gST->ConfigurationTable[Idx].VendorGuid))) {
+ ArmProcessorTable = (ARM_PROCESSOR_TABLE *)gST->ConfigurationTable[Idx].VendorTable;
+ ArmCoreInfoTable = ArmProcessorTable->ArmCpus;
+ break;
+ }
+ }
+
+ if (Idx == gST->NumberOfTableEntries) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Count = 0;
+ NumNode = 0;
+ while (Count != ArmProcessorTable->NumberOfEntries) {
+ for (Idx = 0; Idx < ArmProcessorTable->NumberOfEntries; Idx++ ) {
+ Socket = ArmCoreInfoTable[Idx].ClusterId;
+ Cpm = (ArmCoreInfoTable[Idx].CoreId >> PLATFORM_CPM_UID_BIT_OFFSET);
+ if (CpuGetSubNumNode (Socket, Cpm) != NumNode) {
+ /* We add nodes based on ProximityDomain order */
+ continue;
+ }
+ AcpiProcessorUid = (ArmCoreInfoTable[Idx].ClusterId << PLATFORM_SOCKET_UID_BIT_OFFSET) +
+ ArmCoreInfoTable[Idx].CoreId;
+ ZeroMem ((VOID *)&SratGiccAffinity[Count], sizeof (SratGiccAffinity[Count]));
+ SratGiccAffinity[Count].AcpiProcessorUid = AcpiProcessorUid;
+ SratGiccAffinity[Count].Flags = 1;
+ SratGiccAffinity[Count].Length = sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE);
+ SratGiccAffinity[Count].Type = EFI_ACPI_6_3_GICC_AFFINITY;
+ SratGiccAffinity[Count].ProximityDomain = CpuGetSubNumNode (Socket, Cpm);
+ Count++;
+ }
+ NumNode++;
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC UINT32
+InstallGicItsAffinity (
+ VOID *EntryPointer,
+ UINT32 Index
+ )
+{
+ EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE *ItsAffinityEntryPointer = EntryPointer;
+ UINTN Size;
+
+ Size = sizeof (GicItsAffinityTemplate);
+ CopyMem (ItsAffinityEntryPointer, &GicItsAffinityTemplate, Size);
+ return Size;
+}
+
+STATIC
+EFI_STATUS
+SratAddGicItsAffinity (
+ VOID *TmpPtr
+ )
+{
+ UINTN Size = 0;
+ UINTN Index;
+
+ /* Install Gic ITSAffinity */
+ if (!IsSlaveSocketPresent ()) {
+ for (Index = 0; Index <= 1; Index++) { /* RCA0/1 */
+ GicItsAffinityTemplate.ItsId = Index;
+ GicItsAffinityTemplate.ProximityDomain = 0;
+ Size += InstallGicItsAffinity ((VOID *)((UINT64)TmpPtr + Size), Index);
+ }
+ }
+
+ for (Index = SOCKET0_FIRST_RC; Index <= SOCKET0_LAST_RC; Index++) {
+ GicItsAffinityTemplate.ItsId = Index;
+ GicItsAffinityTemplate.ProximityDomain = 0;
+ Size += InstallGicItsAffinity ((VOID *)((UINT64)TmpPtr + Size), Index);
+ }
+
+ if (IsSlaveSocketActive ()) {
+ for (Index = SOCKET1_FIRST_RC; Index <= SOCKET1_LAST_RC; Index++) {
+ GicItsAffinityTemplate.ItsId = Index;
+ GicItsAffinityTemplate.ProximityDomain = 1;
+ Size += InstallGicItsAffinity ((VOID *)((UINT64)TmpPtr + Size), Index);
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AcpiInstallSratTable (
+ VOID
+ )
+{
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
+ EFI_STATUS Status;
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *SratTablePointer;
+ UINT8 *TmpPtr;
+ UINTN SratTableKey;
+ UINTN Size;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ NULL,
+ (VOID **)&AcpiTableProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Size = sizeof (SRATTableHeaderTemplate) +
+ SratCalculateNumMemoryRegion () * sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE) +
+ GetNumberOfActiveCores () * sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE) +
+ ((SOCKET0_LAST_RC - SOCKET0_FIRST_RC + 1) * sizeof (GicItsAffinityTemplate));
+ if (IsSlaveSocketActive ()) {
+ Size += (SOCKET1_LAST_RC - SOCKET1_FIRST_RC + 1) * sizeof (GicItsAffinityTemplate);
+ } else if (!IsSlaveSocketPresent ()) {
+ Size += 2 * sizeof (GicItsAffinityTemplate); /* RCA0/1 */
+ }
+
+ SratTablePointer = (EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *)AllocateZeroPool (Size);
+ if (SratTablePointer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem ((VOID *)SratTablePointer, (VOID *)&SRATTableHeaderTemplate, sizeof (SRATTableHeaderTemplate));
+
+ TmpPtr = (UINT8 *)SratTablePointer + sizeof (SRATTableHeaderTemplate);
+ Status = SratAddMemAffinity ((EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE *)TmpPtr);
+ ASSERT_EFI_ERROR (Status);
+
+ TmpPtr += SratCalculateNumMemoryRegion () * sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE);
+ Status = SratAddGiccAffinity ((EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE *)TmpPtr);
+ ASSERT_EFI_ERROR (Status);
+
+ TmpPtr += GetNumberOfActiveCores () * sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE);
+ SratAddGicItsAffinity ((VOID *)(UINT64)TmpPtr);
+ SratTablePointer->Header.Length = Size;
+
+ AcpiTableChecksum (
+ (UINT8 *)SratTablePointer,
+ SratTablePointer->Header.Length
+ );
+
+ Status = AcpiTableProtocol->InstallAcpiTable (
+ AcpiTableProtocol,
+ (VOID *)SratTablePointer,
+ SratTablePointer->Header.Length,
+ &SratTableKey
+ );
+ FreePool ((VOID *)SratTablePointer);
+
+ return Status;
+}
diff --git a/Platform/Ampere/JadePkg/AcpiTables/CPU-S0.asi b/Platform/Ampere/JadePkg/AcpiTables/CPU-S0.asi
new file mode 100755
index 000000000000..023509412f04
--- /dev/null
+++ b/Platform/Ampere/JadePkg/AcpiTables/CPU-S0.asi
@@ -0,0 +1,5639 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+Device(C000) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x0)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x000, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x004, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x008, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x00c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x010, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x014, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x050, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x054, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x058, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 0, 0xFD, 2}
+ }) // Domain 0
+}
+
+Device(C001) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x080, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x084, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x088, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x08c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x090, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x094, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 1, 0xFD, 2}
+ }) // Domain 1
+}
+
+Device(C002) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x100)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x100, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x104, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x108, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x10c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x114, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x12c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x134, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x150, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x154, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x158, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 2, 0xFD, 2}
+ }) // Domain 2
+}
+
+Device(C003) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x101)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x180, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x184, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x188, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x18c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x190, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x194, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 3, 0xFD, 2}
+ }) // Domain 3
+}
+
+Device(C004) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x200)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x200, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x204, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x208, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x20c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x210, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x214, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x22c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x234, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x250, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x254, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x258, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 4, 0xFD, 2}
+ }) // Domain 4
+}
+
+Device(C005) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x201)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x280, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x284, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x288, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x28c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x290, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x294, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 5, 0xFD, 2}
+ }) // Domain 5
+}
+
+Device(C006) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x300)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x300, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x304, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x308, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x30c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x310, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x314, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x32c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x334, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x350, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x354, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x358, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 6, 0xFD, 2}
+ }) // Domain 6
+}
+
+Device(C007) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x301)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x380, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x384, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x388, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x38c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x390, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x394, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 7, 0xFD, 2}
+ }) // Domain 7
+}
+
+Device(C008) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x400)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x400, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x404, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x408, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x40c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x410, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x414, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x42c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x434, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x450, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x454, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x458, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 8, 0xFD, 2}
+ }) // Domain 8
+}
+
+Device(C009) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x401)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x480, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x484, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x488, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x48c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x490, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x494, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x4ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x4b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x4d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x4d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x4d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 9, 0xFD, 2}
+ }) // Domain 9
+}
+
+Device(C010) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x500)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x500, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x504, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x508, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x50c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x510, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x514, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x52c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x534, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x550, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x554, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x558, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 10, 0xFD, 2}
+ }) // Domain 10
+}
+
+Device(C011) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x501)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x580, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x584, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x588, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x58c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x590, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x594, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x5ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x5b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x5d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x5d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x5d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 11, 0xFD, 2}
+ }) // Domain 11
+}
+
+Device(C012) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x600)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x600, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x604, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x608, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x60c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x610, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x614, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x62c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x634, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x650, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x654, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x658, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 12, 0xFD, 2}
+ }) // Domain 12
+}
+
+Device(C013) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x601)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x680, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x684, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x688, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x68c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x690, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x694, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x6ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x6b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x6d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x6d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x6d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 13, 0xFD, 2}
+ }) // Domain 13
+}
+
+Device(C014) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x700)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x700, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x704, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x708, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x70c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x710, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x714, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x72c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x734, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x750, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x754, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x758, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 14, 0xFD, 2}
+ }) // Domain 14
+}
+
+Device(C015) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x701)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x780, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x784, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x788, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x78c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x790, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x794, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x7ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x7b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x7d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x7d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x7d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 15, 0xFD, 2}
+ }) // Domain 15
+}
+
+Device(C016) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x800)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x800, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x804, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x808, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x80c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x810, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x814, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x82c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x834, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x850, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x854, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x858, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 16, 0xFD, 2}
+ }) // Domain 16
+}
+
+Device(C017) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x801)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x880, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x884, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x888, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x88c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x890, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x894, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x8ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x8b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x8d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x8d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x8d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 17, 0xFD, 2}
+ }) // Domain 17
+}
+
+Device(C018) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x900)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x900, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x904, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x908, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x90c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x910, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x914, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x92c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x934, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x950, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x954, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x958, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 18, 0xFD, 2}
+ }) // Domain 18
+}
+
+Device(C019) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x901)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x980, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x984, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x988, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x98c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x990, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x994, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x9ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x9b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x9d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x9d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x9d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 19, 0xFD, 2}
+ }) // Domain 19
+}
+
+Device(C020) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xa00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xa2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xa34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 20, 0xFD, 2}
+ }) // Domain 20
+}
+
+Device(C021) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xa01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xa94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xaac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xab4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xad0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xad4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xad8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 21, 0xFD, 2}
+ }) // Domain 21
+}
+
+Device(C022) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xb00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xb2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xb34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 22, 0xFD, 2}
+ }) // Domain 22
+}
+
+Device(C023) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xb01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xb94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xbac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xbb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xbd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xbd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xbd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 23, 0xFD, 2}
+ }) // Domain 23
+}
+
+Device(C024) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xc00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xc2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xc34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 24, 0xFD, 2}
+ }) // Domain 24
+}
+
+Device(C025) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xc01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xc94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xcac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xcb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xcd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xcd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xcd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 25, 0xFD, 2}
+ }) // Domain 25
+}
+
+Device(C026) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xd00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xd2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xd34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 26, 0xFD, 2}
+ }) // Domain 26
+}
+
+Device(C027) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xd01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xd94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xdac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xdb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xdd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xdd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xdd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 27, 0xFD, 2}
+ }) // Domain 27
+}
+
+Device(C028) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xe00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xe2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xe34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 28, 0xFD, 2}
+ }) // Domain 28
+}
+
+Device(C029) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xe01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xe94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xeac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xeb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xed0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xed4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xed8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 29, 0xFD, 2}
+ }) // Domain 29
+}
+
+Device(C030) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xf00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xf2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xf34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 30, 0xFD, 2}
+ }) // Domain 30
+}
+
+Device(C031) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0xf01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xf94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xfac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xfb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xfd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xfd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0xfd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 31, 0xFD, 2}
+ }) // Domain 31
+}
+
+Device(C032) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1000)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1000, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1004, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1008, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x100c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1010, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1014, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x102c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1034, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1050, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1054, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1058, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 32, 0xFD, 2}
+ }) // Domain 32
+}
+
+Device(C033) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1001)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1080, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1084, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1088, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x108c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1090, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1094, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x10ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x10b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x10d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x10d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x10d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 33, 0xFD, 2}
+ }) // Domain 33
+}
+
+Device(C034) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1100)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1100, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1104, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1108, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x110c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1110, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1114, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x112c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1134, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1150, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1154, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1158, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 34, 0xFD, 2}
+ }) // Domain 34
+}
+
+Device(C035) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1101)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1180, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1184, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1188, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x118c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1190, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1194, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x11ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x11b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x11d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x11d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x11d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 35, 0xFD, 2}
+ }) // Domain 35
+}
+
+Device(C036) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1200)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1200, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1204, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1208, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x120c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1210, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1214, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x122c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1234, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1250, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1254, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1258, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 36, 0xFD, 2}
+ }) // Domain 36
+}
+
+Device(C037) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1201)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1280, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1284, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1288, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x128c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1290, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1294, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x12ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x12b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x12d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x12d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x12d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 37, 0xFD, 2}
+ }) // Domain 37
+}
+
+Device(C038) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1300)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1300, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1304, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1308, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x130c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1310, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1314, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x132c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1334, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1350, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1354, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1358, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 38, 0xFD, 2}
+ }) // Domain 38
+}
+
+Device(C039) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1301)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1380, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1384, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1388, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x138c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1390, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1394, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x13ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x13b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x13d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x13d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x13d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 39, 0xFD, 2}
+ }) // Domain 39
+}
+
+Device(C040) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1400)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1400, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1404, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1408, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x140c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1410, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1414, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x142c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1434, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1450, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1454, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1458, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 40, 0xFD, 2}
+ }) // Domain 40
+}
+
+Device(C041) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1401)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1480, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1484, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1488, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x148c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1490, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1494, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x14ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x14b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x14d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x14d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x14d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 41, 0xFD, 2}
+ }) // Domain 41
+}
+
+Device(C042) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1500)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1500, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1504, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1508, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x150c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1510, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1514, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x152c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1534, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1550, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1554, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1558, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 42, 0xFD, 2}
+ }) // Domain 42
+}
+
+Device(C043) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1501)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1580, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1584, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1588, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x158c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1590, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1594, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x15ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x15b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x15d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x15d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x15d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 43, 0xFD, 2}
+ }) // Domain 43
+}
+
+Device(C044) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1600)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1600, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1604, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1608, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x160c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1610, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1614, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x162c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1634, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1650, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1654, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1658, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 44, 0xFD, 2}
+ }) // Domain 44
+}
+
+Device(C045) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1601)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1680, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1684, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1688, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x168c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1690, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1694, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x16ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x16b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x16d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x16d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x16d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 45, 0xFD, 2}
+ }) // Domain 45
+}
+
+Device(C046) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1700)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1700, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1704, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1708, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x170c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1710, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1714, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x172c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1734, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1750, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1754, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1758, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 46, 0xFD, 2}
+ }) // Domain 46
+}
+
+Device(C047) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1701)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1780, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1784, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1788, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x178c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1790, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1794, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x17ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x17b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x17d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x17d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x17d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 47, 0xFD, 2}
+ }) // Domain 47
+}
+
+Device(C048) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1800)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1800, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1804, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1808, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x180c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1810, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1814, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x182c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1834, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1850, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1854, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1858, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 48, 0xFD, 2}
+ }) // Domain 48
+}
+
+Device(C049) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1801)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1880, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1884, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1888, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x188c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1890, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1894, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x18ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x18b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x18d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x18d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x18d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 49, 0xFD, 2}
+ }) // Domain 49
+}
+
+Device(C050) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1900)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1900, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1904, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1908, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x190c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1910, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1914, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x192c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1934, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1950, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1954, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1958, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 50, 0xFD, 2}
+ }) // Domain 50
+}
+
+Device(C051) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1901)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1980, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1984, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1988, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x198c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1990, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1994, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x19ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x19b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x19d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x19d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x19d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 51, 0xFD, 2}
+ }) // Domain 51
+}
+
+Device(C052) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1a00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1a2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1a34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 52, 0xFD, 2}
+ }) // Domain 52
+}
+
+Device(C053) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1a01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1a94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1aac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1ab4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ad0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ad4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ad8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 53, 0xFD, 2}
+ }) // Domain 53
+}
+
+Device(C054) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1b00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1b2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1b34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 54, 0xFD, 2}
+ }) // Domain 54
+}
+
+Device(C055) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1b01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1b94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1bac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1bb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1bd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1bd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1bd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 55, 0xFD, 2}
+ }) // Domain 5
+}
+
+Device(C056) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1c00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1c2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1c34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 56, 0xFD, 2}
+ }) // Domain 56
+}
+
+Device(C057) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1c01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1c94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1cac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1cb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1cd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1cd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1cd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 57, 0xFD, 2}
+ }) // Domain 57
+}
+
+Device(C058) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1d00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1d2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1d34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 58, 0xFD, 2}
+ }) // Domain 58
+}
+
+Device(C059) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1d01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1dac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1db4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1dd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1dd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1dd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 59, 0xFD, 2}
+ }) // Domain 59
+}
+
+Device(C060) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1e00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1e2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1e34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 60, 0xFD, 2}
+ }) // Domain 60
+}
+
+Device(C061) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1e01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1e94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1eac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1eb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ed0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ed4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1ed8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 61, 0xFD, 2}
+ }) // Domain 61
+}
+
+Device(C062) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1f00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1f2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1f34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 62, 0xFD, 2}
+ }) // Domain 62
+}
+
+Device(C063) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x1f01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1f94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1fac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1fb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1fd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1fd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1fd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 63, 0xFD, 2}
+ }) // Domain 63
+}
+
+Device(C064) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2000)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2000, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2004, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2008, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x200c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2010, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2014, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x202c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2034, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2050, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2054, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2058, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 64, 0xFD, 2}
+ }) // Domain 64
+}
+
+Device(C065) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2001)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2080, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2084, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2088, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x208c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2090, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2094, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x20ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x20b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x20d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x20d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x20d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 65, 0xFD, 2}
+ }) // Domain 65
+}
+
+Device(C066) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2100)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2100, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2104, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2108, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x210c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2110, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2114, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x212c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2134, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2150, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2154, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2158, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 66, 0xFD, 2}
+ }) // Domain 66
+}
+
+Device(C067) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2101)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2180, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2184, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2188, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x218c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2190, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2194, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x21ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x21b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x21d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x21d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x21d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 67, 0xFD, 2}
+ }) // Domain 67
+}
+
+Device(C068) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2200)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2200, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2204, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2208, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x220c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2210, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2214, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x222c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2234, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2250, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2254, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2258, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 68, 0xFD, 2}
+ }) // Domain 68
+}
+
+Device(C069) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2201)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2280, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2284, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2288, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x228c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2290, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2294, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x22ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x22b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x22d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x22d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x22d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 69, 0xFD, 2}
+ }) // Domain 69
+}
+
+Device(C070) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2300)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2300, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2304, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2308, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x230c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2310, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2314, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x232c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2334, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2350, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2354, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2358, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 70, 0xFD, 2}
+ }) // Domain 70
+}
+
+Device(C071) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2301)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2380, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2384, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2388, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x238c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2390, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2394, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x23ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x23b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x23d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x23d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x23d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 71, 0xFD, 2}
+ }) // Domain 71
+}
+
+Device(C072) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2400)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2400, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2404, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2408, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x240c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2410, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2414, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x242c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2434, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2450, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2454, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2458, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 72, 0xFD, 2}
+ }) // Domain 72
+}
+
+Device(C073) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2401)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2480, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2484, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2488, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x248c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2490, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2494, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x24ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x24b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x24d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x24d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x24d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 73, 0xFD, 2}
+ }) // Domain 73
+}
+
+Device(C074) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2500)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2500, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2504, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2508, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x250c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2510, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2514, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x252c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2534, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2550, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2554, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2558, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 74, 0xFD, 2}
+ }) // Domain 74
+}
+
+Device(C075) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2501)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2580, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2584, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2588, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x258c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2590, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2594, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x25ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x25b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x25d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x25d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x25d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 75, 0xFD, 2}
+ }) // Domain 75
+}
+
+Device(C076) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2600)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2600, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2604, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2608, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x260c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2610, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2614, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x262c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2634, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2650, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2654, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2658, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 76, 0xFD, 2}
+ }) // Domain 76
+}
+
+Device(C077) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2601)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2680, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2684, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2688, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x268c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2690, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2694, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x26ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x26b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x26d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x26d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x26d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 77, 0xFD, 2}
+ }) // Domain 77
+}
+
+Device(C078) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2700)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2700, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2704, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2708, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x270c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2710, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2714, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x272c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2734, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2750, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2754, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2758, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 78, 0xFD, 2}
+ }) // Domain 78
+}
+
+Device(C079) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2701)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2780, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2784, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2788, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x278c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2790, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2794, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x27ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x27b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x27d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x27d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x27d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 79, 0xFD, 2}
+ }) // Domain 79
+}
+
+Device(C080) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2800)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2800, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2804, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2808, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x280c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2810, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2814, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x282c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2834, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2850, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2854, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2858, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 80, 0xFD, 2}
+ }) // Domain 80
+}
+
+Device(C081) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2801)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2880, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2884, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2888, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x288c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2890, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2894, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x28ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x28b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x28d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x28d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x28d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 81, 0xFD, 2}
+ }) // Domain 81
+}
+
+Device(C082) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2900)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2900, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2904, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2908, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x290c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2910, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2914, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x292c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2934, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2950, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2954, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2958, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 82, 0xFD, 2}
+ }) // Domain 82
+}
+
+Device(C083) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2901)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2980, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2984, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2988, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x298c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2990, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2994, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x29ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x29b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x29d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x29d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x29d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 83, 0xFD, 2}
+ }) // Domain 83
+}
+
+Device(C084) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2a00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2a2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2a34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 84, 0xFD, 2}
+ }) // Domain 84
+}
+
+Device(C085) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2a01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2a94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2aac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2ab4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ad0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ad4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ad8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 85, 0xFD, 2}
+ }) // Domain 85
+}
+
+Device(C086) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2b00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2b2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2b34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 86, 0xFD, 2}
+ }) // Domain 86
+}
+
+Device(C087) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2b01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2b94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2bac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2bb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2bd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2bd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2bd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 87, 0xFD, 2}
+ }) // Domain 87
+}
+
+Device(C088) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2c00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2c2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2c34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 88, 0xFD, 2}
+ }) // Domain 88
+}
+
+Device(C089) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2c01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2c94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2cac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2cb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2cd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2cd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2cd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 89, 0xFD, 2}
+ }) // Domain 89
+}
+
+Device(C090) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2d00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2d2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2d34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 90, 0xFD, 2}
+ }) // Domain 90
+}
+
+Device(C091) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2d01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2d94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2dac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2db4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2dd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2dd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2dd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 91, 0xFD, 2}
+ }) // Domain 91
+}
+
+Device(C092) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2e00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2e2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2e34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 92, 0xFD, 2}
+ }) // Domain 92
+}
+
+Device(C093) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2e01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2e94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2eac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2eb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ed0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ed4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2ed8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 93, 0xFD, 2}
+ }) // Domain 93
+}
+
+Device(C094) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2f00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2f2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2f34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 94, 0xFD, 2}
+ }) // Domain 94
+}
+
+Device(C095) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x2f01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2f94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2fac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2fb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2fd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2fd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x2fd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 95, 0xFD, 2}
+ }) // Domain 95
+}
+
+Device(C096) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3000)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3000, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3004, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3008, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x300c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3010, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3014, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x302c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3034, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3050, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3054, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3058, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 96, 0xFD, 2}
+ }) // Domain 96
+}
+
+Device(C097) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3001)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3080, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3084, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3088, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x308c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3090, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3094, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x30ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x30b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x30d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x30d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x30d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 97, 0xFD, 2}
+ }) // Domain 97
+}
+
+Device(C098) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3100)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3100, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3104, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3108, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x310c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3110, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3114, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x312c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3134, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3150, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3154, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3158, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 98, 0xFD, 2}
+ }) // Domain 98
+}
+
+Device(C099) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3101)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3180, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3184, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3188, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x318c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3190, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3194, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x31ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x31b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x31d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x31d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x31d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 99, 0xFD, 2}
+ }) // Domain 99
+}
+
+Device(C100) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3200)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3200, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3204, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3208, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x320c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3210, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3214, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x322c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3234, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3250, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3254, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3258, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 100, 0xFD, 2}
+ }) // Domain 100
+}
+
+Device(C101) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3201)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3280, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3284, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3288, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x328c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3290, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3294, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x32ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x32b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x32d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x32d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x32d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 101, 0xFD, 2}
+ }) // Domain 101
+}
+
+Device(C102) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3300)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3300, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3304, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3308, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x330c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3310, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3314, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x332c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3334, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3350, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3354, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3358, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 102, 0xFD, 2}
+ }) // Domain 102
+}
+
+Device(C103) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3301)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3380, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3384, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3388, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x338c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3390, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3394, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x33ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x33b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x33d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x33d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x33d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 103, 0xFD, 2}
+ }) // Domain 103
+}
+
+Device(C104) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3400)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3400, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3404, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3408, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x340c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3410, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3414, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x342c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3434, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3450, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3454, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3458, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 104, 0xFD, 2}
+ }) // Domain 104
+}
+
+Device(C105) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3401)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3480, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3484, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3488, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x348c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3490, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3494, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x34ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x34b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x34d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x34d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x34d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 105, 0xFD, 2}
+ }) // Domain 105
+}
+
+Device(C106) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3500)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3500, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3504, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3508, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x350c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3510, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3514, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x352c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3534, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3550, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3554, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3558, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 106, 0xFD, 2}
+ }) // Domain 106
+}
+
+Device(C107) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3501)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3580, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3584, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3588, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x358c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3590, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3594, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x35ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x35b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x35d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x35d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x35d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 107, 0xFD, 2}
+ }) // Domain 107
+}
+
+Device(C108) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3600)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3600, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3604, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3608, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x360c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3610, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3614, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x362c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3634, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3650, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3654, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3658, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 108, 0xFD, 2}
+ }) // Domain 108
+}
+
+Device(C109) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3601)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3680, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3684, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3688, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x368c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3690, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3694, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x36ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x36b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x36d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x36d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x36d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 109, 0xFD, 2}
+ }) // Domain 109
+}
+
+Device(C110) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3700)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3700, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3704, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3708, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x370c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3710, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3714, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x372c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3734, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3750, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3754, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3758, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 110, 0xFD, 2}
+ }) // Domain 110
+}
+
+Device(C111) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3701)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3780, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3784, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3788, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x378c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3790, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3794, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x37ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x37b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x37d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x37d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x37d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 111, 0xFD, 2}
+ }) // Domain 111
+}
+
+Device(C112) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3800)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3800, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3804, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3808, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x380c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3810, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3814, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x382c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3834, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3850, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3854, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3858, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 112, 0xFD, 2}
+ }) // Domain 112
+}
+
+Device(C113) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3801)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3880, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3884, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3888, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x388c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3890, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3894, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x38ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x38b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x38d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x38d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x38d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 113, 0xFD, 2}
+ }) // Domain 113
+}
+
+Device(C114) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3900)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3900, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3904, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3908, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x390c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3910, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3914, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x392c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3934, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3950, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3954, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3958, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 114, 0xFD, 2}
+ }) // Domain 114
+}
+
+Device(C115) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3901)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3980, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3984, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3988, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x398c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3990, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3994, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x39ac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x39b4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x39d0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x39d4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x39d8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 115, 0xFD, 2}
+ }) // Domain 115
+}
+
+Device(C116) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3a00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3a2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3a34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 116, 0xFD, 2}
+ }) // Domain 116
+}
+
+Device(C117) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3a01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3a94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3aac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3ab4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ad0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ad4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ad8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 117, 0xFD, 2}
+ }) // Domain 117
+}
+
+Device(C118) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3b00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3b2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3b34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 118, 0xFD, 2}
+ }) // Domain 118
+}
+
+Device(C119) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3b01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3b94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3bac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3bb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3bd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3bd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3bd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 119, 0xFD, 2}
+ }) // Domain 119
+}
+
+Device(C120) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3c00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3c2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3c34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 120, 0xFD, 2}
+ }) // Domain 120
+}
+
+Device(C121) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3c01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3c94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3cac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3cb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3cd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3cd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3cd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 121, 0xFD, 2}
+ }) // Domain 121
+}
+
+Device(C122) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3d00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3d2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3d34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 122, 0xFD, 2}
+ }) // Domain 122
+}
+
+Device(C123) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3d01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3d94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3dac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3db4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3dd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3dd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3dd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 123, 0xFD, 2}
+ }) // Domain 123
+}
+
+Device(C124) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3e00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3e2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3e34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 124, 0xFD, 2}
+ }) // Domain 124
+}
+
+Device(C125) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3e01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3e94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3eac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3eb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ed0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ed4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3ed8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 125, 0xFD, 2}
+ }) // Domain 125
+}
+
+Device(C126) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3f00)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f00, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f04, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f08, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f0c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f10, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f14, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3f2c, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3f34, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f50, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f54, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f58, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 126, 0xFD, 2}
+ }) // Domain 126
+}
+
+Device(C127) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x3f01)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f80, 2)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f84, 2)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f88, 2)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f8c, 2)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f90, 2)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3f94, 2)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3fac, 2)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x3fb4, 2)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3fd0, 2)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3fd4, 2)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x3fd8, 2)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package(){
+ Package() {5, 0, 127, 0xFD, 2}
+ }) // Domain 127
+}
diff --git a/Platform/Ampere/JadePkg/AcpiTables/CPU-S1.asi b/Platform/Ampere/JadePkg/AcpiTables/CPU-S1.asi
new file mode 100755
index 000000000000..b3cc7a1b00e4
--- /dev/null
+++ b/Platform/Ampere/JadePkg/AcpiTables/CPU-S1.asi
@@ -0,0 +1,5639 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+Device(C128) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10000)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x000, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x004, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x008, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x00c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x010, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x014, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2c, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x34, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x050, 17)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x054, 17)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x058, 17)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 128, 0xFD, 2}
+ }) // Domain 128
+}
+
+Device(C129) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10001)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x080, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x084, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x088, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x08c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x090, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x094, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0xac, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0xb4, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d0, 17)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d4, 17)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x0d8, 17)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 1219, 0xFD, 2}
+ }) // Domain 129
+}
+
+Device(C130) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10100)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x100, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x104, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x108, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x10c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x110, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x114, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x12c, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x134, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x150, 17)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x154, 17)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x158, 17)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 130, 0xFD, 2}
+ }) // Domain 130
+}
+
+Device(C131) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10101)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x180, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x184, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x188, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x18c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x190, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x194, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1ac, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x1b4, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d0, 17)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d4, 17)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x1d8, 17)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 131, 0xFD, 2}
+ }) // Domain 131
+}
+
+Device(C132) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10200)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x200, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x204, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x208, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x20c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x210, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x214, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x22c, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x234, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x250, 17)}, // Reference Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x254, 17)}, // Lowest Frequency Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x258, 17)}, // Nominal Frequency Register
+ })
+ If (LEqual(CPCE, 0x1)) {
+ Method (_CPC, 0, NotSerialized) {
+ return(PCPC)
+ }
+ }
+ //Performance State dependency
+ Name(_PSD, Package() {
+ Package() {5, 0, 132, 0xFD, 2}
+ }) // Domain 132
+}
+
+Device(C133) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0x10201)
+
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+
+ Name(PCPC, Package() {
+ 23, // NumEntries
+ 3, // Revision
+ ResourceTemplate(){Register(PCC, 32, 0, 0x280, 17)}, // Highest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x284, 17)}, // Nominal Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x288, 17)}, // Lowest Nonlinear Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x28c, 17)}, // Lowest Performance
+ ResourceTemplate(){Register(PCC, 32, 0, 0x290, 17)}, // Guaranteed Performance Register
+ ResourceTemplate(){Register(PCC, 32, 0, 0x294, 17)}, // Desired Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Reduction Tolerance Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2ac, 17)}, // Reference Counter Register
+ ResourceTemplate(){Register(PCC, 64, 0, 0x2b4, 17)}, // Delivered Counter Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Limited Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Enable Register
+ ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Aut
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