[PATCH v2 4/5] ArmVirtPkg: Introduce Cloud Hypervisor to edk2 family
Jianyong Wu
Cloud Hypervisor is kvm based VMM and is implemented in rust. Just like
other VMMs it need UEFI support to let ACPI work. That's why Cloud Hypervisor is introduced here. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Signed-off-by: Jianyong Wu <jianyong.wu@arm.com> --- ArmVirtPkg/ArmVirtCloudHv.dsc | 455 ++++++++++++++++++++++++ ArmVirtPkg/ArmVirtCloudHv.fdf | 292 +++++++++++++++ ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc | 169 +++++++++ 3 files changed, 916 insertions(+) create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf create mode 100644 ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc new file mode 100644 index 000000000000..bf1f8c5a75ae --- /dev/null +++ b/ArmVirtPkg/ArmVirtCloudHv.dsc @@ -0,0 +1,455 @@ +# +# Copyright (c) 2011-2015, ARM Limited. All rights reserved. +# Copyright (c) 2014, Linaro Limited. All rights reserved. +# Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = ArmVirtCloudHv + PLATFORM_GUID = DFFED32B-DFFE-D32B-DFFE-D32BDFFED32B + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/ArmVirtCloudHv-$(ARCH) + SUPPORTED_ARCHITECTURES = AARCH64|ARM + BUILD_TARGETS = DEBUG|RELEASE|NOOPT + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = ArmVirtPkg/ArmVirtCloudHv.fdf + + # + # Defines for default states. These can be changed on the command line. + # -D FLAG=VALUE + # + DEFINE TTY_TERMINAL = FALSE + DEFINE SECURE_BOOT_ENABLE = FALSE + DEFINE TPM2_ENABLE = FALSE + DEFINE TPM2_CONFIG_ENABLE = FALSE + +!include ArmVirtPkg/ArmVirt.dsc.inc + +[LibraryClasses.common] + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf + + # Virtio Support + VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf + VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf + QemuFwCfgLib|ArmVirtPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf + QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf + QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf + QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf + + ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf + + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf + PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf + FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf + QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + PciPcdProducerLib|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf + PciHostBridgeLib|ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf + PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf + +!if $(TPM2_ENABLE) == TRUE + Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf + Tcg2PhysicalPresenceLib|OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLib.inf + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf +!else + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf +!endif + +!include MdePkg/MdeLibs.dsc.inc + +[LibraryClasses.common.PEIM] + ArmVirtMemInfoLib|ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf + +!if $(TPM2_ENABLE) == TRUE + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf + ResetSystemLib|MdeModulePkg/Library/PeiResetSystemLib/PeiResetSystemLib.inf + Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2DeviceLibDTpm.inf +!endif + +[LibraryClasses.common.DXE_DRIVER] + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + +!if $(TPM2_ENABLE) == TRUE + Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf +!endif + +[LibraryClasses.common.UEFI_DRIVER] + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf + +[BuildOptions] +!include NetworkPkg/NetworkBuildOptions.dsc.inc + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE + + ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. + # It could be set FALSE to save size. + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE + + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + + gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|$(TPM2_ENABLE) + +[PcdsFixedAtBuild.common] +!if $(ARCH) == AARCH64 + gArmTokenSpaceGuid.PcdVFPEnabled|1 +!endif + + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x4007c000 + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 + + # Rsdp base address in Cloud Hypervisor + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiRsdpBaseAddress|0x40200000 + + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x4000000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x40000 +!if $(NETWORK_TLS_ENABLE) == TRUE + # + # The cumulative and individual VOLATILE variable size limits should be set + # high enough for accommodating several and/or large CA certificates. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x80000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVolatileVariableSize|0x40000 +!endif + + # Size of the region used by UEFI in permanent memory (Reserved 64MB) + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 + + # + # ARM PrimeCell + # + + ## PL011 - Serial Terminal + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400 + + ## Default Terminal Type + ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM +!if $(TTY_TERMINAL) == TRUE + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 + # Set terminal type to TtyTerm, the value encoded is EFI_TTY_TERM_GUID + gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x80, 0x6d, 0x91, 0x7d, 0xb1, 0x5b, 0x8c, 0x45, 0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94} +!else + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|1 +!endif + + # System Memory Base -- fixed at 0x4000_0000 + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000 + + # initial location of the device tree blob passed by Cloud Hypervisor -- base of DRAM + gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x40000000 + + + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + + # + # The maximum physical I/O addressability of the processor, set with + # BuildCpuHob(). + # + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 + + # + # Enable the non-executable DXE stack. (This gets set up by DxeIpl) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + +!if $(SECURE_BOOT_ENABLE) == TRUE + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 +!endif + + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|3 + gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize|0x20000 + +[PcdsFixedAtBuild.AARCH64] + # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point, + # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the + # presence of the 32-bit entry point anyway (because many AARCH64 systems + # don't have 32-bit addressable physical RAM), and the additional allocations + # below 4 GB needlessly fragment the memory map. So expose the 64-bit entry + # point only, for entry point versions >= 3.0. + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2 + +[PcdsDynamicDefault.common] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 + + ## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI + # enumeration to complete before installing ACPI tables. + gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE + + # System Memory Size -- 1 MB initially, actual size will be fetched from DT + gArmTokenSpaceGuid.PcdSystemMemorySize|0x00100000 + + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE + + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0 + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0 + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0 + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0 + + # + # ARM General Interrupt Controller + # + gArmTokenSpaceGuid.PcdGicDistributorBase|0x0 + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0 + + ## PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0 + + # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this + # PCD and PcdPciDisableBusEnumeration above have not been assigned yet + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF + + gArmTokenSpaceGuid.PcdPciIoTranslation|0 +# gArmTokenSpaceGuid.PcdPciIoTranslation|0x50000000 + + # + # TPM2 support + # + gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0 +!if $(TPM2_ENABLE) == TRUE + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0 +!endif + +[PcdsDynamicHii] + gArmVirtTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gArmVirtVariableGuid|0x0|FALSE|NV,BS + +!if $(TPM2_CONFIG_ENABLE) == TRUE + gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x0|"1.3"|NV,BS + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|3|NV,BS +!endif + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + # + # PEI Phase modules + # + ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + <LibraryClasses> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + ArmPlatformPkg/PlatformPei/PlatformPeim.inf + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + ArmPkg/Drivers/CpuPei/CpuPei.inf + + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + +!if $(TPM2_ENABLE) == TRUE + MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf { + <LibraryClasses> + ResetSystemLib|ArmVirtPkg/Library/ArmVirtPsciResetSystemPeiLib/ArmVirtPsciResetSystemPeiLib.inf + } + OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf + SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf { + <LibraryClasses> + HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.inf + NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf + NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf + NULL|SecurityPkg/Library/HashInstanceLibSha384/HashInstanceLibSha384.inf + NULL|SecurityPkg/Library/HashInstanceLibSha512/HashInstanceLibSha512.inf + NULL|SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.inf + } +!endif + + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + } + + # + # DXE + # + MdeModulePkg/Core/Dxe/DxeMain.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + } + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { + <LibraryClasses> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + + # + # Architectural Protocols + # + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf + # don't use unaligned CopyMem () on the UEFI varstore NOR flash region + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + } +!if $(SECURE_BOOT_ENABLE) == TRUE + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { + <LibraryClasses> + NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf +!if $(TPM2_ENABLE) == TRUE + NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf +!endif + } + SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf + OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf +!else + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf +!endif + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf { + <LibraryClasses> + NULL|ArmVirtPkg/Library/ArmVirtPL031FdtClientLib/ArmVirtPL031FdtClientLib.inf + } + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + ArmPkg/Drivers/TimerDxe/TimerDxe.inf { + <LibraryClasses> + NULL|ArmVirtPkg/Library/ArmVirtTimerFdtClientLib/ArmVirtTimerFdtClientLib.inf + } + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + # + # Status Code Routing + # + MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + + # + # Platform Driver + # + ArmVirtPkg/VirtioFdtDxe/VirtioFdtDxe.inf + ArmVirtPkg/FdtClientDxe/FdtClientDxe.inf + ArmVirtPkg/HighMemDxe/HighMemDxe.inf + OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + OvmfPkg/VirtioScsiDxe/VirtioScsi.inf + OvmfPkg/VirtioNetDxe/VirtioNet.inf + OvmfPkg/VirtioRngDxe/VirtioRng.inf + + # + # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf + OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf { + <LibraryClasses> + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Logo/LogoDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } + OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf + + # + # SCSI Bus and Disk Driver + # + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + + # + # PCI support + # + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf { + <LibraryClasses> + NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf { + <LibraryClasses> + NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf + OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf + OvmfPkg/Virtio10Dxe/Virtio10.inf + + # + # TPM2 support + # +!if $(TPM2_ENABLE) == TRUE + SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf { + <LibraryClasses> + HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.inf + Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf + NULL|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2InstanceLibDTpm.inf + NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf + NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf + NULL|SecurityPkg/Library/HashInstanceLibSha384/HashInstanceLibSha384.inf + NULL|SecurityPkg/Library/HashInstanceLibSha512/HashInstanceLibSha512.inf + NULL|SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.inf + } +!if $(TPM2_CONFIG_ENABLE) == TRUE + SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf +!endif +!endif + + # + # ACPI Support + # + ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf +[Components.AARCH64] + MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf { + <LibraryClasses> + NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } diff --git a/ArmVirtPkg/ArmVirtCloudHv.fdf b/ArmVirtPkg/ArmVirtCloudHv.fdf new file mode 100644 index 000000000000..3619a09ba8c5 --- /dev/null +++ b/ArmVirtPkg/ArmVirtCloudHv.fdf @@ -0,0 +1,292 @@ +# +# Copyright (c) 2011-2015, ARM Limited. All rights reserved. +# Copyright (c) 2014, Linaro Limited. All rights reserved. +# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[Defines] +!if $(FD_SIZE_IN_MB) == 2 + DEFINE FVMAIN_COMPACT_SIZE = 0x1ff000 +!endif +!if $(FD_SIZE_IN_MB) == 3 + DEFINE FVMAIN_COMPACT_SIZE = 0x2ff000 +!endif + +[FD.CLOUDHV_EFI] +BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # cloud-hypervisor assigns 0 - 0x8000000 for a BootROM +Size = $(FD_SIZE)|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = $(FD_NUM_BLOCKS) + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType <FV, DATA, or FILE> +# +################################################################################ + +# +# UEFI has trouble dealing with FVs that reside at physical address 0x0. +# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the +# real FV at offset 0x1000 +# +0x00000000|0x00001000 +DATA = { +!if $(ARCH) == AARCH64 + 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM +!else + 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM +!endif +} + +0x00001000|$(FVMAIN_COMPACT_SIZE) +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + +!include VarStore.fdf.inc + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +#!include ArmVirtCloudHvFvMain.fdf.inc + + + +[FV.FvMain] +FvNameGuid = 2A88A00E-E267-C8BF-0E80-AE1BD504ED90 +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 16 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF ArmVirtPkg/VirtioFdtDxe/VirtioFdtDxe.inf + INF ArmVirtPkg/FdtClientDxe/FdtClientDxe.inf + INF ArmVirtPkg/HighMemDxe/HighMemDxe.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf +!endif + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + # + # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf + INF OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf + + # + # Status Code Routing + # + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + + # + # Platform Driver + # + INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + INF OvmfPkg/VirtioNetDxe/VirtioNet.inf + INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf + INF OvmfPkg/VirtioRngDxe/VirtioRng.inf + + # + # UEFI application (Shell Embedded Boot Loader) + # + INF ShellPkg/Application/Shell/Shell.inf + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf + INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf + INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf + + # + # SCSI Bus and Disk Driver + # + INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + + # + # ACPI Support + # + INF ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf +!if $(ARCH) == AARCH64 + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + INF ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf + + # + # EBC support + # + INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf +!endif + + # + # PCI support + # + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf + INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf + INF OvmfPkg/Virtio10Dxe/Virtio10.inf + + # + # TPM2 support + # +!if $(TPM2_ENABLE) == TRUE + INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf +!if $(TPM2_CONFIG_ENABLE) == TRUE + INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf +!endif +!endif + + # + # TianoCore logo (splash screen) + # + INF MdeModulePkg/Logo/LogoDxe.inf + + # + # Ramdisk support + # + INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf + + + + + + + + + + + + +[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf + INF MdeModulePkg/Core/Pei/PeiMain.inf + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + INF ArmPkg/Drivers/CpuPei/CpuPei.inf + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf + +!if $(TPM2_ENABLE) == TRUE + INF MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf + INF OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf + INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf +!endif + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include ArmVirtRules.fdf.inc diff --git a/ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc b/ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc new file mode 100644 index 000000000000..51041e889ef4 --- /dev/null +++ b/ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc @@ -0,0 +1,169 @@ +# +# Copyright (c) 2011-2015, ARM Limited. All rights reserved. +# Copyright (c) 2014-2016, Linaro Limited. All rights reserved. +# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +FvNameGuid = 2A88A00E-E267-C8BF-0E80-AE1BD504ED90 +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 16 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF ArmVirtPkg/VirtioFdtDxe/VirtioFdtDxe.inf + INF ArmVirtPkg/FdtClientDxe/FdtClientDxe.inf + INF ArmVirtPkg/HighMemDxe/HighMemDxe.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf +!endif + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + # + # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf + INF OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf + + # + # Status Code Routing + # + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + + # + # Platform Driver + # + INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + INF OvmfPkg/VirtioNetDxe/VirtioNet.inf + INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf + INF OvmfPkg/VirtioRngDxe/VirtioRng.inf + + # + # UEFI application (Shell Embedded Boot Loader) + # + INF ShellPkg/Application/Shell/Shell.inf + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf + INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf + INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf + + # + # SCSI Bus and Disk Driver + # + INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + + # + # ACPI Support + # + INF ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf +!if $(ARCH) == AARCH64 + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + INF ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf + + # + # EBC support + # + INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf +!endif + + # + # PCI support + # + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf + INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf + INF OvmfPkg/Virtio10Dxe/Virtio10.inf + + # + # TPM2 support + # +!if $(TPM2_ENABLE) == TRUE + INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf +!if $(TPM2_CONFIG_ENABLE) == TRUE + INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf +!endif +!endif + + # + # TianoCore logo (splash screen) + # + INF MdeModulePkg/Logo/LogoDxe.inf + + # + # Ramdisk support + # + INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf -- 2.17.1
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[PATCH v2 3/5] ArmVirtPkg: enable ACPI for cloud hypervisor
Jianyong Wu
The current implementation of PlatformHasAcpiDt is not a common
library and is on behalf of qemu. So give a specific version for Cloud Hypervisor here. There is no device like Fw-cfg in qemu in Cloud Hypervisor, so a specific Acpi handler is introduced here. The handler implemented here is in a very simple way: firstly, aquire the Rsdp address from the PCD varaible in the top ".dsc"; secondly, get the Xsdp address from Rsdp structure; thirdly, get the Acpi tables following the Xsdp structrue and install it one by one. Signed-off-by: Jianyong Wu <jianyong.wu@arm.com> --- .../CloudHvAcpiPlatformDxe.inf | 51 +++++++++++++ .../CloudHvHasAcpiDtDxe.inf | 43 +++++++++++ .../CloudHvAcpiPlatformDxe/CloudHvAcpi.c | 73 +++++++++++++++++++ .../CloudHvHasAcpiDtDxe.c | 69 ++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c diff --git a/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf new file mode 100644 index 000000000000..63c74e84eb27 --- /dev/null +++ b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf @@ -0,0 +1,51 @@ +## @file +# OVMF ACPI Platform Driver for Cloud Hypervisor +# +# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR> +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ClhFwCfgAcpiPlatform + FILE_GUID = 6c76e407-73f2-dc1c-938f-5d6c4691ea93 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = CloudHvAcpiPlatformEntryPoint + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 +# + +[Sources] + CloudHvAcpi.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + OvmfPkg/OvmfPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + MemoryAllocationLib + OrderedCollectionLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Protocols] + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED + gEfiPciIoProtocolGuid # PROTOCOL SOMETIMES_CONSUMED + +[Guids] + gRootBridgesConnectedEventGroupGuid + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiRsdpBaseAddress + +[Depex] + gEfiAcpiTableProtocolGuid diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf new file mode 100644 index 000000000000..f511a4f5064c --- /dev/null +++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf @@ -0,0 +1,43 @@ +## @file +# Decide whether the firmware should expose an ACPI- and/or a Device Tree-based +# hardware description to the operating system. +# +# Copyright (c) 2017, Red Hat, Inc. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 1.25 + BASE_NAME = ClhPlatformHasAcpiDtDxe + FILE_GUID = 71fe72f9-6dc1-199d-5054-13b4200ee88d + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = PlatformHasAcpiDt + +[Sources] + CloudHvHasAcpiDtDxe.c + +[Packages] + ArmVirtPkg/ArmVirtPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + PcdLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Guids] + gEdkiiPlatformHasAcpiGuid ## SOMETIMES_PRODUCES ## PROTOCOL + gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL + +[Pcd] + gArmVirtTokenSpaceGuid.PcdForceNoAcpi + +[Depex] + gEfiVariableArchProtocolGuid diff --git a/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c new file mode 100644 index 000000000000..c2344e7b29fa --- /dev/null +++ b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c @@ -0,0 +1,73 @@ +#include <Library/BaseLib.h> +#include <Library/MemoryAllocationLib.h> +#include <IndustryStandard/Acpi63.h> +#include <Protocol/AcpiTable.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiDriverEntryPoint.h> +#include <Library/DebugLib.h> + +#define ACPI_ENTRY_SIZE 8 +#define XSDT_LEN 36 + +STATIC +EFI_ACPI_TABLE_PROTOCOL * +FindAcpiTableProtocol ( + VOID + ) +{ + EFI_STATUS Status; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + + Status = gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID**)&AcpiTable + ); + ASSERT_EFI_ERROR (Status); + return AcpiTable; +} + +EFI_STATUS +EFIAPI +InstallCloudHvAcpiTables ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol + ) +{ + UINTN InstalledKey, TableSize; + UINT64 Rsdp, Xsdt, table_offset, PointerValue; + EFI_STATUS Status = 0; + int size; + + Rsdp = PcdGet64 (PcdAcpiRsdpBaseAddress); + Xsdt = ((EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER *)Rsdp)->XsdtAddress; + PointerValue = Xsdt; + table_offset = Xsdt; + size = ((EFI_ACPI_COMMON_HEADER *)PointerValue)->Length - XSDT_LEN; + table_offset += XSDT_LEN; + + while(!Status && size > 0) { + PointerValue = *(UINT64 *)table_offset; + TableSize = ((EFI_ACPI_COMMON_HEADER *)PointerValue)->Length; + Status = AcpiProtocol->InstallAcpiTable (AcpiProtocol, + (VOID *)(UINT64)PointerValue, TableSize, + &InstalledKey); + table_offset += ACPI_ENTRY_SIZE; + size -= ACPI_ENTRY_SIZE; + } + + return Status; +} + +EFI_STATUS +EFIAPI +CloudHvAcpiPlatformEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = InstallCloudHvAcpiTables (FindAcpiTableProtocol ()); + return Status; +} + diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c new file mode 100644 index 000000000000..ae07c91f5705 --- /dev/null +++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c @@ -0,0 +1,69 @@ +/** @file + Decide whether the firmware should expose an ACPI- and/or a Device Tree-based + hardware description to the operating system. + + Copyright (c) 2017, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include <Guid/PlatformHasAcpi.h> +#include <Guid/PlatformHasDeviceTree.h> +#include <Library/BaseLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiBootServicesTableLib.h> + +EFI_STATUS +EFIAPI +PlatformHasAcpiDt ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // + // If we fail to install any of the necessary protocols below, the OS will be + // unbootable anyway (due to lacking hardware description), so tolerate no + // errors here. + // + if (MAX_UINTN == MAX_UINT64 && + !PcdGetBool (PcdForceNoAcpi)) + { + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gEdkiiPlatformHasAcpiGuid, + EFI_NATIVE_INTERFACE, + NULL + ); + if (EFI_ERROR (Status)) { + goto Failed; + } + + return Status; + } + + // + // Expose the Device Tree otherwise. + // + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gEdkiiPlatformHasDeviceTreeGuid, + EFI_NATIVE_INTERFACE, + NULL + ); + if (EFI_ERROR (Status)) { + goto Failed; + } + + return Status; + +Failed: + ASSERT_EFI_ERROR (Status); + CpuDeadLoop (); + // + // Keep compilers happy. + // + return Status; +} -- 2.17.1
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[PATCH v2 2/5] MdeMoudlePkg: introduce new PCD for Acpi/rsdp
Jianyong Wu
As there is lack of a machnism in Cloud Hypervisor to pass the base
address of Rsdp in Acpi, so a PCD varialbe is introduced here to feed it. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Jianyong Wu <jianyong.wu@arm.com> --- MdeModulePkg/MdeModulePkg.dec | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 148395511034..4c8baac35a9e 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -910,6 +910,13 @@ [PcdsFixedAtBuild] # @Expression 0x80000001 | (gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable == 0xFFFFFFFFFFFFFFFF || gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable <= 0x0FFFFFFFFFFFFFFF) gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0|UINT64|0x30001015 + ## + # This is the physical address of rsdp which is the core struct of Acpi. + # Some hypervisor may has no way to pass rsdp address to the guest, so a PCD + # is worth for those. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiRsdpBaseAddress|0x0|UINT64|0x30001056 + ## Progress Code for OS Loader LoadImage start.<BR><BR> # PROGRESS_CODE_OS_LOADER_LOAD = (EFI_SOFTWARE_DXE_BS_DRIVER | (EFI_OEM_SPECIFIC | 0x00000000)) = 0x03058000<BR> # @Prompt Progress Code for OS Loader LoadImage start. -- 2.17.1
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[PATCH v2 1/5] ArmVirtPkg: Library: Memory initialization for Cloud Hypervisor
Jianyong Wu
Cloud Hypervisor is kvm based VMM implemented in rust.
This library populates the system memory map for the Cloud Hypervisor virtual platform. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Jianyong Wu <jianyong.wu@arm.com> --- .../CloudHvVirtMemInfoPeiLib.inf | 47 ++++++++ .../CloudHvVirtMemInfoLib.c | 94 ++++++++++++++++ .../CloudHvVirtMemInfoPeiLibConstructor.c | 100 ++++++++++++++++++ 3 files changed, 241 insertions(+) create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf new file mode 100644 index 000000000000..71dbf9c06ccc --- /dev/null +++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf @@ -0,0 +1,47 @@ +#/* @file +# +# Copyright (c) 2011-2015, ARM Limited. All rights reserved. +# Copyright (c) 2014-2017, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = ClhVirtMemInfoPeiLib + FILE_GUID = 3E29D940-0591-EE6A-CAD4-223A9CF55E75 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmVirtMemInfoLib|PEIM + CONSTRUCTOR = CloudHvVirtMemInfoPeiLibConstructor + +[Sources] + CloudHvVirtMemInfoLib.c + CloudHvVirtMemInfoPeiLibConstructor.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmVirtPkg/ArmVirtPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + DebugLib + FdtLib + PcdLib + MemoryAllocationLib + +[Pcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdSize + gArmTokenSpaceGuid.PcdFvSize + gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c new file mode 100644 index 000000000000..69f4e6ab6cc4 --- /dev/null +++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c @@ -0,0 +1,94 @@ +/** @file + + Copyright (c) 2014-2017, Linaro Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <Base.h> +#include <Library/ArmLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/DebugLib.h> +#include <Library/MemoryAllocationLib.h> + +// Number of Virtual Memory Map Descriptors +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5 + +// +// mach-virt's core peripherals such as the UART, the GIC and the RTC are +// all mapped in the 'miscellaneous device I/O' region, which we just map +// in its entirety rather than device by device. Note that it does not +// cover any of the NOR flash banks or PCI resource windows. +// +#define MACH_VIRT_PERIPH_BASE 0x08000000 +#define MACH_VIRT_PERIPH_SIZE SIZE_128MB + +// +// in cloud-hypervisor, 0x0 ~ 0x8000000 is reserved as normal memory for UEFI +// +#define CLOUDHV_UEFI_MEM_BASE 0x0 +#define CLOUDHV_UEFI_MEM_SIZE 0x08000000 + +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU + on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR + describing a Physical-to-Virtual Memory + mapping. This array must be ended by a + zero-filled entry. The allocated memory + will not be freed. + +**/ +VOID +ArmVirtGetMemoryMap ( + OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap + ) +{ + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + + ASSERT (VirtualMemoryMap != NULL); + + VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); + + if (VirtualMemoryTable == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); + return; + } + + // System DRAM + VirtualMemoryTable[0].PhysicalBase = PcdGet64 (PcdSystemMemoryBase); + VirtualMemoryTable[0].VirtualBase = VirtualMemoryTable[0].PhysicalBase; + VirtualMemoryTable[0].Length = PcdGet64 (PcdSystemMemorySize); + VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; + + DEBUG ((DEBUG_INFO, "%a: Dumping System DRAM Memory Map:\n" + "\tPhysicalBase: 0x%lX\n" + "\tVirtualBase: 0x%lX\n" + "\tLength: 0x%lX\n", + __FUNCTION__, + VirtualMemoryTable[0].PhysicalBase, + VirtualMemoryTable[0].VirtualBase, + VirtualMemoryTable[0].Length)); + + // Memory mapped peripherals (UART, RTC, GIC, virtio-mmio, etc) + VirtualMemoryTable[1].PhysicalBase = MACH_VIRT_PERIPH_BASE; + VirtualMemoryTable[1].VirtualBase = MACH_VIRT_PERIPH_BASE; + VirtualMemoryTable[1].Length = MACH_VIRT_PERIPH_SIZE; + VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + + // Map the FV region as normal executable memory + VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress); + VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; + VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFvSize); + VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; + + // End of Table + ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR)); + + *VirtualMemoryMap = VirtualMemoryTable; +} diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c new file mode 100644 index 000000000000..062dfcee1d66 --- /dev/null +++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c @@ -0,0 +1,100 @@ +/** @file + + Copyright (c) 2014-2017, Linaro Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <Base.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <libfdt.h> + +RETURN_STATUS +EFIAPI +CloudHvVirtMemInfoPeiLibConstructor ( + VOID + ) +{ + VOID *DeviceTreeBase; + INT32 Node, Prev; + UINT64 NewBase, CurBase; + UINT64 NewSize, CurSize; + CONST CHAR8 *Type; + INT32 Len; + CONST UINT64 *RegProp; + RETURN_STATUS PcdStatus; + + NewBase = 0; + NewSize = 0; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // + // Make sure we have a valid device tree blob + // + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + // + // Look for the lowest memory node + // + for (Prev = 0;; Prev = Node) { + Node = fdt_next_node (DeviceTreeBase, Prev, NULL); + if (Node < 0) { + break; + } + + // + // Check for memory node + // + Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len); + if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) { + // + // Get the 'reg' property of this node. For now, we will assume + // two 8 byte quantities for base and size, respectively. + // + RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len); + if (RegProp != 0 && Len == (2 * sizeof (UINT64))) { + + CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); + CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); + + DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n", + __FUNCTION__, CurBase, CurBase + CurSize - 1)); + + if (NewBase > CurBase || NewBase == 0) { + NewBase = CurBase; + NewSize = CurSize; + } + } else { + DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n", + __FUNCTION__)); + } + } + } + + // + // Make sure the start of DRAM matches our expectation + // + ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase); + PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize); + ASSERT_RETURN_ERROR (PcdStatus); + + // + // We need to make sure that the machine we are running on has at least + // 128 MB of memory configured, and is currently executing this binary from + // NOR flash. This prevents a device tree image in DRAM from getting + // clobbered when our caller installs permanent PEI RAM, before we have a + // chance of marking its location as reserved or copy it to a freshly + // allocated block in the permanent PEI RAM in the platform PEIM. + // + ASSERT (NewSize >= SIZE_128MB); + ASSERT ( + (((UINT64)PcdGet64 (PcdFdBaseAddress) + + (UINT64)PcdGet32 (PcdFdSize)) <= NewBase) || + ((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize))); + + return RETURN_SUCCESS; +} -- 2.17.1
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[PATCH v2 0/5] Enable Cloud Hypervisor support in edk2
Jianyong Wu
Cloud Hypervisor is an open source Virtual Machine Monitor (VMM) that
runs on top of KVM. Cloud Hypervisor is implemented in Rust and is based on the rust-vmm crates. See [1] to find more. To support UEFI, Cloud Hypervisor is introduced here. There are three parts to be considered to do this enablements, that is: 1. memory initialization 2. specific ACPI service implementation compared with qemu, there is no device like Fw-cfg, so we has no elegant way to get the RSDP address. A specific ACPI implementation is introduced here. 3. build configuration file This enablement bases on the implentation for qemu so some code is borrowed. [1] https://github.com/cloud-hypervisor/cloud-hypervisor Jianyong Wu (5): ArmVirtPkg: Library: Memory initialization for Cloud Hypervisor MdeMoudlePkg: introduce new PCD for Acpi/rsdp ArmVirtPkg: enable ACPI for cloud hypervisor ArmVirtPkg: Introduce Cloud Hypervisor to edk2 family Maintainers: update Maintainers file as new files/folders created MdeModulePkg/MdeModulePkg.dec | 7 + ArmVirtPkg/ArmVirtCloudHv.dsc | 455 ++++++++++++++++++ ArmVirtPkg/ArmVirtCloudHv.fdf | 292 +++++++++++ .../CloudHvAcpiPlatformDxe.inf | 51 ++ .../CloudHvHasAcpiDtDxe.inf | 43 ++ .../CloudHvVirtMemInfoPeiLib.inf | 47 ++ .../CloudHvAcpiPlatformDxe/CloudHvAcpi.c | 73 +++ .../CloudHvHasAcpiDtDxe.c | 69 +++ .../CloudHvVirtMemInfoLib.c | 94 ++++ .../CloudHvVirtMemInfoPeiLibConstructor.c | 100 ++++ ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc | 169 +++++++ Maintainers.txt | 7 + 12 files changed, 1407 insertions(+) create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c create mode 100644 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c create mode 100644 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c create mode 100644 ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc -- 2.17.1
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Re: [PATCH v2 5/5] StandaloneMmPkg: build for 32bit arm machines
Etienne Carriere
Dear all,
For info, Tested on Qemu/arm and stm32mp1 (both armv7-a) and on 64bit Qemu/AArch64. I used OP-TEE 3.13.0 to host the StMM instance. Regards, Etienne On Mon, 17 May 2021 at 07:50, Etienne Carriere <etienne.carriere@linaro.org> wrote:
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Re: [PATCH v3] IntelFsp2Pkg: YAML script bug fix
Chiu, Chasel
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
toggle quoted messageShow quoted text
-----Original Message-----
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[edk2-platforms][PATCH v2 6/6] Platform/StandaloneMm: build StandaloneMmRpmb for 32bit architectures
Etienne Carriere
Build PlatformStandaloneMmRpmb for ARM architecture (32bit arm machine).
The generated image targets an execution environment similar to AArch64 StMM secure partition in OP-TEE but in 32bit mode. GCC flag -fno-stack-protector added. The stack protection code bring GOT dependencies we prefer avoid when StMM runs in OP-TEE. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - Remove useless duplication of ArmSvcLib loading. - Move BaseStackCheckLib to generic library classes instead of ARM only. - include MdePkg/MdeLibs.dsc.inc instead of loading RegisterFilterLibNull.inf for ARM architecture. --- Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc index cb3f1ddf52..33364deb1e 100644 --- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc +++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc @@ -16,12 +16,14 @@ PLATFORM_VERSION = 1.0 DSC_SPECIFICATION = 0x0001001C OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 + SUPPORTED_ARCHITECTURES = ARM|AARCH64 BUILD_TARGETS = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT FLASH_DEFINITION = Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf DEFINE DEBUG_MESSAGE = TRUE +!include MdePkg/MdeLibs.dsc.inc + ################################################################################ # # Library Class section - list of all Library Classes needed by this Platform. @@ -39,6 +41,7 @@ FvLib|StandaloneMmPkg/Library/FvLib/FvLib.inf HobLib|StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf MemLib|StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmCoreMemoryAllocationLib/StandaloneMmCoreMemoryAllocationLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf @@ -68,6 +71,9 @@ # NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf +[LibraryClasses.ARM] + ArmSoftFloatLib|ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf + [LibraryClasses.common.MM_STANDALONE] HobLib|StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.inf MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf @@ -160,3 +166,7 @@ [BuildOptions.AARCH64] GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv8-a+nofp GCC:*_*_*_CC_FLAGS = -mstrict-align + +[BuildOptions.ARM] +GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv7-a +GCC:*_*_*_CC_FLAGS = -fno-stack-protector -- 2.17.1
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[edk2-platforms][PATCH v2 5/6] Drivers/OpTee: address cast build warning issue in 32b mode
Etienne Carriere
Use (UINTN) cast to cast physical or virtual address values to the
pointer size before casting from/to a pointer value. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- No change since v1 --- Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c | 21 +++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c index 6eb19bed0e..83c2750368 100644 --- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c +++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c @@ -305,7 +305,8 @@ OpTeeRpmbFvbRead ( } } - Base = (VOID *)Instance->MemBaseAddress + (Lba * Instance->BlockSize) + Offset; + Base = (VOID *)(UINTN)Instance->MemBaseAddress + (Lba * Instance->BlockSize) + + Offset; // We could read the data from the RPMB instead of memory // The 2 copies should already be identical // Copy from memory image @@ -387,7 +388,8 @@ OpTeeRpmbFvbWrite ( return Status; } } - Base = (VOID *)Instance->MemBaseAddress + Lba * Instance->BlockSize + Offset; + Base = (VOID *)(UINTN)Instance->MemBaseAddress + (Lba * Instance->BlockSize) + + Offset; Status = ReadWriteRpmb ( SP_SVC_RPMB_WRITE, (UINTN)Buffer, @@ -477,7 +479,8 @@ OpTeeRpmbFvbErase ( return EFI_INVALID_PARAMETER; } NumBytes = NumLba * Instance->BlockSize; - Base = (VOID *)Instance->MemBaseAddress + Start * Instance->BlockSize; + Base = (VOID *)(UINTN)Instance->MemBaseAddress + + (Start * Instance->BlockSize); Buf = AllocatePool (NumLba * Instance->BlockSize); if (Buf == NULL) { return EFI_DEVICE_ERROR; @@ -689,7 +692,7 @@ InitializeFvAndVariableStoreHeaders ( goto Exit; } // Install the combined header in memory - CopyMem ((VOID*)Instance->MemBaseAddress, Headers, HeadersLength); + CopyMem ((VOID*)(UINTN)Instance->MemBaseAddress, Headers, HeadersLength); Exit: FreePool (Headers); @@ -747,14 +750,18 @@ FvbInitialize ( // Read the file from disk and copy it to memory ReadEntireFlash (Instance); - FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)Instance->MemBaseAddress; + FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)Instance->MemBaseAddress; Status = ValidateFvHeader (FwVolHeader); if (EFI_ERROR (Status)) { // There is no valid header, so time to install one. DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); // Reset memory - SetMem64 ((VOID *)Instance->MemBaseAddress, Instance->NBlocks * Instance->BlockSize, ~0UL); + SetMem64 ( + (VOID *)(UINTN)Instance->MemBaseAddress, + Instance->NBlocks * Instance->BlockSize, + ~0UL + ); DEBUG ((DEBUG_INFO, "%a: Erasing Flash.\n", __FUNCTION__)); Status = ReadWriteRpmb ( SP_SVC_RPMB_WRITE, @@ -827,7 +834,7 @@ OpTeeRpmbFvbInit ( mInstance.FvbProtocol.Write = OpTeeRpmbFvbWrite; mInstance.FvbProtocol.Read = OpTeeRpmbFvbRead; - mInstance.MemBaseAddress = (EFI_PHYSICAL_ADDRESS)Addr; + mInstance.MemBaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Addr; mInstance.Signature = FLASH_SIGNATURE; mInstance.Initialize = FvbInitialize; mInstance.BlockSize = EFI_PAGE_SIZE; -- 2.17.1
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[edk2-platforms][PATCH v2 4/6] Drivers/OpTee: Add Aarch32 SVC IDs for 32bit Arm targets
Etienne Carriere
Add SMCCC function IDs for RPMB read/write service on 32bit architectures.
Define generic SP_SVC_RPMB_READ/SP_SVC_RPMB_WRITE IDs for native target architecture (32b or 64b). Changes OpTeeRpmbFvb.c to use architecture agnostic macro ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ for 32b and 64b support. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - Use _AARCH64 (resp. _AARCH32) suffix instead of _64 (resp. _32) in the added macros. --- Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c | 2 +- Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h | 16 ++++++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c index 5197c95abd..6eb19bed0e 100644 --- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c +++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c @@ -68,7 +68,7 @@ ReadWriteRpmb ( ZeroMem (&SvcArgs, sizeof (SvcArgs)); - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = mStorageId; SvcArgs.Arg2 = 0; SvcArgs.Arg3 = SvcAct; diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h index c17fc287ef..9c2a4ea6a5 100644 --- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h +++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h @@ -13,8 +13,20 @@ contract between OP-TEE and EDK2. For more details check core/arch/arm/include/kernel/stmm_sp.h in OP-TEE **/ -#define SP_SVC_RPMB_READ 0xC4000066 -#define SP_SVC_RPMB_WRITE 0xC4000067 +#define SP_SVC_RPMB_READ_AARCH64 0xC4000066 +#define SP_SVC_RPMB_WRITE_AARCH64 0xC4000067 + +#define SP_SVC_RPMB_READ_AARCH32 0x84000066 +#define SP_SVC_RPMB_WRITE_AARCH32 0x84000067 + +#ifdef MDE_CPU_AARCH64 +#define SP_SVC_RPMB_READ SP_SVC_RPMB_READ_AARCH64 +#define SP_SVC_RPMB_WRITE SP_SVC_RPMB_WRITE_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define SP_SVC_RPMB_READ SP_SVC_RPMB_READ_AARCH32 +#define SP_SVC_RPMB_WRITE SP_SVC_RPMB_WRITE_AARCH32 +#endif #define FLASH_SIGNATURE SIGNATURE_32 ('r', 'p', 'm', 'b') #define INSTANCE_FROM_FVB_THIS(a) CR (a, MEM_INSTANCE, FvbProtocol, \ -- 2.17.1
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[edk2-platforms][PATCH v2 3/6] Platform/StandaloneMm: sync with edk2 StandaloneMmCpu path change
Etienne Carriere
Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Cc: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - split change in 3: this change relates to StandaloneMm package only. --- Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 2 +- Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc index f99a47ebf6..cb3f1ddf52 100644 --- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc +++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc @@ -133,7 +133,7 @@ # Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFv.inf StandaloneMmPkg/Core/StandaloneMmCore.inf - StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf { <LibraryClasses> NULL|Drivers/OpTee/OpteeRpmbPkg/FixupPcd.inf diff --git a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf index e175dc7b2d..c4295a3e63 100644 --- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf +++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf @@ -68,7 +68,8 @@ READ_LOCK_STATUS = TRUE INF Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFv.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf - INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf + ################################################################################ # # Rules are use with the [FV] section's module INF type to define -- 2.17.1
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[edk2-platforms][PATCH v2 2/6] Platform/Socionext/DeveloperBox: sync with edk2 StandaloneMmCpu path change
Etienne Carriere
Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Cc: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - split change in 3: this change relates to DeveloperBox only. --- Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc | 2 +- Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc index e078de4bbb..b5524f87a6 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc @@ -80,7 +80,7 @@ gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x2 } - StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf { diff --git a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf index 33de03c8e7..89453477c9 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf +++ b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf @@ -111,7 +111,7 @@ READ_LOCK_STATUS = TRUE INF Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf - INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf ################################################################################ # -- 2.17.1
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[edk2-platforms][PATCH v2 1/6] Platform/ARM/SgiPkg: sync with edk2 StandaloneMmCpu path change
Etienne Carriere
Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Cc: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - split change in 3: this change relates to Platform/ARM/SgiPkg only. --- Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc | 2 +- Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc index e281d54909..1e0af23711 100644 --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc @@ -122,7 +122,7 @@ StandaloneMmPkg/Core/StandaloneMmCore.inf [Components.AARCH64] - StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf ################################################################################################### # diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf index 5a0772cd85..96b4272dd6 100644 --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf @@ -49,7 +49,7 @@ READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE INF StandaloneMmPkg/Core/StandaloneMmCore.inf - INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf ################################################################################ # -- 2.17.1
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[PATCH v2 5/5] StandaloneMmPkg: build for 32bit arm machines
Etienne Carriere
This change allows to build StandaloneMmPkg components for 32bit Arm
StandaloneMm firmware. This change mainly moves AArch64/ source files to Arm/ side directory for several components: StandaloneMmCpu, StandaloneMmCoreEntryPoint and StandaloneMmMemLib. The source file is built for both 32b and 64b Arm targets. Cc: Achin Gupta <achin.gupta@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID is defined in ArmStdSmc.h (see 1st commit in this series) instead of being local to EventHandle.c. - Fix void occurrence to VOID. - Fix path in StandaloneMmPkg/StandaloneMmPkg.dsc --- StandaloneMmPkg/Core/StandaloneMmCore.inf | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/EventHandle.c | 5 +++-- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.c | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.h | 0 StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.inf | 0 StandaloneMmPkg/Include/Library/{AArch64 => Arm}/StandaloneMmCoreEntryPoint.h | 0 StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/CreateHobList.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/SetPermissions.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => Arm}/StandaloneMmCoreEntryPoint.c | 16 ++++++++-------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => Arm}/StandaloneMmCoreHobLib.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => Arm}/StandaloneMmCoreHobLibInternal.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmMemLib/{AArch64/StandaloneMmMemLibInternal.c => ArmStandaloneMmMemLibInternal.c} | 9 ++++++++- StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf | 6 +++--- StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf | 2 +- StandaloneMmPkg/StandaloneMmPkg.dsc | 10 +++++----- 17 files changed, 43 insertions(+), 35 deletions(-) diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.inf b/StandaloneMmPkg/Core/StandaloneMmCore.inf index 87bf6e9440..56042b7b39 100644 --- a/StandaloneMmPkg/Core/StandaloneMmCore.inf +++ b/StandaloneMmPkg/Core/StandaloneMmCore.inf @@ -17,7 +17,7 @@ PI_SPECIFICATION_VERSION = 0x00010032 ENTRY_POINT = StandaloneMmMain -# VALID_ARCHITECTURES = IA32 X64 AARCH64 +# VALID_ARCHITECTURES = IA32 X64 AARCH64 ARM [Sources] StandaloneMmCore.c diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c similarity index 95% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c index 63fbe26642..165d696f99 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c @@ -2,6 +2,7 @@ Copyright (c) 2016 HP Development Company, L.P. Copyright (c) 2016 - 2021, Arm Limited. All rights reserved. + Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent @@ -92,8 +93,8 @@ PiMmStandaloneArmTfCpuDriverEntry ( // receipt of a synchronous MM request. Use the Event ID to distinguish // between synchronous and asynchronous events. // - if ((ARM_SMC_ID_MM_COMMUNICATE_AARCH64 != EventId) && - (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 != EventId)) { + if ((ARM_SMC_ID_MM_COMMUNICATE != EventId) && + (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ != EventId)) { DEBUG ((DEBUG_INFO, "UnRecognized Event - 0x%x\n", EventId)); return EFI_INVALID_PARAMETER; } diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c similarity index 96% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c index d4590bcd19..10097f792f 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c @@ -10,7 +10,7 @@ #include <Base.h> #include <Pi/PiMmCis.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/DebugLib.h> #include <Library/ArmSvcLib.h> #include <Library/ArmLib.h> diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.h b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.h rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf diff --git a/StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryPoint.h b/StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h similarity index 100% rename from StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryPoint.h rename to StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c similarity index 97% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c index 4d4cf3d5ff..85f8194687 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Guid/MmramMemoryReserve.h> #include <Guid/MpInformation.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/ArmMmuLib.h> #include <Library/ArmSvcLib.h> #include <Library/DebugLib.h> diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c similarity index 96% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c index 4a380df4a6..cd4b90823e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermissions.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Guid/MmramMemoryReserve.h> #include <Guid/MpInformation.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <Library/ArmMmuLib.h> #include <Library/ArmSvcLib.h> #include <Library/DebugLib.h> diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c similarity index 94% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c index b445d6942e..49cf51a789 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c @@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <PiMm.h> -#include <Library/AArch64/StandaloneMmCoreEntryPoint.h> +#include <Library/Arm/StandaloneMmCoreEntryPoint.h> #include <PiPei.h> #include <Guid/MmramMemoryReserve.h> @@ -182,13 +182,13 @@ DelegatedEventLoop ( } if (FfaEnabled) { - EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64; + EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; EventCompleteSvcArgs->Arg1 = 0; EventCompleteSvcArgs->Arg2 = 0; - EventCompleteSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg4 = SvcStatus; } else { - EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg1 = SvcStatus; } } @@ -273,13 +273,13 @@ InitArmSvcArgs ( ) { if (FeaturePcdGet (PcdFfaEnable)) { - InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64; + InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; InitMmFoundationSvcArgs->Arg1 = 0; InitMmFoundationSvcArgs->Arg2 = 0; - InitMmFoundationSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg3 = ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg4 = *Ret; } else { - InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg1 = *Ret; } } @@ -395,7 +395,7 @@ _ModuleEntryPoint ( // ProcessModuleEntryPointList (HobStart); - DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint)); + DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP %p\n", (VOID *) CpuDriverEntryPoint)); finish: if (Status == RETURN_UNSUPPORTED) { diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf index 4fa426f58e..1762586cfa 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf @@ -21,10 +21,10 @@ # VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only) # -[Sources.AARCH64] - AArch64/StandaloneMmCoreEntryPoint.c - AArch64/SetPermissions.c - AArch64/CreateHobList.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreEntryPoint.c + Arm/SetPermissions.c + Arm/CreateHobList.c [Sources.X64] X64/StandaloneMmCoreEntryPoint.c @@ -34,14 +34,14 @@ MdeModulePkg/MdeModulePkg.dec StandaloneMmPkg/StandaloneMmPkg.dec -[Packages.AARCH64] +[Packages.ARM, Packages.AARCH64] ArmPkg/ArmPkg.dec [LibraryClasses] BaseLib DebugLib -[LibraryClasses.AARCH64] +[LibraryClasses.ARM, LibraryClasses.AARCH64] StandaloneMmMmuLib ArmSvcLib @@ -51,7 +51,7 @@ gEfiStandaloneMmNonSecureBufferGuid gEfiArmTfCpuDriverEpDescriptorGuid -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable [BuildOptions] diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLib.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLib.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLib.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLib.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLibInternal.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/StandaloneMmCoreHobLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCoreHobLibInternal.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf index a2559920e8..34ed536480 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf @@ -22,7 +22,7 @@ LIBRARY_CLASS = HobLib|MM_CORE_STANDALONE # -# VALID_ARCHITECTURES = X64 AARCH64 +# VALID_ARCHITECTURES = X64 AARCH64 ARM # [Sources.common] Common.c @@ -30,9 +30,9 @@ [Sources.X64] X64/StandaloneMmCoreHobLib.c -[Sources.AARCH64] - AArch64/StandaloneMmCoreHobLib.c - AArch64/StandaloneMmCoreHobLibInternal.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreHobLib.c + Arm/StandaloneMmCoreHobLibInternal.c [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c similarity index 86% rename from StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c index 4124959e04..fa7df46413 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInternal.c +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c @@ -20,6 +20,13 @@ // extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalMaximumSupportAddress; +#ifdef MDE_CPU_AARCH64 +#define ARM_PHYSICAL_ADDRESS_BITS 36 +#endif +#ifdef MDE_CPU_ARM +#define ARM_PHYSICAL_ADDRESS_BITS 32 +#endif + /** Calculate and save the maximum support address. @@ -31,7 +38,7 @@ MmMemLibInternalCalculateMaximumSupportAddress ( { UINT8 PhysicalAddressBits; - PhysicalAddressBits = 36; + PhysicalAddressBits = ARM_PHYSICAL_ADDRESS_BITS; // // Save the maximum support address in one global variable diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf index 062b0d7a11..b29d97a746 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf @@ -28,7 +28,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = IA32 X64 AARCH64 +# VALID_ARCHITECTURES = IA32 X64 AARCH64 ARM # [Sources.Common] @@ -37,8 +37,8 @@ [Sources.IA32, Sources.X64] X86StandaloneMmMemLibInternal.c -[Sources.AARCH64] - AArch64/StandaloneMmMemLibInternal.c +[Sources.AARCH64, Sources.ARM] + ArmStandaloneMmMemLibInternal.c [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf index a2a059c5d6..ffb2a6d083 100644 --- a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf +++ b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf @@ -20,7 +20,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = AARCH64 +# VALID_ARCHITECTURES = AARCH64|ARM # # diff --git a/StandaloneMmPkg/StandaloneMmPkg.dsc b/StandaloneMmPkg/StandaloneMmPkg.dsc index 0c45df95e2..772af1b72b 100644 --- a/StandaloneMmPkg/StandaloneMmPkg.dsc +++ b/StandaloneMmPkg/StandaloneMmPkg.dsc @@ -20,7 +20,7 @@ PLATFORM_VERSION = 1.0 DSC_SPECIFICATION = 0x00010011 OUTPUT_DIRECTORY = Build/StandaloneMm - SUPPORTED_ARCHITECTURES = AARCH64|X64 + SUPPORTED_ARCHITECTURES = AARCH64|X64|ARM BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT @@ -60,7 +60,7 @@ StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf VariableMmDependency|StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf -[LibraryClasses.AARCH64] +[LibraryClasses.AARCH64, LibraryClasses.ARM] ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf @@ -118,8 +118,8 @@ StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf -[Components.AARCH64] - StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf +[Components.AARCH64, Components.ARM] + StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeCoffExtraActionLib.inf ################################################################################################### @@ -131,7 +131,7 @@ # module style (EDK or EDKII) specified in [Components] section. # ################################################################################################### -[BuildOptions.AARCH64] +[BuildOptions.AARCH64, BuildOptions.ARM] GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv8-a+nofp -mstrict-align GCC:*_*_*_CC_FLAGS = -mstrict-align -- 2.17.1
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[PATCH v2 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures
Etienne Carriere
Use intermediate (UINTN) cast when casting int from/to pointer. This
is needed as UINT64 values cast from/to 32bit pointer for 32bit architectures. Cc: Achin Gupta <achin.gupta@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- No change since v1 --- StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c index 6884095c49..d4590bcd19 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c @@ -164,8 +164,8 @@ StandaloneMmCpuInitialize ( // Share the entry point of the CPU driver DEBUG ((DEBUG_INFO, "Sharing Cpu Driver EP *0x%lx = 0x%lx\n", - (UINT64) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, - (UINT64) PiMmStandaloneArmTfCpuDriverEntry)); + (UINTN) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, + (UINTN) PiMmStandaloneArmTfCpuDriverEntry)); *(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) = PiMmStandaloneArmTfCpuDriverEntry; // Find the descriptor that contains the whereabouts of the buffer for @@ -180,8 +180,8 @@ StandaloneMmCpuInitialize ( return Status; } - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINT64) NsCommBufMmramRange->PhysicalStart)); - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINT64) NsCommBufMmramRange->PhysicalSize)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINTN) NsCommBufMmramRange->PhysicalStart)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINTN) NsCommBufMmramRange->PhysicalSize)); CopyMem (&mNsCommBuffer, NsCommBufMmramRange, sizeof(EFI_MMRAM_DESCRIPTOR)); DEBUG ((DEBUG_INFO, "mNsCommBuffer: 0x%016lx - 0x%lx\n", mNsCommBuffer.CpuStart, mNsCommBuffer.PhysicalSize)); diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c index e8fb96bd6e..4d4cf3d5ff 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c @@ -72,14 +72,14 @@ CreateHobListFromBootInfo ( // Create a hoblist with a PHIT and EOH HobStart = HobConstructor ( - (VOID *) PayloadBootInfo->SpMemBase, + (VOID *) (UINTN) PayloadBootInfo->SpMemBase, (UINTN) PayloadBootInfo->SpMemLimit - PayloadBootInfo->SpMemBase, - (VOID *) PayloadBootInfo->SpHeapBase, - (VOID *) (PayloadBootInfo->SpHeapBase + PayloadBootInfo->SpHeapSize) + (VOID *) (UINTN) PayloadBootInfo->SpHeapBase, + (VOID *) (UINTN) (PayloadBootInfo->SpHeapBase + PayloadBootInfo->SpHeapSize) ); // Check that the Hoblist starts at the bottom of the Heap - ASSERT (HobStart == (VOID *) PayloadBootInfo->SpHeapBase); + ASSERT (HobStart == (VOID *) (UINTN) PayloadBootInfo->SpHeapBase); // Build a Boot Firmware Volume HOB BuildFvHob (PayloadBootInfo->SpImageBase, PayloadBootInfo->SpImageSize); @@ -190,9 +190,9 @@ CreateHobListFromBootInfo ( MmramRanges[3].RegionState = EFI_CACHEABLE | EFI_ALLOCATED; // Base and size of heap memory shared by all cpus - MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].CpuStart = (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].PhysicalSize = HobStart->EfiFreeMemoryBottom - (EFI_PHYSICAL_ADDRESS) HobStart; + MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].CpuStart = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].PhysicalSize = HobStart->EfiFreeMemoryBottom - (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; MmramRanges[4].RegionState = EFI_CACHEABLE | EFI_ALLOCATED; // Base and size of heap memory shared by all cpus diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c index 6c50f470aa..b445d6942e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c @@ -328,7 +328,7 @@ _ModuleEntryPoint ( // Locate PE/COFF File information for the Standalone MM core module Status = LocateStandaloneMmCorePeCoffData ( - (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase, + (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PayloadBootInfo->SpImageBase, &TeData, &TeDataSize ); -- 2.17.1
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[PATCH v2 3/5] GenFv: Arm: support images entered in Thumb mode
Etienne Carriere
Change GenFv for Arm architecture to generate a specific jump
instruction as image entry instruction, when the target entry label is assembled with Thumb instruction set. This is possible since SecCoreEntryAddress value fetched from the PE32 has its LSBit set when the entry instruction executes in Thumb mode. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Achin Gupta <achin.gupta@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - Fix typos in commit log and inline comments - Change if() test operand to be an explicit boolean --- BaseTools/Source/C/GenFv/GenFvInternalLib.c | 38 +++++++++++++++----- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source/C/GenFv/GenFvInternalLib.c index 6e296b8ad6..5f3fd4f808 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -34,9 +34,27 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "FvLib.h" #include "PeCoffLib.h" -#define ARMT_UNCONDITIONAL_JUMP_INSTRUCTION 0xEB000000 #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION 0x14000000 +/* + * Arm instruction to jump to Fv entry instruction in Arm or Thumb mode. + * From ARM Arch Ref Manual versions b/c/d, section A8.8.25 BL, BLX (immediate) + * BLX (encoding A2) branches to offset in Thumb instruction set mode. + * BL (encoding A1) branches to offset in Arm instruction set mode. + */ +#define ARM_JUMP_OFFSET_MAX 0xffffff +#define ARM_JUMP_TO_ARM(Offset) (0xeb000000 | ((Offset - 8) >> 2)) + +#define _ARM_JUMP_TO_THUMB(Imm32) (0xfa000000 | \ + (((Imm32) & (1 << 1)) << (24 - 1)) | \ + (((Imm32) >> 2) & 0x7fffff)) +#define ARM_JUMP_TO_THUMB(Offset) _ARM_JUMP_TO_THUMB((Offset) - 8) + +/* + * Arm instruction to retrun from exception (MOVS PC, LR) + */ +#define ARM_RETURN_FROM_EXCEPTION 0xE1B0F07E + BOOLEAN mArm = FALSE; BOOLEAN mRiscV = FALSE; STATIC UINT32 MaxFfsAlignment = 0; @@ -2203,23 +2221,25 @@ Returns: // if we found an SEC core entry point then generate a branch instruction // to it and populate a debugger SWI entry as well if (UpdateVectorSec) { + UINT32 EntryOffset; VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM SEC vector"); - // B SecEntryPoint - signed_immed_24 part +/-32MB offset - // on ARM, the PC is always 8 ahead, so we're not really jumping from the base address, but from base address + 8 - ResetVector[0] = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress - 8) >> 2; + EntryOffset = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress); - if (ResetVector[0] > 0x00FFFFFF) { - Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 32MB of the start of the FV"); + if (EntryOffset > ARM_JUMP_OFFSET_MAX) { + Error(NULL, 0, 3000, "Invalid", "SEC Entry point offset above 1MB of the start of the FV"); return EFI_ABORTED; } - // Add opcode for an unconditional branch with no link. i.e.: " B SecEntryPoint" - ResetVector[0] |= ARMT_UNCONDITIONAL_JUMP_INSTRUCTION; + if (SecCoreEntryAddress & 1 != 0) { + ResetVector[0] = ARM_JUMP_TO_THUMB(EntryOffset); + } else { + ResetVector[0] = ARM_JUMP_TO_ARM(EntryOffset); + } // SWI handler movs pc,lr. Just in case a debugger uses SWI - ResetVector[2] = 0xE1B0F07E; + ResetVector[2] = ARM_RETURN_FROM_EXCEPTION; // Place holder to support a common interrupt handler from ROM. // Currently not supported. For this to be used the reset vector would not be in this FV -- 2.17.1
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[PATCH v2 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg
Etienne Carriere
Changes in ArmPkg to prepare building StandaloneMm firmware for
32bit Arm architectures. Adds MmCommunicationDxe driver and ArmMmuPeiLib and ArmmmuStandaloneMmLib libraries to the list of the standard components build for ArmPkg on when ARM architectures. Changes path of source file AArch64/ArmMmuStandaloneMmLib.c and compile it for both 32bit and 64bit architectures. Cc: Achin Gupta <achin.gupta@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- No change since v1 --- ArmPkg/ArmPkg.dec | 2 +- ArmPkg/ArmPkg.dsc | 2 +- ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c | 2 +- ArmPkg/Library/StandaloneMmMmuLib/{AArch64 => }/ArmMmuStandaloneMmLib.c | 15 ++++++++------- ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf | 6 +++--- 5 files changed, 14 insertions(+), 13 deletions(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index 214b2f5892..6ed51edd03 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -137,7 +137,7 @@ # hardware coherency (i.e., no virtualization or cache coherent DMA) gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043 -[PcdsFeatureFlag.AARCH64] +[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM] ## Used to select method for requesting services from S-EL1.<BR><BR> # TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.<BR> # FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 926986cf7f..4c79dadf9e 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -158,7 +158,7 @@ ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf -[Components.AARCH64] +[Components.AARCH64, Components.ARM] ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c index b1e3095809..4ae38a9f22 100644 --- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c +++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c @@ -125,7 +125,7 @@ MmCommunication2Communicate ( } // SMC Function ID - CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64; + CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE; // Cookie CommunicateSmcArgs.Arg1 = 0; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c similarity index 92% rename from ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c rename to ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c index dd014beec8..20f873e680 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c @@ -2,6 +2,7 @@ File managing the MMU for ARMv8 architecture in S-EL0 Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR> + Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): @@ -62,7 +63,7 @@ SendMemoryPermissionRequest ( // for other Direct Request calls which are not atomic // We therefore check only for Direct Response by the // callee. - if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) { + if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP) { // A Direct Response means FF-A success // Now check the payload for errors // The callee sends back the return value @@ -164,13 +165,13 @@ GetMemoryPermissions ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = 0; SvcArgs.Arg3 = 0; @@ -219,15 +220,15 @@ RequestMemoryPermissionChange ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; SvcArgs.Arg5 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg6 = Permissions; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg3 = Permissions; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf index 6c71fe0023..ff20e58980 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf @@ -16,14 +16,14 @@ LIBRARY_CLASS = StandaloneMmMmuLib PI_SPECIFICATION_VERSION = 0x00010032 -[Sources.AARCH64] - AArch64/ArmMmuStandaloneMmLib.c +[Sources] + ArmMmuStandaloneMmLib.c [Packages] ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable [LibraryClasses] -- 2.17.1
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[PATCH v2 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A, Mm SVC and Std SMC IDs
Etienne Carriere
Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit
function IDs as per SMCCC specification. Defines also generic ARM SVC identifier macros to wrap 32bit or 64bit identifiers upon target built architecture. Cc: Achin Gupta <achin.gupta@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> --- Changes since v1: - Define ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID in ArmStdSmc.h, as expected by few following commits in this series. --- ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 ++++++++++++ ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 15 +++++++++++++++ ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 8 ++++++++ 3 files changed, 35 insertions(+) diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h index 65b8343ade..ebcb54b28b 100644 --- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h @@ -17,9 +17,21 @@ #define ARM_FFA_SVC_H_ #define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 0x8400006F +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x84000070 #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 +#endif + #define SPM_MAJOR_VERSION_FFA 1 #define SPM_MINOR_VERSION_FFA 0 diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h index 33d60ccf17..deb3bc99d2 100644 --- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h @@ -15,10 +15,25 @@ * privileged operations on its behalf. */ #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060 +#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065 #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061 #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064 #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 +#endif + #define SET_MEM_ATTR_DATA_PERM_MASK 0x3 #define SET_MEM_ATTR_DATA_PERM_SHIFT 0 #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0 diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h index 67afb0ea2d..9116a291da 100644 --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h +++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h @@ -49,6 +49,14 @@ #define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041 +/* Generic ID when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32 +#endif + /* MM return error codes */ #define ARM_SMC_MM_RET_SUCCESS 0 #define ARM_SMC_MM_RET_NOT_SUPPORTED -1 -- 2.17.1
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Re: [PATCH v2] UefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area
Laszlo Ersek
On 05/14/21 22:28, Lendacky, Thomas wrote:
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3324Is this really a *bugfix*? I called what's being fixed "a gap in a generic protection mechanism", in <https://bugzilla.tianocore.org/show_bug.cgi?id=3324#c9>. I don't know if that makes this patch a feature addition (or feature completion -- the feature being "more extensive page protections"), or a bugfix. The distinction matters because of the soft feature freeze: https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-Planning We still have approximately 2 hours before the SFF starts. So if we can *finish* reviewing this in 2 hours, then it can be merged during the SFF, even if we call it a feature. But I'd like Marvin to take a look as well, plus I'd like at least one of Eric and Ray to check. ... I'm tempted not to call it a bugfix, because the lack of this patch does not break SEV-ES usage, as far as I understand. Cc: Eric Dong <eric.dong@intel.com>sneaky documenation fix :) I vaguely remember discussing earlier that the APIC ID reference was incorrect. OK. + // of processors for calculating the total stack area.The code in the patch seems sound to me, but, now that I've managed to take a bit more careful look, I think the patch is incomplete. Note the BackupAndPrepareWakeupBuffer() function call -- visible in the context --, at the end of the AllocateResetVector() function! Before, we had a single area allocated for the reset vector, which was appropriately sized for SEV-ES stacks too, in case SEV-ES was enabled. That was because MpInitLibInitialize() called GetApResetVectorSize() too, and stored the result to the "BackupBufferSize" field. Thus, the BackupAndPrepareWakeupBuffer() function, and its counterpart RestoreWakeupBuffer(), would include the SEV-ES AP stacks area in the backup/restore operations. But now, with SEV-ES enabled, we'll have a separate, discontiguous area -- and neither BackupAndPrepareWakeupBuffer(), nor its counterpart RestoreWakeupBuffer() take that into account. Therefore I think, while this patch is regression-free for the SEV-ES *disabled* case, it may corrupt memory (through not restoring the AP stack area's original contents) with SEV-ES enabled. I think we need to turn "ApResetStackSize" into an explicit field. It should have a defined value only when SEV-ES is enabled. And for that case, we seem to need a *separate backup buffer* too. FWIW, I'd really like to re-classify this BZ as a Feature Request (see the Product field on BZ#3324), and I'd really like to delay the patch until after edk2-stable202105. The patch is not necessary for using SEV-ES, but it has a chance to break SEV-ES. Thanks Laszlo
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[PATCH v3] IntelFsp2Pkg: YAML script bug fix
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3395
This patch fixes the issue observed during BSF file to YAML file conversion. It also addresses the issue during multibyte array data conversion check, for example the data representation of 0xFFFF instead of 0xFF, 0xFF would be thrown exception "Array size is not proper" without this patch. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Signed-off-by: Loo Tung Lun <tung.lun.loo@intel.com> --- IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py | 11 +++++++++-- IntelFsp2Pkg/Tools/GenCfgOpt.py | 3 ++- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py b/IntelFsp2Pkg/Tools/FspD= scBsf2Yaml.py index cad9b60e73..d2ca7145ae 100644 --- a/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py +++ b/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py @@ -46,6 +46,13 @@ def Bytes2Val(Bytes): return reduce(lambda x, y: (x << 8) | y, Bytes[::-1])=0D =0D =0D +def Str2Bytes(Value, Blen):=0D + Result =3D bytearray(Value[1:-1], 'utf-8') # Excluding quotes=0D + if len(Result) < Blen:=0D + Result.extend(b'\x00' * (Blen - len(Result)))=0D + return Result=0D +=0D +=0D class CFspBsf2Dsc:=0D =0D def __init__(self, bsf_file):=0D @@ -108,7 +115,8 @@ class CFspBsf2Dsc: cfg_item['find'] =3D prefix=0D cfg_item['cname'] =3D 'Signature'=0D cfg_item['length'] =3D len(finds[0][1])=0D - cfg_item['value'] =3D '0x%X' % Bytes2Val(finds[0][1].encod= e('UTF-8'))=0D + str2byte =3D Str2Bytes("'" + finds[0][1] + "'", len(finds[= 0][1]))=0D + cfg_item['value'] =3D '0x%X' % Bytes2Val(str2byte)=0D cfg_list.append(dict(cfg_item))=0D cfg_item =3D dict(cfg_temp)=0D find_list.pop(0)=0D @@ -291,7 +299,6 @@ class CFspDsc2Yaml(): raise Exception('DSC variable creation error !')=0D else:=0D raise Exception('Unsupported file "%s" !' % file_name)=0D - gen_cfg_data.UpdateDefaultValue()=0D self.gen_cfg_data =3D gen_cfg_data=0D =0D def print_dsc_line(self):=0D diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt= .py index 660824b740..714b2d8b1a 100644 --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py @@ -708,7 +708,8 @@ EndList for Page in PageList:=0D Page =3D Page.strip()=0D Match =3D re.match("(\w+):\"(.+)\"", Page)= =0D - self._CfgPageDict[Match.group(1)] =3D Matc= h.group(2)=0D + if Match !=3D None:=0D + self._CfgPageDict[Match.group(1)] =3D = Match.group(2)=0D =0D Match =3D re.match("(?:^|.+\s+)BLOCK:{NAME:\"(.+)\= "\s*,\s*VER:\"(.+)\"\s*}", Remaining)=0D if Match:=0D --=20 2.28.0.windows.1
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