Date   

[PATCH v2 09/15] ArmPkg: Add ArmPkg.ci.yaml

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

Add ArmPkg.ci.yaml to configure the CI for the
ArmPkg.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
V2:
- Remove "eoi'ed" from the list of exceptions of the spell
checker [Sami]

ArmPkg/ArmPkg.ci.yaml | 221 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 221 insertions(+)
create mode 100644 ArmPkg/ArmPkg.ci.yaml

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
new file mode 100644
index 000000000000..d91c03f2acb8
--- /dev/null
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -0,0 +1,221 @@
+## @file
+# CI configuration for ArmPkg
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+ ## options defined .pytool/Plugin/LicenseCheck
+ "LicenseCheck": {
+ "IgnoreFiles": []
+ },
+
+ "EccCheck": {
+ ## Exception sample looks like below:
+ ## "ExceptionList": [
+ ## "<ErrorID>", "<KeyWord>"
+ ## ]
+ "ExceptionList": [
+ ],
+ ## Both file path and directory path are accepted.
+ "IgnoreFiles": [
+ "Library/ArmSoftFloatLib/berkeley-softfloat-3"
+ ]
+ },
+
+ ## options defined .pytool/Plugin/CompilerPlugin
+ "CompilerPlugin": {
+ "DscPath": "ArmPkg.dsc"
+ },
+
+ ## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+ "HostUnitTestCompilerPlugin": {
+ "DscPath": "" # Don't support this test
+ },
+
+ ## options defined .pytool/Plugin/CharEncodingCheck
+ "CharEncodingCheck": {
+ "IgnoreFiles": []
+ },
+
+ ## options defined .pytool/Plugin/DependencyCheck
+ "DependencyCheck": {
+ "AcceptableDependencies": [
+ "ArmPlatformPkg/ArmPlatformPkg.dec",
+ "ArmPkg/ArmPkg.dec",
+ "EmbeddedPkg/EmbeddedPkg.dec",
+ "MdeModulePkg/MdeModulePkg.dec",
+ "MdePkg/MdePkg.dec",
+ "ShellPkg/ShellPkg.dec"
+ ],
+ # For host based unit tests
+ "AcceptableDependencies-HOST_APPLICATION":[
+ "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+ ],
+ # For UEFI shell based apps
+ "AcceptableDependencies-UEFI_APPLICATION":[],
+ "IgnoreInf": []
+ },
+
+ ## options defined .pytool/Plugin/DscCompleteCheck
+ "DscCompleteCheck": {
+ "IgnoreInf": [],
+ "DscPath": "ArmPkg.dsc"
+ },
+
+ ## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+ "HostUnitTestDscCompleteCheck": {
+ "IgnoreInf": [""],
+ "DscPath": "" # Don't support this test
+ },
+
+ ## options defined .pytool/Plugin/GuidCheck
+ "GuidCheck": {
+ "IgnoreGuidName": [],
+ "IgnoreGuidValue": [],
+ "IgnoreFoldersAndFiles": [],
+ "IgnoreDuplicates": [],
+ },
+
+ ## options defined .pytool/Plugin/LibraryClassCheck
+ "LibraryClassCheck": {
+ "IgnoreHeaderFile": []
+ },
+
+ ## options defined .pytool/Plugin/SpellCheck
+ "SpellCheck": {
+ "AuditOnly": False,
+ "IgnoreFiles": [
+ "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
+ ], # use gitignore syntax to ignore errors
+ # in matching files
+ "ExtendWords": [
+ "api's",
+ "ackintid",
+ "actlr",
+ "aeabi",
+ "ashldi",
+ "ashrdi",
+ "ccidx",
+ "ccsidr",
+ "clidr",
+ "clrex",
+ "clzsi",
+ "cpuactlr",
+ "csselr",
+ "ctzsi",
+ "cygdrive",
+ "cygpaths",
+ "datas",
+ "dcmpeq",
+ "dcmpge",
+ "dcmpgt",
+ "dcmple",
+ "dcmplt",
+ "ddisable",
+ "divdi",
+ "divsi",
+ "dmdepkg",
+ "drsub",
+ "fcmpeq",
+ "fcmpge",
+ "fcmpgt",
+ "fcmple",
+ "fcmplt",
+ "ffreestanding",
+ "frsub",
+ "hisilicon",
+ "iccbpr",
+ "icciar",
+ "iccicr",
+ "icciidr",
+ "iccpmr",
+ "icdicer",
+ "icdicfr",
+ "icdictr",
+ "icdiser",
+ "icdisr",
+ "icdsgir",
+ "icenabler",
+ "intid",
+ "ipriority",
+ "irouter",
+ "isenabler",
+ "istatus",
+ "itargets",
+ "lable",
+ "ldivmod",
+ "ldmdb",
+ "ldmia",
+ "ldrbt",
+ "ldrex",
+ "ldrexb",
+ "ldrexd",
+ "ldrexh",
+ "ldrhbt",
+ "ldrht",
+ "ldrsb",
+ "ldrsbt",
+ "ldrsh",
+ "lshrdi",
+ "moddi",
+ "modsi",
+ "mpidr",
+ "muldi",
+ "mullu",
+ "nonshareable",
+ "nsacr",
+ "nsasedis",
+ "nuvia",
+ "oldit",
+ "readc",
+ "revsh",
+ "rfedb",
+ "sctlr",
+ "smccc",
+ "smlabb",
+ "smlabt",
+ "smlad",
+ "smladx",
+ "smlatb",
+ "smlatt",
+ "smlawb",
+ "smlawt",
+ "smlsd",
+ "smlsdx",
+ "smmla",
+ "smmlar",
+ "smmls",
+ "smmlsr",
+ "sourcery",
+ "srsdb",
+ "stmdb",
+ "stmia",
+ "strbt",
+ "strexb",
+ "strexd",
+ "strexh",
+ "strht",
+ "switchu",
+ "tpidrurw",
+ "ttbcr",
+ "typer",
+ "ucmpdi",
+ "udivdi",
+ "udivmoddi",
+ "udivsi",
+ "uefi's",
+ "uldiv",
+ "umoddi",
+ "umodsi",
+ "usada",
+ "vlpis",
+ "writec"
+ ], # words to extend to the dictionary for this package
+ "IgnoreStandardPaths": [ # Standard Plugin defined paths that
+ "*.asm", "*.s" # should be ignore
+ ],
+ "AdditionalIncludePaths": [] # Additional paths to spell check
+ # (wildcards supported)
+ }
+}
--
2.17.1


[PATCH v2 08/15] ArmPkg: Correct small typos

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

The 'cspell' CI test detected some small typos in ArmPkg.
Correct them.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
V2:
- Re-phrase "eoi'ed" with other words [Sami]

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 2 +-
ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 2 +-
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 2 +-
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c | 2 +-
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c | 4 ++--
ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c | 6 +++---
.../StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c | 2 +-
.../Type13/MiscNumberOfInstallableLanguagesFunction.c | 6 +++---
8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
index a96dc7829a95..64b5054be8f7 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
@@ -121,7 +121,7 @@ GicV2GetInterruptSourceState (
@param This Instance pointer for this protocol
@param Source Hardware source of the interrupt

- @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_SUCCESS Source interrupt ended successfully.
@retval EFI_UNSUPPORTED Source interrupt is not supported

**/
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
index 16bccbff413b..85ee4c87b6d1 100644
--- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
@@ -115,7 +115,7 @@ GicV3GetInterruptSourceState (
@param This Instance pointer for this protocol
@param Source Hardware source of the interrupt

- @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_SUCCESS Source interrupt ended successfully.
@retval EFI_DEVICE_ERROR Hardware could not be programmed.

**/
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 6c58d2b49317..54fad23cb42d 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -345,7 +345,7 @@ EfiAttributeToArmAttribute (
break;

case EFI_MEMORY_WC:
- // Map to normal non-cachable
+ // Map to normal non-cacheable
ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
break;

diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
index 6a06b38ab949..c5036b7b5c70 100644
--- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
+++ b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
@@ -51,7 +51,7 @@ EFI_FILE gSemihostFsFile = {
};

//
-// Device path for semi-hosting. It contains our autogened Caller ID GUID.
+// Device path for semi-hosting. It contains our auto-generated Caller ID GUID.
//
typedef struct {
VENDOR_DEVICE_PATH Guid;
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
index 940e4bc797f2..6b9d7eba90b9 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
@@ -124,7 +124,7 @@ UpdatePageEntries (
} else if ((Attributes & EFI_MEMORY_WC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- // map to normal non-cachable
+ // map to normal non-cacheable
EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
} else if ((Attributes & EFI_MEMORY_WT) != 0) {
// modify cacheability attributes
@@ -254,7 +254,7 @@ UpdateSectionEntries (
} else if ((Attributes & EFI_MEMORY_WC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- // map to normal non-cachable
+ // map to normal non-cacheable
EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
} else if ((Attributes & EFI_MEMORY_WT) != 0) {
// modify cacheability attributes
diff --git a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c b/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
index e35bcee38098..b6a07dd46608 100644
--- a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
+++ b/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
@@ -37,11 +37,11 @@ SerialPortInitialize (
/**
Write data to serial device.

- @param Buffer Point of data buffer which need to be writed.
+ @param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.

@retval 0 Write data failed.
- @retval !0 Actual number of bytes writed to serial device.
+ @retval !0 Actual number of bytes written to serial device.

**/

@@ -103,7 +103,7 @@ SerialPortWrite (
/**
Read data from serial device and save the datas in buffer.

- @param Buffer Point of data buffer which need to be writed.
+ @param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.

@retval 0 Read data failed.
diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
index 31672ae5cf4d..dd014beec873 100644
--- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
+++ b/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
@@ -102,7 +102,7 @@ SendMemoryPermissionRequest (

// Check error response from Callee.
if ((*RetVal & BIT31) != 0) {
- // Bit 31 set means there is an error retured
+ // Bit 31 set means there is an error returned
// See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 and
// Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
switch (*RetVal) {
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
index 19b60ed71f8c..7c941b5c0709 100644
--- a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
@@ -23,9 +23,9 @@
/**
Get next language from language code list (with separator ';').

- @param LangCode Input: point to first language in the list. On
- Otput: point to next language in the list, or
- NULL if no more language in the list.
+ @param LangCode Input: point to first language in the list. On
+ Output: point to next language in the list, or
+ NULL if no more language in the list.
@param Lang The first language in the list.

**/
--
2.17.1


[PATCH v2 07/15] ArmPkg: Add OemMiscLibNull library to ArmPkg.dsc

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

Add the OemMiscLibNull library to the [Components] section of
ArmPkg.dsc, allowing to complete the 'DscCompleteCheck' CI test.

According to .pytool/Readme about the 'DscCompleteCheck' test:
The test considers it an error if any INF does not appear in the
`Components` section of the package-level DSC.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/ArmPkg.dsc | 1 +
1 file changed, 1 insertion(+)

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 282950b953a8..926986cf7fbb 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -156,6 +156,7 @@ [Components.common]

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+ ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf

[Components.AARCH64]
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
--
2.17.1


[PATCH v2 05/15] ArmPkg: Document libraries in ArmPkg.dec

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch documents the libraries advertised in ArmPkg.dec.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
V2:
- Add documentation to the advertised libraries.
This is a new patch. [Bret]

ArmPkg/ArmPkg.dec | 50 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 496f588bd0ca..dcd43a0f14f6 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -27,20 +27,70 @@ [Includes.common]
Include # Root include for the package

[LibraryClasses.common]
+ ## @libraryclass Provides an interface to Arm registers.
+ #
ArmLib|Include/Library/ArmLib.h
+
+ ## @libraryclass Provides a Mmu interface.
+ #
ArmMmuLib|Include/Library/ArmMmuLib.h
+
+ ## @libraryclass Provides an interface to initialize a
+ # Generic Interrupt Controller (GIC).
+ #
SemihostLib|Include/Library/SemihostLib.h
+
+ ## @libraryclass Provides a Generic Interrupt Controller (GIC)
+ # configuration interface.
+ #
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
+
+ ## @libraryclass Convert Arm instructions to a human readable format.
+ #
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
+
+ ## @libraryclass Provides an interface to initialize a
+ # Generic Interrupt Controller (GIC).
+ #
ArmGicArchLib|Include/Library/ArmGicArchLib.h
+
+ ## @libraryclass Provides a Mailbox Transport Layer (MTL) interface
+ # for the System Control and Management Interface (SCMI).
+ #
ArmMtlLib|Include/Library/ArmMtlLib.h
+
+ ## @libraryclass Provides a SuperVisor Call (SVC) interface.
+ #
ArmSvcLib|Include/Library/ArmSvcLib.h
+
+ ## @libraryclass Provides an OpTee interface.
+ #
OpteeLib|Include/Library/OpteeLib.h
+
+ ## @libraryclass Provides an interface to a StandaloneMm Mmu.
+ #
StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
+
+ ## @libraryclass Provides an interface to query miscellaneous OEM
+ # information.
+ #
ArmGenericTimerCounterLib|Include/Library/ArmGenericTimerCounterLib.h
+
+ ## @libraryclass Provides a Generic Interrupt Controller (GIC)
+ # configuration interface.
ArmGicLib|Include/Library/ArmGicLib.h
+
+ ## @libraryclass Provides a HyperVisor Call (HVC) interface.
+ #
ArmHvcLib|Include/Library/ArmHvcLib.h
+
+ ## @libraryclass Provides an interface to query miscellaneous OEM
+ # information.
+ #
OemMiscLib|Include/Library/OemMiscLib.h
+
+ ## @libraryclass Provides a System Monitor Call (SMC) interface.
+ #
ArmSmcLib|Include/Library/ArmSmcLib.h


--
2.17.1


[PATCH v2 04/15] ArmPlatformPkg: Document libraries in ArmPlatformPkg.dec

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch documents the libraries advertised in ArmPlatformPkg.dec.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
V2:
- Add documentation to the advertised libraries.
This is a new patch. [Bret]

ArmPlatformPkg/ArmPlatformPkg.dec | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
index 696d636aacee..3a25ddcdc8ca 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -1,6 +1,6 @@
#/** @file
#
-# Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2021, ARM Limited. All rights reserved.
# Copyright (c) 2015, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -26,11 +26,28 @@ [Includes.common]
Include # Root include for the package

[LibraryClasses]
+ ## @libraryclass Provides an interface to query platform information.
+ #
ArmPlatformLib|Include/Library/ArmPlatformLib.h
+
+ ## @libraryclass Provides an interface to initialize/shutdown a LCD screen.
+ #
LcdHwLib|Include/Library/LcdHwLib.h
+
+ ## @libraryclass Provides an interface to configure a LCD screen.
+ #
LcdPlatformLib|Include/Library/LcdPlatformLib.h
+
+ ## @libraryclass Provides a Nor flash interface.
+ #
NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
+
+ ## @libraryclass Provides an interface to the clock of a PL011 device.
+ #
PL011UartClockLib|Include/Library/PL011UartClockLib.h
+
+ ## @libraryclass Provides an interface to a PL011 uart.
+ #
PL011UartLib|Include/Library/PL011UartLib.h

[Guids.common]
--
2.17.1


[PATCH v2 03/15] ArmPkg: Add missing library headers to ArmPkg.dec

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

Some library headers are missing/incorrect in ArmPkg.dec.
This makes the 'LibraryClassCheck' CI test fail. This patch
adds/corrects them.

According to .pytool/Readme about the 'LibraryClassCheck' test:
This test scans at all library header files found in the
`Library` folders in all of the package's declared include
directories and ensures that all files have a matching
LibraryClass declaration in the DEC file for the package.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3254
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3258
Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/ArmPkg.dec | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index a8a22c649ff8..496f588bd0ca 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,7 @@
# ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,14 +29,20 @@ [Includes.common]
[LibraryClasses.common]
ArmLib|Include/Library/ArmLib.h
ArmMmuLib|Include/Library/ArmMmuLib.h
- SemihostLib|Include/Library/Semihosting.h
+ SemihostLib|Include/Library/SemihostLib.h
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
ArmGicArchLib|Include/Library/ArmGicArchLib.h
- ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
+ ArmMtlLib|Include/Library/ArmMtlLib.h
ArmSvcLib|Include/Library/ArmSvcLib.h
OpteeLib|Include/Library/OpteeLib.h
StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
+ ArmGenericTimerCounterLib|Include/Library/ArmGenericTimerCounterLib.h
+ ArmGicLib|Include/Library/ArmGicLib.h
+ ArmHvcLib|Include/Library/ArmHvcLib.h
+ OemMiscLib|Include/Library/OemMiscLib.h
+ ArmSmcLib|Include/Library/ArmSmcLib.h
+

[Guids.common]
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
--
2.17.1


[PATCH v2 02/15] ArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLib

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
.../Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
index 5f453d18e415..31672ae5cf4d 100644
--- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
+++ b/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
@@ -101,7 +101,7 @@ SendMemoryPermissionRequest (
}

// Check error response from Callee.
- if (*RetVal & BIT31) {
+ if ((*RetVal & BIT31) != 0) {
// Bit 31 set means there is an error retured
// See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 and
// Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
--
2.17.1


[PATCH v2 01/15] ArmPkg: Fix Ecc error 8003

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
The #ifndef at the start of an include file should have
one postfix underscore, and no prefix underscore character

Some include guards have been modified to match the name of the
header file. Some comments have also been added on the closing
'#endif'.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/Drivers/ArmGic/ArmGicDxe.h | 6 +++---
ArmPkg/Drivers/CpuDxe/CpuDxe.h | 6 +++---
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h | 6 +++---
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h | 6 +++---
ArmPkg/Include/AsmMacroIoLib.h | 6 +++---
ArmPkg/Include/AsmMacroIoLibV8.h | 6 +++---
ArmPkg/Include/Chipset/AArch64.h | 6 +++---
ArmPkg/Include/Chipset/AArch64Mmu.h | 6 +++---
ArmPkg/Include/Chipset/ArmCortexA9.h | 6 +++---
ArmPkg/Include/Chipset/ArmV7.h | 6 +++---
ArmPkg/Include/Chipset/ArmV7Mmu.h | 6 +++---
ArmPkg/Include/Guid/ArmMpCoreInfo.h | 6 +++---
ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 6 +++---
ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 6 +++---
ArmPkg/Include/Library/ArmDisassemblerLib.h | 6 +++---
ArmPkg/Include/Library/ArmGenericTimerCounterLib.h | 6 +++---
ArmPkg/Include/Library/ArmGicArchLib.h | 6 +++---
ArmPkg/Include/Library/ArmHvcLib.h | 6 +++---
ArmPkg/Include/Library/ArmLib.h | 6 +++---
ArmPkg/Include/Library/ArmMmuLib.h | 6 +++---
ArmPkg/Include/Library/ArmSmcLib.h | 6 +++---
ArmPkg/Include/Library/ArmSvcLib.h | 6 +++---
ArmPkg/Include/Library/DefaultExceptionHandlerLib.h | 6 +++---
ArmPkg/Include/Library/OpteeLib.h | 6 +++---
ArmPkg/Include/Library/SemihostLib.h | 6 +++---
ArmPkg/Include/Library/StandaloneMmMmuLib.h | 6 +++---
ArmPkg/Include/Ppi/ArmMpCoreInfo.h | 6 +++---
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 6 +++---
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 6 +++---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 6 +++---
ArmPkg/Library/OpteeLib/OpteeSmc.h | 6 +++---
ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h | 6 +++---
ArmPkg/Library/SemihostLib/SemihostPrivate.h | 6 +++---
33 files changed, 99 insertions(+), 99 deletions(-)

diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h
index bf067ae03e08..c78b788ac012 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h
+++ b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h
@@ -6,8 +6,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent

--*/

-#ifndef __ARM_GIC_DXE_H__
-#define __ARM_GIC_DXE_H__
+#ifndef ARM_GIC_DXE_H_
+#define ARM_GIC_DXE_H_

#include <Library/ArmGicLib.h>
#include <Library/ArmLib.h>
@@ -76,4 +76,4 @@ GicGetDistributorIcfgBaseAndBit (
OUT UINTN *Config1Bit
);

-#endif
+#endif // ARM_GIC_DXE_H_
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
index 3fe5c24d5e5b..4cf3ab258c24 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
@@ -7,8 +7,8 @@

**/

-#ifndef __CPU_DXE_ARM_EXCEPTION_H__
-#define __CPU_DXE_ARM_EXCEPTION_H__
+#ifndef CPU_DXE_H_
+#define CPU_DXE_H_

#include <Uefi.h>

@@ -143,4 +143,4 @@ SetGcdMemorySpaceAttributes (
IN UINT64 Attributes
);

-#endif // __CPU_DXE_ARM_EXCEPTION_H__
+#endif // CPU_DXE_H_
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
index c64bc5c4627d..28db57e07bdf 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
@@ -5,8 +5,8 @@
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
-#ifndef __GENERIC_WATCHDOG_H__
-#define __GENERIC_WATCHDOG_H__
+#ifndef GENERIC_WATCHDOG_H_
+#define GENERIC_WATCHDOG_H_

// Refresh Frame:
#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
@@ -21,4 +21,4 @@
#define GENERIC_WDOG_ENABLED 1
#define GENERIC_WDOG_DISABLED 0

-#endif // __GENERIC_WATCHDOG_H__
+#endif // GENERIC_WATCHDOG_H_
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
index ce92fe9f1b91..5fe7c5f4d4e3 100644
--- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
+++ b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
@@ -7,8 +7,8 @@

**/

-#ifndef __SEMIHOST_FS_H__
-#define __SEMIHOST_FS_H__
+#ifndef SEMIHOST_FS_H_
+#define SEMIHOST_FS_H_

EFI_STATUS
VolumeOpen (
@@ -242,5 +242,5 @@ FileFlush (
IN EFI_FILE *File
);

-#endif // __SEMIHOST_FS_H__
+#endif // SEMIHOST_FS_H_

diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index e3576c8beb6e..6c901ac3871b 100644
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -10,8 +10,8 @@
**/


-#ifndef __MACRO_IO_LIB_H__
-#define __MACRO_IO_LIB_H__
+#ifndef ASM_MACRO_IO_LIB_H_
+#define ASM_MACRO_IO_LIB_H_

#define _ASM_FUNC(Name, Section) \
.global Name ; \
@@ -36,4 +36,4 @@
movt Reg, #:upper16:(Sym) - (. + 12) ; \
ldr Reg, [pc, Reg]

-#endif
+#endif // ASM_MACRO_IO_LIB_H_
diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h
index bcc0d8dafe0c..337d9ae0168e 100644
--- a/ArmPkg/Include/AsmMacroIoLibV8.h
+++ b/ArmPkg/Include/AsmMacroIoLibV8.h
@@ -10,8 +10,8 @@
**/


-#ifndef __MACRO_IO_LIBV8_H__
-#define __MACRO_IO_LIBV8_H__
+#ifndef ASM_MACRO_IO_LIBV8_H_
+#define ASM_MACRO_IO_LIBV8_H_

// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
// This only selects between EL1 and EL2, else we die.
@@ -54,4 +54,4 @@
movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
movk Reg, (Val) & 0xffff

-#endif // __MACRO_IO_LIBV8_H__
+#endif // ASM_MACRO_IO_LIBV8_H_
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 09d4cfe28da7..10aeb9a15ad8 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -7,8 +7,8 @@

**/

-#ifndef __AARCH64_H__
-#define __AARCH64_H__
+#ifndef AARCH64_H_
+#define AARCH64_H_

#include <Chipset/AArch64Mmu.h>

@@ -238,4 +238,4 @@ ArmWriteCntHctl (
IN UINT32 CntHctl
);

-#endif // __AARCH64_H__
+#endif // AARCH64_H_
diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h
index 6c7ada16b18a..fe38ba1c50ce 100644
--- a/ArmPkg/Include/Chipset/AArch64Mmu.h
+++ b/ArmPkg/Include/Chipset/AArch64Mmu.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __AARCH64_MMU_H_
-#define __AARCH64_MMU_H_
+#ifndef AARCH64_MMU_H_
+#define AARCH64_MMU_H_

//
// Memory Attribute Indirection register Definitions
@@ -194,5 +194,5 @@

// Uses LPAE Page Table format

-#endif // __AARCH64_MMU_H_
+#endif // AARCH64_MMU_H_

diff --git a/ArmPkg/Include/Chipset/ArmCortexA9.h b/ArmPkg/Include/Chipset/ArmCortexA9.h
index 13d18e5893dd..cb937ebc8c8b 100644
--- a/ArmPkg/Include/Chipset/ArmCortexA9.h
+++ b/ArmPkg/Include/Chipset/ArmCortexA9.h
@@ -6,8 +6,8 @@

**/

-#ifndef __ARM_CORTEX_A9_H__
-#define __ARM_CORTEX_A9_H__
+#ifndef ARM_CORTEX_A9_H_
+#define ARM_CORTEX_A9_H_

#include <Chipset/ArmV7.h>

@@ -55,5 +55,5 @@ ArmGetScuBaseAddress (
VOID
);

-#endif
+#endif // ARM_CORTEX_A9_H_

diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index 025f87a56d16..6b20b988e364 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -7,8 +7,8 @@

**/

-#ifndef __ARM_V7_H__
-#define __ARM_V7_H__
+#ifndef ARM_V7_H_
+#define ARM_V7_H_

#include <Chipset/ArmV7Mmu.h>

@@ -120,4 +120,4 @@ ArmWriteNsacr (
IN UINT32 Nsacr
);

-#endif // __ARM_V7_H__
+#endif // ARM_V7_H_
diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index 25d82d029795..87c443df3fce 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARMV7_MMU_H_
-#define __ARMV7_MMU_H_
+#ifndef ARMV7_MMU_H_
+#define ARMV7_MMU_H_

#define TTBR_NOT_OUTER_SHAREABLE BIT5
#define TTBR_RGN_OUTER_NON_CACHEABLE 0
@@ -235,4 +235,4 @@ ConvertSectionAttributesToPageAttributes (
IN BOOLEAN IsLargePage
);

-#endif
+#endif // ARMV7_MMU_H_
diff --git a/ArmPkg/Include/Guid/ArmMpCoreInfo.h b/ArmPkg/Include/Guid/ArmMpCoreInfo.h
index 3f9d17bb72c0..b810767879ae 100644
--- a/ArmPkg/Include/Guid/ArmMpCoreInfo.h
+++ b/ArmPkg/Include/Guid/ArmMpCoreInfo.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_MP_CORE_INFO_GUID_H_
-#define __ARM_MP_CORE_INFO_GUID_H_
+#ifndef ARM_MP_CORE_INFO_GUID_H_
+#define ARM_MP_CORE_INFO_GUID_H_

#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
#define SCU_CONFIG_REG_OFFSET 0x04
@@ -57,4 +57,4 @@ typedef struct {

extern EFI_GUID gArmMpCoreInfoGuid;

-#endif /* MPCOREINFO_H_ */
+#endif /* ARM_MP_CORE_INFO_GUID_H_ */
diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
index 71a5398558b8..33d60ccf17bc 100644
--- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_MM_SVC_H__
-#define __ARM_MM_SVC_H__
+#ifndef ARM_MM_SVC_H_
+#define ARM_MM_SVC_H_

/*
* SVC IDs to allow the MM secure partition to initialise itself, handle
@@ -44,4 +44,4 @@
#define SPM_MAJOR_VERSION 0
#define SPM_MINOR_VERSION 1

-#endif
+#endif // ARM_MM_SVC_H_
diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
index 9e0a3a3960d5..67afb0ea2d3d 100644
--- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
@@ -10,8 +10,8 @@
* (https://developer.arm.com/documentation/den0028/c/?lang=en)
**/

-#ifndef __ARM_STD_SMC_H__
-#define __ARM_STD_SMC_H__
+#ifndef ARM_STD_SMC_H_
+#define ARM_STD_SMC_H_

/*
* SMC function IDs for Standard Service queries
@@ -129,4 +129,4 @@
/* 0xbf00ff02 is reserved */
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03

-#endif
+#endif // ARM_STD_SMC_H_
diff --git a/ArmPkg/Include/Library/ArmDisassemblerLib.h b/ArmPkg/Include/Library/ArmDisassemblerLib.h
index c103b72e8127..d8c7af029dd3 100644
--- a/ArmPkg/Include/Library/ArmDisassemblerLib.h
+++ b/ArmPkg/Include/Library/ArmDisassemblerLib.h
@@ -6,8 +6,8 @@

**/

-#ifndef __ARM_DISASSEBLER_LIB_H__
-#define __ARM_DISASSEBLER_LIB_H__
+#ifndef ARM_DISASSEMBLER_LIB_H_
+#define ARM_DISASSEMBLER_LIB_H_

/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
@@ -34,4 +34,4 @@ DisassembleInstruction (
OUT UINTN Size
);

-#endif
+#endif // ARM_DISASSEMBLER_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h b/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h
index d3051be30f2d..96bdffbf1ee3 100644
--- a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h
+++ b/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h
@@ -7,8 +7,8 @@

**/

-#ifndef __ARM_GENERIC_TIMER_COUNTER_LIB_H__
-#define __ARM_GENERIC_TIMER_COUNTER_LIB_H__
+#ifndef ARM_GENERIC_TIMER_COUNTER_LIB_H_
+#define ARM_GENERIC_TIMER_COUNTER_LIB_H_

VOID
EFIAPI
@@ -82,4 +82,4 @@ ArmGenericTimerSetCompareVal (
IN UINT64 Value
);

-#endif
+#endif // ARM_GENERIC_TIMER_COUNTER_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmGicArchLib.h b/ArmPkg/Include/Library/ArmGicArchLib.h
index 264322f1d0df..b3635d226866 100644
--- a/ArmPkg/Include/Library/ArmGicArchLib.h
+++ b/ArmPkg/Include/Library/ArmGicArchLib.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_GIC_ARCH_LIB_H__
-#define __ARM_GIC_ARCH_LIB_H__
+#ifndef ARM_GIC_ARCH_LIB_H_
+#define ARM_GIC_ARCH_LIB_H_

//
// GIC definitions
@@ -24,4 +24,4 @@ ArmGicGetSupportedArchRevision (
VOID
);

-#endif
+#endif // ARM_GIC_ARCH_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmHvcLib.h b/ArmPkg/Include/Library/ArmHvcLib.h
index d26f0cff31eb..d202c2af6ee3 100644
--- a/ArmPkg/Include/Library/ArmHvcLib.h
+++ b/ArmPkg/Include/Library/ArmHvcLib.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_HVC_LIB__
-#define __ARM_HVC_LIB__
+#ifndef ARM_HVC_LIB_H_
+#define ARM_HVC_LIB_H_

/**
* The size of the HVC arguments are different between AArch64 and AArch32.
@@ -37,4 +37,4 @@ ArmCallHvc (
IN OUT ARM_HVC_ARGS *Args
);

-#endif
+#endif // ARM_HVC_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 70b9d816b74c..5c232d779c83 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -8,8 +8,8 @@

**/

-#ifndef __ARM_LIB__
-#define __ARM_LIB__
+#ifndef ARM_LIB_H_
+#define ARM_LIB_H_

#include <Uefi/UefiBaseType.h>

@@ -753,4 +753,4 @@ ArmHasSecurityExtensions (
);
#endif // MDE_CPU_ARM

-#endif // __ARM_LIB__
+#endif // ARM_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h
index 23e89a0c6584..410f06ce373c 100644
--- a/ArmPkg/Include/Library/ArmMmuLib.h
+++ b/ArmPkg/Include/Library/ArmMmuLib.h
@@ -6,8 +6,8 @@

**/

-#ifndef __ARM_MMU_LIB__
-#define __ARM_MMU_LIB__
+#ifndef ARM_MMU_LIB_H_
+#define ARM_MMU_LIB_H_

#include <Uefi/UefiBaseType.h>

@@ -64,4 +64,4 @@ ArmSetMemoryAttributes (
IN UINT64 Attributes
);

-#endif
+#endif // ARM_MMU_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmSmcLib.h b/ArmPkg/Include/Library/ArmSmcLib.h
index 835d6788e0b9..ced60b3c1147 100644
--- a/ArmPkg/Include/Library/ArmSmcLib.h
+++ b/ArmPkg/Include/Library/ArmSmcLib.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_SMC_LIB__
-#define __ARM_SMC_LIB__
+#ifndef ARM_SMC_LIB_H_
+#define ARM_SMC_LIB_H_

/**
* The size of the SMC arguments are different between AArch64 and AArch32.
@@ -37,4 +37,4 @@ ArmCallSmc (
IN OUT ARM_SMC_ARGS *Args
);

-#endif
+#endif // ARM_SMC_LIB_H_
diff --git a/ArmPkg/Include/Library/ArmSvcLib.h b/ArmPkg/Include/Library/ArmSvcLib.h
index a4414270f3b9..d4a1a8f11863 100644
--- a/ArmPkg/Include/Library/ArmSvcLib.h
+++ b/ArmPkg/Include/Library/ArmSvcLib.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_SVC_LIB__
-#define __ARM_SVC_LIB__
+#ifndef ARM_SVC_LIB_H_
+#define ARM_SVC_LIB_H_

/**
* The size of the SVC arguments are different between AArch64 and AArch32.
@@ -43,4 +43,4 @@ ArmCallSvc (
IN OUT ARM_SVC_ARGS *Args
);

-#endif
+#endif // ARM_SVC_LIB_H_
diff --git a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h b/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h
index bbcf30f85752..57dc555e1332 100644
--- a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h
+++ b/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h
@@ -6,8 +6,8 @@

**/

-#ifndef __DEFAULT_EXCEPTION_HANDLER_LIB_H__
-#define __DEFAULT_EXCEPTION_HANDLER_LIB_H__
+#ifndef DEFAULT_EXCEPTION_HANDLER_LIB_H_
+#define DEFAULT_EXCEPTION_HANDLER_LIB_H_

/**
This is the default action to take on an unexpected exception
@@ -22,4 +22,4 @@ DefaultExceptionHandler (
IN OUT EFI_SYSTEM_CONTEXT SystemContext
);

-#endif
+#endif // DEFAULT_EXCEPTION_HANDLER_LIB_H_
diff --git a/ArmPkg/Include/Library/OpteeLib.h b/ArmPkg/Include/Library/OpteeLib.h
index 8ceab117d132..b9399d2e1810 100644
--- a/ArmPkg/Include/Library/OpteeLib.h
+++ b/ArmPkg/Include/Library/OpteeLib.h
@@ -8,8 +8,8 @@

**/

-#ifndef _OPTEE_H_
-#define _OPTEE_H_
+#ifndef OPTEE_LIB_H_
+#define OPTEE_LIB_H_

/*
* The 'Trusted OS Call UID' is supposed to return the following UUID for
@@ -117,4 +117,4 @@ OpteeInvokeFunction (
IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
);

-#endif
+#endif // OPTEE_LIB_H_
diff --git a/ArmPkg/Include/Library/SemihostLib.h b/ArmPkg/Include/Library/SemihostLib.h
index ce08b2778d72..590728c804f4 100644
--- a/ArmPkg/Include/Library/SemihostLib.h
+++ b/ArmPkg/Include/Library/SemihostLib.h
@@ -7,8 +7,8 @@

**/

-#ifndef __SEMIHOSTING_H__
-#define __SEMIHOSTING_H__
+#ifndef SEMIHOSTING_LIB_H_
+#define SEMIHOSTING_LIB_H_

/*
*
@@ -129,4 +129,4 @@ SemihostSystem (
IN CHAR8 *CommandLine
);

-#endif // __SEMIHOSTING_H__
+#endif // SEMIHOSTING_LIB_H_
diff --git a/ArmPkg/Include/Library/StandaloneMmMmuLib.h b/ArmPkg/Include/Library/StandaloneMmMmuLib.h
index 1d2a0e0c2bac..ccc016d0350a 100644
--- a/ArmPkg/Include/Library/StandaloneMmMmuLib.h
+++ b/ArmPkg/Include/Library/StandaloneMmMmuLib.h
@@ -6,8 +6,8 @@

**/

-#ifndef __STANDALONEMM_MMU_LIB__
-#define __STANDALONEMM_MMU_LIB__
+#ifndef STANDALONE_MM_MMU_LIB_
+#define STANDALONE_MM_MMU_LIB_

EFI_STATUS
ArmSetMemoryRegionNoExec (
@@ -33,4 +33,4 @@ ArmClearMemoryRegionReadOnly (
IN UINT64 Length
);

-#endif /* __STANDALONEMM_MMU_LIB__ */
+#endif /* STANDALONE_MM_MMU_LIB_ */
diff --git a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h b/ArmPkg/Include/Ppi/ArmMpCoreInfo.h
index 871119bde2f0..b1e404ce1364 100644
--- a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h
+++ b/ArmPkg/Include/Ppi/ArmMpCoreInfo.h
@@ -6,8 +6,8 @@
*
**/

-#ifndef __ARM_MP_CORE_INFO_PPI_H__
-#define __ARM_MP_CORE_INFO_PPI_H__
+#ifndef ARM_MP_CORE_INFO_PPI_H_
+#define ARM_MP_CORE_INFO_PPI_H_

#include <Guid/ArmMpCoreInfo.h>

@@ -49,4 +49,4 @@ typedef struct {
extern EFI_GUID gArmMpCoreInfoPpiGuid;
extern EFI_GUID gArmMpCoreInfoGuid;

-#endif
+#endif // ARM_MP_CORE_INFO_PPI_H_
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
index cfc0c878a415..318020277b24 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
@@ -8,8 +8,8 @@

**/

-#ifndef __AARCH64_LIB_H__
-#define __AARCH64_LIB_H__
+#ifndef AARCH64_LIB_H_
+#define AARCH64_LIB_H_

typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);

@@ -52,5 +52,5 @@ ArmReadIdAA64Mmfr2 (
VOID
);

-#endif // __AARCH64_LIB_H__
+#endif // AARCH64_LIB_H_

diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
index dcf6723b803b..5a92ade2b313 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
+++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
@@ -6,8 +6,8 @@

**/

-#ifndef __ARM_V7_LIB_H__
-#define __ARM_V7_LIB_H__
+#ifndef ARM_V7_LIB_H_
+#define ARM_V7_LIB_H_

#define ID_MMFR0_SHARELVL_SHIFT 12
#define ID_MMFR0_SHARELVL_MASK 0xf
@@ -64,5 +64,5 @@ ArmReadIdPfr1 (
VOID
);

-#endif // __ARM_V7_LIB_H__
+#endif // ARM_V7_LIB_H_

diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
index 1818a1994dc3..5db83d620bfc 100644
--- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h
+++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
@@ -8,8 +8,8 @@

**/

-#ifndef __ARM_LIB_PRIVATE_H__
-#define __ARM_LIB_PRIVATE_H__
+#ifndef ARM_LIB_PRIVATE_H_
+#define ARM_LIB_PRIVATE_H_

#define CACHE_SIZE_4_KB (3UL)
#define CACHE_SIZE_8_KB (4UL)
@@ -186,4 +186,4 @@ ReadCLIDR (
VOID
);

-#endif // __ARM_LIB_PRIVATE_H__
+#endif // ARM_LIB_PRIVATE_H_
diff --git a/ArmPkg/Library/OpteeLib/OpteeSmc.h b/ArmPkg/Library/OpteeLib/OpteeSmc.h
index 62319d718dc5..b760ec8f8227 100644
--- a/ArmPkg/Library/OpteeLib/OpteeSmc.h
+++ b/ArmPkg/Library/OpteeLib/OpteeSmc.h
@@ -7,8 +7,8 @@

**/

-#ifndef _OPTEE_SMC_H_
-#define _OPTEE_SMC_H_
+#ifndef OPTEE_SMC_H_
+#define OPTEE_SMC_H_

/* Returned in Arg0 only from Trusted OS functions */
#define OPTEE_SMC_RETURN_OK 0x0
@@ -47,4 +47,4 @@ typedef struct {
UINT8 Data4[8];
} RFC4122_UUID;

-#endif
+#endif // OPTEE_SMC_H_
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h
index 0bb3645ddc47..a40a2ff5cb4f 100644
--- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h
+++ b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h
@@ -9,8 +9,8 @@

**/

-#ifndef _PLATFORM_BM_H_
-#define _PLATFORM_BM_H_
+#ifndef PLATFORM_BM_H_
+#define PLATFORM_BM_H_

#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
@@ -50,4 +50,4 @@ DisableQuietBoot (
VOID
);

-#endif // _PLATFORM_BM_H_
+#endif // PLATFORM_BM_H_
diff --git a/ArmPkg/Library/SemihostLib/SemihostPrivate.h b/ArmPkg/Library/SemihostLib/SemihostPrivate.h
index 30103b04b53f..886472611623 100644
--- a/ArmPkg/Library/SemihostLib/SemihostPrivate.h
+++ b/ArmPkg/Library/SemihostLib/SemihostPrivate.h
@@ -7,8 +7,8 @@

**/

-#ifndef __SEMIHOST_PRIVATE_H__
-#define __SEMIHOST_PRIVATE_H__
+#ifndef SEMIHOST_PRIVATE_H_
+#define SEMIHOST_PRIVATE_H_

typedef struct {
CHAR8 *FileName;
@@ -209,4 +209,4 @@ GccSemihostCall (

#endif // __CC_ARM

-#endif //__SEMIHOST_PRIVATE_H__
+#endif // SEMIHOST_PRIVATE_H_
--
2.17.1


[PATCH v2 00/15] ArmPkg/ArmPlatformPkg CI enablement

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@arm.com>

Enable upstream CI for the ArmPkg and ArmPlatformPkg.
Bugzilla tickets have been created for their enablement:
ArmPkg:
https://bugzilla.tianocore.org/show_bug.cgi?id=3349
ArmPlatformPkg:
https://bugzilla.tianocore.org/show_bug.cgi?id=3348

The patch-set also fixes some Ecc reported errors, spelling and
CI reported errors. The following bugzillas should be resolved:
https://bugzilla.tianocore.org/show_bug.cgi?id=3258
https://bugzilla.tianocore.org/show_bug.cgi?id=3254

The changes can be seen at:
https://github.com/PierreARM/edk2/tree/1409_Enable_CI_for_Arm_Packages_v2

Pierre Gondois (15):
ArmPkg: Fix Ecc error 8003
ArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLib
ArmPkg: Add missing library headers to ArmPkg.dec
ArmPlatformPkg: Document libraries in ArmPlatformPkg.dec
ArmPkg: Document libraries in ArmPkg.dec
ArmPkg: Re-order libraries in ArmPkg.dec
ArmPkg: Add OemMiscLibNull library to ArmPkg.dsc
ArmPkg: Correct small typos
ArmPkg: Add ArmPkg.ci.yaml
ArmPlatformPkg: Add ArmPlatformPkg.ci.yaml
.pytool: Enable CI for ArmPkg
.pytool: Enable CI for ArmPlatformPkg
.pytool: Document LicenseCheck and EccCheck
AzurePipelines: Add support for ArmPkg
AzurePipelines: Add support for ArmPlatformPkg

.../templates/pr-gate-build-job.yml | 3 +
.pytool/CISettings.py | 4 +-
.pytool/Readme.md | 14 +-
ArmPkg/ArmPkg.ci.yaml | 221 ++++++++++++++++++
ArmPkg/ArmPkg.dec | 65 +++++-
ArmPkg/ArmPkg.dsc | 1 +
ArmPkg/Drivers/ArmGic/ArmGicDxe.h | 6 +-
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 2 +-
ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 2 +-
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 2 +-
ArmPkg/Drivers/CpuDxe/CpuDxe.h | 6 +-
.../GenericWatchdogDxe/GenericWatchdog.h | 6 +-
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c | 2 +-
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h | 6 +-
ArmPkg/Include/AsmMacroIoLib.h | 6 +-
ArmPkg/Include/AsmMacroIoLibV8.h | 6 +-
ArmPkg/Include/Chipset/AArch64.h | 6 +-
ArmPkg/Include/Chipset/AArch64Mmu.h | 6 +-
ArmPkg/Include/Chipset/ArmCortexA9.h | 6 +-
ArmPkg/Include/Chipset/ArmV7.h | 6 +-
ArmPkg/Include/Chipset/ArmV7Mmu.h | 6 +-
ArmPkg/Include/Guid/ArmMpCoreInfo.h | 6 +-
ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 6 +-
ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 6 +-
ArmPkg/Include/Library/ArmDisassemblerLib.h | 6 +-
.../Library/ArmGenericTimerCounterLib.h | 6 +-
ArmPkg/Include/Library/ArmGicArchLib.h | 6 +-
ArmPkg/Include/Library/ArmHvcLib.h | 6 +-
ArmPkg/Include/Library/ArmLib.h | 6 +-
ArmPkg/Include/Library/ArmMmuLib.h | 6 +-
ArmPkg/Include/Library/ArmSmcLib.h | 6 +-
ArmPkg/Include/Library/ArmSvcLib.h | 6 +-
.../Library/DefaultExceptionHandlerLib.h | 6 +-
ArmPkg/Include/Library/OpteeLib.h | 6 +-
ArmPkg/Include/Library/SemihostLib.h | 6 +-
ArmPkg/Include/Library/StandaloneMmMmuLib.h | 6 +-
ArmPkg/Include/Ppi/ArmMpCoreInfo.h | 6 +-
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 6 +-
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 6 +-
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 6 +-
.../Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c | 4 +-
ArmPkg/Library/OpteeLib/OpteeSmc.h | 6 +-
.../PlatformBootManagerLib/PlatformBm.h | 6 +-
.../SemiHostingSerialPortLib/SerialPortLib.c | 6 +-
ArmPkg/Library/SemihostLib/SemihostPrivate.h | 6 +-
.../AArch64/ArmMmuStandaloneMmLib.c | 4 +-
...MiscNumberOfInstallableLanguagesFunction.c | 6 +-
ArmPlatformPkg/ArmPlatformPkg.ci.yaml | 100 ++++++++
ArmPlatformPkg/ArmPlatformPkg.dec | 19 +-
49 files changed, 530 insertions(+), 123 deletions(-)
create mode 100644 ArmPkg/ArmPkg.ci.yaml
create mode 100644 ArmPlatformPkg/ArmPlatformPkg.ci.yaml

--
2.17.1


Re: [PATCH 3/3] OvmfPkg/PlatformPei: Mark TPM MMIO range as unencrypted for SEV

Lendacky, Thomas
 

On 4/26/21 9:21 AM, Tom Lendacky wrote:
On 4/26/21 7:07 AM, Laszlo Ersek wrote:
On 04/23/21 22:02, Tom Lendacky wrote:
On 4/23/21 12:41 PM, Tom Lendacky wrote:
On 4/23/21 8:04 AM, Laszlo Ersek wrote:
On 04/23/21 12:26, Laszlo Ersek wrote:
review#2 from scratch:

On 04/21/21 00:54, Tom Lendacky wrote:
From: Tom Lendacky <thomas.lendacky@amd.com>
...


I've had a further idea on this.

You could add an entirely new PEIM just for this. The entry point
function of the PEIM would check for SEV, decrypt the TPM range if SEV
were active, and then install gOvmfTpmMmioAccessiblePpiGuid
(unconditionally). The exit status of the PEIM would always be
EFI_ABORTED, because there would be no need to keep the PEIM resident.

The new PEIM would have a DEPEX on gEfiPeiMemoryDiscoveredPpiGuid, to
make sure that potential page table splitting for the potential MMIO
range decryption could be satisfied from permanent PEI RAM.

The new PEIM would be included in the DSC and FDF files of the usual
three OVMF platforms, and in the Bhyve platform -- dependent on the
TPM_ENABLE build flag.

There are several advantages to such a separate PEIM:

- For Bhyve, the update is minimal. Just include one line in each of the
FDF and the DSC files. No need to customize an existent
platform-specific PEIM, no code duplication between two PlatformPei modules.

- The new PEIM would depend on the TPM_ENABLE build flag, so it would
only be included in the firmware binaries if and only if Tcg2ConfigPei
were. No useless PPI installation would occur in the absence of TPM_ENABLE.

- No need to check PcdTpmBaseAddress for nullity in the new PEIM, before
the decryption, as TPM_ENABLE guarantees (on IA32/X64) that the PCD
already has the right value.

- The new logic would be properly ordered between PlatformPei and
Tcg2ConfigPei, namely due to the use of two such PPI GUIDs in DEPEXes
that actually make sense. PlatformPei -> TPM MMIO decryptor PEIM ordered
via "memory discovered" (needed for potential page table splitting), TPM
MMIO decryptor PEIM -> Tcg2ConfigPei ordered via "TPM MMIO decrypted".

You could place the new PEIM at:

OvmfPkg/Tcg/TpmMmioSevDecryptPei

If you haven't lost your patience with me yet, I'd really appreciate if
you could investigate this!
So far, this appears to be working nicely. I'm new at the whole PEIM
thing, so hopefully I haven't missed anything. I should be submitting the
patches soon for review.
So one thing I failed to do before submitting my previous patch was to
complete my testing against the IA32 and X64 combination build. In this
build, PEI is built as Ia32, and MemEncryptSevClearPageEncMask() will
return UNSUPPORTED causing an ASSERT (since I check the return code). So
there are a few options:

1. SEV works with the current encrypted mapping, it is only the SEV-ES
support that fails because of the ValidateMmioMemory() check. I can do
the mapping change just for SEV-ES since it is X64 only. This works,
because MemEncryptSevClearPageEncMask() will not return UNSUPPORTED
when running in 64-bit.
Can we really say "SEV works" though? Because, even using an X64 PEI
phase, and enabling only SEV (not SEV-ES), TPM access will be broken in
the PEI phase. Is my understanding correct?
Because the memory range is marked as MMIO, we'll take a nested page fault
(NPF). The GPA passed as part of the NPF does not include the c-bit. So we
do in fact work properly with a TPM in SEV. SEV-ES would also work
properly if the mitigation for accessing an encrypted address was removed
from the #VC handler. It is only this added mitigation to protect MMIO
that results in an issue with the TPM in PEI.
So I'm thinking that I can have TpmMmioSevDecryptPeim.c do this:

//
// If SEV or SEV-ES is active, MMIO succeeds against an encrypted physical
// address because the nested page fault (NPF) that occurs on access does not
// include the encryption bit in the guest physical address provided to the
// hypervisor.
//
// However, if SEV-ES is active, before performing the actual MMIO, an
// additional MMIO mitigation check is performed in the #VC handler to ensure
// that MMIO is being done to an unencrypted address. To prevent guest
// termination in this scenario, mark the range unencrypted ahead of access.
//
if (MemEncryptSevEsIsEnabled ()) {
// Do MemEncryptSevClearPageEncMask() ...
}

Let me submit the next version with this and see what you think.

Thanks,
Tom



I think the behavior you currently see is actually what we want, we
should double down on it -- if MemEncryptSevClearPageEncMask() fails,
report an explicit DEBUG_ERROR, and call CpuDeadLoop(). If the firmware
is built with TPM_ENABLE, and SEV is active, then an IA32 PEI phase is
simply unusable. Silently pretending that the TPM is not there, even
though it may have been configured on the QEMU command line, we just
failed to communicate with it, is not a good idea, IMO.
However, because the c-bit is not part of the NPF, we do communicate
successfully with the TPM.

So we could actually do following:
- For IA32:
- Remove the Depex on gOvmfTpmMmioAccessiblePpiGuid
- Do not add OvmfPkg/Tcg/TpmMmioSevDecryptPei/TpmMmioSevDecryptPei.inf

- For X64:
- Add the Depex on gOvmfTpmMmioAccessiblePpiGuid
- Add OvmfPkg/Tcg/TpmMmioSevDecryptPei/TpmMmioSevDecryptPei.inf

That might be confusing, though. So we could just do option #3 below.

Thanks,
Tom


This is somewhat similar IMO to the S3Verification() function in
"OvmfPkg/PlatformPei/Platform.c".

TPM_ENABLE, SEV, IA32 PEI phase: pick any two.

Thanks,
Laszlo


2. Call MemEncryptSevClearPageEncMask() for SEV or SEV-ES, but don't check
the return status.

3. Create Ia32 and X64 versions of internal functions, where the Ia32
version simply returns SUCCESS because it can't do anything and the X64
version calls MemEncryptSevClearPageEncMask(), allowing the main code
to ASSERT on any errors.

I'm leaning towards #1, because this is an SEV-ES only issue. Thoughts?

Thanks,
Tom


One thing I found is that the Bhyve package makes reference to the
OvmfPkg/Bhyve/Tcg directory, but that directory does not exist. So I don't
think that TPM enablement has been tested. I didn't update the Bhyve
support for that reason.

Thanks,
Tom

Thanks!
Laszlo


Re: [PATCH v1 06/12] ArmPkg: Add ArmPkg.ci.yaml

PierreGondois
 

Hi Sami,

I think the lists are already alphabetically ordered. I will re-order the libraries in ArmPkg.dec though.

I will remove the "eio'ed" word from the exception list in a V2.

Thanks for the review,
Pierre

On 4/22/21 11:02 AM, Sami Mujawar wrote:

Hi Pierre,

I have a few minor comments marked inline as [SAMI].

With those changed.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

*From: *Pierre.Gondois@arm.com <Pierre.Gondois@arm.com>
*Date: *Wednesday, 21 April 2021 at 13:21
*To: *devel@edk2.groups.io <devel@edk2.groups.io>, Sami Mujawar <Sami.Mujawar@arm.com>, leif@nuviainc.com <leif@nuviainc.com>, ardb+tianocore@kernel.org <ardb+tianocore@kernel.org>, sean.brogan@microsoft.com <sean.brogan@microsoft.com>, Bret.Barkelew@microsoft.com <Bret.Barkelew@microsoft.com>
*Subject: *[PATCH v1 06/12] ArmPkg: Add ArmPkg.ci.yaml

From: Pierre Gondois <Pierre.Gondois@arm.com>

Add ArmPkg.ci.yaml to configure the CI for the
ArmPkg.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
 ArmPkg/ArmPkg.ci.yaml | 222 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 222 insertions(+)
 create mode 100644 ArmPkg/ArmPkg.ci.yaml

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
new file mode 100644
index 000000000000..ba502cd647c9
--- /dev/null
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -0,0 +1,222 @@
+## @file
+# CI configuration for ArmPkg
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+    ## options defined .pytool/Plugin/LicenseCheck
+    "LicenseCheck": {
+        "IgnoreFiles": []
+    },
+
+    "EccCheck": {
+        ## Exception sample looks like below:
+        ## "ExceptionList": [
+        ##     "<ErrorID>", "<KeyWord>"
+        ## ]
+        "ExceptionList": [
+        ],
+        ## Both file path and directory path are accepted.
+        "IgnoreFiles": [
+            "Library/ArmSoftFloatLib/berkeley-softfloat-3"
+        ]
+    },
+
+    ## options defined .pytool/Plugin/CompilerPlugin
+    "CompilerPlugin": {
+        "DscPath": "ArmPkg.dsc"
+    },
+
+    ## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+    "HostUnitTestCompilerPlugin": {
+        "DscPath": "" # Don't support this test
+    },
+
+    ## options defined .pytool/Plugin/CharEncodingCheck
+    "CharEncodingCheck": {
+        "IgnoreFiles": []
+    },
+
+    ## options defined .pytool/Plugin/DependencyCheck
+    "DependencyCheck": {
+        "AcceptableDependencies": [
+            "ArmPlatformPkg/ArmPlatformPkg.dec",
+            "ArmPkg/ArmPkg.dec",
+            "EmbeddedPkg/EmbeddedPkg.dec",
+            "MdeModulePkg/MdeModulePkg.dec",
+            "MdePkg/MdePkg.dec",
+            "ShellPkg/ShellPkg.dec"

[SAMI] Can this list be sorted in alphabetical order, please?

[/SAMI]
+        ],
+        # For host based unit tests
+        "AcceptableDependencies-HOST_APPLICATION":[
+            "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+        ],
+        # For UEFI shell based apps
+        "AcceptableDependencies-UEFI_APPLICATION":[],
+        "IgnoreInf": []
+    },
+
+    ## options defined .pytool/Plugin/DscCompleteCheck
+    "DscCompleteCheck": {
+        "IgnoreInf": [],
+        "DscPath": "ArmPkg.dsc"
+    },
+
+    ## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+    "HostUnitTestDscCompleteCheck": {
+        "IgnoreInf": [""],
+        "DscPath": "" # Don't support this test
+    },
+
+    ## options defined .pytool/Plugin/GuidCheck
+    "GuidCheck": {
+        "IgnoreGuidName": [],
+        "IgnoreGuidValue": [],
+        "IgnoreFoldersAndFiles": [],
+        "IgnoreDuplicates": [],
+    },
+
+    ## options defined .pytool/Plugin/LibraryClassCheck
+    "LibraryClassCheck": {
+        "IgnoreHeaderFile": []
+    },
+
+    ## options defined .pytool/Plugin/SpellCheck
+    "SpellCheck": {
+        "AuditOnly": False,
+        "IgnoreFiles": [
+ "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
+        ],                           # use gitignore syntax to ignore errors
+                                     # in matching files
+        "ExtendWords": [
+          "api's",
+          "ackintid",

[SAMI] Can this list be sorted in alphabetical order, please?

[/SAMI]
+          "actlr",
+          "aeabi",
+          "ashldi",
+          "ashrdi",
+          "ccidx",
+          "ccsidr",
+          "clidr",
+          "clrex",
+          "clzsi",
+          "cpuactlr",
+          "csselr",
+          "ctzsi",
+          "cygdrive",
+          "cygpaths",
+          "datas",
+          "dcmpeq",
+          "dcmpge",
+          "dcmpgt",
+          "dcmple",
+          "dcmplt",
+          "ddisable",
+          "divdi",
+          "divsi",
+          "dmdepkg",
+          "drsub",
+          "eoi'ed",

[SAMI] I don’t think there is such a word. Should the original text be fixed?

[/SAMI]
+          "fcmpeq",
+          "fcmpge",
+          "fcmpgt",
+          "fcmple",
+          "fcmplt",
+          "ffreestanding",
+          "frsub",
+          "hisilicon",
+          "iccbpr",
+          "icciar",
+          "iccicr",
+          "icciidr",
+          "iccpmr",
+          "icdicer",
+          "icdicfr",
+          "icdictr",
+          "icdiser",
+          "icdisr",
+          "icdsgir",
+          "icenabler",
+          "intid",
+          "ipriority",
+          "irouter",
+          "isenabler",
+          "istatus",
+          "itargets",
+          "lable",
+          "ldivmod",
+          "ldmdb",
+          "ldmia",
+          "ldrbt",
+          "ldrex",
+          "ldrexb",
+          "ldrexd",
+          "ldrexh",
+          "ldrhbt",
+          "ldrht",
+          "ldrsb",
+          "ldrsbt",
+          "ldrsh",
+          "lshrdi",
+          "moddi",
+          "modsi",
+          "mpidr",
+          "muldi",
+          "mullu",
+          "nonshareable",
+          "nsacr",
+          "nsasedis",
+          "nuvia",
+          "oldit",
+          "readc",
+          "revsh",
+          "rfedb",
+          "sctlr",
+          "smccc",
+          "smlabb",
+          "smlabt",
+          "smlad",
+          "smladx",
+          "smlatb",
+          "smlatt",
+          "smlawb",
+          "smlawt",
+          "smlsd",
+          "smlsdx",
+          "smmla",
+          "smmlar",
+          "smmls",
+          "smmlsr",
+          "sourcery",
+          "srsdb",
+          "stmdb",
+          "stmia",
+          "strbt",
+          "strexb",
+          "strexd",
+          "strexh",
+          "strht",
+          "switchu",
+          "tpidrurw",
+          "ttbcr",
+          "typer",
+          "ucmpdi",
+          "udivdi",
+          "udivmoddi",
+          "udivsi",
+          "uefi's",
+          "uldiv",
+          "umoddi",
+          "umodsi",
+          "usada",
+          "vlpis",
+          "writec"
+        ],                          # words to extend to the dictionary for this package
+        "IgnoreStandardPaths": [    # Standard Plugin defined paths that
+            "*.asm", "*.s"          # should be ignore
+        ],
+        "AdditionalIncludePaths": [] # Additional paths to spell check
+                                     # (wildcards supported)
+    }
+}
--
2.17.1


Re: Problem: TPM 2.0 event log by OVMF is shown empty in Linux kernel versions after 5.8

Lendacky, Thomas
 

On 4/27/21 2:40 AM, Thore Sommer via groups.io wrote:

I don't confirm this.  I have Linux version 5.12.0-rc5+ installed and I
see the attached in my binary_bios_measurements (I've run it through
tpm2-eventlog so you can see the actual events).
Ok that is interesting.

Here are the steps to reproduce my findings.
Necessary tools: Build chain for edk2, swtpm 0.5.2 and qemu 5.2.0

1. Build OVMF from edk2-stable202102 with
-a X64 -a IA32 \
-b RELEASE \
-D NETWORK_IP6_ENABLE \
-D TPM_ENABLE \
Shouldn't you also have '-D TPM_CONFIG_ENABLE' ?

Thanks,
Tom

-D FD_SIZE_4MB \
-D TLS_ENABLE \
-D HTTP_BOOT_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE \
-D EXCLUDE_SHELL_FROM_FD

2. Copy OVMF_CODE.fd and OVMF_VARS.fd into an empty directory
3. Download Ubuntu 21.04 desktop iso (which has a 5.11 Linux kernel) and
copy it into that directory
(I can provide a custom Debian build with a patched and unpatched vanilla
kernel if needed)
4. Create dir for swtpm: mkdir mytpm1
5. Start swtpm with
swtpm socket \
    --tpm2 \
    --tpmstate dir=mytpm1 \
    --ctrl type=unixio,path=mytpm1/swtpm-sock \
    --log level=4 &
6. Start qemu with
qemu-system-x86_64 \
        -enable-kvm \
        -machine q35,smm=on \
        -global driver=cfi.pflash01,property=secure,value=on \
        -drive if=pflash,format=raw,unit=0,file=OVMF_CODE.fd,readonly=on \
        -drive if=pflash,format=raw,unit=1,readonly=off,file=OVMF_VARS.fd \
        -chardev socket,id=chrtpm,path=mytpm1/swtpm-sock \
        -tpmdev emulator,id=tpm0,chardev=chrtpm \
        -device tpm-crb,tpmdev=tpm0 \
        -boot d \
        -cdrom "ubuntu-21.04-desktop-amd64.iso" \
        -m 3G \
        -vga virtio
7. Start Ubuntu normally and choose "Try Ubuntu"
8. Open a Terminal and check that
"/sys/kernel/security/tpm0/binary_bios_measurements" is empty

On my OVMF boot I'm using the direct
kernel command line and I have secure boot enabled but not activated,
which is why you only see PCRs 0-7 in the log.
The Kernel here is loaded by Grub which itself is loaded by Shim. But that
should not make a difference regarding the event log via ACPI right?

I've attached the event log from a Ubuntu 20.04 machine with a 5.12
patched kernel and my kernel build config.

Best regards
Thore Sommer





Re: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

Sami Mujawar
 

Hi Rebecca,

 

I agree MdePkg/Library/BaseRngLib can be refactored to support both x86 and AArch64.

BaseRngLib would then be a RngLib instance that uses CPU instructions to provide random numbers.

 

Regards,

 

Sami Mujawar

 

From: Bret Barkelew <Bret.Barkelew@...>
Date: Monday, 26 April 2021 at 22:45
To: devel@edk2.groups.io <devel@edk2.groups.io>, rebecca@... <rebecca@...>, Sami Mujawar <Sami.Mujawar@...>, Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>, Ard Biesheuvel <Ard.Biesheuvel@...>, leif@... <leif@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Yao, Jiewen <jiewen.yao@...>, Rahul Kumar <rahul1.kumar@...>, nd <nd@...>, Jose Marinho <Jose.Marinho@...>
Subject: RE: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

I vote the latter.

 

- Bret

 

From: Rebecca Cran via groups.io
Sent: Monday, April 26, 2021 2:29 PM
To: Sami Mujawar; devel@edk2.groups.io; Samer El-Haj-Mahmoud; Ard Biesheuvel; leif@...
Cc: rfc@edk2.groups.io; Yao, Jiewen; Rahul Kumar; nd; Jose Marinho
Subject: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

 

Hi Sami,

I've been looking through the design document again, and was wondering
if the work I previously did will just slot in?

Were you thinking the "RngLib|RNDR" would go into ArmPkg (since it's not
labeled as being in BaseRngLib)? Or would it still make sense to
refactor MdePkg/Library/BaseRngLib to support both x86 (using RDRAND)
and aarch64 (using RNDR)?

--
Rebecca Cran
 


On 4/22/21 3:30 AM, Sami Mujawar wrote:
> Hi Rebecca,
>
> I have been working on the following modules (See slide 11 in “EDKII -
> Proposed update to RNG implementation.pdf
> <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0>”):
>
>  1. TrngLib|FwTrnglib (Arm Firmware TRNG)
>  2. DrbgLib stack – with support for DrbgAlgorithmLib|CRT_DRBG &
>     AesLib|ArmAesInstructionLib.
>
> I plan to post patches for (a) in the next fortnight. Following this I
> plan to update the proposal with the interface definitions for the
> various library interfaces in the DrbgLib Stack.
>
> I have not looked at RngLib|RNDR as I believe you were interested in
> implementing the part. Kindly let me know if you plan to implement this
> and the platform you would be using for testing. It looks like the
> FVP_Base_AEMv8A-AEMv8A and the FVP-RevC models support RNDR, so these
> could be used for testing as well. Please feel free to get in touch
> should you need any help with the model parameters or if you face any
> issues.
>
> Regards,
>
> Sami Mujawar
>
> *From: *Rebecca Cran <rebecca@...>
> *Date: *Tuesday, 20 April 2021 at 21:04
> *To: *Sami Mujawar <Sami.Mujawar@...>, devel@edk2.groups.io
> <devel@edk2.groups.io>, Samer El-Haj-Mahmoud
> <Samer.El-Haj-Mahmoud@...>, Ard Biesheuvel <Ard.Biesheuvel@...>,
> leif@... <leif@...>
> *Cc: *rfc@edk2.groups.io <rfc@edk2.groups.io>, Jiewen Yao
> <jiewen.yao@...>, Rahul Kumar <rahul1.kumar@...>, nd
> <nd@...>, Jose Marinho <Jose.Marinho@...>
> *Subject: *Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to
> RngDxe
>
> Hi Sami,
>
> I was wondering if you're still collecting feedback on the design, or if
> you have a plan and schedule for the implementation?
>
> --
> Rebecca Cran
>
> On 1/15/21 7:51 PM, Sami Mujawar wrote:
>  > Hi All,
>  >
>  > I have shared some initial thoughts on the RNG implementation updates
> at
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0
> <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0>
>  >
>  > Kindly let me know your feedback or if you have any queries.
>  >
>  > Regards,
>  >
>  > Sami Mujawar
>  >
>  > -----Original Message-----
>  > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> Rebecca Cran via groups.io
>  > Sent: 14 January 2021 09:05 PM
>  > To: Sami Mujawar <Sami.Mujawar@...>; devel@edk2.groups.io; Samer
> El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; Ard Biesheuvel
> <Ard.Biesheuvel@...>; leif@...
>  > Cc: rfc@edk2.groups.io; Jiewen Yao <jiewen.yao@...>; Rahul
> Kumar <rahul1.kumar@...>; nd <nd@...>
>  > Subject: Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to
> RngDxe
>  >
>  > On 12/10/20 4:26 AM, Sami Mujawar wrote:
>  >
>  >> I am working on the TRNG FW API interface and will share more details
>  >> for the discussion soon.
>  >>
>  >> We had some thoughts about streamlining the RngDxe implementations and
>  >> would like to share some diagrams for the discussion.
>  >>
>  >> My diagrams are in Visio that I can export as JPG images. However, I am
>  >> open to switching to any other suggested tool.
>  >
>  > Hi Sami,
>  >
>  > I don't see any further discussions on this. Have you made any progress
>  > with sharing the design documents or scheduling a review?
>  >
>






 


Re: Problem: TPM 2.0 event log by OVMF is shown empty in Linux kernel versions after 5.8

Thore Sommer <public@...>
 

I don't confirm this. I have Linux version 5.12.0-rc5+ installed and I
see the attached in my binary_bios_measurements (I've run it through
tpm2-eventlog so you can see the actual events).
Ok that is interesting.

Here are the steps to reproduce my findings.
Necessary tools: Build chain for edk2, swtpm 0.5.2 and qemu 5.2.0

1. Build OVMF from edk2-stable202102 with
-a X64 -a IA32 \
-b RELEASE \
-D NETWORK_IP6_ENABLE \
-D TPM_ENABLE \
-D FD_SIZE_4MB \
-D TLS_ENABLE \
-D HTTP_BOOT_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE \
-D EXCLUDE_SHELL_FROM_FD

2. Copy OVMF_CODE.fd and OVMF_VARS.fd into an empty directory
3. Download Ubuntu 21.04 desktop iso (which has a 5.11 Linux kernel) and copy it into that directory
(I can provide a custom Debian build with a patched and unpatched vanilla kernel if needed)
4. Create dir for swtpm: mkdir mytpm1
5. Start swtpm with
swtpm socket \
--tpm2 \
--tpmstate dir=mytpm1 \
--ctrl type=unixio,path=mytpm1/swtpm-sock \
--log level=4 &
6. Start qemu with
qemu-system-x86_64 \
-enable-kvm \
-machine q35,smm=on \
-global driver=cfi.pflash01,property=secure,value=on \
-drive if=pflash,format=raw,unit=0,file=OVMF_CODE.fd,readonly=on \
-drive if=pflash,format=raw,unit=1,readonly=off,file=OVMF_VARS.fd \
-chardev socket,id=chrtpm,path=mytpm1/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-device tpm-crb,tpmdev=tpm0 \
-boot d \
-cdrom "ubuntu-21.04-desktop-amd64.iso" \
-m 3G \
-vga virtio
7. Start Ubuntu normally and choose "Try Ubuntu"
8. Open a Terminal and check that
"/sys/kernel/security/tpm0/binary_bios_measurements" is empty

On my OVMF boot I'm using the direct
kernel command line and I have secure boot enabled but not activated,
which is why you only see PCRs 0-7 in the log.
The Kernel here is loaded by Grub which itself is loaded by Shim. But that should not make a difference regarding the event log via ACPI right?

I've attached the event log from a Ubuntu 20.04 machine with a 5.12 patched kernel and my kernel build config.

Best regards
Thore Sommer


[PATCH v3 7/7] MiniPlatformPkg: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
---
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 +-
.../PlatformInit/PlatformInitPei/PlatformInitPreMem.inf | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 707686055c..35cbd40abb 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -94,7 +94,7 @@
#
FspWrapperPlatformLib|MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
ReportFvLib|MinPlatformPkg/PlatformInit/Library/PeiReportFvLib/PeiReportFvLib.inf
- ReportCpuHobLib|MinPlatformPkg/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
index e37bcba560..fb997838ef 100644
--- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
@@ -1,7 +1,7 @@
### @file
# Component information file for the Platform Init Pre-Memory PEI module.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -33,6 +33,7 @@
MinPlatformPkg/MinPlatformPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec

[Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ## CONSUMES
--
2.27.0


[PATCH v3 6/7] WhiskeylakeOpenBoard: Move library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 7 ++++---
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 7 ++++---
2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index fb493973e2..ee2aedd978 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the UpXtreme board.
#
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 9a1f107faf..b69cc8deb0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the WhiskeylakeURvp board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v3 5/7] KabylakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
---
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 11 ++++++++---
.../KabylakeRvp3/OpenBoardPkg.dsc | 11 ++++++++---
2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 862e6a6655..302cb679b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the GalagoPro3 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -38,7 +38,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,7 +161,11 @@
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 0b30da8f96..8523ab3f4f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the KabylakeRvp3 board.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -37,7 +37,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -201,6 +202,11 @@
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf

[LibraryClasses.common.PEIM]
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#######################################
# Platform Package
#######################################
@@ -212,7 +218,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v3 4/7] SimicsOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 77c408a326..93a7d1df55 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the X58Ich10 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,7 +42,8 @@
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE

- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include $(PROJECT)/OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -137,6 +138,11 @@
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf

+ #####################################
+ # Silicon Package
+ #####################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#####################################
# Platform Package
#####################################
@@ -145,7 +151,6 @@
!endif
TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

[LibraryClasses.common.DXE_DRIVER]

--
2.27.0


[PATCH v3 3/7] TigerlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
---
.../Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index a4265a839c..1adf634034 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -89,7 +89,6 @@

PciSegmentLib|$(PLATFORM_SI_PACKAGE)/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#
# Silicon Init Package
@@ -115,6 +114,7 @@
#
# Silicon Init Package
#
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc

#
--
2.27.0


[PATCH v3 2/7] CometlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
---
.../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk=
g.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
index 6de834565a..44a1bd54d6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file=0D
# The main build description file for the CometlakeURvp board.=0D
#=0D
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>=
=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -161,6 +161,7 @@
# Silicon Initialization Package=0D
#######################################=0D
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic=
onInitLib.inf=0D
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.=
inf=0D
=0D
#######################################=0D
# Platform Package=0D
@@ -173,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Pei=
TestPointCheckLib.inf=0D
!endif=0D
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrr=
LibNull.inf=0D
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib=
/ReportCpuHobLib.inf=0D
=0D
#######################################=0D
# Board Package=0D
--=20
2.27.0

6381 - 6400 of 80786