Date   

Re: [PATCH 3/3] OvmfPkg/PlatformPei: Mark TPM MMIO range as unencrypted for SEV

Lendacky, Thomas
 

On 4/26/21 9:21 AM, Tom Lendacky wrote:
On 4/26/21 7:07 AM, Laszlo Ersek wrote:
On 04/23/21 22:02, Tom Lendacky wrote:
On 4/23/21 12:41 PM, Tom Lendacky wrote:
On 4/23/21 8:04 AM, Laszlo Ersek wrote:
On 04/23/21 12:26, Laszlo Ersek wrote:
review#2 from scratch:

On 04/21/21 00:54, Tom Lendacky wrote:
From: Tom Lendacky <thomas.lendacky@amd.com>
...


I've had a further idea on this.

You could add an entirely new PEIM just for this. The entry point
function of the PEIM would check for SEV, decrypt the TPM range if SEV
were active, and then install gOvmfTpmMmioAccessiblePpiGuid
(unconditionally). The exit status of the PEIM would always be
EFI_ABORTED, because there would be no need to keep the PEIM resident.

The new PEIM would have a DEPEX on gEfiPeiMemoryDiscoveredPpiGuid, to
make sure that potential page table splitting for the potential MMIO
range decryption could be satisfied from permanent PEI RAM.

The new PEIM would be included in the DSC and FDF files of the usual
three OVMF platforms, and in the Bhyve platform -- dependent on the
TPM_ENABLE build flag.

There are several advantages to such a separate PEIM:

- For Bhyve, the update is minimal. Just include one line in each of the
FDF and the DSC files. No need to customize an existent
platform-specific PEIM, no code duplication between two PlatformPei modules.

- The new PEIM would depend on the TPM_ENABLE build flag, so it would
only be included in the firmware binaries if and only if Tcg2ConfigPei
were. No useless PPI installation would occur in the absence of TPM_ENABLE.

- No need to check PcdTpmBaseAddress for nullity in the new PEIM, before
the decryption, as TPM_ENABLE guarantees (on IA32/X64) that the PCD
already has the right value.

- The new logic would be properly ordered between PlatformPei and
Tcg2ConfigPei, namely due to the use of two such PPI GUIDs in DEPEXes
that actually make sense. PlatformPei -> TPM MMIO decryptor PEIM ordered
via "memory discovered" (needed for potential page table splitting), TPM
MMIO decryptor PEIM -> Tcg2ConfigPei ordered via "TPM MMIO decrypted".

You could place the new PEIM at:

OvmfPkg/Tcg/TpmMmioSevDecryptPei

If you haven't lost your patience with me yet, I'd really appreciate if
you could investigate this!
So far, this appears to be working nicely. I'm new at the whole PEIM
thing, so hopefully I haven't missed anything. I should be submitting the
patches soon for review.
So one thing I failed to do before submitting my previous patch was to
complete my testing against the IA32 and X64 combination build. In this
build, PEI is built as Ia32, and MemEncryptSevClearPageEncMask() will
return UNSUPPORTED causing an ASSERT (since I check the return code). So
there are a few options:

1. SEV works with the current encrypted mapping, it is only the SEV-ES
support that fails because of the ValidateMmioMemory() check. I can do
the mapping change just for SEV-ES since it is X64 only. This works,
because MemEncryptSevClearPageEncMask() will not return UNSUPPORTED
when running in 64-bit.
Can we really say "SEV works" though? Because, even using an X64 PEI
phase, and enabling only SEV (not SEV-ES), TPM access will be broken in
the PEI phase. Is my understanding correct?
Because the memory range is marked as MMIO, we'll take a nested page fault
(NPF). The GPA passed as part of the NPF does not include the c-bit. So we
do in fact work properly with a TPM in SEV. SEV-ES would also work
properly if the mitigation for accessing an encrypted address was removed
from the #VC handler. It is only this added mitigation to protect MMIO
that results in an issue with the TPM in PEI.
So I'm thinking that I can have TpmMmioSevDecryptPeim.c do this:

//
// If SEV or SEV-ES is active, MMIO succeeds against an encrypted physical
// address because the nested page fault (NPF) that occurs on access does not
// include the encryption bit in the guest physical address provided to the
// hypervisor.
//
// However, if SEV-ES is active, before performing the actual MMIO, an
// additional MMIO mitigation check is performed in the #VC handler to ensure
// that MMIO is being done to an unencrypted address. To prevent guest
// termination in this scenario, mark the range unencrypted ahead of access.
//
if (MemEncryptSevEsIsEnabled ()) {
// Do MemEncryptSevClearPageEncMask() ...
}

Let me submit the next version with this and see what you think.

Thanks,
Tom



I think the behavior you currently see is actually what we want, we
should double down on it -- if MemEncryptSevClearPageEncMask() fails,
report an explicit DEBUG_ERROR, and call CpuDeadLoop(). If the firmware
is built with TPM_ENABLE, and SEV is active, then an IA32 PEI phase is
simply unusable. Silently pretending that the TPM is not there, even
though it may have been configured on the QEMU command line, we just
failed to communicate with it, is not a good idea, IMO.
However, because the c-bit is not part of the NPF, we do communicate
successfully with the TPM.

So we could actually do following:
- For IA32:
- Remove the Depex on gOvmfTpmMmioAccessiblePpiGuid
- Do not add OvmfPkg/Tcg/TpmMmioSevDecryptPei/TpmMmioSevDecryptPei.inf

- For X64:
- Add the Depex on gOvmfTpmMmioAccessiblePpiGuid
- Add OvmfPkg/Tcg/TpmMmioSevDecryptPei/TpmMmioSevDecryptPei.inf

That might be confusing, though. So we could just do option #3 below.

Thanks,
Tom


This is somewhat similar IMO to the S3Verification() function in
"OvmfPkg/PlatformPei/Platform.c".

TPM_ENABLE, SEV, IA32 PEI phase: pick any two.

Thanks,
Laszlo


2. Call MemEncryptSevClearPageEncMask() for SEV or SEV-ES, but don't check
the return status.

3. Create Ia32 and X64 versions of internal functions, where the Ia32
version simply returns SUCCESS because it can't do anything and the X64
version calls MemEncryptSevClearPageEncMask(), allowing the main code
to ASSERT on any errors.

I'm leaning towards #1, because this is an SEV-ES only issue. Thoughts?

Thanks,
Tom


One thing I found is that the Bhyve package makes reference to the
OvmfPkg/Bhyve/Tcg directory, but that directory does not exist. So I don't
think that TPM enablement has been tested. I didn't update the Bhyve
support for that reason.

Thanks,
Tom

Thanks!
Laszlo


Re: [PATCH v1 06/12] ArmPkg: Add ArmPkg.ci.yaml

PierreGondois
 

Hi Sami,

I think the lists are already alphabetically ordered. I will re-order the libraries in ArmPkg.dec though.

I will remove the "eio'ed" word from the exception list in a V2.

Thanks for the review,
Pierre

On 4/22/21 11:02 AM, Sami Mujawar wrote:

Hi Pierre,

I have a few minor comments marked inline as [SAMI].

With those changed.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

*From: *Pierre.Gondois@arm.com <Pierre.Gondois@arm.com>
*Date: *Wednesday, 21 April 2021 at 13:21
*To: *devel@edk2.groups.io <devel@edk2.groups.io>, Sami Mujawar <Sami.Mujawar@arm.com>, leif@nuviainc.com <leif@nuviainc.com>, ardb+tianocore@kernel.org <ardb+tianocore@kernel.org>, sean.brogan@microsoft.com <sean.brogan@microsoft.com>, Bret.Barkelew@microsoft.com <Bret.Barkelew@microsoft.com>
*Subject: *[PATCH v1 06/12] ArmPkg: Add ArmPkg.ci.yaml

From: Pierre Gondois <Pierre.Gondois@arm.com>

Add ArmPkg.ci.yaml to configure the CI for the
ArmPkg.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
 ArmPkg/ArmPkg.ci.yaml | 222 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 222 insertions(+)
 create mode 100644 ArmPkg/ArmPkg.ci.yaml

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
new file mode 100644
index 000000000000..ba502cd647c9
--- /dev/null
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -0,0 +1,222 @@
+## @file
+# CI configuration for ArmPkg
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+    ## options defined .pytool/Plugin/LicenseCheck
+    "LicenseCheck": {
+        "IgnoreFiles": []
+    },
+
+    "EccCheck": {
+        ## Exception sample looks like below:
+        ## "ExceptionList": [
+        ##     "<ErrorID>", "<KeyWord>"
+        ## ]
+        "ExceptionList": [
+        ],
+        ## Both file path and directory path are accepted.
+        "IgnoreFiles": [
+            "Library/ArmSoftFloatLib/berkeley-softfloat-3"
+        ]
+    },
+
+    ## options defined .pytool/Plugin/CompilerPlugin
+    "CompilerPlugin": {
+        "DscPath": "ArmPkg.dsc"
+    },
+
+    ## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+    "HostUnitTestCompilerPlugin": {
+        "DscPath": "" # Don't support this test
+    },
+
+    ## options defined .pytool/Plugin/CharEncodingCheck
+    "CharEncodingCheck": {
+        "IgnoreFiles": []
+    },
+
+    ## options defined .pytool/Plugin/DependencyCheck
+    "DependencyCheck": {
+        "AcceptableDependencies": [
+            "ArmPlatformPkg/ArmPlatformPkg.dec",
+            "ArmPkg/ArmPkg.dec",
+            "EmbeddedPkg/EmbeddedPkg.dec",
+            "MdeModulePkg/MdeModulePkg.dec",
+            "MdePkg/MdePkg.dec",
+            "ShellPkg/ShellPkg.dec"

[SAMI] Can this list be sorted in alphabetical order, please?

[/SAMI]
+        ],
+        # For host based unit tests
+        "AcceptableDependencies-HOST_APPLICATION":[
+            "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+        ],
+        # For UEFI shell based apps
+        "AcceptableDependencies-UEFI_APPLICATION":[],
+        "IgnoreInf": []
+    },
+
+    ## options defined .pytool/Plugin/DscCompleteCheck
+    "DscCompleteCheck": {
+        "IgnoreInf": [],
+        "DscPath": "ArmPkg.dsc"
+    },
+
+    ## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+    "HostUnitTestDscCompleteCheck": {
+        "IgnoreInf": [""],
+        "DscPath": "" # Don't support this test
+    },
+
+    ## options defined .pytool/Plugin/GuidCheck
+    "GuidCheck": {
+        "IgnoreGuidName": [],
+        "IgnoreGuidValue": [],
+        "IgnoreFoldersAndFiles": [],
+        "IgnoreDuplicates": [],
+    },
+
+    ## options defined .pytool/Plugin/LibraryClassCheck
+    "LibraryClassCheck": {
+        "IgnoreHeaderFile": []
+    },
+
+    ## options defined .pytool/Plugin/SpellCheck
+    "SpellCheck": {
+        "AuditOnly": False,
+        "IgnoreFiles": [
+ "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
+        ],                           # use gitignore syntax to ignore errors
+                                     # in matching files
+        "ExtendWords": [
+          "api's",
+          "ackintid",

[SAMI] Can this list be sorted in alphabetical order, please?

[/SAMI]
+          "actlr",
+          "aeabi",
+          "ashldi",
+          "ashrdi",
+          "ccidx",
+          "ccsidr",
+          "clidr",
+          "clrex",
+          "clzsi",
+          "cpuactlr",
+          "csselr",
+          "ctzsi",
+          "cygdrive",
+          "cygpaths",
+          "datas",
+          "dcmpeq",
+          "dcmpge",
+          "dcmpgt",
+          "dcmple",
+          "dcmplt",
+          "ddisable",
+          "divdi",
+          "divsi",
+          "dmdepkg",
+          "drsub",
+          "eoi'ed",

[SAMI] I don’t think there is such a word. Should the original text be fixed?

[/SAMI]
+          "fcmpeq",
+          "fcmpge",
+          "fcmpgt",
+          "fcmple",
+          "fcmplt",
+          "ffreestanding",
+          "frsub",
+          "hisilicon",
+          "iccbpr",
+          "icciar",
+          "iccicr",
+          "icciidr",
+          "iccpmr",
+          "icdicer",
+          "icdicfr",
+          "icdictr",
+          "icdiser",
+          "icdisr",
+          "icdsgir",
+          "icenabler",
+          "intid",
+          "ipriority",
+          "irouter",
+          "isenabler",
+          "istatus",
+          "itargets",
+          "lable",
+          "ldivmod",
+          "ldmdb",
+          "ldmia",
+          "ldrbt",
+          "ldrex",
+          "ldrexb",
+          "ldrexd",
+          "ldrexh",
+          "ldrhbt",
+          "ldrht",
+          "ldrsb",
+          "ldrsbt",
+          "ldrsh",
+          "lshrdi",
+          "moddi",
+          "modsi",
+          "mpidr",
+          "muldi",
+          "mullu",
+          "nonshareable",
+          "nsacr",
+          "nsasedis",
+          "nuvia",
+          "oldit",
+          "readc",
+          "revsh",
+          "rfedb",
+          "sctlr",
+          "smccc",
+          "smlabb",
+          "smlabt",
+          "smlad",
+          "smladx",
+          "smlatb",
+          "smlatt",
+          "smlawb",
+          "smlawt",
+          "smlsd",
+          "smlsdx",
+          "smmla",
+          "smmlar",
+          "smmls",
+          "smmlsr",
+          "sourcery",
+          "srsdb",
+          "stmdb",
+          "stmia",
+          "strbt",
+          "strexb",
+          "strexd",
+          "strexh",
+          "strht",
+          "switchu",
+          "tpidrurw",
+          "ttbcr",
+          "typer",
+          "ucmpdi",
+          "udivdi",
+          "udivmoddi",
+          "udivsi",
+          "uefi's",
+          "uldiv",
+          "umoddi",
+          "umodsi",
+          "usada",
+          "vlpis",
+          "writec"
+        ],                          # words to extend to the dictionary for this package
+        "IgnoreStandardPaths": [    # Standard Plugin defined paths that
+            "*.asm", "*.s"          # should be ignore
+        ],
+        "AdditionalIncludePaths": [] # Additional paths to spell check
+                                     # (wildcards supported)
+    }
+}
--
2.17.1


Re: Problem: TPM 2.0 event log by OVMF is shown empty in Linux kernel versions after 5.8

Lendacky, Thomas
 

On 4/27/21 2:40 AM, Thore Sommer via groups.io wrote:

I don't confirm this.  I have Linux version 5.12.0-rc5+ installed and I
see the attached in my binary_bios_measurements (I've run it through
tpm2-eventlog so you can see the actual events).
Ok that is interesting.

Here are the steps to reproduce my findings.
Necessary tools: Build chain for edk2, swtpm 0.5.2 and qemu 5.2.0

1. Build OVMF from edk2-stable202102 with
-a X64 -a IA32 \
-b RELEASE \
-D NETWORK_IP6_ENABLE \
-D TPM_ENABLE \
Shouldn't you also have '-D TPM_CONFIG_ENABLE' ?

Thanks,
Tom

-D FD_SIZE_4MB \
-D TLS_ENABLE \
-D HTTP_BOOT_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE \
-D EXCLUDE_SHELL_FROM_FD

2. Copy OVMF_CODE.fd and OVMF_VARS.fd into an empty directory
3. Download Ubuntu 21.04 desktop iso (which has a 5.11 Linux kernel) and
copy it into that directory
(I can provide a custom Debian build with a patched and unpatched vanilla
kernel if needed)
4. Create dir for swtpm: mkdir mytpm1
5. Start swtpm with
swtpm socket \
    --tpm2 \
    --tpmstate dir=mytpm1 \
    --ctrl type=unixio,path=mytpm1/swtpm-sock \
    --log level=4 &
6. Start qemu with
qemu-system-x86_64 \
        -enable-kvm \
        -machine q35,smm=on \
        -global driver=cfi.pflash01,property=secure,value=on \
        -drive if=pflash,format=raw,unit=0,file=OVMF_CODE.fd,readonly=on \
        -drive if=pflash,format=raw,unit=1,readonly=off,file=OVMF_VARS.fd \
        -chardev socket,id=chrtpm,path=mytpm1/swtpm-sock \
        -tpmdev emulator,id=tpm0,chardev=chrtpm \
        -device tpm-crb,tpmdev=tpm0 \
        -boot d \
        -cdrom "ubuntu-21.04-desktop-amd64.iso" \
        -m 3G \
        -vga virtio
7. Start Ubuntu normally and choose "Try Ubuntu"
8. Open a Terminal and check that
"/sys/kernel/security/tpm0/binary_bios_measurements" is empty

On my OVMF boot I'm using the direct
kernel command line and I have secure boot enabled but not activated,
which is why you only see PCRs 0-7 in the log.
The Kernel here is loaded by Grub which itself is loaded by Shim. But that
should not make a difference regarding the event log via ACPI right?

I've attached the event log from a Ubuntu 20.04 machine with a 5.12
patched kernel and my kernel build config.

Best regards
Thore Sommer





Re: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

Sami Mujawar
 

Hi Rebecca,

 

I agree MdePkg/Library/BaseRngLib can be refactored to support both x86 and AArch64.

BaseRngLib would then be a RngLib instance that uses CPU instructions to provide random numbers.

 

Regards,

 

Sami Mujawar

 

From: Bret Barkelew <Bret.Barkelew@...>
Date: Monday, 26 April 2021 at 22:45
To: devel@edk2.groups.io <devel@edk2.groups.io>, rebecca@... <rebecca@...>, Sami Mujawar <Sami.Mujawar@...>, Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>, Ard Biesheuvel <Ard.Biesheuvel@...>, leif@... <leif@...>
Cc: rfc@edk2.groups.io <rfc@edk2.groups.io>, Yao, Jiewen <jiewen.yao@...>, Rahul Kumar <rahul1.kumar@...>, nd <nd@...>, Jose Marinho <Jose.Marinho@...>
Subject: RE: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

I vote the latter.

 

- Bret

 

From: Rebecca Cran via groups.io
Sent: Monday, April 26, 2021 2:29 PM
To: Sami Mujawar; devel@edk2.groups.io; Samer El-Haj-Mahmoud; Ard Biesheuvel; leif@...
Cc: rfc@edk2.groups.io; Yao, Jiewen; Rahul Kumar; nd; Jose Marinho
Subject: [EXTERNAL] Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to RngDxe

 

Hi Sami,

I've been looking through the design document again, and was wondering
if the work I previously did will just slot in?

Were you thinking the "RngLib|RNDR" would go into ArmPkg (since it's not
labeled as being in BaseRngLib)? Or would it still make sense to
refactor MdePkg/Library/BaseRngLib to support both x86 (using RDRAND)
and aarch64 (using RNDR)?

--
Rebecca Cran
 


On 4/22/21 3:30 AM, Sami Mujawar wrote:
> Hi Rebecca,
>
> I have been working on the following modules (See slide 11 in “EDKII -
> Proposed update to RNG implementation.pdf
> <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0>”):
>
>  1. TrngLib|FwTrnglib (Arm Firmware TRNG)
>  2. DrbgLib stack – with support for DrbgAlgorithmLib|CRT_DRBG &
>     AesLib|ArmAesInstructionLib.
>
> I plan to post patches for (a) in the next fortnight. Following this I
> plan to update the proposal with the interface definitions for the
> various library interfaces in the DrbgLib Stack.
>
> I have not looked at RngLib|RNDR as I believe you were interested in
> implementing the part. Kindly let me know if you plan to implement this
> and the platform you would be using for testing. It looks like the
> FVP_Base_AEMv8A-AEMv8A and the FVP-RevC models support RNDR, so these
> could be used for testing as well. Please feel free to get in touch
> should you need any help with the model parameters or if you face any
> issues.
>
> Regards,
>
> Sami Mujawar
>
> *From: *Rebecca Cran <rebecca@...>
> *Date: *Tuesday, 20 April 2021 at 21:04
> *To: *Sami Mujawar <Sami.Mujawar@...>, devel@edk2.groups.io
> <devel@edk2.groups.io>, Samer El-Haj-Mahmoud
> <Samer.El-Haj-Mahmoud@...>, Ard Biesheuvel <Ard.Biesheuvel@...>,
> leif@... <leif@...>
> *Cc: *rfc@edk2.groups.io <rfc@edk2.groups.io>, Jiewen Yao
> <jiewen.yao@...>, Rahul Kumar <rahul1.kumar@...>, nd
> <nd@...>, Jose Marinho <Jose.Marinho@...>
> *Subject: *Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to
> RngDxe
>
> Hi Sami,
>
> I was wondering if you're still collecting feedback on the design, or if
> you have a plan and schedule for the implementation?
>
> --
> Rebecca Cran
>
> On 1/15/21 7:51 PM, Sami Mujawar wrote:
>  > Hi All,
>  >
>  > I have shared some initial thoughts on the RNG implementation updates
> at
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0
> <https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Ffiles%2FDesigns%2F2021%2F0116%2FEDKII%2520-%2520Proposed%2520update%2520to%2520RNG%2520implementation.pdf&amp;data=04%7C01%7Cbret.barkelew%40microsoft.com%7C676a9101f67845dbdc8908d908fa4cd1%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637550693569385394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Q8ka83ReO2aG8yTVrgpTAVxczJVjl2JBH3ksHo2%2BSHk%3D&amp;reserved=0>
>  >
>  > Kindly let me know your feedback or if you have any queries.
>  >
>  > Regards,
>  >
>  > Sami Mujawar
>  >
>  > -----Original Message-----
>  > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> Rebecca Cran via groups.io
>  > Sent: 14 January 2021 09:05 PM
>  > To: Sami Mujawar <Sami.Mujawar@...>; devel@edk2.groups.io; Samer
> El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@...>; Ard Biesheuvel
> <Ard.Biesheuvel@...>; leif@...
>  > Cc: rfc@edk2.groups.io; Jiewen Yao <jiewen.yao@...>; Rahul
> Kumar <rahul1.kumar@...>; nd <nd@...>
>  > Subject: Re: [edk2-devel] RFC: Adding support for ARM (RNDR etc.) to
> RngDxe
>  >
>  > On 12/10/20 4:26 AM, Sami Mujawar wrote:
>  >
>  >> I am working on the TRNG FW API interface and will share more details
>  >> for the discussion soon.
>  >>
>  >> We had some thoughts about streamlining the RngDxe implementations and
>  >> would like to share some diagrams for the discussion.
>  >>
>  >> My diagrams are in Visio that I can export as JPG images. However, I am
>  >> open to switching to any other suggested tool.
>  >
>  > Hi Sami,
>  >
>  > I don't see any further discussions on this. Have you made any progress
>  > with sharing the design documents or scheduling a review?
>  >
>






 


Re: Problem: TPM 2.0 event log by OVMF is shown empty in Linux kernel versions after 5.8

Thore Sommer <public@...>
 

I don't confirm this. I have Linux version 5.12.0-rc5+ installed and I
see the attached in my binary_bios_measurements (I've run it through
tpm2-eventlog so you can see the actual events).
Ok that is interesting.

Here are the steps to reproduce my findings.
Necessary tools: Build chain for edk2, swtpm 0.5.2 and qemu 5.2.0

1. Build OVMF from edk2-stable202102 with
-a X64 -a IA32 \
-b RELEASE \
-D NETWORK_IP6_ENABLE \
-D TPM_ENABLE \
-D FD_SIZE_4MB \
-D TLS_ENABLE \
-D HTTP_BOOT_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE \
-D EXCLUDE_SHELL_FROM_FD

2. Copy OVMF_CODE.fd and OVMF_VARS.fd into an empty directory
3. Download Ubuntu 21.04 desktop iso (which has a 5.11 Linux kernel) and copy it into that directory
(I can provide a custom Debian build with a patched and unpatched vanilla kernel if needed)
4. Create dir for swtpm: mkdir mytpm1
5. Start swtpm with
swtpm socket \
--tpm2 \
--tpmstate dir=mytpm1 \
--ctrl type=unixio,path=mytpm1/swtpm-sock \
--log level=4 &
6. Start qemu with
qemu-system-x86_64 \
-enable-kvm \
-machine q35,smm=on \
-global driver=cfi.pflash01,property=secure,value=on \
-drive if=pflash,format=raw,unit=0,file=OVMF_CODE.fd,readonly=on \
-drive if=pflash,format=raw,unit=1,readonly=off,file=OVMF_VARS.fd \
-chardev socket,id=chrtpm,path=mytpm1/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-device tpm-crb,tpmdev=tpm0 \
-boot d \
-cdrom "ubuntu-21.04-desktop-amd64.iso" \
-m 3G \
-vga virtio
7. Start Ubuntu normally and choose "Try Ubuntu"
8. Open a Terminal and check that
"/sys/kernel/security/tpm0/binary_bios_measurements" is empty

On my OVMF boot I'm using the direct
kernel command line and I have secure boot enabled but not activated,
which is why you only see PCRs 0-7 in the log.
The Kernel here is loaded by Grub which itself is loaded by Shim. But that should not make a difference regarding the event log via ACPI right?

I've attached the event log from a Ubuntu 20.04 machine with a 5.12 patched kernel and my kernel build config.

Best regards
Thore Sommer


[PATCH v3 7/7] MiniPlatformPkg: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
---
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 +-
.../PlatformInit/PlatformInitPei/PlatformInitPreMem.inf | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 707686055c..35cbd40abb 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -94,7 +94,7 @@
#
FspWrapperPlatformLib|MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
ReportFvLib|MinPlatformPkg/PlatformInit/Library/PeiReportFvLib/PeiReportFvLib.inf
- ReportCpuHobLib|MinPlatformPkg/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
index e37bcba560..fb997838ef 100644
--- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
@@ -1,7 +1,7 @@
### @file
# Component information file for the Platform Init Pre-Memory PEI module.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -33,6 +33,7 @@
MinPlatformPkg/MinPlatformPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec

[Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ## CONSUMES
--
2.27.0


[PATCH v3 6/7] WhiskeylakeOpenBoard: Move library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 7 ++++---
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 7 ++++---
2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index fb493973e2..ee2aedd978 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the UpXtreme board.
#
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 9a1f107faf..b69cc8deb0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the WhiskeylakeURvp board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v3 5/7] KabylakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
---
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 11 ++++++++---
.../KabylakeRvp3/OpenBoardPkg.dsc | 11 ++++++++---
2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 862e6a6655..302cb679b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the GalagoPro3 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -38,7 +38,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,7 +161,11 @@
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 0b30da8f96..8523ab3f4f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the KabylakeRvp3 board.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -37,7 +37,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -201,6 +202,11 @@
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf

[LibraryClasses.common.PEIM]
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#######################################
# Platform Package
#######################################
@@ -212,7 +218,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v3 4/7] SimicsOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 77c408a326..93a7d1df55 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the X58Ich10 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,7 +42,8 @@
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE

- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include $(PROJECT)/OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -137,6 +138,11 @@
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf

+ #####################################
+ # Silicon Package
+ #####################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#####################################
# Platform Package
#####################################
@@ -145,7 +151,6 @@
!endif
TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

[LibraryClasses.common.DXE_DRIVER]

--
2.27.0


[PATCH v3 3/7] TigerlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
---
.../Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index a4265a839c..1adf634034 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -89,7 +89,6 @@

PciSegmentLib|$(PLATFORM_SI_PACKAGE)/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#
# Silicon Init Package
@@ -115,6 +114,7 @@
#
# Silicon Init Package
#
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc

#
--
2.27.0


[PATCH v3 2/7] CometlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
---
.../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk=
g.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
index 6de834565a..44a1bd54d6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file=0D
# The main build description file for the CometlakeURvp board.=0D
#=0D
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>=
=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -161,6 +161,7 @@
# Silicon Initialization Package=0D
#######################################=0D
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic=
onInitLib.inf=0D
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.=
inf=0D
=0D
#######################################=0D
# Platform Package=0D
@@ -173,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Pei=
TestPointCheckLib.inf=0D
!endif=0D
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrr=
LibNull.inf=0D
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib=
/ReportCpuHobLib.inf=0D
=0D
#######################################=0D
# Board Package=0D
--=20
2.27.0


[PATCH v3 1/7] IntelSiliconPkg/ReportCpuHobLib: Add ReportCpuHobLib

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3298
Add ReportCpuHobLib

Signed-off-by: SofiaX Chuang <sofiax.chuang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
.../Include/Library/ReportCpuHobLib.h | 24 +++++++++++++
.../Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 6 +++-
.../Library/ReportCpuHobLib/ReportCpuHobLib.c | 35 +++++++++++++++++++
.../ReportCpuHobLib/ReportCpuHobLib.inf | 26 ++++++++++++++
4 files changed, 90 insertions(+), 1 deletion(-)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpu=
HobLib.h
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/R=
eportCpuHobLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/R=
eportCpuHobLib.inf

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.=
h b/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.h
new file mode 100644
index 0000000000..46f502d616
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.h
@@ -0,0 +1,24 @@
+/** @file=0D
+=0D
+ Report CPU HOB library=0D
+=0D
+ This library report the CPU HOB with Physical Address bits.=0D
+=0D
+Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#ifndef _REPORT_CPU_HOB_LIB_H_=0D
+#define _REPORT_CPU_HOB_LIB_H_=0D
+=0D
+#include <PiPei.h>=0D
+#include <Uefi.h>=0D
+=0D
+VOID=0D
+EFIAPI=0D
+ReportCpuHob (=0D
+ VOID=0D
+ );=0D
+=0D
+#endif=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In=
tel/IntelSiliconPkg/IntelSiliconPkg.dec
index 4a2cbca5c1..2461ab8e06 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -3,7 +3,7 @@
#=0D
# This package provides common open source Intel silicon modules.=0D
#=0D
-# Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
##=0D
@@ -42,6 +42,10 @@
#=0D
AslUpdateLib|Include/Library/AslUpdateLib.h=0D
=0D
+ ## @libraryclass Provides services to report CPU hob=0D
+ #=0D
+ ReportCpuHobLib|Include/Library/ReportCpuHobLib.h=0D
+=0D
[Guids]=0D
## GUID for Package token space=0D
# {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCp=
uHobLib.c b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpu=
HobLib.c
new file mode 100644
index 0000000000..97cacb7110
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib=
.c
@@ -0,0 +1,35 @@
+/** @file=0D
+ Source code file for Report CPU HOB library.=0D
+=0D
+Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#include <PiPei.h>=0D
+#include <Library/BaseLib.h>=0D
+#include <Library/HobLib.h>=0D
+#include <Register/Intel/Cpuid.h>=0D
+=0D
+VOID=0D
+EFIAPI=0D
+ReportCpuHob (=0D
+ VOID=0D
+ )=0D
+{=0D
+ UINT8 PhysicalAddressBits;=0D
+ UINT32 RegEax;=0D
+=0D
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);=0D
+ if (RegEax >=3D CPUID_VIR_PHY_ADDRESS_SIZE) {=0D
+ AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &RegEax, NULL, NULL, NULL);=0D
+ PhysicalAddressBits =3D (UINT8) RegEax;=0D
+ } else {=0D
+ PhysicalAddressBits =3D 36;=0D
+ }=0D
+=0D
+ ///=0D
+ /// Create a CPU hand-off information=0D
+ ///=0D
+ BuildCpuHob (PhysicalAddressBits, 16);=0D
+}=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCp=
uHobLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportC=
puHobLib.inf
new file mode 100644
index 0000000000..1d2d6b4151
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib=
.inf
@@ -0,0 +1,26 @@
+### @file=0D
+# Component information file for the Report CPU HOB library.=0D
+#=0D
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+###=0D
+=0D
+[Defines]=0D
+ INF_VERSION =3D 0x00010005=0D
+ BASE_NAME =3D ReportCpuHobLib=0D
+ FILE_GUID =3D 0A1C9D6B-44BE-4FD7-A4A2-D0E68D436848=
=0D
+ VERSION_STRING =3D 1.0=0D
+ MODULE_TYPE =3D PEIM=0D
+ LIBRARY_CLASS =3D ReportCpuHobLib=0D
+=0D
+[LibraryClasses]=0D
+ BaseLib=0D
+ HobLib=0D
+=0D
+[Packages]=0D
+ MdePkg/MdePkg.dec=0D
+=0D
+[Sources]=0D
+ ReportCpuHobLib.c=0D
--=20
2.27.0


[PATCH v3 0/7] Move ReportCpuHobLib from MinPlatformPkg to IntelSiliconPkg

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

Move ReportCpuHobLib from MinPlatformPkg to IntelSiliconPkg

SofiaX Chuang (7):
IntelSiliconPkg/ReportCpuHobLib: Add ReportCpuHobLib
CometlakeOpenBoard: Move ReportCpuHob library path
TigerlakeOpenBoard: Move ReportCpuHob library path
SimicsOpenBoard: Move ReportCpuHob library path
KabylakeOpenBoard: Move ReportCpuHob library path
WhiskeylakeOpenBoard: Move library path
MiniPlatformPkg: Move ReportCpuHob library path

.../CometlakeURvp/OpenBoardPkg.dsc | 4 +--
.../GalagoPro3/OpenBoardPkg.dsc | 11 ++++--
.../KabylakeRvp3/OpenBoardPkg.dsc | 11 ++++--
.../Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 +-
.../PlatformInitPei/PlatformInitPreMem.inf | 3 +-
.../BoardX58Ich10/OpenBoardPkg.dsc | 11 ++++--
.../TigerlakeURvp/OpenBoardPkg.dsc | 2 +-
.../UpXtreme/OpenBoardPkg.dsc | 7 ++--
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 7 ++--
.../Include/Library/ReportCpuHobLib.h | 24 +++++++++++++
.../Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 6 +++-
.../Library/ReportCpuHobLib/ReportCpuHobLib.c | 35 +++++++++++++++++++
.../ReportCpuHobLib/ReportCpuHobLib.inf | 26 ++++++++++++++
13 files changed, 128 insertions(+), 21 deletions(-)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.h
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

--
2.27.0


[PATCH v2 7/7] MiniPlatformPkg: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
---
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 +-
.../PlatformInit/PlatformInitPei/PlatformInitPreMem.inf | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 707686055c..35cbd40abb 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -94,7 +94,7 @@
#
FspWrapperPlatformLib|MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
ReportFvLib|MinPlatformPkg/PlatformInit/Library/PeiReportFvLib/PeiReportFvLib.inf
- ReportCpuHobLib|MinPlatformPkg/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
index e37bcba560..fb997838ef 100644
--- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
@@ -1,7 +1,7 @@
### @file
# Component information file for the Platform Init Pre-Memory PEI module.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -33,6 +33,7 @@
MinPlatformPkg/MinPlatformPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec

[Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ## CONSUMES
--
2.27.0


[PATCH v2 6/7] WhiskeylakeOpenBoard: Move library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 7 ++++---
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 7 ++++---
2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index fb493973e2..ee2aedd978 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the UpXtreme board.
#
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 9a1f107faf..b69cc8deb0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the WhiskeylakeURvp board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,7 +39,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,6 +161,7 @@
# Silicon Initialization Package
#######################################
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
@@ -172,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v2 5/7] KabylakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
---
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 11 ++++++++---
.../KabylakeRvp3/OpenBoardPkg.dsc | 11 ++++++++---
2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 862e6a6655..302cb679b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the GalagoPro3 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -38,7 +38,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -160,7 +161,11 @@
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Platform Package
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 0b30da8f96..8523ab3f4f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the KabylakeRvp3 board.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -37,7 +37,8 @@
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -201,6 +202,11 @@
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf

[LibraryClasses.common.PEIM]
+ #######################################
+ # Silicon Package
+ #######################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#######################################
# Platform Package
#######################################
@@ -212,7 +218,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
!endif
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#######################################
# Board Package
--
2.27.0


[PATCH v2 4/7] SimicsOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 77c408a326..93a7d1df55 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the X58Ich10 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,7 +42,8 @@
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE

- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include $(PROJECT)/OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc

@@ -137,6 +138,11 @@
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf

+ #####################################
+ # Silicon Package
+ #####################################
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
#####################################
# Platform Package
#####################################
@@ -145,7 +151,6 @@
!endif
TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

[LibraryClasses.common.DXE_DRIVER]

--
2.27.0


[PATCH v2 3/7] TigerlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
---
.../Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index a4265a839c..1adf634034 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -89,7 +89,6 @@

PciSegmentLib|$(PLATFORM_SI_PACKAGE)/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf

#
# Silicon Init Package
@@ -115,6 +114,7 @@
#
# Silicon Init Package
#
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc

#
--
2.27.0


[PATCH v2 2/7] CometlakeOpenBoard: Move ReportCpuHob library path

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3298

Move ReportCpuHob library from MinPlatformPkg to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
---
.../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk=
g.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
index 6de834565a..44a1bd54d6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file=0D
# The main build description file for the CometlakeURvp board.=0D
#=0D
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>=
=0D
#=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
@@ -161,6 +161,7 @@
# Silicon Initialization Package=0D
#######################################=0D
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic=
onInitLib.inf=0D
+ ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.=
inf=0D
=0D
#######################################=0D
# Platform Package=0D
@@ -173,7 +174,6 @@
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Pei=
TestPointCheckLib.inf=0D
!endif=0D
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrr=
LibNull.inf=0D
- ReportCpuHobLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/ReportCpuHobLib=
/ReportCpuHobLib.inf=0D
=0D
#######################################=0D
# Board Package=0D
--=20
2.27.0


[PATCH v2 1/7] IntelSiliconPkg/ReportCpuHobLib: Add ReportCpuHobLib

sofiax.chuang@...
 

From: SofiaX Chuang <sofiax.chuang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3298
Add ReportCpuHobLib

Signed-off-by: SofiaX Chuang <sofiax.chuang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
.../Include/Library/ReportCpuHobLib.h | 24 +++++++++++++
.../Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 6 +++-
.../Library/ReportCpuHobLib/ReportCpuHobLib.c | 35 +++++++++++++++++++
.../ReportCpuHobLib/ReportCpuHobLib.inf | 26 ++++++++++++++
4 files changed, 90 insertions(+), 1 deletion(-)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpu=
HobLib.h
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/R=
eportCpuHobLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/R=
eportCpuHobLib.inf

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.=
h b/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.h
new file mode 100644
index 0000000000..46f502d616
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ReportCpuHobLib.h
@@ -0,0 +1,24 @@
+/** @file=0D
+=0D
+ Report CPU HOB library=0D
+=0D
+ This library report the CPU HOB with Physical Address bits.=0D
+=0D
+Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#ifndef _REPORT_CPU_HOB_LIB_H_=0D
+#define _REPORT_CPU_HOB_LIB_H_=0D
+=0D
+#include <PiPei.h>=0D
+#include <Uefi.h>=0D
+=0D
+VOID=0D
+EFIAPI=0D
+ReportCpuHob (=0D
+ VOID=0D
+ );=0D
+=0D
+#endif=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In=
tel/IntelSiliconPkg/IntelSiliconPkg.dec
index 4a2cbca5c1..2461ab8e06 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -3,7 +3,7 @@
#=0D
# This package provides common open source Intel silicon modules.=0D
#=0D
-# Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>=0D
+# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>=0D
# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
#=0D
##=0D
@@ -42,6 +42,10 @@
#=0D
AslUpdateLib|Include/Library/AslUpdateLib.h=0D
=0D
+ ## @libraryclass Provides services to report CPU hob=0D
+ #=0D
+ ReportCpuHobLib|Include/Library/ReportCpuHobLib.h=0D
+=0D
[Guids]=0D
## GUID for Package token space=0D
# {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCp=
uHobLib.c b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpu=
HobLib.c
new file mode 100644
index 0000000000..97cacb7110
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib=
.c
@@ -0,0 +1,35 @@
+/** @file=0D
+ Source code file for Report CPU HOB library.=0D
+=0D
+Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+=0D
+**/=0D
+=0D
+#include <PiPei.h>=0D
+#include <Library/BaseLib.h>=0D
+#include <Library/HobLib.h>=0D
+#include <Register/Intel/Cpuid.h>=0D
+=0D
+VOID=0D
+EFIAPI=0D
+ReportCpuHob (=0D
+ VOID=0D
+ )=0D
+{=0D
+ UINT8 PhysicalAddressBits;=0D
+ UINT32 RegEax;=0D
+=0D
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);=0D
+ if (RegEax >=3D CPUID_VIR_PHY_ADDRESS_SIZE) {=0D
+ AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &RegEax, NULL, NULL, NULL);=0D
+ PhysicalAddressBits =3D (UINT8) RegEax;=0D
+ } else {=0D
+ PhysicalAddressBits =3D 36;=0D
+ }=0D
+=0D
+ ///=0D
+ /// Create a CPU hand-off information=0D
+ ///=0D
+ BuildCpuHob (PhysicalAddressBits, 16);=0D
+}=0D
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCp=
uHobLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportC=
puHobLib.inf
new file mode 100644
index 0000000000..1d2d6b4151
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib=
.inf
@@ -0,0 +1,26 @@
+### @file=0D
+# Component information file for the Report CPU HOB library.=0D
+#=0D
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>=0D
+#=0D
+# SPDX-License-Identifier: BSD-2-Clause-Patent=0D
+#=0D
+###=0D
+=0D
+[Defines]=0D
+ INF_VERSION =3D 0x00010005=0D
+ BASE_NAME =3D ReportCpuHobLib=0D
+ FILE_GUID =3D 0A1C9D6B-44BE-4FD7-A4A2-D0E68D436848=
=0D
+ VERSION_STRING =3D 1.0=0D
+ MODULE_TYPE =3D PEIM=0D
+ LIBRARY_CLASS =3D ReportCpuHobLib=0D
+=0D
+[LibraryClasses]=0D
+ BaseLib=0D
+ HobLib=0D
+=0D
+[Packages]=0D
+ MdePkg/MdePkg.dec=0D
+=0D
+[Sources]=0D
+ ReportCpuHobLib.c=0D
--=20
2.27.0

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