[PATCH v6 06/11] ArmVirtPkg/FdtPciHostBridgeLib: Refactor init/uninit of root bridge
Jiahui Cen
Rebase ArmVirtPkg/FdtPciHostBridgeLib to the new
PciHostBridgeUtilityInitRootBridge()/PciHostBridgeUtilityUninitRootBridge() utility functions. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Laszlo Ersek <lersek@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Cc: Leif Lindholm <leif@...> Signed-off-by: Jiahui Cen <cenjiahui@...> Signed-off-by: Yubo Miao <miaoyubo@...> --- ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf | 1 + ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 124 ++++++++++---------- 2 files changed, 61 insertions(+), 64 deletions(-) diff --git a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf index 01d39626d14c..b813a0851d2a 100644 --- a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf +++ b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf @@ -34,6 +34,7 @@ [Packages] OvmfPkg/OvmfPkg.dec [LibraryClasses] + BaseMemoryLib DebugLib DevicePathLib DxeServicesTableLib diff --git a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c index d554479bf0de..3ec7992b6331 100644 --- a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c +++ b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c @@ -7,6 +7,7 @@ **/ #include <PiDxe.h> +#include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/DevicePathLib.h> #include <Library/DxeServicesTableLib.h> @@ -20,37 +21,6 @@ #include <Protocol/PciRootBridgeIo.h> #include <Protocol/PciHostBridgeResourceAllocation.h> -#pragma pack(1) -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; -#pragma pack () - -STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = { - { - { - ACPI_DEVICE_PATH, - ACPI_DP, - { - (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)), - (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8) - } - }, - EISA_PNP_ID(0x0A03), - 0 - }, - - { - END_DEVICE_PATH_TYPE, - END_ENTIRE_DEVICE_PATH_SUBTYPE, - { - END_DEVICE_PATH_LENGTH, - 0 - } - } -}; - // // We expect the "ranges" property of "pci-host-ecam-generic" to consist of // records like this. @@ -319,11 +289,18 @@ PciHostBridgeGetRootBridges ( UINTN *Count ) { - UINT64 IoBase, IoSize; - UINT64 Mmio32Base, Mmio32Size; - UINT64 Mmio64Base, Mmio64Size; - UINT32 BusMin, BusMax; - EFI_STATUS Status; + UINT64 IoBase, IoSize; + UINT64 Mmio32Base, Mmio32Size; + UINT64 Mmio64Base, Mmio64Size; + UINT32 BusMin, BusMax; + EFI_STATUS Status; + UINT64 Attributes; + UINT64 AllocationAttributes; + PCI_ROOT_BRIDGE_APERTURE Io; + PCI_ROOT_BRIDGE_APERTURE Mem; + PCI_ROOT_BRIDGE_APERTURE MemAbove4G; + PCI_ROOT_BRIDGE_APERTURE PMem; + PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; if (PcdGet64 (PcdPciExpressBaseAddress) == 0) { DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__)); @@ -341,33 +318,29 @@ PciHostBridgeGetRootBridges ( return NULL; } - *Count = 1; + ZeroMem (&Io, sizeof (Io)); + ZeroMem (&Mem, sizeof (Mem)); + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); + ZeroMem (&PMem, sizeof (PMem)); + ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G)); - mRootBridge.Segment = 0; - mRootBridge.Supports = EFI_PCI_ATTRIBUTE_ISA_IO_16 | - EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | - EFI_PCI_ATTRIBUTE_VGA_IO_16 | - EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16; - mRootBridge.Attributes = mRootBridge.Supports; + Attributes = EFI_PCI_ATTRIBUTE_ISA_IO_16 | + EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | + EFI_PCI_ATTRIBUTE_VGA_IO_16 | + EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16; - mRootBridge.DmaAbove4G = TRUE; - mRootBridge.NoExtendedConfigSpace = FALSE; - mRootBridge.ResourceAssigned = FALSE; + AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM; - mRootBridge.AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM; - - mRootBridge.Bus.Base = BusMin; - mRootBridge.Bus.Limit = BusMax; - mRootBridge.Io.Base = IoBase; - mRootBridge.Io.Limit = IoBase + IoSize - 1; - mRootBridge.Mem.Base = Mmio32Base; - mRootBridge.Mem.Limit = Mmio32Base + Mmio32Size - 1; + Io.Base = IoBase; + Io.Limit = IoBase + IoSize - 1; + Mem.Base = Mmio32Base; + Mem.Limit = Mmio32Base + Mmio32Size - 1; if (sizeof (UINTN) == sizeof (UINT64)) { - mRootBridge.MemAbove4G.Base = Mmio64Base; - mRootBridge.MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1; + MemAbove4G.Base = Mmio64Base; + MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1; if (Mmio64Size > 0) { - mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE; + AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE; } } else { // @@ -376,19 +349,41 @@ PciHostBridgeGetRootBridges ( // BARs unless they are allocated below 4 GB. So ignore the range above // 4 GB in this case. // - mRootBridge.MemAbove4G.Base = MAX_UINT64; - mRootBridge.MemAbove4G.Limit = 0; + MemAbove4G.Base = MAX_UINT64; + MemAbove4G.Limit = 0; } // // No separate ranges for prefetchable and non-prefetchable BARs // - mRootBridge.PMem.Base = MAX_UINT64; - mRootBridge.PMem.Limit = 0; - mRootBridge.PMemAbove4G.Base = MAX_UINT64; - mRootBridge.PMemAbove4G.Limit = 0; + PMem.Base = MAX_UINT64; + PMem.Limit = 0; + PMemAbove4G.Base = MAX_UINT64; + PMemAbove4G.Limit = 0; - mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath; + Status = PciHostBridgeUtilityInitRootBridge ( + Attributes, + Attributes, + AllocationAttributes, + TRUE, + FALSE, + BusMin, + BusMax, + &Io, + &Mem, + &MemAbove4G, + &PMem, + &PMemAbove4G, + &mRootBridge + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: failed to initialize PCI host bridge: %r\n", + __FUNCTION__, Status)); + *Count = 0; + return NULL; + } + + *Count = 1; return &mRootBridge; } @@ -408,6 +403,7 @@ PciHostBridgeFreeRootBridges ( ) { ASSERT (Count == 1); + PciHostBridgeUtilityUninitRootBridge (Bridges); } /** -- 2.29.2
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[PATCH v6 05/11] OvmfPkg/PciHostBridgeUtilityLib: Extend parameters of InitRootBridge()
Jiahui Cen
Extend parameter list of PciHostBridgeUtilityInitRootBridge() with
DmaAbove4G and NoExtendedConfigSpace to prepare for sharing with ArmVirtPkg. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@...> Cc: Laszlo Ersek <lersek@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Cc: Anthony Perard <anthony.perard@...> Cc: Julien Grall <julien@...> Signed-off-by: Jiahui Cen <cenjiahui@...> Signed-off-by: Yubo Miao <miaoyubo@...> --- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 1 + OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf | 4 -- OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h | 56 +++++++++-------- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 5 ++ OvmfPkg/Library/PciHostBridgeLib/XenSupport.c | 1 + OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c | 63 +++++++++++--------- 6 files changed, 73 insertions(+), 57 deletions(-) diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf index 7944f94b7743..72458262cb42 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf @@ -50,4 +50,5 @@ [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf index e3d0a3740952..4d6764b702f4 100644 --- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf +++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf @@ -39,7 +39,3 @@ [LibraryClasses] DebugLib DevicePathLib MemoryAllocationLib - PcdLib - -[Pcd] - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId diff --git a/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h b/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h index 8a1ddc2f5e02..a44ad5034520 100644 --- a/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h +++ b/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h @@ -20,43 +20,49 @@ /** Utility function to initialize a PCI_ROOT_BRIDGE structure. - @param[in] Supports Supported attributes. + @param[in] Supports Supported attributes. - @param[in] Attributes Initial attributes. + @param[in] Attributes Initial attributes. - @param[in] AllocAttributes Allocation attributes. + @param[in] AllocAttributes Allocation attributes. - @param[in] RootBusNumber The bus number to store in RootBus. + @param[in] DmaAbove4G DMA above 4GB memory. - @param[in] MaxSubBusNumber The inclusive maximum bus number that can be - assigned to any subordinate bus found behind any - PCI bridge hanging off this root bus. + @param[in] NoExtendedConfigSpace No Extended Config Space. - The caller is repsonsible for ensuring that - RootBusNumber <= MaxSubBusNumber. If - RootBusNumber equals MaxSubBusNumber, then the - root bus has no room for subordinate buses. + @param[in] RootBusNumber The bus number to store in RootBus. - @param[in] Io IO aperture. + @param[in] MaxSubBusNumber The inclusive maximum bus number that can + be assigned to any subordinate bus found + behind any PCI bridge hanging off this + root bus. - @param[in] Mem MMIO aperture. + The caller is repsonsible for ensuring + that RootBusNumber <= MaxSubBusNumber. If + RootBusNumber equals MaxSubBusNumber, then + the root bus has no room for subordinate + buses. - @param[in] MemAbove4G MMIO aperture above 4G. + @param[in] Io IO aperture. - @param[in] PMem Prefetchable MMIO aperture. + @param[in] Mem MMIO aperture. - @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. + @param[in] MemAbove4G MMIO aperture above 4G. - @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the - caller) that should be filled in by this - function. + @param[in] PMem Prefetchable MMIO aperture. - @retval EFI_SUCCESS Initialization successful. A device path - consisting of an ACPI device path node, with - UID = RootBusNumber, has been allocated and - linked into RootBus. + @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. - @retval EFI_OUT_OF_RESOURCES Memory allocation failed. + @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated + by the caller) that should be filled in by + this function. + + @retval EFI_SUCCESS Initialization successful. A device path + consisting of an ACPI device path node, + with UID = RootBusNumber, has been + allocated and linked into RootBus. + + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. **/ EFI_STATUS EFIAPI @@ -64,6 +70,8 @@ PciHostBridgeUtilityInitRootBridge ( IN UINT64 Supports, IN UINT64 Attributes, IN UINT64 AllocAttributes, + IN BOOLEAN DmaAbove4G, + IN BOOLEAN NoExtendedConfigSpace, IN UINT8 RootBusNumber, IN UINT8 MaxSubBusNumber, IN PCI_ROOT_BRIDGE_APERTURE *Io, diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index 07fa98110e98..8758d7c12bf0 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -10,6 +10,7 @@ #include <PiDxe.h> #include <IndustryStandard/Pci.h> +#include <IndustryStandard/Q35MchIch9.h> #include <Protocol/PciHostBridgeResourceAllocation.h> #include <Protocol/PciRootBridgeIo.h> @@ -151,6 +152,8 @@ PciHostBridgeGetRootBridges ( Attributes, Attributes, AllocationAttributes, + FALSE, + PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID, (UINT8) LastRootBridgeNumber, (UINT8) (RootBridgeNumber - 1), &Io, @@ -176,6 +179,8 @@ PciHostBridgeGetRootBridges ( Attributes, Attributes, AllocationAttributes, + FALSE, + PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID, (UINT8) LastRootBridgeNumber, PCI_MAX_BUS, &Io, diff --git a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c index 5dfeba0e6e23..9ef39f01821b 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c +++ b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c @@ -456,6 +456,7 @@ ScanForRootBridges ( ASSERT (RootBridges != NULL); PciHostBridgeUtilityInitRootBridge ( Attributes, Attributes, 0, + FALSE, PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID, (UINT8) PrimaryBus, (UINT8) SubBus, &Io, &Mem, &MemAbove4G, &mNonExistAperture, &mNonExistAperture, &RootBridges[*NumberOfRootBridges] diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c index 92b42566e5f8..bed2d87ea89c 100644 --- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c +++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c @@ -11,12 +11,10 @@ **/ #include <IndustryStandard/Acpi10.h> -#include <IndustryStandard/Q35MchIch9.h> #include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/DevicePathLib.h> #include <Library/MemoryAllocationLib.h> -#include <Library/PcdLib.h> #include <Library/PciHostBridgeUtilityLib.h> @@ -64,43 +62,49 @@ OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = { /** Utility function to initialize a PCI_ROOT_BRIDGE structure. - @param[in] Supports Supported attributes. + @param[in] Supports Supported attributes. - @param[in] Attributes Initial attributes. + @param[in] Attributes Initial attributes. - @param[in] AllocAttributes Allocation attributes. + @param[in] AllocAttributes Allocation attributes. - @param[in] RootBusNumber The bus number to store in RootBus. + @param[in] DmaAbove4G DMA above 4GB memory. - @param[in] MaxSubBusNumber The inclusive maximum bus number that can be - assigned to any subordinate bus found behind any - PCI bridge hanging off this root bus. + @param[in] NoExtendedConfigSpace No Extended Config Space. - The caller is repsonsible for ensuring that - RootBusNumber <= MaxSubBusNumber. If - RootBusNumber equals MaxSubBusNumber, then the - root bus has no room for subordinate buses. + @param[in] RootBusNumber The bus number to store in RootBus. - @param[in] Io IO aperture. + @param[in] MaxSubBusNumber The inclusive maximum bus number that can + be assigned to any subordinate bus found + behind any PCI bridge hanging off this + root bus. - @param[in] Mem MMIO aperture. + The caller is repsonsible for ensuring + that RootBusNumber <= MaxSubBusNumber. If + RootBusNumber equals MaxSubBusNumber, then + the root bus has no room for subordinate + buses. - @param[in] MemAbove4G MMIO aperture above 4G. + @param[in] Io IO aperture. - @param[in] PMem Prefetchable MMIO aperture. + @param[in] Mem MMIO aperture. - @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. + @param[in] MemAbove4G MMIO aperture above 4G. - @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the - caller) that should be filled in by this - function. + @param[in] PMem Prefetchable MMIO aperture. - @retval EFI_SUCCESS Initialization successful. A device path - consisting of an ACPI device path node, with - UID = RootBusNumber, has been allocated and - linked into RootBus. + @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. - @retval EFI_OUT_OF_RESOURCES Memory allocation failed. + @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated + by the caller) that should be filled in by + this function. + + @retval EFI_SUCCESS Initialization successful. A device path + consisting of an ACPI device path node, + with UID = RootBusNumber, has been + allocated and linked into RootBus. + + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. **/ EFI_STATUS EFIAPI @@ -108,6 +112,8 @@ PciHostBridgeUtilityInitRootBridge ( IN UINT64 Supports, IN UINT64 Attributes, IN UINT64 AllocAttributes, + IN BOOLEAN DmaAbove4G, + IN BOOLEAN NoExtendedConfigSpace, IN UINT8 RootBusNumber, IN UINT8 MaxSubBusNumber, IN PCI_ROOT_BRIDGE_APERTURE *Io, @@ -130,7 +136,7 @@ PciHostBridgeUtilityInitRootBridge ( RootBus->Supports = Supports; RootBus->Attributes = Attributes; - RootBus->DmaAbove4G = FALSE; + RootBus->DmaAbove4G = DmaAbove4G; RootBus->AllocationAttributes = AllocAttributes; RootBus->Bus.Base = RootBusNumber; @@ -141,8 +147,7 @@ PciHostBridgeUtilityInitRootBridge ( CopyMem (&RootBus->PMem, PMem, sizeof (*PMem)); CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G)); - RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) != - INTEL_Q35_MCH_DEVICE_ID); + RootBus->NoExtendedConfigSpace = NoExtendedConfigSpace; DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate, &mRootBridgeDevicePathTemplate); -- 2.29.2
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[PATCH v6 03/11] OvmfPkg/PciHostBridgeLib: List missing PcdLib dependency
Jiahui Cen
OvmfPkg/PciHostBridgeLib instance fails to list its PcdLib dependency,
both between the #include directives, and in the INF file. So let's list the dependency. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@...> Cc: Laszlo Ersek <lersek@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Cc: Anthony Perard <anthony.perard@...> Cc: Julien Grall <julien@...> Signed-off-by: Jiahui Cen <cenjiahui@...> --- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 1 + OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 1 + OvmfPkg/Library/PciHostBridgeLib/XenSupport.c | 1 + 3 files changed, 3 insertions(+) diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf index 4c56f3c90b3b..cec3f1631a72 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf @@ -39,6 +39,7 @@ [LibraryClasses] DebugLib DevicePathLib MemoryAllocationLib + PcdLib PciHostBridgeUtilityLib PciLib QemuFwCfgLib diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index 4a176347fd49..bf32455b9f0d 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -19,6 +19,7 @@ #include <Library/DebugLib.h> #include <Library/DevicePathLib.h> #include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> #include <Library/PciHostBridgeLib.h> #include <Library/PciHostBridgeUtilityLib.h> #include <Library/PciLib.h> diff --git a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c index e161f14375ca..95ed0a280b9b 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c +++ b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c @@ -17,6 +17,7 @@ #include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> #include <Library/PciHostBridgeLib.h> #include <Library/PciLib.h> #include "PciHostBridge.h" -- 2.29.2
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[PATCH v6 00/11] Add extra pci roots support for Arm
Jiahui Cen
v5->v6:
* Annotate library functions with EFIAPI, IN/OUT, @param[in]/[out]. * Split BusMin/BusMax addtion in PciHostBridgeUtilityGetRootBridges() into a separate patch [09/11]. * Add more detailed commit message for patch [10/11]. v4->v5: * Revert some risky renames. * Explicitly list PcdLib dependency. * Fix issues reported by PatchCheck.py. v3->v4: * Refactor InitRootBridges/UninitRootBridges/GetRootBridges/FreeRootBridges. * Fix library dependencies. v2->v3: * Rename utility functions under the PciHostBridgeUtilityLib namespace. * Remove some unused Library dependencies. * Sort the Include headers. v1->v2: * Separated into four patches. * Factor the same logic parts into a new library. v4: https://edk2.groups.io/g/devel/message/70147 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 QEMU: https://lore.kernel.org/qemu-devel/20201119014841.7298-1-cenjiahui@huawei.com/ This patch series adds support for extra pci roots for ARM. In order to avoid duplicated codes, we introduce a new library PciHostBridgeUtilityLib which extracts common interfaces from OvmfPkg/PciHostBridgeLib. It provides conflicts informing and extra pci roots scanning. Using the utility lib, the uefi could scan for extra root buses and recognize multiple roots for ARM. Cc: Jordan Justen <jordan.l.justen@...> Cc: Laszlo Ersek <lersek@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Cc: Rebecca Cran <rebecca@...> Cc: Peter Grehan <grehan@...> Cc: Anthony Perard <anthony.perard@...> Cc: Julien Grall <julien@...> Cc: Leif Lindholm <leif@...> Cc: Sami Mujawar <sami.mujawar@...> Signed-off-by: Jiahui Cen <cenjiahui@...> Signed-off-by: Yubo Miao <miaoyubo@...> Jiahui Cen (11): OvmfPkg: Introduce PciHostBridgeUtilityLib class ArmVirtPkg: Refactor with PciHostBridgeUtilityLib OvmfPkg/PciHostBridgeLib: List missing PcdLib dependency OvmfPkg/PciHostBridgeLib: Extract InitRootBridge() / UninitRootBridge() OvmfPkg/PciHostBridgeUtilityLib: Extend parameters of InitRootBridge() ArmVirtPkg/FdtPciHostBridgeLib: Refactor init/uninit of root bridge OvmfPkg/PciHostBridgeLib: Extract GetRootBridges() / FreeRootBridges() OvmfPkg/PciHostBridgeUtilityLib: Extend parameter list of GetRootBridges OvmfPkg/PciHostBridgeUtilityLib: Extend GetRootBridges() with BusMin/BusMax ArmVirtPkg/FdtPciHostBridgeLib: Add extra pci root buses support ArmVirtPkg/ArmVirtQemu: Add support for HotPlug OvmfPkg/OvmfPkg.dec | 4 + ArmVirtPkg/ArmVirtKvmTool.dsc | 1 + ArmVirtPkg/ArmVirtQemu.dsc | 2 + ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 + OvmfPkg/AmdSev/AmdSevX64.dsc | 1 + OvmfPkg/Bhyve/BhyveX64.dsc | 1 + OvmfPkg/OvmfPkgIa32.dsc | 1 + OvmfPkg/OvmfPkgIa32X64.dsc | 1 + OvmfPkg/OvmfPkgX64.dsc | 1 + OvmfPkg/OvmfXen.dsc | 1 + ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf | 3 + OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 4 +- OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf | 43 +++ OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h | 185 +++++++++++ OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h | 56 ---- ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 164 ++++------ OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 324 +------------------- OvmfPkg/Library/PciHostBridgeLib/XenSupport.c | 5 +- OvmfPkg/Library/{PciHostBridgeLib/PciHostBridgeLib.c => PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c} | 281 +++++++++-------- ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 1 + 20 files changed, 467 insertions(+), 614 deletions(-) create mode 100644 OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf create mode 100644 OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h copy OvmfPkg/Library/{PciHostBridgeLib/PciHostBridgeLib.c => PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c} (50%) -- 2.29.2
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[PATCH v6 04/11] OvmfPkg/PciHostBridgeLib: Extract InitRootBridge() / UninitRootBridge()
Jiahui Cen
Extract InitRootBridge() / UninitRootBridge() to PciHostBridgeUtilityLib
as common utility functions. No change of functionality. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@...> Cc: Laszlo Ersek <lersek@...> Cc: Ard Biesheuvel <ard.biesheuvel@...> Cc: Anthony Perard <anthony.perard@...> Cc: Julien Grall <julien@...> Signed-off-by: Jiahui Cen <cenjiahui@...> Signed-off-by: Yubo Miao <miaoyubo@...> --- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 2 - OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf | 8 + OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h | 77 ++++++++++ OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h | 56 ------- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 158 +------------------- OvmfPkg/Library/PciHostBridgeLib/XenSupport.c | 3 +- OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c | 158 ++++++++++++++++++++ 7 files changed, 249 insertions(+), 213 deletions(-) diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf index cec3f1631a72..7944f94b7743 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf @@ -37,7 +37,6 @@ [Packages] [LibraryClasses] BaseMemoryLib DebugLib - DevicePathLib MemoryAllocationLib PcdLib PciHostBridgeUtilityLib @@ -51,5 +50,4 @@ [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf index 1ba8ec3e03c7..e3d0a3740952 100644 --- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf +++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf @@ -30,8 +30,16 @@ [Sources] PciHostBridgeUtilityLib.c [Packages] + MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec [LibraryClasses] + BaseMemoryLib DebugLib + DevicePathLib + MemoryAllocationLib + PcdLib + +[Pcd] + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId diff --git a/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h b/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h index 5ea25ed2f4f4..8a1ddc2f5e02 100644 --- a/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h +++ b/OvmfPkg/Include/Library/PciHostBridgeUtilityLib.h @@ -14,6 +14,83 @@ #define __PCI_HOST_BRIDGE_UTILITY_LIB_H__ +#include <Library/PciHostBridgeLib.h> + + +/** + Utility function to initialize a PCI_ROOT_BRIDGE structure. + + @param[in] Supports Supported attributes. + + @param[in] Attributes Initial attributes. + + @param[in] AllocAttributes Allocation attributes. + + @param[in] RootBusNumber The bus number to store in RootBus. + + @param[in] MaxSubBusNumber The inclusive maximum bus number that can be + assigned to any subordinate bus found behind any + PCI bridge hanging off this root bus. + + The caller is repsonsible for ensuring that + RootBusNumber <= MaxSubBusNumber. If + RootBusNumber equals MaxSubBusNumber, then the + root bus has no room for subordinate buses. + + @param[in] Io IO aperture. + + @param[in] Mem MMIO aperture. + + @param[in] MemAbove4G MMIO aperture above 4G. + + @param[in] PMem Prefetchable MMIO aperture. + + @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. + + @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the + caller) that should be filled in by this + function. + + @retval EFI_SUCCESS Initialization successful. A device path + consisting of an ACPI device path node, with + UID = RootBusNumber, has been allocated and + linked into RootBus. + + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. +**/ +EFI_STATUS +EFIAPI +PciHostBridgeUtilityInitRootBridge ( + IN UINT64 Supports, + IN UINT64 Attributes, + IN UINT64 AllocAttributes, + IN UINT8 RootBusNumber, + IN UINT8 MaxSubBusNumber, + IN PCI_ROOT_BRIDGE_APERTURE *Io, + IN PCI_ROOT_BRIDGE_APERTURE *Mem, + IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G, + IN PCI_ROOT_BRIDGE_APERTURE *PMem, + IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G, + OUT PCI_ROOT_BRIDGE *RootBus + ); + + +/** + Utility function to uninitialize a PCI_ROOT_BRIDGE structure set up with + PciHostBridgeUtilityInitRootBridge(). + + @param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and + initialized with PciHostBridgeUtilityInitRootBridge(), + that should be uninitialized. This function doesn't free + RootBus. +**/ +VOID +EFIAPI +PciHostBridgeUtilityUninitRootBridge ( + IN PCI_ROOT_BRIDGE *RootBus + ); + + /** Utility function to inform the platform that the resource conflict happens. diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h index 134d7411214d..a2e4d8696281 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridge.h @@ -11,59 +11,3 @@ PCI_ROOT_BRIDGE * ScanForRootBridges ( UINTN *NumberOfRootBridges ); - -/** - Initialize a PCI_ROOT_BRIDGE structure. - - @param[in] Supports Supported attributes. - - @param[in] Attributes Initial attributes. - - @param[in] AllocAttributes Allocation attributes. - - @param[in] RootBusNumber The bus number to store in RootBus. - - @param[in] MaxSubBusNumber The inclusive maximum bus number that can be - assigned to any subordinate bus found behind any - PCI bridge hanging off this root bus. - - The caller is repsonsible for ensuring that - RootBusNumber <= MaxSubBusNumber. If - RootBusNumber equals MaxSubBusNumber, then the - root bus has no room for subordinate buses. - - @param[in] Io IO aperture. - - @param[in] Mem MMIO aperture. - - @param[in] MemAbove4G MMIO aperture above 4G. - - @param[in] PMem Prefetchable MMIO aperture. - - @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. - - @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the - caller) that should be filled in by this - function. - - @retval EFI_SUCCESS Initialization successful. A device path - consisting of an ACPI device path node, with - UID = RootBusNumber, has been allocated and - linked into RootBus. - - @retval EFI_OUT_OF_RESOURCES Memory allocation failed. -**/ -EFI_STATUS -InitRootBridge ( - IN UINT64 Supports, - IN UINT64 Attributes, - IN UINT64 AllocAttributes, - IN UINT8 RootBusNumber, - IN UINT8 MaxSubBusNumber, - IN PCI_ROOT_BRIDGE_APERTURE *Io, - IN PCI_ROOT_BRIDGE_APERTURE *Mem, - IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G, - IN PCI_ROOT_BRIDGE_APERTURE *PMem, - IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G, - OUT PCI_ROOT_BRIDGE *RootBus - ); diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index bf32455b9f0d..07fa98110e98 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -10,14 +10,12 @@ #include <PiDxe.h> #include <IndustryStandard/Pci.h> -#include <IndustryStandard/Q35MchIch9.h> #include <Protocol/PciHostBridgeResourceAllocation.h> #include <Protocol/PciRootBridgeIo.h> #include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> -#include <Library/DevicePathLib.h> #include <Library/MemoryAllocationLib.h> #include <Library/PcdLib.h> #include <Library/PciHostBridgeLib.h> @@ -27,156 +25,8 @@ #include "PciHostBridge.h" -#pragma pack(1) -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH; -#pragma pack () - - -STATIC -CONST -OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = { - { - { - ACPI_DEVICE_PATH, - ACPI_DP, - { - (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)), - (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8) - } - }, - EISA_PNP_ID(0x0A03), // HID - 0 // UID - }, - - { - END_DEVICE_PATH_TYPE, - END_ENTIRE_DEVICE_PATH_SUBTYPE, - { - END_DEVICE_PATH_LENGTH, - 0 - } - } -}; - STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 }; -/** - Initialize a PCI_ROOT_BRIDGE structure. - - @param[in] Supports Supported attributes. - - @param[in] Attributes Initial attributes. - - @param[in] AllocAttributes Allocation attributes. - - @param[in] RootBusNumber The bus number to store in RootBus. - - @param[in] MaxSubBusNumber The inclusive maximum bus number that can be - assigned to any subordinate bus found behind any - PCI bridge hanging off this root bus. - - The caller is repsonsible for ensuring that - RootBusNumber <= MaxSubBusNumber. If - RootBusNumber equals MaxSubBusNumber, then the - root bus has no room for subordinate buses. - - @param[in] Io IO aperture. - - @param[in] Mem MMIO aperture. - - @param[in] MemAbove4G MMIO aperture above 4G. - - @param[in] PMem Prefetchable MMIO aperture. - - @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. - - @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the - caller) that should be filled in by this - function. - - @retval EFI_SUCCESS Initialization successful. A device path - consisting of an ACPI device path node, with - UID = RootBusNumber, has been allocated and - linked into RootBus. - - @retval EFI_OUT_OF_RESOURCES Memory allocation failed. -**/ -EFI_STATUS -InitRootBridge ( - IN UINT64 Supports, - IN UINT64 Attributes, - IN UINT64 AllocAttributes, - IN UINT8 RootBusNumber, - IN UINT8 MaxSubBusNumber, - IN PCI_ROOT_BRIDGE_APERTURE *Io, - IN PCI_ROOT_BRIDGE_APERTURE *Mem, - IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G, - IN PCI_ROOT_BRIDGE_APERTURE *PMem, - IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G, - OUT PCI_ROOT_BRIDGE *RootBus - ) -{ - OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath; - - // - // Be safe if other fields are added to PCI_ROOT_BRIDGE later. - // - ZeroMem (RootBus, sizeof *RootBus); - - RootBus->Segment = 0; - - RootBus->Supports = Supports; - RootBus->Attributes = Attributes; - - RootBus->DmaAbove4G = FALSE; - - RootBus->AllocationAttributes = AllocAttributes; - RootBus->Bus.Base = RootBusNumber; - RootBus->Bus.Limit = MaxSubBusNumber; - CopyMem (&RootBus->Io, Io, sizeof (*Io)); - CopyMem (&RootBus->Mem, Mem, sizeof (*Mem)); - CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G)); - CopyMem (&RootBus->PMem, PMem, sizeof (*PMem)); - CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G)); - - RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) != - INTEL_Q35_MCH_DEVICE_ID); - - DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate, - &mRootBridgeDevicePathTemplate); - if (DevicePath == NULL) { - DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES)); - return EFI_OUT_OF_RESOURCES; - } - DevicePath->AcpiDevicePath.UID = RootBusNumber; - RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath; - - DEBUG ((DEBUG_INFO, - "%a: populated root bus %d, with room for %d subordinate bus(es)\n", - __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber)); - return EFI_SUCCESS; -} - - -/** - Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge(). - - param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and - initialized with InitRootBridge(), that should be - uninitialized. This function doesn't free RootBus. -**/ -STATIC -VOID -UninitRootBridge ( - IN PCI_ROOT_BRIDGE *RootBus - ) -{ - FreePool (RootBus->DevicePath); -} - /** Return all the root bridge instances in an array. @@ -297,7 +147,7 @@ PciHostBridgeGetRootBridges ( // because now we know how big a bus number range *that* one has, for any // subordinate buses that might exist behind PCI bridges hanging off it. // - Status = InitRootBridge ( + Status = PciHostBridgeUtilityInitRootBridge ( Attributes, Attributes, AllocationAttributes, @@ -322,7 +172,7 @@ PciHostBridgeGetRootBridges ( // Install the last root bus (which might be the only, ie. main, root bus, if // we've found no extra root buses). // - Status = InitRootBridge ( + Status = PciHostBridgeUtilityInitRootBridge ( Attributes, Attributes, AllocationAttributes, @@ -346,7 +196,7 @@ PciHostBridgeGetRootBridges ( FreeBridges: while (Initialized > 0) { --Initialized; - UninitRootBridge (&Bridges[Initialized]); + PciHostBridgeUtilityUninitRootBridge (&Bridges[Initialized]); } FreePool (Bridges); @@ -375,7 +225,7 @@ PciHostBridgeFreeRootBridges ( do { --Count; - UninitRootBridge (&Bridges[Count]); + PciHostBridgeUtilityUninitRootBridge (&Bridges[Count]); } while (Count > 0); FreePool (Bridges); diff --git a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c index 95ed0a280b9b..5dfeba0e6e23 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c +++ b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c @@ -19,6 +19,7 @@ #include <Library/MemoryAllocationLib.h> #include <Library/PcdLib.h> #include <Library/PciHostBridgeLib.h> +#include <Library/PciHostBridgeUtilityLib.h> #include <Library/PciLib.h> #include "PciHostBridge.h" @@ -453,7 +454,7 @@ ScanForRootBridges ( RootBridges ); ASSERT (RootBridges != NULL); - InitRootBridge ( + PciHostBridgeUtilityInitRootBridge ( Attributes, Attributes, 0, (UINT8) PrimaryBus, (UINT8) SubBus, &Io, &Mem, &MemAbove4G, &mNonExistAperture, &mNonExistAperture, diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c index ac94e62612be..92b42566e5f8 100644 --- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c +++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c @@ -11,16 +11,174 @@ **/ #include <IndustryStandard/Acpi10.h> +#include <IndustryStandard/Q35MchIch9.h> +#include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> +#include <Library/DevicePathLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> #include <Library/PciHostBridgeUtilityLib.h> +#pragma pack(1) +typedef struct { + ACPI_HID_DEVICE_PATH AcpiDevicePath; + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; +} OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH; +#pragma pack () + + GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciHostBridgeUtilityLibAcpiAddressSpaceTypeStr[] = { L"Mem", L"I/O", L"Bus" }; +STATIC +CONST +OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = { + { + { + ACPI_DEVICE_PATH, + ACPI_DP, + { + (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)), + (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8) + } + }, + EISA_PNP_ID(0x0A03), // HID + 0 // UID + }, + + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + END_DEVICE_PATH_LENGTH, + 0 + } + } +}; + + +/** + Utility function to initialize a PCI_ROOT_BRIDGE structure. + + @param[in] Supports Supported attributes. + + @param[in] Attributes Initial attributes. + + @param[in] AllocAttributes Allocation attributes. + + @param[in] RootBusNumber The bus number to store in RootBus. + + @param[in] MaxSubBusNumber The inclusive maximum bus number that can be + assigned to any subordinate bus found behind any + PCI bridge hanging off this root bus. + + The caller is repsonsible for ensuring that + RootBusNumber <= MaxSubBusNumber. If + RootBusNumber equals MaxSubBusNumber, then the + root bus has no room for subordinate buses. + + @param[in] Io IO aperture. + + @param[in] Mem MMIO aperture. + + @param[in] MemAbove4G MMIO aperture above 4G. + + @param[in] PMem Prefetchable MMIO aperture. + + @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G. + + @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the + caller) that should be filled in by this + function. + + @retval EFI_SUCCESS Initialization successful. A device path + consisting of an ACPI device path node, with + UID = RootBusNumber, has been allocated and + linked into RootBus. + + @retval EFI_OUT_OF_RESOURCES Memory allocation failed. +**/ +EFI_STATUS +EFIAPI +PciHostBridgeUtilityInitRootBridge ( + IN UINT64 Supports, + IN UINT64 Attributes, + IN UINT64 AllocAttributes, + IN UINT8 RootBusNumber, + IN UINT8 MaxSubBusNumber, + IN PCI_ROOT_BRIDGE_APERTURE *Io, + IN PCI_ROOT_BRIDGE_APERTURE *Mem, + IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G, + IN PCI_ROOT_BRIDGE_APERTURE *PMem, + IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G, + OUT PCI_ROOT_BRIDGE *RootBus + ) +{ + OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath; + + // + // Be safe if other fields are added to PCI_ROOT_BRIDGE later. + // + ZeroMem (RootBus, sizeof *RootBus); + + RootBus->Segment = 0; + + RootBus->Supports = Supports; + RootBus->Attributes = Attributes; + + RootBus->DmaAbove4G = FALSE; + + RootBus->AllocationAttributes = AllocAttributes; + RootBus->Bus.Base = RootBusNumber; + RootBus->Bus.Limit = MaxSubBusNumber; + CopyMem (&RootBus->Io, Io, sizeof (*Io)); + CopyMem (&RootBus->Mem, Mem, sizeof (*Mem)); + CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G)); + CopyMem (&RootBus->PMem, PMem, sizeof (*PMem)); + CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G)); + + RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) != + INTEL_Q35_MCH_DEVICE_ID); + + DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate, + &mRootBridgeDevicePathTemplate); + if (DevicePath == NULL) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES)); + return EFI_OUT_OF_RESOURCES; + } + DevicePath->AcpiDevicePath.UID = RootBusNumber; + RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath; + + DEBUG ((DEBUG_INFO, + "%a: populated root bus %d, with room for %d subordinate bus(es)\n", + __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber)); + return EFI_SUCCESS; +} + + +/** + Utility function to uninitialize a PCI_ROOT_BRIDGE structure set up with + PciHostBridgeUtilityInitRootBridge(). + + @param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and + initialized with PciHostBridgeUtilityInitRootBridge(), + that should be uninitialized. This function doesn't free + RootBus. +**/ +VOID +EFIAPI +PciHostBridgeUtilityUninitRootBridge ( + IN PCI_ROOT_BRIDGE *RootBus + ) +{ + FreePool (RootBus->DevicePath); +} + + /** Utility function to inform the platform that the resource conflict happens. -- 2.29.2
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回复: [edk2-devel] Updated Event: TianoCore Bug Triage - APAC / NAMO
#cal-invite
gaoliming
Hi, all The following issues will be reviewed in this week meeting.
Thanks Liming
发件人: bounce+27952+70511+4905953+8761045@groups.io <bounce+27952+70511+4905953+8761045@groups.io> 代表 devel@edk2.groups.io Calendar
TianoCore Bug Triage - APAC / NAMO When: Where: Organizer: Liming Gao gaoliming@... Description: TianoCore Bug Triage - APAC / NAMO Hosted by Liming Gao
https://meetingsamer34.webex.com/meetingsamer34/j.php?MTID=mb96c5bd411bd010e1e6d43a6f6c65f45 Wednesday, Jan 20, 2021 10:30 am | 50 minutes | (UTC+08:00) Beijing, Chongqing, Hong Kong, Urumqi Occurs every Wednesday effective 1/20/2021 from 10:30 AM to 11:20 AM, (UTC+08:00) Beijing, Chongqing, Hong Kong, Urumqi Meeting number: 126 867 1239 Password: ZhqYQunw246 (94797869 from video systems) d8edc6c9604344b08f727b4bf054eaac_20210120T023000Z
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回复: [edk2-devel] 回复: [edk2-devel] [Patch 0/2] Convert Split tool to python
gaoliming
Bob: The code logic is fine. This is a big change. I suggest to update tool version from 1.0 to 2.0. With this change, Reviewed-by: Liming Gao <gaoliming@...>
Thanks Liming 发件人: bounce+27952+70509+4905953+8761045@groups.io <bounce+27952+70509+4905953+8761045@groups.io> 代表 Bob Feng
Liming,
I have sent the patch V3 that is to move the unit test to tests/Split folder.
Do you have any other concerns about this patch?
Thanks, Bob
From: Feng, Bob C
Sent: Friday, January 15, 2021 9:50 AM To: devel@edk2.groups.io; gaoliming@... Cc: Feng, Bob C <bob.c.feng@...> Subject: RE: [edk2-devel] 回复: [edk2-devel] [Patch 0/2] Convert Split tool to python
Hi Liming,
1. The test framework can be used for both incremental test and functionality test. We can do more discussion when I send out this framework for review. 2. Yes, I agree to add a sub folder under the test folder. I’ll update the patch.
Is there any other comments before I send the patch V2?
Thanks, Bob
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of gaoliming
Bob: Thanks for your planning sharing. For BaseTools test, I still have some questions.
1. For test framework, is it the incremental test framework or the functionality test framework or both? 2. For BaseTools\Source\Python\tests\test_split.py, it creates new directory ‘tests’ for test case scripts, and use test_split.py for split tool. So, new tool test script will follow the same style. Besides, split tool is simple. It may not have its special test case. But, Fce/FMMT are too complex. They need the different bios images as their test cases. Then, where are those test cases placed into? I would prefer to place the test script and its test cases into the same directory. So, I would propose to create the subdirectory in ‘tests’ for each tool test, such as Split for this case. Then, every tool can place its test script and test case into its own directory.
Thanks Liming 发件人: tosubbounce+27952+0+0+0@groups.io <tosubbounce+27952+0+0+0@groups.io> 代表 Bob Feng
Good questions. I answer them inline.
I am still investigating the feasibility of converting the C tools to Python tools. Some C tools are simple but some are complex. I hope all the C tools can be converted to Python tools so that all the tools can be moved to the BaseTools separate repo. I think we can file some BZs to track the progress of the C tools conversion. And I hope there could be more volunteers to be involved in this work.
Except for this patch, my current work for Basetools are:
The unittest is the python build-in library for the unit test. https://docs.python.org/3/library/unittest.html
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Updated Event: TianoCore Bug Triage - APAC / NAMO
#cal-invite
devel@edk2.groups.io Calendar <noreply@...>
TianoCore Bug Triage - APAC / NAMO When: Where: Organizer: Liming Gao gaoliming@... Description: TianoCore Bug Triage - APAC / NAMO Hosted by Liming Gao
https://meetingsamer34.webex.com/meetingsamer34/j.php?MTID=mb96c5bd411bd010e1e6d43a6f6c65f45 Wednesday, Jan 20, 2021 10:30 am | 50 minutes | (UTC+08:00) Beijing, Chongqing, Hong Kong, Urumqi Occurs every Wednesday effective 1/20/2021 from 10:30 AM to 11:20 AM, (UTC+08:00) Beijing, Chongqing, Hong Kong, Urumqi Meeting number: 126 867 1239 Password: ZhqYQunw246 (94797869 from video systems) d8edc6c9604344b08f727b4bf054eaac_20210120T023000Z
Join by video system Dial 1268671239@... You can also dial 173.243.2.68 and enter your meeting number.
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回复: [edk2-devel] [edk2-platforms PATCH v2] Intel Platforms: add OrderedCollectionLib class resolution
gaoliming
Reviewed-by: Liming Gao <gaoliming@...>
toggle quoted messageShow quoted text
-----邮件原件-----
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Re: 回复: [edk2-devel] [Patch 0/2] Convert Split tool to python
Bob Feng
Liming,
I have sent the patch V3 that is to move the unit test to tests/Split folder.
Do you have any other concerns about this patch?
Thanks, Bob
From: Feng, Bob C
Sent: Friday, January 15, 2021 9:50 AM To: devel@edk2.groups.io; gaoliming@... Cc: Feng, Bob C <bob.c.feng@...> Subject: RE: [edk2-devel] 回复: [edk2-devel] [Patch 0/2] Convert Split tool to python
Hi Liming,
1. The test framework can be used for both incremental test and functionality test. We can do more discussion when I send out this framework for review. 2. Yes, I agree to add a sub folder under the test folder. I’ll update the patch.
Is there any other comments before I send the patch V2?
Thanks, Bob
From:
devel@edk2.groups.io <devel@edk2.groups.io>
On Behalf Of gaoliming
Bob: Thanks for your planning sharing. For BaseTools test, I still have some questions.
1. For test framework, is it the incremental test framework or the functionality test framework or both? 2. For BaseTools\Source\Python\tests\test_split.py, it creates new directory ‘tests’ for test case scripts, and use test_split.py for split tool. So, new tool test script will follow the same style. Besides, split tool is simple. It may not have its special test case. But, Fce/FMMT are too complex. They need the different bios images as their test cases. Then, where are those test cases placed into? I would prefer to place the test script and its test cases into the same directory. So, I would propose to create the subdirectory in ‘tests’ for each tool test, such as Split for this case. Then, every tool can place its test script and test case into its own directory.
Thanks Liming 发件人:
tosubbounce+27952+0+0+0@groups.io <tosubbounce+27952+0+0+0@groups.io>
代表 Bob Feng
Good questions. I answer them inline.
I am still investigating the feasibility of converting the C tools to Python tools. Some C tools are simple but some are complex. I hope all the C tools can be converted to Python tools so that all the tools can be moved to the BaseTools
separate repo. I think we can file some BZs to track the progress of the C tools conversion. And I hope there could be more volunteers to be involved in this work.
Except for this patch, my current work for Basetools are:
The unittest is the python build-in library for the unit test.
https://docs.python.org/3/library/unittest.html
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Re: [PATCH v4 0/9] support CPU hot-unplug
Ankur Arora
On 2021-01-18 9:09 a.m., Laszlo Ersek wrote:
On 01/18/21 07:34, Ankur Arora wrote:Sounds good. Thanks.Hi,I've got this series in my review queue (confirming). Ankur Thanks
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Re: [PATCH v4 0/9] Add extra pci roots support for Arm
Laszlo Ersek
On 01/14/21 13:51, Jiahui Cen via groups.io wrote:
Hi Laszlo,I'm looking forward to v6; I'd really like to merge that, so I can move on to reviewing other patches. Thanks! Laszlo
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Re: [PATCH v4 0/9] support CPU hot-unplug
Laszlo Ersek
On 01/18/21 07:34, Ankur Arora wrote:
Hi,I've got this series in my review queue (confirming). I'd like to finish review on the <https://bugzilla.tianocore.org/show_bug.cgi?id=3059> series first, since that's what I've got mostly in my mind at this point. I hope to start reviewing the unplug series in a few days. Thanks Laszlo
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[PATCH v1 2/2] Platform/NXP: Add OEM specific DSDT generator
Vikas Singh
These changes add platform specific DSDT generator
and Clk dsdt properties for LX2160ARDB. Signed-off-by: Vikas Singh <vikas.singh@...> --- .../ConfigurationManagerDxe/ConfigurationManager.c | 9 ++ .../ConfigurationManagerDxe/ConfigurationManager.h | 4 +- .../ConfigurationManagerDxe.inf | 1 + .../ConfigurationManagerPkg.dec | 23 ++++ .../Include/PlatformAcpiTableGenerator.h | 20 +++ .../LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl | 40 ++++++ .../LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl | 15 +++ .../AcpiTablesInclude/PlatformAcpiDsdtLib.inf | 39 ++++++ .../PlatformAcpiDsdtLib/RawDsdtGenerator.c | 146 +++++++++++++++++++++ .../AcpiTablesInclude/PlatformAcpiLib.h | 24 ++++ Platform/NXP/LX2160aRdbPkg/Include/Platform.h | 6 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 3 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 1 + 13 files changed, 330 insertions(+), 1 deletion(-) create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec create mode 100644 Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtGenerator.c create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c index 8db380d..d17729e 100644 --- a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c @@ -78,6 +78,15 @@ FSL_PLATFORM_REPOSITORY_INFO FslPlatformRepositoryInfo = { CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdSpcr), NULL, CFG_MGR_TABLE_ID + }, + + // DSDT (OEM) Table + { + EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, + 0, + CREATE_OEM_ACPI_TABLE_GEN_ID (PlatAcpiTableIdDsdt), + NULL, + CFG_MGR_TABLE_ID } }, diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h index de21659..7b382e8 100644 --- a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h @@ -15,6 +15,7 @@ #define CONFIGURATION_MANAGER_H #include <Platform.h> +#include <PlatformAcpiTableGenerator.h> /** The configuration manager version */ @@ -77,7 +78,8 @@ /** The number of ACPI tables to install */ -#define PLAT_ACPI_TABLE_COUNT 5 +#define CM_MANDATORY_ACPI_TABLES 5 +#define PLAT_ACPI_TABLE_COUNT (CM_MANDATORY_ACPI_TABLES + OEM_ACPI_TABLES) /** A structure describing the platform configuration manager repository information diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf index 496c8bf..7c082cb 100644 --- a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf @@ -31,6 +31,7 @@ EmbeddedPkg/EmbeddedPkg.dec MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec Silicon/NXP/NxpQoriqLs.dec [LibraryClasses] diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec new file mode 100644 index 0000000..e4af8e4 --- /dev/null +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec @@ -0,0 +1,23 @@ +# ConfigurationManager.dec +# +# Copyright 2020 NXP +# Copyright 2020 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +[Defines] + PACKAGE_NAME = ConfigurationManagerPkg + PACKAGE_GUID = 0222b1b1-247f-404e-bdc3-baab65f2ddd3 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes] + Include diff --git a/Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h b/Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h new file mode 100644 index 0000000..c1ec114 --- /dev/null +++ b/Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h @@ -0,0 +1,20 @@ +/** @file + Acpi Table generator headers + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef PLATFORM_ACPI_TABLE_GENERATOR_H +#define PLATFORM_ACPI_TABLE_GENERATOR_H + +typedef enum PlatAcpiTableId { + PlatAcpiTableIdReserved = 0x0000, ///< Reserved + PlatAcpiTableIdDsdt, + PlatAcpiTableIdMax +} PLAT_ACPI_TABLE_ID; + +#endif // PLATFORM_ACPI_TABLE_GENERATOR_H diff --git a/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl new file mode 100644 index 0000000..1008476 --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl @@ -0,0 +1,40 @@ +/** @file + Differentiated System Description Table Fields (DSDT) + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +Scope(_SB) +{ + Device(PCLK) { + Name(_HID, "NXP0017") + Name(CLK, 0) + Name(AVBL, 0) + OperationRegion(RCWS, SystemMemory, DCFG_BASE, DCFG_LEN) + Method(_REG,2) { + if (Arg0 == "RCWS") { + Store(Arg1, AVBL) + } + } + Field (RCWS, ByteAcc, NoLock, Preserve) { + offset(0x100), + PCFG, 2, + PRAT, 6, + offset(0x124), + RESV, 4, + SFRQ, 10 + } + + Method(_INI, 0, NotSerialized) { + Store(SFRQ, Local0) + Multiply(Local0, 500000, Local0) + Multiply(Local0, PRAT, Local0) + Divide(Local0, 6, , Local0) + Store(Local0, CLK) + } + } +} // end of device PCLK diff --git a/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl new file mode 100644 index 0000000..e4f04ce --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl @@ -0,0 +1,15 @@ +/** @file + Differentiated System Description Table Fields (DSDT) + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "Platform.h" + +DefinitionBlock("DsdtTable.aml", "DSDT", 2, "NXP ", "LX2160 ", EFI_ACPI_ARM_OEM_REVISION) { + include ("Clk.asl") +} diff --git a/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf new file mode 100644 index 0000000..ac7d0b6 --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf @@ -0,0 +1,39 @@ +## @file +# Raw Table Generator +# +# Copyright 2020 NXP +# Copyright 2020 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = PlatformAcpiDsdtLib + FILE_GUID = 0b1768cf-13fa-4ecf-b640-338a636d1abb + VERSION_STRING = 1.0 + MODULE_TYPE = DXE_DRIVER + LIBRARY_CLASS = NULL|DXE_DRIVER + CONSTRUCTOR = AcpiDsdtLibConstructor + DESTRUCTOR = AcpiDsdtLibDestructor + +[Sources] + PlatformAcpiDsdtLib/RawDsdtGenerator.c + Dsdt/Dsdt.asl + +[Packages] + DynamicTablesPkg/DynamicTablesPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec + +[LibraryClasses] + BaseLib + +[Pcd] + +[Protocols] + +[Guids] + diff --git a/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtGenerator.c b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtGenerator.c new file mode 100644 index 0000000..375598c --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtGenerator.c @@ -0,0 +1,146 @@ +/** @file + Raw DSDT Table Generator + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <Library/AcpiLib.h> +#include <Library/DebugLib.h> +#include <Protocol/AcpiTable.h> + +// Module specific include files. +#include <AcpiTableGenerator.h> +#include <ConfigurationManagerObject.h> +#include <ConfigurationManagerHelper.h> +#include <Library/TableHelperLib.h> +#include <Protocol/ConfigurationManagerProtocol.h> + +#include "PlatformAcpiLib.h" + +/** Construct the ACPI table using the ACPI table data provided. + + This function invokes the Configuration Manager protocol interface + to get the required hardware information for generating the ACPI + table. + + If this function allocates any resources then they must be freed + in the FreeXXXXTableResources function. + + @param [in] This Pointer to the table generator. + @param [in] AcpiTableInfo Pointer to the ACPI Table Info. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [out] Table Pointer to the constructed ACPI Table. + + @retval EFI_SUCCESS Table generated successfully. + @retval EFI_INVALID_PARAMETER A parameter is invalid. +**/ +STATIC +EFI_STATUS +EFIAPI +BuildRawDsdtTable ( + IN CONST ACPI_TABLE_GENERATOR * CONST This, + IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol, + OUT EFI_ACPI_DESCRIPTION_HEADER ** CONST Table + ) +{ + ASSERT (This != NULL); + ASSERT (AcpiTableInfo != NULL); + ASSERT (CfgMgrProtocol != NULL); + ASSERT (Table != NULL); + ASSERT (AcpiTableInfo->TableGeneratorId == This->GeneratorID); + + if (AcpiTableInfo->AcpiTableData == NULL) { + // Add the dsdt aml code here, Currently NULL place holder. + *Table = (EFI_ACPI_DESCRIPTION_HEADER *)&dsdt_aml_code; + } + + return EFI_SUCCESS; +} + +/** This macro defines the Raw Generator revision. +*/ +#define DSDT_GENERATOR_REVISION CREATE_REVISION (1, 0) + +/** The interface for the Raw Table Generator. +*/ +STATIC +CONST +ACPI_TABLE_GENERATOR RawDsdtGenerator = { + // Generator ID + CREATE_OEM_ACPI_TABLE_GEN_ID (PlatAcpiTableIdDsdt), + // Generator Description + L"ACPI.OEM.RAW.DSDT.GENERATOR", + // ACPI Table Signature - Unused + 0, + // ACPI Table Revision - Unused + 0, + // Minimum ACPI Table Revision - Unused + 0, + // Creator ID + TABLE_GENERATOR_CREATOR_ID_ARM, + // Creator Revision + DSDT_GENERATOR_REVISION, + // Build Table function + BuildRawDsdtTable, + // No additional resources are allocated by the generator. + // Hence the Free Resource function is not required. + NULL, + // Extended build function not needed + NULL, + // Extended build function not implemented by the generator. + // Hence extended free resource function is not required. + NULL +}; + +/** Register the Generator with the ACPI Table Factory. + + @param [in] ImageHandle The handle to the image. + @param [in] SystemTable Pointer to the System Table. + + @retval EFI_SUCCESS The Generator is registered. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_ALREADY_STARTED The Generator for the Table ID + is already registered. +**/ +EFI_STATUS +EFIAPI +AcpiDsdtLibConstructor ( + IN CONST EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE * CONST SystemTable + ) +{ + EFI_STATUS Status; + Status = RegisterAcpiTableGenerator (&RawDsdtGenerator); + DEBUG ((DEBUG_INFO, "OEM: Register DSDT Generator. Status = %r\n", Status)); + ASSERT_EFI_ERROR (Status); + return Status; +} + +/** Deregister the Generator from the ACPI Table Factory. + + @param [in] ImageHandle The handle to the image. + @param [in] SystemTable Pointer to the System Table. + + @retval EFI_SUCCESS The Generator is deregistered. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The Generator is not registered. +**/ +EFI_STATUS +EFIAPI +AcpiDsdtLibDestructor ( + IN CONST EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE * CONST SystemTable + ) +{ + EFI_STATUS Status; + Status = DeregisterAcpiTableGenerator (&RawDsdtGenerator); + DEBUG ((DEBUG_INFO, "OEM: Deregister DSDT Generator. Status = %r\n", Status)); + ASSERT_EFI_ERROR (Status); + return Status; +} diff --git a/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h new file mode 100644 index 0000000..3ab2fd0 --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h @@ -0,0 +1,24 @@ +/** @file + * Acpi lib headers + * + * Copyright 2020 NXP + * Copyright 2020 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LX2160ARDB_PLATFORM_ACPI_LIB_H +#define LX2160ARDB_PLATFORM_ACPI_LIB_H + +#include <PlatformAcpiTableGenerator.h> + +/** C array containing the compiled AML template. + These symbols are defined in the auto generated C file + containing the AML bytecode array. +*/ +extern CHAR8 dsdt_aml_code[]; + +#endif + diff --git a/Platform/NXP/LX2160aRdbPkg/Include/Platform.h b/Platform/NXP/LX2160aRdbPkg/Include/Platform.h index e11ac37..76a41d4 100644 --- a/Platform/NXP/LX2160aRdbPkg/Include/Platform.h +++ b/Platform/NXP/LX2160aRdbPkg/Include/Platform.h @@ -21,6 +21,10 @@ #define SVR_LX2160A 0x873600 +// PCLK +#define DCFG_BASE 0x1E00000 +#define DCFG_LEN 0x1FFFF + // Gic #define GIC_VERSION 3 #define GICD_BASE 0x6000000 @@ -80,6 +84,8 @@ // Platform specific info needed by Configuration Manager +#define OEM_ACPI_TABLES 1 // OEM defined DSDT + #define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','X','2','1','6','0',' ',' ') #define PLAT_PCI_SEG0_CONFIG_BASE LX2160A_PCI_SEG0_CONFIG_BASE diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec index 459440c..8f10d96 100644 --- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec @@ -22,3 +22,6 @@ ################################################################################ [Includes.common] Include # Root include for the package + . + AcpiTablesInclude + Platform/NXP/ConfigurationManagerPkg/Include diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc index 6ba429d..9d898f2 100644 --- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc @@ -82,6 +82,7 @@ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.inf + NULL|Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf } !endif -- 2.7.4
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[PATCH v1 1/2] Platform/NXP: Add Dynamic Acpi for layerscape platforms
Vikas Singh
These changes intend to add Common Configuration Manager (CM)
for all fsl platforms and Platform headers consumed by CM for LX2160ARDB. Signed-off-by: Vikas Singh <vikas.singh@...> --- .../ConfigurationManagerDxe/ConfigurationManager.c | 782 +++++++++++++++++++++ .../ConfigurationManagerDxe/ConfigurationManager.h | 166 +++++ .../ConfigurationManagerDxe.inf | 51 ++ Platform/NXP/Env.sh | 67 ++ Platform/NXP/LX2160aRdbPkg/Include/Platform.h | 240 +++++++ Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 1 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 28 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 12 + Platform/NXP/Readme.md | 35 +- Platform/NXP/build.sh | 115 +++ Silicon/NXP/LX2160A/LX2160A.dsc.inc | 9 + 11 files changed, 1505 insertions(+), 1 deletion(-) create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf create mode 100755 Platform/NXP/Env.sh create mode 100644 Platform/NXP/LX2160aRdbPkg/Include/Platform.h create mode 100755 Platform/NXP/build.sh diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c new file mode 100644 index 0000000..8db380d --- /dev/null +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c @@ -0,0 +1,782 @@ +/** @file + Configuration Manager Dxe + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Glossary: + - Cm or CM - Configuration Manager + - Obj or OBJ - Object +**/ + +#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h> +#include <Library/ArmLib.h> +#include <Library/DebugLib.h> +#include <Library/IoLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Protocol/AcpiTable.h> +#include <Protocol/ConfigurationManagerProtocol.h> + +/** The platform specific headers +*/ +#include "ConfigurationManager.h" +#include <Library/SocLib.h> + +/** The platform configuration repository information. +*/ +STATIC +FSL_PLATFORM_REPOSITORY_INFO FslPlatformRepositoryInfo = { + /// Configuration Manager information + { CONFIGURATION_MANAGER_REVISION, CFG_MGR_OEM_ID }, + + // ACPI Table List + { + // FADT Table + { + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, + CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdFadt), + NULL, + CFG_MGR_TABLE_ID + }, + + // GTDT Table + { + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION, + CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdGtdt), + NULL, + CFG_MGR_TABLE_ID + }, + + // MADT Table + { + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdMadt), + NULL, + CFG_MGR_TABLE_ID + }, + + // PCI MCFG Table + { + EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, + CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdMcfg), + NULL, + CFG_MGR_TABLE_ID + }, + + // SPCR Table + { + EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION, + CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdSpcr), + NULL, + CFG_MGR_TABLE_ID + } + + }, + + // Boot architecture information + { EFI_ACPI_6_2_ARM_PSCI_COMPLIANT }, // BootArchFlags + + // Power management profile information + { EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER }, // PowerManagement Profile + + // Generic Timer Info + { + // The physical base address for the counter control frame + TIMER_BASE_ADDRESS, + // The physical base address for the counter read frame + TIMER_READ_BASE_ADDRESS, + // The secure PL1 timer interrupt + TIMER_SEC_IT, + // The secure PL1 timer flags + GTDT_GTIMER_FLAGS, + // The non-secure PL1 timer interrupt + TIMER_NON_SEC_IT, + // The non-secure PL1 timer flags + GTDT_GTIMER_FLAGS, + // The virtual timer interrupt + TIMER_VIRT_IT, + // The virtual timer flags + GTDT_GTIMER_FLAGS, + // The non-secure PL2 timer interrupt + TIMER_HYP_IT, + // The non-secure PL2 timer flags + GTDT_GTIMER_FLAGS + }, + + // Generic Timer Block Information + PLAT_TIMER_BLOCK_INFO, + + // GTDT Frames + PLAT_TIMER_FRAME_INFO, + + // Watchdog info + PLAT_WATCHDOG_INFO, + + // GIC CPU Interface information + PLAT_GIC_CPU_INTERFACE, + + // GIC Distributor Info + PLAT_GIC_DISTRIBUTOR_INFO, + + // GIC Redistributor + PLAT_GIC_REDISTRIBUTOR_INFO, + + // GIC ITS + PLAT_GIC_ITS_INFO, + + // MCFG Info + PLAT_MCFG_INFO, + + // SPCR Info + PLAT_SPCR_INFO, + + 2.0 // fsl board revision +}; + +/** Initialize the platform configuration repository. + + @param [in] This Pointer to the Configuration Manager Protocol. + + @retval EFI_SUCCESS Success +**/ +STATIC +EFI_STATUS +EFIAPI +InitializePlatformRepository ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This + ) +{ + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + UINT32 Svr; + + PlatformRepo = This->PlatRepoInfo; + + Svr = SocGetSvr (); + if (SVR_SOC_VER(Svr) == SVR_LX2160A) { + PlatformRepo->FslBoardRevision = SVR_MAJOR(Svr); + DEBUG ((DEBUG_INFO, "Fsl : SoC LX2160A Rev = 0x%x\n", PlatformRepo->FslBoardRevision)); + } else { + DEBUG ((DEBUG_INFO, "Fsl : SoC Unknown Rev = 0x%x\n", PlatformRepo->FslBoardRevision)); + } + + return EFI_SUCCESS; +} + +/** Return PCI Configuration Info. + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Object ID of the CM object requested + @param [in] Token A unique token for identifying the requested + CM_ARM_PCI_INFO object. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is + not found. + **/ +EFI_STATUS +EFIAPI +GetPciConfigInfo ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + UINT32 TotalObjCount; + UINT32 ObjIndex; + + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + + PlatformRepo = This->PlatRepoInfo; + + TotalObjCount = ARRAY_SIZE (PlatformRepo->PciConfigInfo); + + for (ObjIndex = 0; ObjIndex < TotalObjCount; ObjIndex++) { + if (Token == (CM_OBJECT_TOKEN)&PlatformRepo->PciConfigInfo[ObjIndex]) + { + CmObject->ObjectId = CmObjectId; + CmObject->Size = sizeof (PlatformRepo->PciConfigInfo[ObjIndex]); + CmObject->Data = (VOID*)&PlatformRepo->PciConfigInfo[ObjIndex]; + CmObject->Count = 1; + return EFI_SUCCESS; + } + } + + return EFI_NOT_FOUND; +} + +/** Return GIC CPU Interface Info. + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Object ID of the CM object requested + @param [in] Token A unique token for identifying the requested + CM_ARM_GICC_INFO object. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is + not found. + **/ +EFI_STATUS +EFIAPI +GetGicCInfo ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + + PlatformRepo = This->PlatRepoInfo; + + if (Token != (CM_OBJECT_TOKEN)&PlatformRepo->GicCInfo) { + return EFI_NOT_FOUND; + } + + CmObject->ObjectId = CmObjectId; + CmObject->Size = sizeof (PlatformRepo->GicCInfo); + CmObject->Data = (VOID*)&PlatformRepo->GicCInfo; + CmObject->Count = ARRAY_SIZE (PlatformRepo->GicCInfo); + + return EFI_SUCCESS; +} + +/** Return a GT Block timer frame info list. + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token A token for identifying the object + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is not found. + **/ +EFI_STATUS + EFIAPI +GetGTBlockTimerFrameInfo ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + + PlatformRepo = This->PlatRepoInfo; + + if (Token != (CM_OBJECT_TOKEN)&PlatformRepo->GTBlock0TimerInfo) { + return EFI_NOT_FOUND; + } + + CmObject->ObjectId = CmObjectId; + CmObject->Size = sizeof (PlatformRepo->GTBlock0TimerInfo); + CmObject->Data = (VOID*)&PlatformRepo->GTBlock0TimerInfo; + CmObject->Count = ARRAY_SIZE (PlatformRepo->GTBlock0TimerInfo); + + return EFI_SUCCESS; +} + +/** Helper to fill configuration manager objects. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] CmObjCount The Configuration Manager Object count. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + + @retval VOID Returns nothing. +**/ +STATIC +VOID +HandleCmObjects ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CONST ObjId, + IN CONST CM_OBJECT_ID CONST CmObjectId, + IN CONST UINT32 CONST ObjectCount, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + + PlatformRepo = This->PlatRepoInfo; + + CmObject->ObjectId = CmObjectId; + + switch (ObjId) { + case EStdObjCfgMgrInfo: + CmObject->Size = sizeof (PlatformRepo->CmInfo); + CmObject->Data = (VOID*)&(PlatformRepo->CmInfo); + break; + case EStdObjAcpiTableList: + if (GET_CM_NAMESPACE_ID (CmObjectId) == EObjNameSpaceStandard) { + CmObject->Size = sizeof (PlatformRepo->CmAcpiTableList); + CmObject->Data = (VOID*)&(PlatformRepo->CmAcpiTableList); + } + //case EArmObjBootArchInfo: + else { + CmObject->Size = sizeof (PlatformRepo->BootArchInfo); + CmObject->Data = (VOID*)&(PlatformRepo->BootArchInfo); + } + break; + case EArmObjPowerManagementProfileInfo: + CmObject->Size = sizeof (PlatformRepo->PmProfileInfo); + CmObject->Data = (VOID*)&(PlatformRepo->PmProfileInfo); + break; + case EArmObjGenericTimerInfo: + CmObject->Size = sizeof (PlatformRepo->GenericTimerInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GenericTimerInfo); + break; + case EArmObjPlatformGenericWatchdogInfo: + CmObject->Size = sizeof (PlatformRepo->Watchdog); + CmObject->Data = (VOID*)&(PlatformRepo->Watchdog); + break; + case EArmObjPlatformGTBlockInfo: + CmObject->Size = sizeof (PlatformRepo->GTBlockInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GTBlockInfo); + break; + case EArmObjGTBlockTimerFrameInfo: + CmObject->Size = sizeof (PlatformRepo->GTBlock0TimerInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GTBlock0TimerInfo); + break; + case EArmObjGicCInfo: + CmObject->Size = sizeof (PlatformRepo->GicCInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GicCInfo); + break; + case EArmObjGicDInfo: + CmObject->Size = sizeof (PlatformRepo->GicDInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GicDInfo); + break; + case EArmObjGicRedistributorInfo: + CmObject->Size = sizeof (PlatformRepo->GicRedistInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GicRedistInfo); + break; + case EArmObjGicItsInfo: + CmObject->Size = sizeof (PlatformRepo->GicItsInfo); + CmObject->Data = (VOID*)&(PlatformRepo->GicItsInfo); + break; + case EArmObjPciConfigSpaceInfo: + CmObject->Size = sizeof (PlatformRepo->PciConfigInfo); + CmObject->Data = (VOID*)&(PlatformRepo->PciConfigInfo); + break; + case EArmObjSerialConsolePortInfo: + CmObject->Size = sizeof (PlatformRepo->SpcrSerialPort); + CmObject->Data = (VOID*)&(PlatformRepo->SpcrSerialPort); + break; + } + CmObject->Count = ObjectCount; + DEBUG (( + DEBUG_INFO, + "CmObjectId: Ptr = 0x%p, Size = %d, Count = %d\n", + CmObject->Data, + CmObject->Size, + CmObject->Count + )); +} + +/** Return a standard namespace object. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token An optional token identifying the object. If + unused this must be CM_NULL_TOKEN. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is not found. +**/ +EFI_STATUS +EFIAPI +GetStandardNameSpaceObject ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token OPTIONAL, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + EFI_STATUS Status; + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + + Status = EFI_SUCCESS; + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + PlatformRepo = This->PlatRepoInfo; + + switch (GET_CM_OBJECT_ID (CmObjectId)) { + HANDLE_CM_OBJECT ( + EStdObjCfgMgrInfo, + CmObjectId, + PlatformRepo->CmInfo, + 1 + ); + HANDLE_CM_OBJECT ( + EStdObjAcpiTableList, + CmObjectId, + PlatformRepo->CmAcpiTableList, + ARRAY_SIZE (PlatformRepo->CmAcpiTableList) + ); + default: { + Status = EFI_NOT_FOUND; + DEBUG (( + DEBUG_ERROR, + "ERROR: Object 0x%x. Status = %r\n", + CmObjectId, + Status + )); + break; + } + } + + return Status; +} + +/** Return an ARM namespace object. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token An optional token identifying the object. If + unused this must be CM_NULL_TOKEN. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is not found. +**/ +EFI_STATUS +EFIAPI +GetArmNameSpaceObject ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token OPTIONAL, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + EFI_STATUS Status; + FSL_PLATFORM_REPOSITORY_INFO * PlatformRepo; + + Status = EFI_SUCCESS; + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + PlatformRepo = This->PlatRepoInfo; + + switch (GET_CM_OBJECT_ID (CmObjectId)) { + HANDLE_CM_OBJECT ( + EArmObjBootArchInfo, + CmObjectId, + PlatformRepo->BootArchInfo, + 1 + ); + HANDLE_CM_OBJECT ( + EArmObjPowerManagementProfileInfo, + CmObjectId, + PlatformRepo->PmProfileInfo, + 1 + ); + HANDLE_CM_OBJECT ( + EArmObjGenericTimerInfo, + CmObjectId, + PlatformRepo->GenericTimerInfo, + 1 + ); + HANDLE_CM_OBJECT ( + EArmObjPlatformGenericWatchdogInfo, + CmObjectId, + PlatformRepo->Watchdog, + PLAT_WATCHDOG_COUNT + ); + HANDLE_CM_OBJECT ( + EArmObjPlatformGTBlockInfo, + CmObjectId, + PlatformRepo->GTBlockInfo, + ARRAY_SIZE (PlatformRepo->GTBlockInfo) + ); + HANDLE_CM_OBJECT_REF_BY_TOKEN ( + EArmObjGTBlockTimerFrameInfo, + CmObjectId, + PlatformRepo->GTBlock0TimerInfo, + ARRAY_SIZE (PlatformRepo->GTBlock0TimerInfo), + Token, + GetGTBlockTimerFrameInfo + ); + HANDLE_CM_OBJECT_REF_BY_TOKEN ( + EArmObjGicCInfo, + CmObjectId, + PlatformRepo->GicCInfo, + ARRAY_SIZE (PlatformRepo->GicCInfo), + Token, + GetGicCInfo + ); + HANDLE_CM_OBJECT ( + EArmObjGicDInfo, + CmObjectId, + PlatformRepo->GicDInfo, + 1 + ); + HANDLE_CM_OBJECT ( + EArmObjGicRedistributorInfo, + CmObjectId, + PlatformRepo->GicRedistInfo, + PLAT_GIC_REDISTRIBUTOR_COUNT + ); + HANDLE_CM_OBJECT ( + EArmObjGicItsInfo, + CmObjectId, + PlatformRepo->GicItsInfo, + PLAT_GIC_ITS_COUNT + ); + HANDLE_CM_OBJECT_REF_BY_TOKEN ( + EArmObjPciConfigSpaceInfo, + CmObjectId, + PlatformRepo->PciConfigInfo, + ARRAY_SIZE (PlatformRepo->PciConfigInfo), + Token, + GetPciConfigInfo + ); + HANDLE_CM_OBJECT ( + EArmObjSerialConsolePortInfo, + CmObjectId, + PlatformRepo->SpcrSerialPort, + 1 + ); + default: { + Status = EFI_NOT_FOUND; + DEBUG (( + DEBUG_INFO, + "INFO: Object 0x%x. Status = %r\n", + CmObjectId, + Status + )); + break; + } + }//switch + + return Status; +} + +/** Return an OEM namespace object. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token An optional token identifying the object. If + unused this must be CM_NULL_TOKEN. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is not found. +**/ +EFI_STATUS +EFIAPI +GetOemNameSpaceObject ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token OPTIONAL, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + EFI_STATUS Status; + + Status = EFI_SUCCESS; + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + + switch (GET_CM_OBJECT_ID (CmObjectId)) { + default: { + Status = EFI_NOT_FOUND; + DEBUG (( + DEBUG_ERROR, + "ERROR: Object 0x%x. Status = %r\n", + CmObjectId, + Status + )); + break; + } + } + + return Status; +} + +/** The GetObject function defines the interface implemented by the + Configuration Manager Protocol for returning the Configuration + Manager Objects. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token An optional token identifying the object. If + unused this must be CM_NULL_TOKEN. + @param [in, out] CmObject Pointer to the Configuration Manager Object + descriptor describing the requested Object. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object information is not found. +**/ +EFI_STATUS +EFIAPI +FslPlatformGetObject ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token OPTIONAL, + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + EFI_STATUS Status; + + if ((This == NULL) || (CmObject == NULL)) { + ASSERT (This != NULL); + ASSERT (CmObject != NULL); + return EFI_INVALID_PARAMETER; + } + + switch (GET_CM_NAMESPACE_ID (CmObjectId)) { + case EObjNameSpaceStandard: + Status = GetStandardNameSpaceObject (This, CmObjectId, Token, CmObject); + break; + case EObjNameSpaceArm: + Status = GetArmNameSpaceObject (This, CmObjectId, Token, CmObject); + break; + case EObjNameSpaceOem: + Status = GetOemNameSpaceObject (This, CmObjectId, Token, CmObject); + break; + default: { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: Unknown Namespace Object = 0x%x. Status = %r\n", + CmObjectId, + Status + )); + break; + } + } + + return Status; +} + +/** The SetObject function defines the interface implemented by the + Configuration Manager Protocol for updating the Configuration + Manager Objects. + + @param [in] This Pointer to the Configuration Manager Protocol. + @param [in] CmObjectId The Configuration Manager Object ID. + @param [in] Token An optional token identifying the object. If + unused this must be CM_NULL_TOKEN. + @param [in] CmObject Pointer to the Configuration Manager Object + descriptor describing the Object. + + @retval EFI_UNSUPPORTED This operation is not supported. +**/ +EFI_STATUS +EFIAPI +FslPlatformSetObject ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This, + IN CONST CM_OBJECT_ID CmObjectId, + IN CONST CM_OBJECT_TOKEN Token OPTIONAL, + IN CM_OBJ_DESCRIPTOR * CONST CmObject + ) +{ + return EFI_UNSUPPORTED; +} + +/** A structure describing the configuration manager protocol interface. +*/ +STATIC +CONST +EDKII_CONFIGURATION_MANAGER_PROTOCOL FslConfigManagerProtocol = { + CREATE_REVISION (1, 0), + FslPlatformGetObject, + FslPlatformSetObject, + &FslPlatformRepositoryInfo +}; + +/** + Entrypoint of Configuration Manager Dxe. + + @param ImageHandle + @param SystemTable + + @return EFI_SUCCESS + @return EFI_LOAD_ERROR + @return EFI_OUT_OF_RESOURCES + +**/ +EFI_STATUS +EFIAPI +ConfigurationManagerDxeInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE * SystemTable + ) +{ + EFI_STATUS Status; + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gEdkiiConfigurationManagerProtocolGuid, + EFI_NATIVE_INTERFACE, + (VOID*)&FslConfigManagerProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: Failed to get Install Configuration Manager Protocol." \ + " Status = %r\n", + Status + )); + goto error_handler; + } + + Status = InitializePlatformRepository ( + &FslConfigManagerProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: Failed to initialize the Platform Configuration Repository." \ + " Status = %r\n", + Status + )); + } + +error_handler: + return Status; +} diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h new file mode 100644 index 0000000..de21659 --- /dev/null +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h @@ -0,0 +1,166 @@ +/** @file + Configuration Manager headers + + Copyright 2020 NXP + Copyright 2020 Puresoftware Ltd + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Glossary: + - Cm or CM - Configuration Manager + - Obj or OBJ - Object +**/ + +#ifndef CONFIGURATION_MANAGER_H +#define CONFIGURATION_MANAGER_H + +#include <Platform.h> + +/** The configuration manager version +*/ +#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (0, 0) + +/** The OEM ID +*/ +#define CFG_MGR_OEM_ID { 'N', 'X', 'P', ' ', ' ', ' ' } + +/** A helper macro for populating the GIC CPU information + */ +#define GICC_ENTRY( \ + CPUInterfaceNumber, \ + Mpidr, \ + PmuIrq, \ + VGicIrq, \ + EnergyEfficiency \ + ) { \ + CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \ + CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \ + EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \ + 0, /* UINT32 ParkingProtocolVersion */ \ + PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \ + 0, /* UINT64 ParkedAddress */ \ + GICC_BASE, /* UINT64 PhysicalBaseAddress */ \ + GICV_BASE, /* UINT64 GICV */ \ + GICH_BASE, /* UINT64 GICH */ \ + VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \ + 0, /* UINT64 GICRBaseAddress */ \ + Mpidr, /* UINT64 MPIDR */ \ + EnergyEfficiency /* UINT8 ProcessorPowerEfficiency */ \ +} + +/** A helper macro for returning configuration manager objects +*/ +#define HANDLE_CM_OBJECT(ObjId, CmObjectId, Object, ObjectCount) \ + case ObjId: \ + HandleCmObjects (This, ObjId, CmObjectId, ObjectCount, CmObject); \ + break; \ + +/** A helper macro for returning configuration manager objects + referenced by token +*/ +#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \ + ObjId, \ + CmObjectId, \ + Object, \ + ObjectCount, \ + Token, \ + HandlerProc \ + ) \ + case ObjId: \ + CmObject->ObjectId = CmObjectId; \ + if (Token == CM_NULL_TOKEN) { \ + HandleCmObjects (This, ObjId, CmObjectId, ObjectCount, CmObject); \ + } else { \ + Status = HandlerProc (This, CmObjectId, Token, CmObject); \ + } \ + break; \ + +/** The number of ACPI tables to install +*/ +#define PLAT_ACPI_TABLE_COUNT 5 + +/** A structure describing the platform configuration + manager repository information +*/ +typedef struct PlatformRepositoryInfo { + /// Configuration Manager Information + CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo; + + /// List of ACPI tables + CM_STD_OBJ_ACPI_TABLE_INFO CmAcpiTableList[PLAT_ACPI_TABLE_COUNT]; + + /// Boot architecture information + CM_ARM_BOOT_ARCH_INFO BootArchInfo; + + /// Power management profile information + CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo; + + /// Generic timer information + CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo; + + /// Generic timer block information + CM_ARM_GTBLOCK_INFO GTBlockInfo[PLAT_GTBLOCK_COUNT]; + + /// Generic timer frame information + CM_ARM_GTBLOCK_TIMER_FRAME_INFO GTBlock0TimerInfo[PLAT_GTFRAME_COUNT]; + + /// Watchdog information + CM_ARM_GENERIC_WATCHDOG_INFO Watchdog; + + /// GIC CPU interface information + CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT]; + + /// GIC distributor information + CM_ARM_GICD_INFO GicDInfo; + + /// GIC Redistributor information + CM_ARM_GIC_REDIST_INFO GicRedistInfo; + + /// GIC ITS information + CM_ARM_GIC_ITS_INFO GicItsInfo; + + /// PCI configuration space information + CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigInfo[PLAT_PCI_CONFG_COUNT]; + + /// Serial port information for serial port console redirection port + CM_ARM_SERIAL_PORT_INFO SpcrSerialPort; + + /// Fsl Board Revision + UINT32 FslBoardRevision; +} FSL_PLATFORM_REPOSITORY_INFO; + +/* + * GTDT_GTIMER_FLAGS + * IT trigger (Level/Edge- Bit 0) and Polarity (Low/High) Bit 1 + * Set bit-0 is 0 (Level trigger), Bit 1 1 (Active low) + */ +#define GTDT_GTIMER_FLAGS (EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY) + +/* + * Timer Frame IT High Level triggered + * IT trigger (Level/Edge- Bit 0) and Polarity (Low/High) Bit 1 + * Set bit-0 is 0 (Level trigger), Bit 1 0 (Active High) + */ +#define GTDT_FRAME_FLAGS 0 + +/* + * Timer frame status + * Access - Secure or non secure <-- Bit 0 + * State - Save (meaning always on) or Lose Context <-- Bit 1 + * Set Bit 0 1 as Secure and Bit 1 zero as lose context +*/ +#define GTDT_FRAME_COMMON_FLAGS EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER + +/* + * Watchdog flags + * IT trigger (Level/Edge- Bit 0), Polarity (Low/High) Bit 1, Secured Bit 2 + * Set Level trigger (Bit 0 as 0) + * Active High (Bit 1 as 0) + * Non secure (Bit 2 as 0) + */ +#define SBSA_WATCHDOG_FLAGS 0 +#define SBSA_SEC_WATCHDOG_FLAGS EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER + +#define GT_BLOCK_FRAME_RES_BASE MAX_UINT64 + +#endif // CONFIGURATION_MANAGER_H diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf new file mode 100644 index 0000000..496c8bf --- /dev/null +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf @@ -0,0 +1,51 @@ +## @file +# Configuration Manager Dxe +# +# Copyright 2020 NXP +# Copyright 2020 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 0x0001001B + BASE_NAME = ConfigurationManagerDxe + FILE_GUID = A97F70AC-3BB4-4596-B4D2-9F948EC12D17 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = ConfigurationManagerDxeInitialize + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = ARM AARCH64 +# + +[Sources] + ConfigurationManager.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + DynamicTablesPkg/DynamicTablesPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + ArmPlatformLib + PrintLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiRuntimeServicesTableLib + +[Protocols] + gEdkiiConfigurationManagerProtocolGuid + +[FixedPcd] + +[Pcd] + +[Depex] + TRUE diff --git a/Platform/NXP/Env.sh b/Platform/NXP/Env.sh new file mode 100755 index 0000000..3a8ad38 --- /dev/null +++ b/Platform/NXP/Env.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# +# Copyright 2020 NXP +# Copyright 2020 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +unset GCC_UTILITY GCC_VERSION MajorVersion MinorVersion + +if [ X"$CROSS_COMPILE_64" != X"" ]; then + ARM64_PREFIX="$CROSS_COMPILE_64" +elif [ X"$CROSS_COMPILE" != X"" ]; then + ARM64_PREFIX="$CROSS_COMPILE" +else + ARM64_PREFIX="aarch64-linux-gnu-" +fi + +GCC_UTILITY="${ARM64_PREFIX}gcc" +CheckGcc=`which $GCC_UTILITY >/dev/null 2>&1` +if [ "$?" -eq 0 ];then + GCC_VERSION=`$GCC_UTILITY -v 2>&1 | tail -n 1 | awk '{print $3}'` + MajorVersion=`echo $GCC_VERSION | cut -d . -f 1` + MinorVersion=`echo $GCC_VERSION | cut -d . -f 2` + GCC_ARCH_PREFIX= + + case $MajorVersion in + 4) + case $MinorVersion in + 9) + GCC_ARCH_PREFIX="GCC49_AARCH64_PREFIX" + ;; + *) + NOTSUPPORTED=1 + ;; + esac + ;; + 5) + case $MinorVersion in + 4) + GCC_ARCH_PREFIX="GCC5_AARCH64_PREFIX" + ;; + *) + GCC_ARCH_PREFIX="GCC5_AARCH64_PREFIX" + echo "Warning: ${GCC_UTILITY} version ($MajorVersion.$MinorVersion) has not been tested, please use at own risk." + ;; + esac + ;; + *) + GCC_ARCH_PREFIX="GCC5_AARCH64_PREFIX" + echo "Warning: ${GCC_UTILITY} version ($MajorVersion.$MinorVersion) has not been tested, please use at own risk." + ;; + esac + + [ -n "$GCC_ARCH_PREFIX" ] && { + export GCC_ARCH_PREFIX="$GCC_ARCH_PREFIX" + export "$GCC_ARCH_PREFIX=$ARM64_PREFIX" + } + + unset ARCH +else + echo "Error: ${GCC_UTILITY} not found. Please check PATH variable." + unset GCC_UTILITY GCC_VERSION MajorVersion MinorVersion +fi + +# Export edk2-platforms path +export PACKAGES_PATH=`dirname \`dirname "$PWD"\`` diff --git a/Platform/NXP/LX2160aRdbPkg/Include/Platform.h b/Platform/NXP/LX2160aRdbPkg/Include/Platform.h new file mode 100644 index 0000000..e11ac37 --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/Include/Platform.h @@ -0,0 +1,240 @@ +/** @file + * Platform headers + * + * Copyright 2020 NXP + * Copyright 2020 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LX2160ARDB_PLATFORM_H +#define LX2160ARDB_PLATFORM_H + +#define EFI_ACPI_ARM_OEM_REVISION 0x00000000 + +// Soc defines +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFE) +#define SVR_MAJOR(svr) (((svr) >> 4) & 0xf) +#define SVR_MINOR(svr) (((svr) >> 0) & 0xf) + +#define SVR_LX2160A 0x873600 + +// Gic +#define GIC_VERSION 3 +#define GICD_BASE 0x6000000 +#define GICI_BASE 0x6020000 +#define GICR_BASE 0x06200000 +#define GICR_LEN 0x200000 +#define GICC_BASE 0x0c0c0000 +#define GICH_BASE 0x0c0d0000 +#define GICV_BASE 0x0c0e0000 + +// UART +#define UART0_BASE 0x21C0000 +#define UART1_BASE 0x21D0000 +#define UART2_BASE 0x21E0000 +#define UART3_BASE 0x21F0000 +#define UART0_IT 64 +#define UART1_IT 65 +#define UART2_IT 104 +#define UART3_IT 105 +#define UART_LEN 0x10000 +#define SPCR_FLOW_CONTROL_NONE 0 + +// Timer +#define TIMER_BLOCK_COUNT 1 +#define TIMER_FRAME_COUNT 4 +#define TIMER_WATCHDOG_COUNT 1 +#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase +#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase +#define TIMER_GT_BLOCK_0_ADDRESS 0x2890000 // a.k.a CNTCTLBase (Secure) +#define TIMER_GT_BASE_0_ADDRESS 0x28A0000 // a.k.a CNTBase0 +#define TIMER_GT_BASE_1_ADDRESS 0x28B0000 // a.k.a CNTBase1 +#define TIMER_GT_BASE_2_ADDRESS 0x28C0000 // a.k.a CNTBase2 +#define TIMER_GT_BASE_3_ADDRESS 0x28D0000 // a.k.a CNTBase3 +#define TIMER_GT_BASE_0_EL0_ADDRESS 0x28E0000 // a.k.a CNTBase0EL0 +#define TIMER_GT_BASE_2_EL0_ADDRESS 0x28F0000 // a.k.a CNTBase2EL0 +#define TIMER_WDT0_REFRESH_BASE 0x2390000 +#define TIMER_WDT0_CONTROL_BASE 0x23A0000 +#define TIMER_SEC_IT 29 +#define TIMER_NON_SEC_IT 30 +#define TIMER_VIRT_IT 27 +#define TIMER_HYP_IT 26 +#define TIMER_FRAME0_IT 78 +#define TIMER_FRAME1_IT 79 +#define TIMER_FRAME2_IT 92 +#define TIMER_FRAME3_IT 93 +#define TIMER_WDT0_IT 91 + +#define DEFAULT_PLAT_FREQ 700000000 + +// Mcfg +#define LX2160A_PCI_SEG0_CONFIG_BASE 0x9000000000 +#define LX2160A_PCI_SEG0 0x2 +#define LX2160A_PCI_SEG_BUSNUM_MIN 0x0 +#define LX2160A_PCI_SEG_BUSNUM_MAX 0xff +#define LX2160A_PCI_SEG1_CONFIG_BASE 0xA000000000 +#define LX2160A_PCI_SEG1 0x4 + +// Platform specific info needed by Configuration Manager + +#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','X','2','1','6','0',' ',' ') + +#define PLAT_PCI_SEG0_CONFIG_BASE LX2160A_PCI_SEG0_CONFIG_BASE +#define PLAT_PCI_SEG0 LX2160A_PCI_SEG0 +#define PLAT_PCI_SEG_BUSNUM_MIN LX2160A_PCI_SEG_BUSNUM_MIN +#define PLAT_PCI_SEG_BUSNUM_MAX LX2160A_PCI_SEG_BUSNUM_MAX +#define PLAT_PCI_SEG1_CONFIG_BASE LX2160A_PCI_SEG1_CONFIG_BASE +#define PLAT_PCI_SEG1 LX2160A_PCI_SEG1 + +#define PLAT_GIC_VERSION GIC_VERSION +#define PLAT_GICD_BASE GICD_BASE +#define PLAT_GICI_BASE GICI_BASE +#define PLAT_GICR_BASE GICR_BASE +#define PLAT_GICR_LEN GICR_LEN +#define PLAT_GICC_BASE GICC_BASE +#define PLAT_GICH_BASE GICH_BASE +#define PLAT_GICV_BASE GICV_BASE + +#define PLAT_CPU_COUNT 16 +#define PLAT_GTBLOCK_COUNT 1 +#define PLAT_GTFRAME_COUNT 4 +#define PLAT_PCI_CONFG_COUNT 2 + +#define PLAT_WATCHDOG_COUNT 1 +#define PLAT_GIC_REDISTRIBUTOR_COUNT 1 +#define PLAT_GIC_ITS_COUNT 1 + +/* GIC CPU Interface information + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency) + */ +#define PLAT_GIC_CPU_INTERFACE { \ + GICC_ENTRY (0, GET_MPID (0, 0), 23, 0x19, 0), \ + GICC_ENTRY (1, GET_MPID (0, 1), 23, 0x19, 0), \ + GICC_ENTRY (2, GET_MPID (1, 0), 23, 0x19, 0), \ + GICC_ENTRY (3, GET_MPID (1, 1), 23, 0x19, 0), \ + GICC_ENTRY (4, GET_MPID (2, 0), 23, 0x19, 0), \ + GICC_ENTRY (5, GET_MPID (2, 1), 23, 0x19, 0), \ + GICC_ENTRY (6, GET_MPID (3, 0), 23, 0x19, 0), \ + GICC_ENTRY (7, GET_MPID (3, 1), 23, 0x19, 0), \ + GICC_ENTRY (8, GET_MPID (4, 0), 23, 0x19, 0), \ + GICC_ENTRY (9, GET_MPID (4, 1), 23, 0x19, 0), \ + GICC_ENTRY (10, GET_MPID (5, 0), 23, 0x19, 0), \ + GICC_ENTRY (11, GET_MPID (5, 1), 23, 0x19, 0), \ + GICC_ENTRY (12, GET_MPID (6, 0), 23, 0x19, 0), \ + GICC_ENTRY (13, GET_MPID (6, 1), 23, 0x19, 0), \ + GICC_ENTRY (14, GET_MPID (7, 0), 23, 0x19, 0), \ + GICC_ENTRY (15, GET_MPID (7, 1), 23, 0x19, 0) \ +} + +// watchdogs +#define PLAT_WATCHDOG_INFO \ + { \ + TIMER_WDT0_CONTROL_BASE, \ + TIMER_WDT0_REFRESH_BASE, \ + TIMER_WDT0_IT, \ + SBSA_WATCHDOG_FLAGS \ + } \ + +#define PLAT_TIMER_BLOCK_INFO \ + { \ + { \ + TIMER_GT_BLOCK_0_ADDRESS, \ + PLAT_GTFRAME_COUNT, \ + (CM_OBJECT_TOKEN)((UINT8*)&FslPlatformRepositoryInfo + \ + OFFSET_OF (EDKII_PLATFORM_REPOSITORY_INFO, GTBlock0TimerInfo)) \ + } \ + } \ + +#define PLAT_TIMER_FRAME_INFO \ + { \ + { \ + 0, /* UINT8 GTFrameNumber */ \ + TIMER_GT_BASE_0_ADDRESS, /* UINT64 CntBaseX */ \ + TIMER_GT_BASE_0_EL0_ADDRESS, /* UINT64 CntEL0BaseX */ \ + TIMER_FRAME0_IT, /* UINT32 GTxPhysicalTimerGSIV */ \ + GTDT_FRAME_FLAGS, /* UINT32 GTxPhysicalTimerFlags */ \ + TIMER_FRAME0_IT, /* UINT32 GTxVirtualTimerGSIV */ \ + GTDT_FRAME_FLAGS, /* UINT32 GTxVirtualTimerFlags */ \ + 0 /* UINT32 GTxCommonFlags */ \ + }, /* Gtdt.Frames[0] */ \ + { \ + 1, /* UINT8 GTFrameNumber */ \ + TIMER_GT_BASE_1_ADDRESS, /* UINT64 CntBaseX */ \ + GT_BLOCK_FRAME_RES_BASE, /* UINT64 CntEL0BaseX */ \ + TIMER_FRAME1_IT, /* UINT32 GTxPhysicalTimerGSIV */ \ + GTDT_FRAME_FLAGS, /* UINT32 GTxPhysicalTimerFlags */ \ + 0, /* UINT32 GTxVirtualTimerGSIV */ \ + 0, /* UINT32 GTxVirtualTimerFlags */ \ + GTDT_FRAME_COMMON_FLAGS /* UINT32 GTxCommonFlags */ \ + }, /* Gtdt.Frames[1] */ \ + { \ + 2, /* UINT8 GTFrameNumber */ \ + TIMER_GT_BASE_2_ADDRESS, /* UINT64 CntBaseX */ \ + TIMER_GT_BASE_2_EL0_ADDRESS, /* UINT64 CntEL0BaseX */ \ + TIMER_FRAME2_IT, /* UINT32 GTxPhysicalTimerGSIV */ \ + GTDT_FRAME_FLAGS, /* UINT32 GTxPhysicalTimerFlags */ \ + 0, /* UINT32 GTxVirtualTimerGSIV */ \ + 0, /* UINT32 GTxVirtualTimerFlags */ \ + GTDT_FRAME_COMMON_FLAGS /* UINT32 GTxCommonFlags */ \ + },/* Gtdt.Frames[2] */ \ + { \ + 3, /* UINT8 GTFrameNumber */ \ + TIMER_GT_BASE_3_ADDRESS, /* UINT64 CntBaseX */ \ + GT_BLOCK_FRAME_RES_BASE, /* UINT64 CntEL0BaseX */ \ + TIMER_FRAME3_IT, /* UINT32 GTxPhysicalTimerGSIV */ \ + GTDT_FRAME_FLAGS, /* UINT32 GTxPhysicalTimerFlags */ \ + 0, /* UINT32 GTxVirtualTimerGSIV */ \ + 0, /* UINT32 GTxVirtualTimerFlags */ \ + GTDT_FRAME_COMMON_FLAGS /* UINT32 GTxCommonFlags */ \ + }, /* Gtdt.Frames[3] */ \ + } \ + +#define PLAT_GIC_DISTRIBUTOR_INFO \ + { \ + PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \ + 0, /* UINT32 SystemVectorBase */ \ + PLAT_GIC_VERSION /* UINT8 GicVersion */ \ + } \ + +#define PLAT_GIC_REDISTRIBUTOR_INFO \ + { \ + PLAT_GICR_BASE, /* UINT64 DiscoveryRangeBaseAddress */ \ + PLAT_GICR_LEN /* UINT32 DiscoveryRangeLength */ \ + } \ + +#define PLAT_GIC_ITS_INFO \ + { \ + 0, /* UINT32 GIC ITS ID */ \ + PLAT_GICI_BASE, /* UINT64 The 64-bit physical address for ITS */ \ + 0 /* UINT32 Populate the GIC ITS affinity in SRAT. */ \ + } \ + +#define PLAT_MCFG_INFO \ + { \ + { \ + PLAT_PCI_SEG0_CONFIG_BASE, \ + PLAT_PCI_SEG0, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + }, \ + { \ + PLAT_PCI_SEG1_CONFIG_BASE, \ + PLAT_PCI_SEG1, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + } \ + } \ + +#define PLAT_SPCR_INFO \ + { \ + UART0_BASE, \ + UART0_IT, \ + 115200, \ + 0, \ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART \ + } \ + +#endif // LX2160ARDB_PLATFORM_H diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec index 03996b0..459440c 100644 --- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec @@ -2,6 +2,7 @@ # LX2160a board package. # # Copyright 2018, 2020 NXP +# Copyright 2020 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc index 7132b3e..6ba429d 100644 --- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc @@ -3,6 +3,7 @@ # LX2160ARDB Board package. # # Copyright 2018-2020 NXP +# Copyright 2020 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,9 +30,17 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE DEFINE NETWORK_ISCSI_ENABLE = FALSE + # This flag controls the dynamic acpi generation + # + DEFINE DYNAMIC_ACPI_ENABLE = TRUE + !include Silicon/NXP/NxpQoriqLs.dsc.inc !include Silicon/NXP/LX2160A/LX2160A.dsc.inc +!if $(DYNAMIC_ACPI_ENABLE) == TRUE + !include DynamicTablesPkg/DynamicTables.dsc.inc +!endif + [LibraryClasses.common] ArmPlatformLib|Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf @@ -64,6 +73,25 @@ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf # + # Dynamic Table Factory + !if $(DYNAMIC_ACPI_ENABLE) == TRUE + DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf { + <LibraryClasses> + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.inf + } + !endif + + # + # Acpi Support + # + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + + # # Networking stack # !include NetworkPkg/Network.dsc.inc diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf index 111c845..0680565 100644 --- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf @@ -3,6 +3,7 @@ # FLASH layout file for LX2160a board. # # Copyright 2018-2020 NXP +# Copyright 2020 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -103,6 +104,17 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf # + # Acpi Support + # + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + + !if $(DYNAMIC_ACPI_ENABLE) == TRUE + INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf + !include DynamicTablesPkg/DynamicTables.fdf.inc + !endif + + # # Multiple Console IO support # INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf diff --git a/Platform/NXP/Readme.md b/Platform/NXP/Readme.md index 2d60d7c..878df75 100644 --- a/Platform/NXP/Readme.md +++ b/Platform/NXP/Readme.md @@ -2,4 +2,37 @@ Support for all NXP boards is available in this directory. # How to build -Please follow top-level Readme.md for build instructions.. +Introduced a "build.sh" script under edk2-platforms/NXP/ to automate fsl +platforms build system. Also called UEFI build script for NXP Layer Scape +SoCs And also mandatorily needed to support Dynamic ACPI framework for fsl +based platforms. +This script intend to: + - Setup workspace + - Setup BaseTools in edk2 + - Setup Target and Tools needed + - Finally exports variables if needed (in case of Dynamic ACPI) + +Most importantly it uses source environment file "Env.sh". +This file sources in: + - GCC VERSION info + - CROSS COMPILE info + - ARCH info etc. + +This build shell script (build.sh) expects: + Arg 1 (mandatory): SoC Type (can be LS1046 / LS2088 / LX2160 / LS1028). + Arg 2 (mandatory): Board Type (can be RDB / QDS /FRWY). + Arg 3 (mandatory): Build candidate (can be RELEASE or DEBUG). + By default we build the RELEASE candidate. + Arg 4 (optional): clean - To do a 'make clean' operation. + +Usage: $ ./build.sh <Soc Type> <Board Type> <Build Type> + +E.g: $ ./build.sh LX2160 RDB RELEASE + Or + $ ./build.sh LX2160 RDB RELEASE clean // For build cleanup + +# Prerequisites + +Please follow top-level Readme.md's "Obtaining source code" tag +https://github.com/tianocore/edk2-platforms#obtaining-source-code +for sources. diff --git a/Platform/NXP/build.sh b/Platform/NXP/build.sh new file mode 100755 index 0000000..0c47e73 --- /dev/null +++ b/Platform/NXP/build.sh @@ -0,0 +1,115 @@ +#!/bin/bash +# UEFI build script for NXP Layer Scape SoCs +# +# Copyright 2020 NXP +# Copyright 2020 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +# source environment file +source Env.sh + +# Global Defaults +ARCH=AARCH64 +TARGET_TOOLS=`echo $GCC_ARCH_PREFIX | cut -d _ -f 1` +BASE_DIR=../../.. + +[ -z "$TARGET_TOOLS" ] && { + echo "TARGET_TOOLS not found. Please run \"source Env.cshrc\" ." + exit 1 +} + +print_usage_banner() +{ + echo "" + echo "This shell script expects:" + echo " Arg 1 (mandatory): SoC Type (can be LS1043 / LS1046 / LS2088 / LX2160 / LS1028)." + echo " Arg 2 (mandatory): Board Type (can be RDB / QDS /FRWY)." + echo " Arg 3 (mandatory): Build candidate (can be RELEASE or DEBUG). By + default we build the RELEASE candidate." + echo " Arg 4 (optional): clean - To do a 'make clean' operation." +} + +# Check for total num of input arguments +if [[ "$#" -gt 4 ]]; then + echo "Illegal number of parameters" + print_usage_banner + exit +fi + +# Check for third parameter to be clean only +if [[ "$4" && $4 != "clean" ]]; then + echo "Error ! Either clean or emplty" + print_usage_banner + exit +fi + +# Check for input arguments +if [[ $1 == "" || $2 == "" || $3 == "" ]]; then + echo "Error !" + print_usage_banner + exit +fi + +# Check for input arguments +if [[ $1 != "LS1043" && $1 != "LS1046" && $1 != "LS2088" && $1 != "LX2160" && $1 != "LS1028" ]]; then + echo "Error ! Incorrect Soc Type specified." + print_usage_banner + exit +fi + +# Check for input arguments +if [[ $2 != "RDB" && $2 != "QDS" && $2 != "FRWY" ]]; then + echo "Error ! Incorrect Board Type specified." + print_usage_banner + exit +fi + +# Check for input arguments +if [[ $3 != "RELEASE" ]]; then + if [[ $3 != "DEBUG" ]]; then + echo "Error ! Incorrect build target specified." + print_usage_banner + exit + fi +fi + +# Set Package drirectory +if [[ $2 == "RDB" ]]; then + PKG="aRdbPkg" + if [[ $2 == "QDS" ]]; then + PKG="aQdsPkg" + fi +elif [[ $2 == "FRWY" ]]; then + PKG="aFrwyPkg" +fi + +echo ".........................................." +echo "Welcome to $1$PKG UEFI Build environment" +echo ".........................................." + +if [[ $4 == "clean" ]]; then + echo "Cleaning up the build directory '$BASE_DIR/Build/$1$PKG/'.." + rm -rf $BASE_DIR/Build/$1$PKG/* + exit +fi + +# Clean-up +set -e +shopt -s nocasematch + +# +# Setup workspace now +# +echo Initializing workspace +cd $BASE_DIR + +# Use the BaseTools in edk2 +export EDK_TOOLS_PATH=`pwd`/BaseTools +source edksetup.sh BaseTools + +export DYNAMIC_ACPI_PLATFORM=$1$PKG +export DYNAMIC_ACPI_INC="$1A" + +build -p "$PACKAGES_PATH/Platform/NXP/$1$PKG/$1$PKG.dsc" -a $ARCH -t $TARGET_TOOLS -b $3 diff --git a/Silicon/NXP/LX2160A/LX2160A.dsc.inc b/Silicon/NXP/LX2160A/LX2160A.dsc.inc index 856fc59..149376f 100644 --- a/Silicon/NXP/LX2160A/LX2160A.dsc.inc +++ b/Silicon/NXP/LX2160A/LX2160A.dsc.inc @@ -63,4 +63,13 @@ [Components.common] ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + # + # Configuration Manager +!if $(DYNAMIC_ACPI_ENABLE) == TRUE + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf { + <BuildOptions> + *_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/NXP/$(DYNAMIC_ACPI_PLATFORM)/Include + } +!endif + ## -- 2.7.4
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[PATCH v1 0/2] Dynamic ACPI framework for fsl layerscape platforms
Vikas Singh
This patch series sets the foundation of Dynamic ACPI framework for all
fsl layerscape platforms. In order to achieve: - Configurable firmware builds. - Unify firmware build for similar platforms. - Minimize/eliminate human induced errors. - Validate and generate firmware that complies with relevant specifications this change set will introduce following changes in below defined order under edk2-platforms/NXP for LX2160ARDB platform. (1) Introduced edk2-platforms/NXP/ConfigurationManager It creates the platform repositories dynamically during build time and initializes with platform specific information and serves all requestes coming from OEM/standard firmware table generators. Configuration Manager(CM) will be common for all fsl platforms. (2) Introduced edk2-platforms/NXP/LX2160ARDB/Include/Platform.h It has all the declarations and the definitions specified for the platforms. These definitions will be inturn consumed by Configuration Manager. Additionally the placement of this header under "Include" dir will make these macro's availale to other translation units of the platform built. (3) Introduced edk2-platforms/NXP/LX2160ARDB/AcpiTablesInclude This is a placeholder for - OEM specific firmware acpi table generators. This also includes IP specific - DSDT/SSDT generators for the OEM's platform. Currently Dsdt.asl is a place holder having only platform's clock related dsdt properties for LX2160ARDB but it is intended to extend this "Dsdt.asl" to hold other table as well in next patch series. (4) Introduced a new "DYNAMIC_ACPI_ENABLE" flag to control DACPI framework. Currently this flag is used for LX2160ARDB and by default it is enabled. This flag can also extend to other fsl layerscape platforms in future. Changes can be referred under: - LX2160ARDb.dsc - LX2160ARDB.fdf (5) Introduced a "build.sh" script under edk2-platforms/NXP/ to automate fsl platforms build system. And also mandatorily need to support Dynamic ACPI framework for all fsl platforms. It exports build environment variables and also invokes "Env.sh". Vikas Singh (2): Platform/NXP: Add Dynamic Acpi for layerscape platforms Platform/NXP: Add OEM specific DSDT generator .../ConfigurationManagerDxe/ConfigurationManager.c | 791 +++++++++++++++++++++ .../ConfigurationManagerDxe/ConfigurationManager.h | 168 +++++ .../ConfigurationManagerDxe.inf | 52 ++ .../ConfigurationManagerPkg.dec | 23 + .../Include/PlatformAcpiTableGenerator.h | 20 + Platform/NXP/Env.sh | 67 ++ .../LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl | 40 ++ .../LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl | 15 + .../AcpiTablesInclude/PlatformAcpiDsdtLib.inf | 39 + .../PlatformAcpiDsdtLib/RawDsdtGenerator.c | 146 ++++ .../AcpiTablesInclude/PlatformAcpiLib.h | 24 + Platform/NXP/LX2160aRdbPkg/Include/Platform.h | 246 +++++++ Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 4 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 29 + Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 12 + Platform/NXP/Readme.md | 35 +- Platform/NXP/build.sh | 115 +++ Silicon/NXP/LX2160A/LX2160A.dsc.inc | 9 + 18 files changed, 1834 insertions(+), 1 deletion(-) create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.h create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManagerDxe.inf create mode 100644 Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec create mode 100644 Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h create mode 100755 Platform/NXP/Env.sh create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Clk.asl create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtGenerator.c create mode 100644 Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h create mode 100644 Platform/NXP/LX2160aRdbPkg/Include/Platform.h create mode 100755 Platform/NXP/build.sh -- 2.7.4
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Re: [PATCH v0] Platform/NXP: Add Dynamic Acpi for layerscape platforms
Leif Lindholm
+Sami,
On Sat, Jan 16, 2021 at 10:15:41 +0530, Vikas Singh wrote: On Sun, Jan 10, 2021 at 8:56 AM Leif Lindholm <leif@...> wrote:This sounds sensible.Leif, I plan to disintegrate the complete changes into 2 patch set's
Do you mean 5.5.2.1:Leif, changes are in accordance with :diff --git a/Platform/NXP/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/NXP/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.hThis is code obfuscation. Please don't invent your own programming Functional macros are generally discouraged. ? and in reference to :Clearly I was asleep at the wheel when reviewing that set. So let me state unambiguously: Hiding *gotos* away in a header macro turns the language into something other than C. Sami: please rewrite the referenced code in a way that does not obfuscate the program flow. Vikas: please submit a v2 that does not obfuscate the program flow. OK. This is still an improvement over direct hard-coding.Leif, I plan to chnage like this : PLAT_ACPI_TABLE_COUNT =+/** The number of ACPI tables to installThis feels suboptimal. Makes sense.Leif, this will be corrected.diff --git a/Platform/NXP/ConfigurationManager/Include/PlatformAcpiTableGenerator.h b/Platform/NXP/ConfigurationManager/Include/PlatformAcpiTableGenerator.hWhere does the EPlat prefix come from? What does it stand for? Best Regards,+ Leif
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Re: [PATCH v2 05/10] UefiPayloadPkg: add OrderedCollectionLib class resolution
Laszlo Ersek
Ping -- Benjamin, Guo, Maurice, this is a one-liner for UefiPayloadPkg;
toggle quoted messageShow quoted text
please approve. Thanks Laszlo
On 01/13/21 09:54, Laszlo Ersek wrote:
A subsequent patch in the series will make the
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Re: [PATCH v2 04/10] EmulatorPkg: add OrderedCollectionLib class resolution
Laszlo Ersek
Ping -- Ray, can you please check this?; it's a one-liner patch.
toggle quoted messageShow quoted text
Thanks. Laszlo
On 01/13/21 09:54, Laszlo Ersek wrote:
A subsequent patch in the series will make the
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Re: [edk2-platforms PATCH v2] Intel Platforms: add OrderedCollectionLib class resolution
Philippe Mathieu-Daudé <philmd@...>
On 1/18/21 9:48 AM, Laszlo Ersek wrote:
The edk2 patchReviewed-by: Philippe Mathieu-Daude <philmd@...>
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